Changeset 10901 for firmware/FAD/FACT_FAD_20MHz_VAR_PS

Timestamp:

06/01/11 16:53:00 (14 years ago)

Author:

neise

Message:

gui stuff

Location:

firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib/hds

Files:

• .cache.dat (modified) ( previous)
• .hdlsidedata/_memory_manager_2.vhd._fpf (added)
• .hdlsidedata/_w5300_interface.vhd._fpf (added)
• .hdlsidedata/_w5300_modul2.vhd._fpf (added)
• .xrf/fad_board_with_5300_2_struct.xrf (added)
• .xrf/fad_main_with_w53002_struct.xrf (added)
• @f@a@d_main/struct.bd (modified) (174 diffs)
• @f@a@d_main/struct.bd.bak (modified) (1129 diffs)
• @f@a@d_main/symbol.sb (modified) (77 diffs)
• _fad_board_with_5300_2._epf (added)
• _fad_main_tb._epf (added)
• _fad_main_with_w53002._epf (added)
• _w5300_interface._epf (added)
• _w5300_modul2._epf (added)

firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib/hds/@f@a@d_main/struct.bd ¶

@@ -400 +400 @@
 )
 version "29.1"
-appVersion "2009.1 (Build 12)"
+appVersion "2009.2 (Build 10)"
 noEmbeddedEditors 1
 model (BlockDiag
@@ -407 +407 @@
 (vvPair
 variable "HDLDir"
-value "D:\\firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hdl"
+value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hdl"
 )
 (vvPair
 variable "HDSDir"
-value "D:\\firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds"
+value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds"
 )
 (vvPair
 variable "SideDataDesignDir"
-value "D:\\firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds\\@f@a@d_main\\struct.bd.info"
+value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds\\@f@a@d_main\\struct.bd.info"
 )
 (vvPair
 variable "SideDataUserDir"
-value "D:\\firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds\\@f@a@d_main\\struct.bd.user"
+value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds\\@f@a@d_main\\struct.bd.user"
 )
 (vvPair
 variable "SourceDir"
-value "D:\\firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds"
+value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds"
 )
 (vvPair
@@ -439 +439 @@
 (vvPair
 variable "d"
-value "D:\\firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds\\@f@a@d_main"
+value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds\\@f@a@d_main"
 )
 (vvPair
 variable "d_logical"
-value "D:\\firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds\\FAD_main"
+value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds\\FAD_main"
 )
 (vvPair
 variable "date"
-value "25.05.2011"
+value "01.06.2011"
 )
 (vvPair
@@ -459 +459 @@
 (vvPair
 variable "dd"
-value "25"
+value "01"
 )
 (vvPair
@@ -487 +487 @@
 (vvPair
 variable "host"
-value "IHP110"
+value "E5B-LABOR6"
 )
 (vvPair
@@ -523 +523 @@
 (vvPair
 variable "mm"
-value "05"
+value "06"
 )
 (vvPair
@@ -531 +531 @@
 (vvPair
 variable "month"
-value "Mai"
+value "Jun"
 )
 (vvPair
 variable "month_long"
-value "Mai"
+value "Juni"
 )
 (vvPair
 variable "p"
-value "D:\\firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds\\@f@a@d_main\\struct.bd"
+value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds\\@f@a@d_main\\struct.bd"
 )
 (vvPair
 variable "p_logical"
-value "D:\\firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds\\FAD_main\\struct.bd"
+value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds\\FAD_main\\struct.bd"
 )
 (vvPair
@@ -567 +567 @@
 (vvPair
 variable "task_ModelSimPath"
-value "D:\\modeltech_6.5e\\win32"
+value "C:\\modeltech_6.6a\\win32"
 )
 (vvPair
@@ -599 +599 @@
 (vvPair
 variable "time"
-value "14:53:43"
+value "17:50:58"
 )
 (vvPair
@@ -607 +607 @@
 (vvPair
 variable "user"
-value "daqct3"
+value "dneise"
 )
 (vvPair
 variable "version"
-value "2009.1 (Build 12)"
+value "2009.2 (Build 10)"
 )
 (vvPair
@@ -691 +691 @@
 )
 xt "-172000,126000,-125500,126800"
-st "SIGNAL write_ea                     : std_logic_vector(0 downto 0)                 := \"0\"
-"
+st "SIGNAL write_ea                     : std_logic_vector(0 downto 0)                 := \"0\""
 )
 )
@@ -710 +709 @@
 )
 xt "-172000,60400,-129000,61200"
-st "SIGNAL addr_out                     : std_logic_vector(RAMADDRWIDTH64b-1 DOWNTO 0)
-"
+st "SIGNAL addr_out                     : std_logic_vector(RAMADDRWIDTH64b-1 DOWNTO 0)"
 )
 )
@@ -729 +727 @@
 )
 xt "-172000,65200,-136500,66000"
-st "SIGNAL data_out                     : std_logic_vector(63 DOWNTO 0)
-"
+st "SIGNAL data_out                     : std_logic_vector(63 DOWNTO 0)"
 )
 )
@@ -748 +745 @@
 )
 xt "-172000,94800,-129000,95600"
-st "SIGNAL ram_addr                     : std_logic_vector(RAMADDRWIDTH64b+1 DOWNTO 0)
-"
+st "SIGNAL ram_addr                     : std_logic_vector(RAMADDRWIDTH64b+1 DOWNTO 0)"
 )
 )
@@ -767 +763 @@
 )
 xt "-172000,95600,-136500,96400"
-st "SIGNAL ram_data                     : std_logic_vector(15 downto 0)
-"
+st "SIGNAL ram_data                     : std_logic_vector(15 downto 0)"
 )
 )
@@ -786 +781 @@
 )
 xt "-172000,43200,-129000,44000"
-st "wiz_reset                    : std_logic                                    := '1'
-"
+st "wiz_reset                    : std_logic                                    := '1'"
 )
 )
@@ -805 +799 @@
 )
 xt "-172000,40800,-140500,41600"
-st "wiz_addr                     : std_logic_vector(9 DOWNTO 0)
-"
+st "wiz_addr                     : std_logic_vector(9 DOWNTO 0)"
 )
 )
@@ -824 +817 @@
 )
 xt "-172000,45600,-140000,46400"
-st "wiz_data                     : std_logic_vector(15 DOWNTO 0)
-"
+st "wiz_data                     : std_logic_vector(15 DOWNTO 0)"
 )
 )
@@ -843 +835 @@
 )
 xt "-172000,41600,-129000,42400"
-st "wiz_cs                       : std_logic                                    := '1'
-"
+st "wiz_cs                       : std_logic                                    := '1'"
 )
 )
@@ -862 +853 @@
 )
 xt "-172000,44000,-129000,44800"
-st "wiz_wr                       : std_logic                                    := '1'
-"
+st "wiz_wr                       : std_logic                                    := '1'"
 )
 )
@@ -881 +871 @@
 )
 xt "-172000,42400,-129000,43200"
-st "wiz_rd                       : std_logic                                    := '1'
-"
+st "wiz_rd                       : std_logic                                    := '1'"
 )
 )
@@ -899 +888 @@
 )
 xt "-172000,14400,-150000,15200"
-st "wiz_int                      : std_logic
-"
+st "wiz_int                      : std_logic"
 )
 )
@@ -3375 +3363 @@
 )
 xt "-172000,10400,-140500,11200"
-st "board_id                     : std_logic_vector(3 DOWNTO 0)
-"
+st "board_id                     : std_logic_vector(3 DOWNTO 0)"
 )
 )
@@ -3395 +3382 @@
 )
 xt "-172000,13600,-150000,14400"
-st "trigger                      : std_logic
-"
+st "trigger                      : std_logic"
 )
 )
@@ -5358 +5344 @@
 font "Arial,8,1"
 )
-xt "119700,123000,125900,124000"
+xt "103700,117000,109900,118000"
 st "FACT_FAD_lib"
-blo "119700,123800"
+blo "103700,117800"
 tm "BdLibraryNameMgr"
 )
@@ -5368 +5354 @@
 font "Arial,8,1"
 )
-xt "119700,124000,125400,125000"
+xt "103700,118000,109400,119000"
 st "w5300_modul"
-blo "119700,124800"
+blo "103700,118800"
 tm "CptNameMgr"
 )
@@ -5378 +5364 @@
 font "Arial,8,1"
 )
-xt "119700,125000,129300,126000"
+xt "103700,119000,113300,120000"
 st "w5300_modul_instance"
-blo "119700,125800"
+blo "103700,119800"
 tm "InstanceNameMgr"
 )
@@ -5441 +5427 @@
 )
 xt "-172000,11200,-140500,12000"
-st "crate_id                     : std_logic_vector(1 DOWNTO 0)
-"
+st "crate_id                     : std_logic_vector(1 DOWNTO 0)"
 )
 )
@@ -5700 +5685 @@
 )
 xt "-172000,96400,-129000,97200"
-st "SIGNAL ram_start_addr               : std_logic_vector(RAMADDRWIDTH64b-1 DOWNTO 0)
-"
+st "SIGNAL ram_start_addr               : std_logic_vector(RAMADDRWIDTH64b-1 DOWNTO 0)"
 )
 )
@@ -5720 +5704 @@
 )
 xt "-172000,122800,-125500,123600"
-st "SIGNAL wiz_write_ea                 : std_logic                                    := '0'
-"
+st "SIGNAL wiz_write_ea                 : std_logic                                    := '0'"
 )
 )
@@ -5741 +5724 @@
 )
 xt "-172000,125200,-119500,126000"
-st "SIGNAL wiz_write_length             : std_logic_vector(16 downto 0)                := (others => '0')
-"
+st "SIGNAL wiz_write_length             : std_logic_vector(16 downto 0)                := (others => '0')"
 )
 )
@@ -5763 +5745 @@
 )
 xt "-172000,122000,-119500,122800"
-st "SIGNAL wiz_ram_start_addr           : std_logic_vector(RAMADDRWIDTH64b+1 DOWNTO 0) := (others => '0')
-"
+st "SIGNAL wiz_ram_start_addr           : std_logic_vector(RAMADDRWIDTH64b+1 DOWNTO 0) := (others => '0')"
 )
 )
@@ -5784 +5765 @@
 )
 xt "-172000,121200,-119500,122000"
-st "SIGNAL wiz_number_of_channels       : std_logic_vector(3 downto 0)                 := (others => '0')
-"
+st "SIGNAL wiz_number_of_channels       : std_logic_vector(3 downto 0)                 := (others => '0')"
 )
 )
@@ -5804 +5784 @@
 )
 xt "-172000,123600,-125500,124400"
-st "SIGNAL wiz_write_end                : std_logic                                    := '0'
-"
+st "SIGNAL wiz_write_end                : std_logic                                    := '0'"
 )
 )
@@ -5824 +5803 @@
 )
 xt "-172000,124400,-125500,125200"
-st "SIGNAL wiz_write_header             : std_logic                                    := '0'
-"
+st "SIGNAL wiz_write_header             : std_logic                                    := '0'"
 )
 )
@@ -5842 +5820 @@
 )
 xt "-172000,97200,-146500,98000"
-st "SIGNAL ram_write_ea                 : std_logic
-"
+st "SIGNAL ram_write_ea                 : std_logic"
 )
 )
@@ -5861 +5838 @@
 )
 xt "-172000,98000,-125500,98800"
-st "SIGNAL ram_write_ready              : std_logic                                    := '0'
-"
+st "SIGNAL ram_write_ready              : std_logic                                    := '0'"
 )
 )
@@ -5879 +5855 @@
 )
 xt "-172000,102000,-145000,102800"
-st "SIGNAL roi_max                      : roi_max_type
-"
+st "SIGNAL roi_max                      : roi_max_type"
 )
 )
@@ -5898 +5873 @@
 )
 xt "-172000,91600,-136500,92400"
-st "SIGNAL package_length               : std_logic_vector(15 downto 0)
-"
+st "SIGNAL package_length               : std_logic_vector(15 downto 0)"
 )
 )
@@ -5917 +5891 @@
 )
 xt "-172000,24000,-129000,24800"
-st "adc_oeb                      : std_logic                                    := '1'
-"
+st "adc_oeb                      : std_logic                                    := '1'"
 )
 )
@@ -6122 +6095 @@
 bg "0,0,32768"
 )
-xt "85200,178000,96000,179000"
+xt "85200,178000,94900,179000"
 st "
 by %user on %dd %month %year
@@ -6153 +6126 @@
 bg "0,0,32768"
 )
-xt "102200,174000,105500,175000"
+xt "102200,174000,105200,175000"
 st "
 Project:
@@ -6184 +6157 @@
 bg "0,0,32768"
 )
-xt "85200,176000,96100,177000"
+xt "85200,176000,95200,177000"
 st "
 <enter diagram title here>
@@ -6215 +6188 @@
 bg "0,0,32768"
 )
-xt "81200,176000,83500,177000"
+xt "81200,176000,83300,177000"
 st "
 Title:
@@ -6246 +6219 @@
 bg "0,0,32768"
 )
-xt "102200,175200,112000,176200"
+xt "102200,175200,111400,176200"
 st "
 <enter comments here>
@@ -6276 +6249 @@
 bg "0,0,32768"
 )
-xt "106200,174000,110900,175000"
+xt "106200,174000,110700,175000"
 st "
 %project_name
@@ -6306 +6279 @@
 fg "32768,0,0"
 )
-xt "88450,174000,94550,176000"
+xt "88700,174000,94300,176000"
 st "
 TU Dortmund 
@@ -6339 +6312 @@
 bg "0,0,32768"
 )
-xt "81200,177000,83500,178000"
+xt "81200,177000,83300,178000"
 st "
 Path:
@@ -6370 +6343 @@
 bg "0,0,32768"
 )
-xt "81200,178000,84300,179000"
+xt "81200,178000,83900,179000"
 st "
 Edited:
@@ -6401 +6374 @@
 bg "0,0,32768"
 )
-xt "85200,177000,99300,178000"
+xt "85200,177000,97600,178000"
 st "
 %library/%unit/%view
@@ -6441 +6414 @@
 )
 xt "-172000,16000,-150000,16800"
-st "CLK_25_PS                    : std_logic
-"
+st "CLK_25_PS                    : std_logic"
 )
 )
@@ -6505 +6477 @@
 )
 xt "-172000,16800,-150000,17600"
-st "CLK_50                       : std_logic
-"
+st "CLK_50                       : std_logic"
 )
 )
@@ -6525 +6496 @@
 )
 xt "-172000,48400,-146500,49200"
-st "SIGNAL CLK_25                       : std_logic
-"
+st "SIGNAL CLK_25                       : std_logic"
 )
 )
@@ -6587 +6557 @@
 )
 xt "-172000,3200,-150000,4000"
-st "CLK                          : std_logic
-"
+st "CLK                          : std_logic"
 )
 )
@@ -6606 +6575 @@
 )
 xt "-172000,9600,-140500,10400"
-st "adc_otr_array                : std_logic_vector(3 DOWNTO 0)
-"
+st "adc_otr_array                : std_logic_vector(3 DOWNTO 0)"
 )
 )
@@ -6624 +6592 @@
 )
 xt "-172000,8800,-145000,9600"
-st "adc_data_array               : adc_data_array_type
-"
+st "adc_data_array               : adc_data_array_type"
 )
 )
@@ -6688 +6655 @@
 )
 xt "-172000,77200,-125500,78000"
-st "SIGNAL drs_clk_en                   : std_logic                                    := '0'
-"
+st "SIGNAL drs_clk_en                   : std_logic                                    := '0'"
 )
 )
@@ -6706 +6672 @@
 )
 xt "-172000,83600,-140500,84400"
-st "SIGNAL drs_s_cell_array             : drs_s_cell_array_type
-"
+st "SIGNAL drs_s_cell_array             : drs_s_cell_array_type"
 )
 )
@@ -6725 +6690 @@
 )
 xt "-172000,78000,-125500,78800"
-st "SIGNAL drs_read_s_cell              : std_logic                                    := '0'
-"
+st "SIGNAL drs_read_s_cell              : std_logic                                    := '0'"
 )
 )
@@ -6745 +6709 @@
 )
 xt "-172000,31200,-123000,32000"
-st "drs_channel_id               : std_logic_vector(3 downto 0)                 := (others => '0')
-"
+st "drs_channel_id               : std_logic_vector(3 downto 0)                 := (others => '0')"
 )
 )
@@ -6764 +6727 @@
 )
 xt "-172000,32000,-129000,32800"
-st "drs_dwrite                   : std_logic                                    := '1'
-"
+st "drs_dwrite                   : std_logic                                    := '1'"
 )
 )
@@ -6872 +6834 @@
 )
 xt "-172000,5600,-150000,6400"
-st "SROUT_in_0                   : std_logic
-"
+st "SROUT_in_0                   : std_logic"
 )
 )
@@ -6890 +6851 @@
 )
 xt "-172000,6400,-150000,7200"
-st "SROUT_in_1                   : std_logic
-"
+st "SROUT_in_1                   : std_logic"
 )
 )
@@ -6908 +6868 @@
 )
 xt "-172000,7200,-150000,8000"
-st "SROUT_in_2                   : std_logic
-"
+st "SROUT_in_2                   : std_logic"
 )
 )
@@ -6926 +6885 @@
 )
 xt "-172000,8000,-150000,8800"
-st "SROUT_in_3                   : std_logic
-"
+st "SROUT_in_3                   : std_logic"
 )
 )
@@ -7124 +7082 @@
 )
 xt "-172000,78800,-146500,79600"
-st "SIGNAL drs_read_s_cell_ready        : std_logic
-"
+st "SIGNAL drs_read_s_cell_ready        : std_logic"
 )
 )
@@ -7780 +7737 @@
 )
 xt "-172000,21600,-129000,22400"
-st "RSRLOAD                      : std_logic                                    := '0'
-"
+st "RSRLOAD                      : std_logic                                    := '0'"
 )
 )
@@ -7844 +7800 @@
 )
 xt "-172000,22400,-129000,23200"
-st "SRCLK                        : std_logic                                    := '0'
-"
+st "SRCLK                        : std_logic                                    := '0'"
 )
 )
@@ -7910 +7865 @@
 )
 xt "-172000,33600,-123000,34400"
-st "led                          : std_logic_vector(7 DOWNTO 0)                 := (OTHERS => '0')
-"
+st "led                          : std_logic_vector(7 DOWNTO 0)                 := (OTHERS => '0')"
 )
 )
@@ -7928 +7882 @@
 )
 xt "-172000,109200,-146500,110000"
-st "SIGNAL sensor_ready                 : std_logic
-"
+st "SIGNAL sensor_ready                 : std_logic"
 )
 )
@@ -7946 +7899 @@
 )
 xt "-172000,108400,-142500,109200"
-st "SIGNAL sensor_array                 : sensor_array_type
-"
+st "SIGNAL sensor_array                 : sensor_array_type"
 )
 )
@@ -7966 +7918 @@
 )
 xt "-172000,59600,-137000,60400"
-st "SIGNAL adc_otr                      : std_logic_vector(3 DOWNTO 0)
-"
+st "SIGNAL adc_otr                      : std_logic_vector(3 DOWNTO 0)"
 )
 )
@@ -7984 +7935 @@
 )
 xt "-172000,58800,-141500,59600"
-st "SIGNAL adc_data_array_int           : adc_data_array_type
-"
+st "SIGNAL adc_data_array_int           : adc_data_array_type"
 )
 )
@@ -8825 +8775 @@
 )
 xt "-172000,36800,-150000,37600"
-st "sclk                         : std_logic
-"
+st "sclk                         : std_logic"
 )
 )
@@ -8845 +8794 @@
 )
 xt "-172000,44800,-150000,45600"
-st "sio                          : std_logic
-"
+st "sio                          : std_logic"
 )
 )
@@ -8863 +8811 @@
 )
 xt "-172000,28000,-150000,28800"
-st "dac_cs                       : std_logic
-"
+st "dac_cs                       : std_logic"
 )
 )
@@ -8882 +8829 @@
 )
 xt "-172000,37600,-140500,38400"
-st "sensor_cs                    : std_logic_vector(3 DOWNTO 0)
-"
+st "sensor_cs                    : std_logic_vector(3 DOWNTO 0)"
 )
 )
@@ -9081 +9027 @@
 )
 xt "-172000,35200,-129000,36000"
-st "mosi                         : std_logic                                    := '0'
-"
+st "mosi                         : std_logic                                    := '0'"
 )
 )
@@ -9147 +9092 @@
 )
 xt "-172000,30400,-115500,31200"
-st "denable                      : std_logic                                    := '0' -- default domino wave off
-"
+st "denable                      : std_logic                                    := '0' -- default domino wave off"
 )
 )
@@ -9934 +9878 @@
 )
 xt "-172000,107600,-146500,108400"
-st "SIGNAL sclk_enable                  : std_logic
-"
+st "SIGNAL sclk_enable                  : std_logic"
 )
 )
@@ -9953 +9896 @@
 )
 xt "-172000,58000,-146500,58800"
-st "SIGNAL adc_clk_en                   : std_logic
-"
+st "SIGNAL adc_clk_en                   : std_logic"
 )
 )
@@ -10426 +10368 @@
 )
 xt "-172000,92400,-110000,93200"
-st "SIGNAL ps_direction                 : std_logic                                    := '1' -- default phase shift upwards
-"
+st "SIGNAL ps_direction                 : std_logic                                    := '1' -- default phase shift upwards"
 )
 )
@@ -10448 +10389 @@
 )
 xt "-172000,93200,-109000,94000"
-st "SIGNAL ps_do_phase_shift            : std_logic                                    := '0' --pulse this to phase shift once
-"
+st "SIGNAL ps_do_phase_shift            : std_logic                                    := '0' --pulse this to phase shift once"
 )
 )
@@ -10469 +10409 @@
 )
 xt "-172000,94000,-101500,94800"
-st "SIGNAL ps_reset                     : std_logic                                    := '0' -- pulse this to reset the variable phase shift
-"
+st "SIGNAL ps_reset                     : std_logic                                    := '0' -- pulse this to reset the variable phase shift"
 )
 )
@@ -10488 +10427 @@
 )
 xt "-172000,114000,-125500,114800"
-st "SIGNAL srclk_enable                 : std_logic                                    := '0'
-"
+st "SIGNAL srclk_enable                 : std_logic                                    := '0'"
 )
 )
@@ -10873 +10811 @@
 )
 xt "-172000,57200,-125500,58000"
-st "SIGNAL SRCLK1                       : std_logic                                    := '0'
-"
+st "SIGNAL SRCLK1                       : std_logic                                    := '0'"
 )
 )
@@ -10891 +10828 @@
 )
 xt "-172000,106000,-146500,106800"
-st "SIGNAL s_trigger                    : std_logic
-"
+st "SIGNAL s_trigger                    : std_logic"
 )
 )
@@ -10909 +10845 @@
 )
 xt "-172000,116400,-146500,117200"
-st "SIGNAL start_srin_write_8b          : std_logic
-"
+st "SIGNAL start_srin_write_8b          : std_logic"
 )
 )
@@ -10928 +10863 @@
 )
 xt "-172000,114800,-125500,115600"
-st "SIGNAL srin_write_ack               : std_logic                                    := '0'
-"
+st "SIGNAL srin_write_ack               : std_logic                                    := '0'"
 )
 )
@@ -10947 +10881 @@
 )
 xt "-172000,115600,-125500,116400"
-st "SIGNAL srin_write_ready             : std_logic                                    := '0'
-"
+st "SIGNAL srin_write_ready             : std_logic                                    := '0'"
 )
 )
@@ -10967 +10900 @@
 )
 xt "-172000,84400,-119500,85200"
-st "SIGNAL drs_srin_data                : std_logic_vector(7 downto 0)                 := (others => '0')
-"
+st "SIGNAL drs_srin_data                : std_logic_vector(7 downto 0)                 := (others => '0')"
 )
 )
@@ -10986 +10918 @@
 )
 xt "-172000,23200,-129000,24000"
-st "SRIN_out                     : std_logic                                    := '0'
-"
+st "SRIN_out                     : std_logic                                    := '0'"
 )
 )
@@ -11503 +11434 @@
 )
 xt "-172000,110000,-146500,110800"
-st "SIGNAL socks_connected              : std_logic
-"
+st "SIGNAL socks_connected              : std_logic"
 )
 )
@@ -11521 +11451 @@
 )
 xt "-172000,110800,-146500,111600"
-st "SIGNAL socks_waiting                : std_logic
-"
+st "SIGNAL socks_waiting                : std_logic"
 )
 )
@@ -11539 +11468 @@
 )
 xt "-172000,32800,-150000,33600"
-st "green                        : std_logic
-"
+st "green                        : std_logic"
 )
 )
@@ -11601 +11529 @@
 )
 xt "-172000,26400,-150000,27200"
-st "amber                        : std_logic
-"
+st "amber                        : std_logic"
 )
 )
@@ -11663 +11590 @@
 )
 xt "-172000,36000,-150000,36800"
-st "red                          : std_logic
-"
+st "red                          : std_logic"
 )
 )
@@ -12162 +12088 @@
 )
 xt "-172000,82800,-146500,83600"
-st "SIGNAL drs_readout_started          : std_logic
-"
+st "SIGNAL drs_readout_started          : std_logic"
 )
 )
@@ -12180 +12105 @@
 )
 xt "-172000,118000,-146500,118800"
-st "SIGNAL trigger_enable               : std_logic
-"
+st "SIGNAL trigger_enable               : std_logic"
 )
 )
@@ -12868 +12792 @@
 st "-- --
 --      drs_dwrite : out std_logic := '1';
-SIGNAL drs_readout_ready            : std_logic                                    := '0'
-"
+SIGNAL drs_readout_ready            : std_logic                                    := '0'"
 )
 )
@@ -12886 +12809 @@
 )
 xt "-172000,82000,-146500,82800"
-st "SIGNAL drs_readout_ready_ack        : std_logic
-"
+st "SIGNAL drs_readout_ready_ack        : std_logic"
 )
 )
@@ -13141 +13063 @@
 )
 xt "-172000,61200,-125500,62000"
-st "SIGNAL c_trigger_enable             : std_logic                                    := '0'
-"
+st "SIGNAL c_trigger_enable             : std_logic                                    := '0'"
 )
 )
@@ -13656 +13577 @@
 )
 xt "-172000,4000,-140500,4800"
-st "D_T_in                       : std_logic_vector(1 DOWNTO 0)
-"
+st "D_T_in                       : std_logic_vector(1 DOWNTO 0)"
 )
 )
@@ -13720 +13640 @@
 )
 xt "-172000,12000,-118500,12800"
-st "drs_refclk_in                : std_logic -- used to check if DRS REFCLK exsists, if not DENABLE inhibit
-"
+st "drs_refclk_in                : std_logic -- used to check if DRS REFCLK exsists, if not DENABLE inhibit"
 )
 )
@@ -13785 +13704 @@
 )
 xt "-172000,12800,-111000,13600"
-st "plllock_in                   : std_logic_vector(3 DOWNTO 0) -- high level, if dominowave is running and DRS PLL locked
-"
+st "plllock_in                   : std_logic_vector(3 DOWNTO 0) -- high level, if dominowave is running and DRS PLL locked"
 )
 )
@@ -14066 +13984 @@
 )
 xt "-172000,24800,-150000,25600"
-st "alarm_refclk_too_high        : std_logic
-"
+st "alarm_refclk_too_high        : std_logic"
 )
 )
@@ -14129 +14046 @@
 )
 xt "-172000,25600,-150000,26400"
-st "alarm_refclk_too_low         : std_logic
-"
+st "alarm_refclk_too_low         : std_logic"
 )
 )
@@ -14192 +14108 @@
 )
 xt "-172000,27200,-140000,28000"
-st "counter_result               : std_logic_vector(11 DOWNTO 0)
-"
+st "counter_result               : std_logic_vector(11 DOWNTO 0)"
 )
 )
@@ -14881 +14796 @@
 )
 xt "-172000,67600,-112000,68400"
-st "SIGNAL denable_prim                 : std_logic                                    := '0' -- default domino wave off
-"
+st "SIGNAL denable_prim                 : std_logic                                    := '0' -- default domino wave off"
 )
 )
@@ -14902 +14816 @@
 )
 xt "-172000,70800,-112000,71600"
-st "SIGNAL din1                         : std_logic                                    := '0' -- default domino wave off
-"
+st "SIGNAL din1                         : std_logic                                    := '0' -- default domino wave off"
 )
 )
@@ -14920 +14833 @@
 )
 xt "-172000,120400,-146500,121200"
-st "SIGNAL trigger_out                  : std_logic
-"
+st "SIGNAL trigger_out                  : std_logic"
 )
 )
@@ -14942 +14854 @@
 )
 xt "-172000,118800,-136500,119600"
-st "SIGNAL trigger_id                   : std_logic_vector(31 downto 0)
-"
+st "SIGNAL trigger_id                   : std_logic_vector(31 downto 0)"
 )
 )
@@ -14964 +14875 @@
 )
 xt "-172000,49200,-119500,50000"
-st "SIGNAL DCM_PS_status                : std_logic_vector(7 DOWNTO 0)                 := (OTHERS => '0')
-"
+st "SIGNAL DCM_PS_status                : std_logic_vector(7 DOWNTO 0)                 := (OTHERS => '0')"
 )
 )
@@ -15188 +15098 @@
 )
 xt "-172000,71600,-119500,72400"
-st "SIGNAL dna                          : STD_LOGIC_VECTOR(63 DOWNTO 0)                := (others => '0')
-"
+st "SIGNAL dna                          : STD_LOGIC_VECTOR(63 DOWNTO 0)                := (others => '0')"
 )
 )
@@ -15209 +15118 @@
 )
 xt "-172000,98800,-125500,99600"
-st "SIGNAL ready                        : STD_LOGIC                                    := '0'
-"
+st "SIGNAL ready                        : STD_LOGIC                                    := '0'"
 )
 )
@@ -15743 +15651 @@
 )
 xt "-172000,87600,-146500,88400"
-st "SIGNAL enable_i                     : std_logic
-"
+st "SIGNAL enable_i                     : std_logic"
 )
 )
@@ -15954 +15861 @@
 )
 xt "-172000,100400,-146500,101200"
-st "SIGNAL reset_synch_i                : std_logic
-"
+st "SIGNAL reset_synch_i                : std_logic"
 )
 )
@@ -15973 +15879 @@
 )
 xt "-172000,117200,-136500,118000"
-st "SIGNAL time                         : std_logic_vector(31 DOWNTO 0)
-"
+st "SIGNAL time                         : std_logic_vector(31 DOWNTO 0)"
 )
 )
@@ -15994 +15899 @@
 )
 xt "-172000,103600,-132000,104400"
-st "SIGNAL rs465_data                   : std_logic_vector(55 DOWNTO 0) --7 byte
-"
+st "SIGNAL rs465_data                   : std_logic_vector(55 DOWNTO 0) --7 byte"
 )
 )
@@ -16023 +15927 @@
 -- during EVT header wrinting, this field is left out ... and only written into event header,
 -- when the DRS chip were read out already.
-SIGNAL FTM_RS485_ready              : std_logic
-"
+SIGNAL FTM_RS485_ready              : std_logic"
 )
 )
@@ -16043 +15946 @@
 )
 xt "-172000,62000,-136500,62800"
-st "SIGNAL c_trigger_mult               : std_logic_vector(15 DOWNTO 0)
-"
+st "SIGNAL c_trigger_mult               : std_logic_vector(15 DOWNTO 0)"
 )
 )
@@ -16062 +15964 @@
 )
 xt "-172000,66000,-146500,66800"
-st "SIGNAL data_ram_empty               : std_logic
-"
+st "SIGNAL data_ram_empty               : std_logic"
 )
 )
@@ -16126 +16027 @@
 )
 xt "-172000,15200,-150000,16000"
-st "ADC_CLK                      : std_logic
-"
+st "ADC_CLK                      : std_logic"
 )
 )
@@ -16520 +16420 @@
 )
 xt "-172000,63600,-120000,64400"
-st "SIGNAL current_dac_array            : dac_array_type                               := ( others => 0)
-"
+st "SIGNAL current_dac_array            : dac_array_type                               := ( others => 0)"
 )
 )
@@ -16540 +16439 @@
 )
 xt "-172000,119600,-146500,120400"
-st "SIGNAL trigger_or_s_trigger         : std_logic
-"
+st "SIGNAL trigger_or_s_trigger         : std_logic"
 )
 )
@@ -16560 +16458 @@
 )
 xt "-172000,88400,-146500,89200"
-st "SIGNAL enabled_trigger_or_s_trigger : std_logic
-"
+st "SIGNAL enabled_trigger_or_s_trigger : std_logic"
 )
 )
@@ -16578 +16475 @@
 )
 xt "-172000,62800,-146500,63600"
-st "SIGNAL cont_trigger                 : std_logic
-"
+st "SIGNAL cont_trigger                 : std_logic"
 )
 )
@@ -16596 +16492 @@
 )
 xt "-172000,106800,-146500,107600"
-st "SIGNAL s_trigger_or_cont_trigger    : std_logic
-"
+st "SIGNAL s_trigger_or_cont_trigger    : std_logic"
 )
 )
@@ -16617 +16512 @@
 )
 xt "-172000,64400,-98500,65200"
-st "SIGNAL dac_setting                  : dac_array_type                               := DEFAULT_DAC --<<-- default defined in fad_definitions.vhd
-"
+st "SIGNAL dac_setting                  : dac_array_type                               := DEFAULT_DAC --<<-- default defined in fad_definitions.vhd"
 )
 )
@@ -16635 +16529 @@
 )
 xt "-172000,102800,-144000,103600"
-st "SIGNAL roi_setting                  : roi_array_type
-"
+st "SIGNAL roi_setting                  : roi_array_type"
 )
 )
@@ -16654 +16547 @@
 )
 xt "-172000,90000,-125500,90800"
-st "SIGNAL memory_manager_config_start  : std_logic                                    := '0'
-"
+st "SIGNAL memory_manager_config_start  : std_logic                                    := '0'"
 )
 )
@@ -16672 +16564 @@
 )
 xt "-172000,90800,-146500,91600"
-st "SIGNAL memory_manager_config_valid  : std_logic
-"
+st "SIGNAL memory_manager_config_valid  : std_logic"
 )
 )
@@ -16691 +16582 @@
 )
 xt "-172000,112400,-125500,113200"
-st "SIGNAL spi_interface_config_start   : std_logic                                    := '0'
-"
+st "SIGNAL spi_interface_config_start   : std_logic                                    := '0'"
 )
 )
@@ -16709 +16599 @@
 )
 xt "-172000,113200,-146500,114000"
-st "SIGNAL spi_interface_config_valid   : std_logic
-"
+st "SIGNAL spi_interface_config_valid   : std_logic"
 )
 )
@@ -17660 +17549 @@
 )
 xt "-172000,73200,-146500,74000"
-st "SIGNAL dout0                        : STD_LOGIC
-"
+st "SIGNAL dout0                        : STD_LOGIC"
 )
 )
@@ -17678 +17566 @@
 )
 xt "-172000,74000,-146500,74800"
-st "SIGNAL dout1                        : STD_LOGIC
-"
+st "SIGNAL dout1                        : STD_LOGIC"
 )
 )
@@ -17696 +17583 @@
 )
 xt "-172000,74800,-146500,75600"
-st "SIGNAL dout2                        : STD_LOGIC
-"
+st "SIGNAL dout2                        : STD_LOGIC"
 )
 )
@@ -17714 +17600 @@
 )
 xt "-172000,75600,-146500,76400"
-st "SIGNAL dout3                        : STD_LOGIC
-"
+st "SIGNAL dout3                        : STD_LOGIC"
 )
 )
@@ -18180 +18065 @@
 )
 xt "-172000,72400,-146500,73200"
-st "SIGNAL dout                         : STD_LOGIC
-"
+st "SIGNAL dout                         : STD_LOGIC"
 )
 )
@@ -18198 +18082 @@
 )
 xt "-172000,56400,-146500,57200"
-st "SIGNAL I_really_want_dwrite         : STD_LOGIC
-"
+st "SIGNAL I_really_want_dwrite         : STD_LOGIC"
 )
 )
@@ -18217 +18100 @@
 )
 xt "-172000,85200,-125500,86000"
-st "SIGNAL dwrite_enable_w5300          : std_logic                                    := '1'
-"
+st "SIGNAL dwrite_enable_w5300          : std_logic                                    := '1'"
 )
 )
@@ -18236 +18118 @@
 )
 xt "-172000,86000,-125500,86800"
-st "SIGNAL dwrite_global_enable         : std_logic                                    := '1'
-"
+st "SIGNAL dwrite_global_enable         : std_logic                                    := '1'"
 )
 )
@@ -18621 +18502 @@
 )
 xt "-172000,76400,-146500,77200"
-st "SIGNAL dout4                        : STD_LOGIC
-"
+st "SIGNAL dout4                        : STD_LOGIC"
 )
 )
@@ -18640 +18520 @@
 )
 xt "-172000,86800,-125500,87600"
-st "SIGNAL dwrite_trigger_manager       : std_logic                                    := '1'
-"
+st "SIGNAL dwrite_trigger_manager       : std_logic                                    := '1'"
 )
 )
@@ -19201 +19080 @@
 )
 xt "-172000,68400,-112000,69200"
-st "SIGNAL denable_sig                  : std_logic                                    := '0' -- default domino wave off
-"
+st "SIGNAL denable_sig                  : std_logic                                    := '0' -- default domino wave off"
 )
 )
@@ -19219 +19097 @@
 )
 xt "-172000,50000,-146500,50800"
-st "SIGNAL DCM_locked_status            : std_logic
-"
+st "SIGNAL DCM_locked_status            : std_logic"
 )
 )
@@ -19237 +19114 @@
 )
 xt "-172000,50800,-146500,51600"
-st "SIGNAL DCM_ready_status             : std_logic
-"
+st "SIGNAL DCM_ready_status             : std_logic"
 )
 )
@@ -19256 +19132 @@
 )
 xt "-172000,39200,-129000,40000"
-st "trigger_veto                 : std_logic                                    := '1'
-"
+st "trigger_veto                 : std_logic                                    := '1'"
 )
 )
@@ -19910 +19785 @@
 )
 xt "-172000,4800,-150000,5600"
-st "FTM_RS485_rx_d               : std_logic
-"
+st "FTM_RS485_rx_d               : std_logic"
 )
 )
@@ -19928 +19802 @@
 )
 xt "-172000,20000,-150000,20800"
-st "FTM_RS485_tx_d               : std_logic
-"
+st "FTM_RS485_tx_d               : std_logic"
 )
 )
@@ -19946 +19819 @@
 )
 xt "-172000,19200,-150000,20000"
-st "FTM_RS485_rx_en              : std_logic
-"
+st "FTM_RS485_rx_en              : std_logic"
 )
 )
@@ -19964 +19836 @@
 )
 xt "-172000,20800,-150000,21600"
-st "FTM_RS485_tx_en              : std_logic
-"
+st "FTM_RS485_tx_en              : std_logic"
 )
 )
@@ -19983 +19854 @@
 )
 xt "-172000,99600,-125500,100400"
-st "SIGNAL rec_timeout_occured          : std_logic                                    := '0'
-"
+st "SIGNAL rec_timeout_occured          : std_logic                                    := '0'"
 )
 )
@@ -20002 +19872 @@
 )
 xt "-172000,101200,-125500,102000"
-st "SIGNAL reset_trigger_id             : std_logic                                    := '0'
-"
+st "SIGNAL reset_trigger_id             : std_logic                                    := '0'"
 )
 )
@@ -20067 +19936 @@
 )
 xt "-172000,40000,-115000,40800"
-st "w5300_state                  : std_logic_vector(7 DOWNTO 0) -- state is encoded here ... useful for debugging.
-"
+st "w5300_state                  : std_logic_vector(7 DOWNTO 0) -- state is encoded here ... useful for debugging."
 )
 )
@@ -20085 +19953 @@
 )
 xt "-172000,28800,-150000,29600"
-st "debug_data_ram_empty         : std_logic
-"
+st "debug_data_ram_empty         : std_logic"
 )
 )
@@ -20147 +20014 @@
 )
 xt "-172000,29600,-150000,30400"
-st "debug_data_valid             : std_logic
-"
+st "debug_data_valid             : std_logic"
 )
 )
@@ -20402 +20268 @@
 )
 xt "-172000,111600,-146500,112400"
-st "SIGNAL software_trigger_in          : std_logic
-"
+st "SIGNAL software_trigger_in          : std_logic"
 )
 )
@@ -20468 +20333 @@
 )
 xt "-172000,34400,-115000,35200"
-st "mem_manager_state            : std_logic_vector(3 DOWNTO 0) -- state is encoded here ... useful for debugging.
-"
+st "mem_manager_state            : std_logic_vector(3 DOWNTO 0) -- state is encoded here ... useful for debugging."
 )
 )
@@ -20486 +20350 @@
 )
 xt "-172000,89200,-146500,90000"
-st "SIGNAL is_idle                      : std_logic
-"
+st "SIGNAL is_idle                      : std_logic"
 )
 )
@@ -20552 +20415 @@
 xt "-172000,17600,-140500,19200"
 st "-- for debugging
-DG_state                     : std_logic_vector(7 downto 0)
-"
+DG_state                     : std_logic_vector(7 downto 0)"
 )
 )
@@ -21373 +21235 @@
 )
 xt "-172000,66800,-125500,67600"
-st "SIGNAL data_valid_ack               : std_logic                                    := '0'
-"
+st "SIGNAL data_valid_ack               : std_logic                                    := '0'"
 )
 )
@@ -21392 +21253 @@
 )
 xt "-172000,70000,-125500,70800"
-st "SIGNAL dg_start_config              : std_logic                                    := '0'
-"
+st "SIGNAL dg_start_config              : std_logic                                    := '0'"
 )
 )
@@ -21410 +21270 @@
 )
 xt "-172000,69200,-146500,70000"
-st "SIGNAL dg_config_done               : std_logic
-"
+st "SIGNAL dg_config_done               : std_logic"
 )
 )
@@ -21433 +21292 @@
 xt "-172000,104400,-136500,106000"
 st "-- EVT HEADER - part 6
-SIGNAL runnumber                    : std_logic_vector(31 downto 0)
-"
+SIGNAL runnumber                    : std_logic_vector(31 downto 0)"
 )
 )
@@ -21454 +21312 @@
 )
 xt "-172000,38400,-125000,39200"
-st "socket_tx_free_out           : std_logic_vector(16 DOWNTO 0) -- 17bit value .. that's true
-"
+st "socket_tx_free_out           : std_logic_vector(16 DOWNTO 0) -- 17bit value .. that's true"
 )
 )
@@ -29246 +29103 @@
 va (VaSet
 )
-xt "-163000,-15000,-144800,-2000"
+xt "-163000,-15000,-147500,-2000"
 st "library ieee;
 use ieee.std_logic_1164.all;
@@ -29293 +29150 @@
 isHidden 1
 )
-xt "20000,2000,28200,4000"
+xt "20000,2000,27500,4000"
 st "`resetall
 `timescale 1ns/10ps"
@@ -29337 +29194 @@
 associable 1
 )
-windowSize "0,0,1681,1028"
-viewArea "66700,94575,176350,161025"
+windowSize "0,0,1281,1024"
+viewArea "55772,49755,165154,139961"
 cachedDiagramExtent "-174000,-16000,261100,353300"
 pageSetupInfo (PageSetupInfo
@@ -29364 +29221 @@
 hasePageBreakOrigin 1
 pageBreakOrigin "-73000,0"
-lastUid 28291,0
+lastUid 28504,0
 defaultCommentText (CommentText
 shape (Rectangle
@@ -29379 +29236 @@
 fg "0,0,32768"
 )
-xt "200,200,2400,1200"
+xt "200,200,2000,1200"
 st "
 Text
@@ -29797 +29654 @@
 va (VaSet
 )
-xt "200,200,2400,1200"
+xt "200,200,2000,1200"
 st "
 Text
@@ -30135 +29992 @@
 va (VaSet
 )
-xt "0,-1100,12900,-100"
+xt "0,-1100,12600,-100"
 st "g0: FOR i IN 0 TO n GENERATE"
 tm "FrameTitleTextMgr"
@@ -30195 +30052 @@
 va (VaSet
 )
-xt "0,-1100,7700,-100"
+xt "0,-1100,7400,-100"
 st "b0: BLOCK (guard)"
 tm "FrameTitleTextMgr"

firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib/hds/@f@a@d_main/struct.bd.bak ¶

@@ -599 +599 @@
 (vvPair
 variable "time"
-value "13:56:52"
+value "14:53:43"
 )
 (vvPair
@@ -690 +690 @@
 font "Courier New,8,0"
 )
-xt "-172000,125200,-125500,126000"
-st "SIGNAL write_ea                     : std_logic_vector(0 downto 0)                 := \"0\""
+xt "-172000,126000,-125500,126800"
+st "SIGNAL write_ea                     : std_logic_vector(0 downto 0)                 := \"0\"
+"
 )
 )
@@ -708 +709 @@
 font "Courier New,8,0"
 )
-xt "-172000,59600,-129000,60400"
-st "SIGNAL addr_out                     : std_logic_vector(RAMADDRWIDTH64b-1 DOWNTO 0)"
+xt "-172000,60400,-129000,61200"
+st "SIGNAL addr_out                     : std_logic_vector(RAMADDRWIDTH64b-1 DOWNTO 0)
+"
 )
 )
@@ -726 +728 @@
 font "Courier New,8,0"
 )
-xt "-172000,64400,-136500,65200"
-st "SIGNAL data_out                     : std_logic_vector(63 DOWNTO 0)"
+xt "-172000,65200,-136500,66000"
+st "SIGNAL data_out                     : std_logic_vector(63 DOWNTO 0)
+"
 )
 )
@@ -744 +747 @@
 font "Courier New,8,0"
 )
-xt "-172000,94000,-129000,94800"
-st "SIGNAL ram_addr                     : std_logic_vector(RAMADDRWIDTH64b+1 DOWNTO 0)"
+xt "-172000,94800,-129000,95600"
+st "SIGNAL ram_addr                     : std_logic_vector(RAMADDRWIDTH64b+1 DOWNTO 0)
+"
 )
 )
@@ -762 +766 @@
 font "Courier New,8,0"
 )
-xt "-172000,94800,-136500,95600"
-st "SIGNAL ram_data                     : std_logic_vector(15 downto 0)"
+xt "-172000,95600,-136500,96400"
+st "SIGNAL ram_data                     : std_logic_vector(15 downto 0)
+"
 )
 )
@@ -780 +785 @@
 font "Courier New,8,0"
 )
-xt "-172000,42400,-129000,43200"
-st "wiz_reset                    : std_logic                                    := '1'"
+xt "-172000,43200,-129000,44000"
+st "wiz_reset                    : std_logic                                    := '1'
+"
 )
 )
@@ -798 +804 @@
 font "Courier New,8,0"
 )
-xt "-172000,40000,-140500,40800"
-st "wiz_addr                     : std_logic_vector(9 DOWNTO 0)"
+xt "-172000,40800,-140500,41600"
+st "wiz_addr                     : std_logic_vector(9 DOWNTO 0)
+"
 )
 )
@@ -816 +823 @@
 font "Courier New,8,0"
 )
-xt "-172000,44800,-140000,45600"
-st "wiz_data                     : std_logic_vector(15 DOWNTO 0)"
+xt "-172000,45600,-140000,46400"
+st "wiz_data                     : std_logic_vector(15 DOWNTO 0)
+"
 )
 )
@@ -834 +842 @@
 font "Courier New,8,0"
 )
-xt "-172000,40800,-129000,41600"
-st "wiz_cs                       : std_logic                                    := '1'"
+xt "-172000,41600,-129000,42400"
+st "wiz_cs                       : std_logic                                    := '1'
+"
 )
 )
@@ -852 +861 @@
 font "Courier New,8,0"
 )
-xt "-172000,43200,-129000,44000"
-st "wiz_wr                       : std_logic                                    := '1'"
+xt "-172000,44000,-129000,44800"
+st "wiz_wr                       : std_logic                                    := '1'
+"
 )
 )
@@ -870 +880 @@
 font "Courier New,8,0"
 )
-xt "-172000,41600,-129000,42400"
-st "wiz_rd                       : std_logic                                    := '1'"
+xt "-172000,42400,-129000,43200"
+st "wiz_rd                       : std_logic                                    := '1'
+"
 )
 )
@@ -888 +899 @@
 )
 xt "-172000,14400,-150000,15200"
-st "wiz_int                      : std_logic"
+st "wiz_int                      : std_logic
+"
 )
 )
@@ -3363 +3375 @@
 )
 xt "-172000,10400,-140500,11200"
-st "board_id                     : std_logic_vector(3 DOWNTO 0)"
+st "board_id                     : std_logic_vector(3 DOWNTO 0)
+"
 )
 )
@@ -3382 +3395 @@
 )
 xt "-172000,13600,-150000,14400"
-st "trigger                      : std_logic"
+st "trigger                      : std_logic
+"
 )
 )
@@ -3464 +3478 @@
 preAdd 0
 posAdd 0
-o 5
+o 6
 suid 1,0
 )
@@ -3502 +3516 @@
 preAdd 0
 posAdd 0
-o 6
+o 7
 suid 2,0
 i "'1'"
@@ -3542 +3556 @@
 preAdd 0
 posAdd 0
-o 7
+o 8
 suid 3,0
 )
@@ -3581 +3595 @@
 preAdd 0
 posAdd 0
-o 8
+o 9
 suid 4,0
 )
@@ -3619 +3633 @@
 preAdd 0
 posAdd 0
-o 9
+o 10
 suid 5,0
 i "'1'"
@@ -3658 +3672 @@
 preAdd 0
 posAdd 0
-o 10
+o 11
 suid 6,0
 i "'1'"
@@ -3697 +3711 @@
 preAdd 0
 posAdd 0
-o 12
+o 13
 suid 8,0
 i "'1'"
@@ -3735 +3749 @@
 preAdd 0
 posAdd 0
-o 13
+o 14
 suid 9,0
 )
@@ -3772 +3786 @@
 preAdd 0
 posAdd 0
-o 14
+o 15
 suid 10,0
 )
@@ -3809 +3823 @@
 preAdd 0
 posAdd 0
-o 15
+o 16
 suid 11,0
 )
@@ -3846 +3860 @@
 preAdd 0
 posAdd 0
-o 16
+o 17
 suid 12,0
 )
@@ -3884 +3898 @@
 preAdd 0
 posAdd 0
-o 17
+o 18
 suid 13,0
 )
@@ -3920 +3934 @@
 preAdd 0
 posAdd 0
-o 18
+o 19
 suid 14,0
 )
@@ -3957 +3971 @@
 preAdd 0
 posAdd 0
-o 20
+o 21
 suid 15,0
 i "'1'"
@@ -3994 +4008 @@
 b "(3 downto 0)"
 posAdd 0
-o 23
+o 24
 suid 20,0
 )
@@ -4028 +4042 @@
 n "write_end_flag"
 t "std_logic"
-o 22
+o 23
 suid 18,0
 )
@@ -4062 +4076 @@
 n "write_header_flag"
 t "std_logic"
-o 21
+o 22
 suid 19,0
 )
@@ -4100 +4114 @@
 b "(7 DOWNTO 0)"
 posAdd 0
-o 11
+o 12
 suid 22,0
 i "(OTHERS => '0')"
@@ -4138 +4152 @@
 prec "-- softtrigger:"
 preAdd 0
-o 24
+o 25
 suid 23,0
 i "'0'"
@@ -4178 +4192 @@
 preAdd 0
 posAdd 0
-o 40
+o 41
 suid 31,0
 i "'0'"
@@ -4218 +4232 @@
 preAdd 0
 posAdd 0
-o 41
+o 42
 suid 32,0
 i "'1'"
@@ -4254 +4268 @@
 n "data_valid_ack"
 t "std_logic"
-o 19
+o 20
 suid 34,0
 i "'0'"
@@ -4293 +4307 @@
 eolc "-- default DWRITE HIGH."
 posAdd 0
-o 42
+o 43
 suid 35,0
 i "'1'"
@@ -4338 +4352 @@
 preAdd 0
 posAdd 0
-o 44
+o 45
 suid 36,0
 i "'1'"
@@ -4378 +4392 @@
 preAdd 0
 posAdd 0
-o 45
+o 46
 suid 37,0
 i "'0'"
@@ -4417 +4431 @@
 eolc "-- pulse this to reset the variable phase shift"
 posAdd 0
-o 46
+o 47
 suid 38,0
 i "'0'"
@@ -4456 +4470 @@
 eolc "-- default SRCLK on."
 posAdd 0
-o 43
+o 44
 suid 39,0
 i "'1'"
@@ -4495 +4509 @@
 posc "------------------------------------------------------------------------------"
 posAdd 0
-o 49
+o 50
 suid 42,0
 )
@@ -4537 +4551 @@
 ------------------------------------------------------------------------------"
 preAdd 0
-o 48
+o 49
 suid 43,0
 )
@@ -4579 +4593 @@
 preAdd 0
 posAdd 0
-o 39
+o 40
 suid 44,0
 )
@@ -4614 +4628 @@
 n "c_trigger_enable"
 t "std_logic"
-o 25
+o 26
 suid 45,0
 i "'0'"
@@ -4653 +4667 @@
 eolc "--subject to changes"
 posAdd 0
-o 26
+o 27
 suid 46,0
 i "conv_std_logic_vector(0 ,16)"
@@ -4694 +4708 @@
 ------------------------------------------------------------------------------"
 preAdd 0
-o 36
+o 37
 suid 48,0
 )
@@ -4729 +4743 @@
 t "std_logic_vector"
 b "(3 downto 0)"
-o 37
+o 38
 suid 49,0
 )
@@ -4765 +4779 @@
 b "(1 downto 0)"
 posAdd 0
-o 38
+o 39
 suid 50,0
 )
@@ -4805 +4819 @@
 preAdd 0
 posAdd 0
-o 31
+o 32
 suid 54,0
 i "DEFAULT_DAC"
@@ -4844 +4858 @@
 ------------------------------------------------------------------------------"
 preAdd 0
-o 27
+o 28
 suid 59,0
 i "'0'"
@@ -4879 +4893 @@
 n "memory_manager_config_valid_i"
 t "std_logic"
-o 28
+o 29
 suid 60,0
 )
@@ -4917 +4931 @@
 preAdd 0
 posAdd 0
-o 32
+o 33
 suid 61,0
 i "DEFAULT_ROI"
@@ -4953 +4967 @@
 n "spi_interface_config_start_o"
 t "std_logic"
-o 29
+o 30
 suid 63,0
 i "'0'"
@@ -4989 +5003 @@
 t "std_logic"
 posAdd 0
-o 30
+o 31
 suid 64,0
 )
@@ -5024 +5038 @@
 t "std_logic"
 preAdd 0
-o 35
+o 36
 suid 65,0
 )
@@ -5059 +5073 @@
 n "ps_ready"
 t "std_logic"
-o 47
+o 48
 suid 66,0
 )
@@ -5095 +5109 @@
 t "std_logic_vector"
 b "(31 DOWNTO 0)"
-o 33
+o 34
 suid 67,0
-i "conv_std_logic_vector(0 ,31)"
+i "conv_std_logic_vector(0 ,32)"
 )
 )
@@ -5132 +5146 @@
 n "reset_trigger_id"
 t "std_logic"
-o 34
+o 35
 suid 68,0
 i "'0'"
@@ -5283 +5297 @@
 )
 )
+*135 (CptPort
+uid 28264,0
+ps "OnEdgeStrategy"
+shape (Triangle
+uid 28265,0
+ro 90
+va (VaSet
+vasetType 1
+fg "0,65535,0"
+)
+xt "124000,113625,124750,114375"
+)
+tg (CPTG
+uid 28266,0
+ps "CptPortTextPlaceStrategy"
+stg "RightVerticalLayoutStrategy"
+f (Text
+uid 28267,0
+va (VaSet
+)
+xt "111100,113500,123000,114500"
+st "socket_tx_free_out : (16:0)"
+ju 2
+blo "123000,114300"
+)
+)
+thePort (LogicalPort
+m 1
+decl (Decl
+n "socket_tx_free_out"
+t "std_logic_vector"
+b "(16 DOWNTO 0)"
+eolc "-- 17bit value .. that's true"
+posAdd 0
+o 5
+suid 73,0
+)
+)
+)
 ]
 shape (Rectangle
@@ -5300 +5353 @@
 stg "VerticalLayoutStrategy"
 textVec [
-*135 (Text
+*136 (Text
 uid 1609,0
 va (VaSet
@@ -5310 +5363 @@
 tm "BdLibraryNameMgr"
 )
-*136 (Text
+*137 (Text
 uid 1610,0
 va (VaSet
@@ -5320 +5373 @@
 tm "CptNameMgr"
 )
-*137 (Text
+*138 (Text
 uid 1611,0
 va (VaSet
@@ -5373 +5426 @@
 archFileType "UNKNOWN"
 )
-*138 (Net
+*139 (Net
 uid 1680,0
 decl (Decl
@@ -5388 +5441 @@
 )
 xt "-172000,11200,-140500,12000"
-st "crate_id                     : std_logic_vector(1 DOWNTO 0)"
-)
-)
-*139 (SaComponent
+st "crate_id                     : std_logic_vector(1 DOWNTO 0)
+"
+)
+)
+*140 (SaComponent
 uid 1768,0
 optionalChildren [
-*140 (CptPort
+*141 (CptPort
 uid 1760,0
 ps "OnEdgeStrategy"
@@ -5434 +5488 @@
 )
 )
-*141 (CptPort
+*142 (CptPort
 uid 1764,0
 ps "OnEdgeStrategy"
@@ -5471 +5525 @@
 )
 )
-*142 (CptPort
+*143 (CptPort
 uid 6207,0
 ps "OnEdgeStrategy"
@@ -5506 +5560 @@
 )
 )
-*143 (CptPort
+*144 (CptPort
 uid 23079,0
 ps "OnEdgeStrategy"
@@ -5558 +5612 @@
 stg "VerticalLayoutStrategy"
 textVec [
-*144 (Text
+*145 (Text
 uid 1771,0
 va (VaSet
@@ -5569 +5623 @@
 tm "BdLibraryNameMgr"
 )
-*145 (Text
+*146 (Text
 uid 1772,0
 va (VaSet
@@ -5580 +5634 @@
 tm "CptNameMgr"
 )
-*146 (Text
+*147 (Text
 uid 1773,0
 va (VaSet
@@ -5629 +5683 @@
 archFileType "UNKNOWN"
 )
-*147 (Net
+*148 (Net
 uid 2297,0
 decl (Decl
@@ -5645 +5699 @@
 font "Courier New,8,0"
 )
-xt "-172000,95600,-129000,96400"
-st "SIGNAL ram_start_addr               : std_logic_vector(RAMADDRWIDTH64b-1 DOWNTO 0)"
-)
-)
-*148 (Net
+xt "-172000,96400,-129000,97200"
+st "SIGNAL ram_start_addr               : std_logic_vector(RAMADDRWIDTH64b-1 DOWNTO 0)
+"
+)
+)
+*149 (Net
 uid 2474,0
 lang 2
@@ -5664 +5719 @@
 font "Courier New,8,0"
 )
-xt "-172000,122000,-125500,122800"
-st "SIGNAL wiz_write_ea                 : std_logic                                    := '0'"
-)
-)
-*149 (Net
+xt "-172000,122800,-125500,123600"
+st "SIGNAL wiz_write_ea                 : std_logic                                    := '0'
+"
+)
+)
+*150 (Net
 uid 2480,0
 lang 2
@@ -5684 +5740 @@
 font "Courier New,8,0"
 )
-xt "-172000,124400,-119500,125200"
-st "SIGNAL wiz_write_length             : std_logic_vector(16 downto 0)                := (others => '0')"
-)
-)
-*150 (Net
+xt "-172000,125200,-119500,126000"
+st "SIGNAL wiz_write_length             : std_logic_vector(16 downto 0)                := (others => '0')
+"
+)
+)
+*151 (Net
 uid 2486,0
 lang 2
@@ -5705 +5762 @@
 font "Courier New,8,0"
 )
-xt "-172000,121200,-119500,122000"
-st "SIGNAL wiz_ram_start_addr           : std_logic_vector(RAMADDRWIDTH64b+1 DOWNTO 0) := (others => '0')"
-)
-)
-*151 (Net
+xt "-172000,122000,-119500,122800"
+st "SIGNAL wiz_ram_start_addr           : std_logic_vector(RAMADDRWIDTH64b+1 DOWNTO 0) := (others => '0')
+"
+)
+)
+*152 (Net
 uid 2492,0
 lang 2
@@ -5725 +5783 @@
 font "Courier New,8,0"
 )
-xt "-172000,120400,-119500,121200"
-st "SIGNAL wiz_number_of_channels       : std_logic_vector(3 downto 0)                 := (others => '0')"
-)
-)
-*152 (Net
+xt "-172000,121200,-119500,122000"
+st "SIGNAL wiz_number_of_channels       : std_logic_vector(3 downto 0)                 := (others => '0')
+"
+)
+)
+*153 (Net
 uid 2498,0
 lang 2
@@ -5744 +5803 @@
 font "Courier New,8,0"
 )
-xt "-172000,122800,-125500,123600"
-st "SIGNAL wiz_write_end                : std_logic                                    := '0'"
-)
-)
-*153 (Net
+xt "-172000,123600,-125500,124400"
+st "SIGNAL wiz_write_end                : std_logic                                    := '0'
+"
+)
+)
+*154 (Net
 uid 2504,0
 lang 2
@@ -5763 +5823 @@
 font "Courier New,8,0"
 )
-xt "-172000,123600,-125500,124400"
-st "SIGNAL wiz_write_header             : std_logic                                    := '0'"
-)
-)
-*154 (Net
+xt "-172000,124400,-125500,125200"
+st "SIGNAL wiz_write_header             : std_logic                                    := '0'
+"
+)
+)
+*155 (Net
 uid 2574,0
 decl (Decl
@@ -5780 +5841 @@
 font "Courier New,8,0"
 )
-xt "-172000,96400,-146500,97200"
-st "SIGNAL ram_write_ea                 : std_logic"
-)
-)
-*155 (Net
+xt "-172000,97200,-146500,98000"
+st "SIGNAL ram_write_ea                 : std_logic
+"
+)
+)
+*156 (Net
 uid 2580,0
 decl (Decl
@@ -5798 +5860 @@
 font "Courier New,8,0"
 )
-xt "-172000,97200,-125500,98000"
-st "SIGNAL ram_write_ready              : std_logic                                    := '0'"
-)
-)
-*156 (Net
+xt "-172000,98000,-125500,98800"
+st "SIGNAL ram_write_ready              : std_logic                                    := '0'
+"
+)
+)
+*157 (Net
 uid 2598,0
 decl (Decl
@@ -5815 +5878 @@
 font "Courier New,8,0"
 )
-xt "-172000,101200,-145000,102000"
-st "SIGNAL roi_max                      : roi_max_type"
-)
-)
-*157 (Net
+xt "-172000,102000,-145000,102800"
+st "SIGNAL roi_max                      : roi_max_type
+"
+)
+)
+*158 (Net
 uid 2640,0
 decl (Decl
@@ -5833 +5897 @@
 font "Courier New,8,0"
 )
-xt "-172000,90800,-136500,91600"
-st "SIGNAL package_length               : std_logic_vector(15 downto 0)"
-)
-)
-*158 (Net
+xt "-172000,91600,-136500,92400"
+st "SIGNAL package_length               : std_logic_vector(15 downto 0)
+"
+)
+)
+*159 (Net
 uid 2776,0
 decl (Decl
@@ -5852 +5917 @@
 )
 xt "-172000,24000,-129000,24800"
-st "adc_oeb                      : std_logic                                    := '1'"
-)
-)
-*159 (PortIoOut
+st "adc_oeb                      : std_logic                                    := '1'
+"
+)
+)
+*160 (PortIoOut
 uid 2798,0
 shape (CompositeShape
@@ -5900 +5966 @@
 )
 )
-*160 (PortIoIn
+*161 (PortIoIn
 uid 2804,0
 shape (CompositeShape
@@ -5945 +6011 @@
 )
 )
-*161 (PortIoIn
+*162 (PortIoIn
 uid 2950,0
 shape (CompositeShape
@@ -5990 +6056 @@
 )
 )
-*162 (PortIoIn
+*163 (PortIoIn
 uid 2956,0
 shape (CompositeShape
@@ -6035 +6101 @@
 )
 )
-*163 (Grouping
+*164 (Grouping
 uid 3137,0
 optionalChildren [
-*164 (CommentText
+*165 (CommentText
 uid 3139,0
 shape (Rectangle
@@ -6069 +6135 @@
 titleBlock 1
 )
-*165 (CommentText
+*166 (CommentText
 uid 3142,0
 shape (Rectangle
@@ -6100 +6166 @@
 titleBlock 1
 )
-*166 (CommentText
+*167 (CommentText
 uid 3145,0
 shape (Rectangle
@@ -6131 +6197 @@
 titleBlock 1
 )
-*167 (CommentText
+*168 (CommentText
 uid 3148,0
 shape (Rectangle
@@ -6162 +6228 @@
 titleBlock 1
 )
-*168 (CommentText
+*169 (CommentText
 uid 3151,0
 shape (Rectangle
@@ -6192 +6258 @@
 titleBlock 1
 )
-*169 (CommentText
+*170 (CommentText
 uid 3154,0
 shape (Rectangle
@@ -6223 +6289 @@
 titleBlock 1
 )
-*170 (CommentText
+*171 (CommentText
 uid 3157,0
 shape (Rectangle
@@ -6255 +6321 @@
 titleBlock 1
 )
-*171 (CommentText
+*172 (CommentText
 uid 3160,0
 shape (Rectangle
@@ -6286 +6352 @@
 titleBlock 1
 )
-*172 (CommentText
+*173 (CommentText
 uid 3163,0
 shape (Rectangle
@@ -6317 +6383 @@
 titleBlock 1
 )
-*173 (CommentText
+*174 (CommentText
 uid 3166,0
 shape (Rectangle
@@ -6361 +6427 @@
 oxt "14000,66000,55000,71000"
 )
-*174 (Net
+*175 (Net
 uid 3894,0
 decl (Decl
@@ -6375 +6441 @@
 )
 xt "-172000,16000,-150000,16800"
-st "CLK_25_PS                    : std_logic"
-)
-)
-*175 (PortIoOut
+st "CLK_25_PS                    : std_logic
+"
+)
+)
+*176 (PortIoOut
 uid 3978,0
 shape (CompositeShape
@@ -6422 +6489 @@
 )
 )
-*176 (Net
+*177 (Net
 uid 4068,0
 decl (Decl
@@ -6438 +6505 @@
 )
 xt "-172000,16800,-150000,17600"
-st "CLK_50                       : std_logic"
-)
-)
-*177 (Net
+st "CLK_50                       : std_logic
+"
+)
+)
+*178 (Net
 uid 4204,0
 decl (Decl
@@ -6456 +6524 @@
 font "Courier New,8,0"
 )
-xt "-172000,47600,-146500,48400"
-st "SIGNAL CLK_25                       : std_logic"
-)
-)
-*178 (PortIoOut
+xt "-172000,48400,-146500,49200"
+st "SIGNAL CLK_25                       : std_logic
+"
+)
+)
+*179 (PortIoOut
 uid 4220,0
 shape (CompositeShape
@@ -6504 +6573 @@
 )
 )
-*179 (Net
+*180 (Net
 uid 4232,0
 decl (Decl
@@ -6518 +6587 @@
 )
 xt "-172000,3200,-150000,4000"
-st "CLK                          : std_logic"
-)
-)
-*180 (Net
+st "CLK                          : std_logic
+"
+)
+)
+*181 (Net
 uid 4260,0
 decl (Decl
@@ -6536 +6606 @@
 )
 xt "-172000,9600,-140500,10400"
-st "adc_otr_array                : std_logic_vector(3 DOWNTO 0)"
-)
-)
-*181 (Net
+st "adc_otr_array                : std_logic_vector(3 DOWNTO 0)
+"
+)
+)
+*182 (Net
 uid 4270,0
 decl (Decl
@@ -6553 +6624 @@
 )
 xt "-172000,8800,-145000,9600"
-st "adc_data_array               : adc_data_array_type"
-)
-)
-*182 (PortIoIn
+st "adc_data_array               : adc_data_array_type
+"
+)
+)
+*183 (PortIoIn
 uid 4307,0
 shape (CompositeShape
@@ -6601 +6673 @@
 )
 )
-*183 (Net
+*184 (Net
 uid 4399,0
 decl (Decl
@@ -6615 +6687 @@
 font "Courier New,8,0"
 )
-xt "-172000,76400,-125500,77200"
-st "SIGNAL drs_clk_en                   : std_logic                                    := '0'"
-)
-)
-*184 (Net
+xt "-172000,77200,-125500,78000"
+st "SIGNAL drs_clk_en                   : std_logic                                    := '0'
+"
+)
+)
+*185 (Net
 uid 4405,0
 decl (Decl
@@ -6632 +6705 @@
 font "Courier New,8,0"
 )
-xt "-172000,82800,-140500,83600"
-st "SIGNAL drs_s_cell_array             : drs_s_cell_array_type"
-)
-)
-*185 (Net
+xt "-172000,83600,-140500,84400"
+st "SIGNAL drs_s_cell_array             : drs_s_cell_array_type
+"
+)
+)
+*186 (Net
 uid 4417,0
 decl (Decl
@@ -6650 +6724 @@
 font "Courier New,8,0"
 )
-xt "-172000,77200,-125500,78000"
-st "SIGNAL drs_read_s_cell              : std_logic                                    := '0'"
-)
-)
-*186 (Net
+xt "-172000,78000,-125500,78800"
+st "SIGNAL drs_read_s_cell              : std_logic                                    := '0'
+"
+)
+)
+*187 (Net
 uid 4535,0
 decl (Decl
@@ -6670 +6745 @@
 )
 xt "-172000,31200,-123000,32000"
-st "drs_channel_id               : std_logic_vector(3 downto 0)                 := (others => '0')"
-)
-)
-*187 (Net
+st "drs_channel_id               : std_logic_vector(3 downto 0)                 := (others => '0')
+"
+)
+)
+*188 (Net
 uid 4543,0
 decl (Decl
@@ -6688 +6764 @@
 )
 xt "-172000,32000,-129000,32800"
-st "drs_dwrite                   : std_logic                                    := '1'"
-)
-)
-*188 (PortIoOut
+st "drs_dwrite                   : std_logic                                    := '1'
+"
+)
+)
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 uid 4551,0
 shape (CompositeShape
@@ -6736 +6813 @@
 )
 )
-*189 (PortIoOut
+*190 (PortIoOut
 uid 4557,0
 shape (CompositeShape
@@ -6781 +6858 @@
 )
 )
-*190 (Net
+*191 (Net
 uid 4669,0
 decl (Decl
@@ -6795 +6872 @@
 )
 xt "-172000,5600,-150000,6400"
-st "SROUT_in_0                   : std_logic"
-)
-)
-*191 (Net
+st "SROUT_in_0                   : std_logic
+"
+)
+)
+*192 (Net
 uid 4677,0
 decl (Decl
@@ -6812 +6890 @@
 )
 xt "-172000,6400,-150000,7200"
-st "SROUT_in_1                   : std_logic"
-)
-)
-*192 (Net
+st "SROUT_in_1                   : std_logic
+"
+)
+)
+*193 (Net
 uid 4685,0
 decl (Decl
@@ -6829 +6908 @@
 )
 xt "-172000,7200,-150000,8000"
-st "SROUT_in_2                   : std_logic"
-)
-)
-*193 (Net
+st "SROUT_in_2                   : std_logic
+"
+)
+)
+*194 (Net
 uid 4693,0
 decl (Decl
@@ -6846 +6926 @@
 )
 xt "-172000,8000,-150000,8800"
-st "SROUT_in_3                   : std_logic"
-)
-)
-*194 (PortIoIn
+st "SROUT_in_3                   : std_logic
+"
+)
+)
+*195 (PortIoIn
 uid 4701,0
 shape (CompositeShape
@@ -6894 +6975 @@
 )
 )
-*195 (PortIoIn
+*196 (PortIoIn
 uid 4707,0
 shape (CompositeShape
@@ -6939 +7020 @@
 )
 )
-*196 (PortIoIn
+*197 (PortIoIn
 uid 4713,0
 shape (CompositeShape
@@ -6984 +7065 @@
 )
 )
-*197 (PortIoIn
+*198 (PortIoIn
 uid 4719,0
 shape (CompositeShape
@@ -7029 +7110 @@
 )
 )
-*198 (Net
+*199 (Net
 uid 4741,0
 decl (Decl
@@ -7042 +7123 @@
 font "Courier New,8,0"
 )
-xt "-172000,78000,-146500,78800"
-st "SIGNAL drs_read_s_cell_ready        : std_logic"
-)
-)
-*199 (SaComponent
+xt "-172000,78800,-146500,79600"
+st "SIGNAL drs_read_s_cell_ready        : std_logic
+"
+)
+)
+*200 (SaComponent
 uid 4903,0
 optionalChildren [
-*200 (CptPort
+*201 (CptPort
 uid 4867,0
 ps "OnEdgeStrategy"
@@ -7082 +7164 @@
 )
 )
-*201 (CptPort
+*202 (CptPort
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 ps "OnEdgeStrategy"
@@ -7116 +7198 @@
 )
 )
-*202 (CptPort
+*203 (CptPort
 uid 4875,0
 ps "OnEdgeStrategy"
@@ -7150 +7232 @@
 )
 )
-*203 (CptPort
+*204 (CptPort
 uid 4879,0
 ps "OnEdgeStrategy"
@@ -7183 +7265 @@
 )
 )
-*204 (CptPort
+*205 (CptPort
 uid 4883,0
 ps "OnEdgeStrategy"
@@ -7216 +7298 @@
 )
 )
-*205 (CptPort
+*206 (CptPort
 uid 4887,0
 ps "OnEdgeStrategy"
@@ -7249 +7331 @@
 )
 )
-*206 (CptPort
+*207 (CptPort
 uid 4891,0
 ps "OnEdgeStrategy"
@@ -7282 +7364 @@
 )
 )
-*207 (CptPort
+*208 (CptPort
 uid 4895,0
 ps "OnEdgeStrategy"
@@ -7317 +7399 @@
 )
 )
-*208 (CptPort
+*209 (CptPort
 uid 4899,0
 ps "OnEdgeStrategy"
@@ -7353 +7435 @@
 )
 )
-*209 (CptPort
+*210 (CptPort
 uid 4938,0
 ps "OnEdgeStrategy"
@@ -7388 +7470 @@
 )
 )
-*210 (CptPort
+*211 (CptPort
 uid 4942,0
 ps "OnEdgeStrategy"
@@ -7423 +7505 @@
 )
 )
-*211 (CptPort
+*212 (CptPort
 uid 10272,0
 ps "OnEdgeStrategy"
@@ -7458 +7540 @@
 )
 )
-*212 (CptPort
+*213 (CptPort
 uid 10276,0
 ps "OnEdgeStrategy"
@@ -7493 +7575 @@
 )
 )
-*213 (CptPort
+*214 (CptPort
 uid 10280,0
 ps "OnEdgeStrategy"
@@ -7529 +7611 @@
 )
 )
-*214 (CptPort
+*215 (CptPort
 uid 10284,0
 ps "OnEdgeStrategy"
@@ -7565 +7647 @@
 )
 )
-*215 (CptPort
+*216 (CptPort
 uid 10288,0
 ps "OnEdgeStrategy"
@@ -7616 +7698 @@
 stg "VerticalLayoutStrategy"
 textVec [
-*216 (Text
+*217 (Text
 uid 4906,0
 va (VaSet
@@ -7626 +7708 @@
 tm "BdLibraryNameMgr"
 )
-*217 (Text
+*218 (Text
 uid 4907,0
 va (VaSet
@@ -7636 +7718 @@
 tm "CptNameMgr"
 )
-*218 (Text
+*219 (Text
 uid 4908,0
 va (VaSet
@@ -7683 +7765 @@
 archFileType "UNKNOWN"
 )
-*219 (Net
+*220 (Net
 uid 4946,0
 decl (Decl
@@ -7698 +7780 @@
 )
 xt "-172000,21600,-129000,22400"
-st "RSRLOAD                      : std_logic                                    := '0'"
-)
-)
-*220 (PortIoOut
+st "RSRLOAD                      : std_logic                                    := '0'
+"
+)
+)
+*221 (PortIoOut
 uid 4954,0
 shape (CompositeShape
@@ -7746 +7829 @@
 )
 )
-*221 (Net
+*222 (Net
 uid 4960,0
 decl (Decl
@@ -7761 +7844 @@
 )
 xt "-172000,22400,-129000,23200"
-st "SRCLK                        : std_logic                                    := '0'"
-)
-)
-*222 (PortIoOut
+st "SRCLK                        : std_logic                                    := '0'
+"
+)
+)
+*223 (PortIoOut
 uid 4968,0
 shape (CompositeShape
@@ -7809 +7893 @@
 )
 )
-*223 (Net
+*224 (Net
 uid 5220,0
 decl (Decl
@@ -7826 +7910 @@
 )
 xt "-172000,33600,-123000,34400"
-st "led                          : std_logic_vector(7 DOWNTO 0)                 := (OTHERS => '0')"
-)
-)
-*224 (Net
+st "led                          : std_logic_vector(7 DOWNTO 0)                 := (OTHERS => '0')
+"
+)
+)
+*225 (Net
 uid 5472,0
 decl (Decl
@@ -7842 +7927 @@
 font "Courier New,8,0"
 )
-xt "-172000,108400,-146500,109200"
-st "SIGNAL sensor_ready                 : std_logic"
-)
-)
-*225 (Net
+xt "-172000,109200,-146500,110000"
+st "SIGNAL sensor_ready                 : std_logic
+"
+)
+)
+*226 (Net
 uid 5478,0
 decl (Decl
@@ -7859 +7945 @@
 font "Courier New,8,0"
 )
-xt "-172000,107600,-142500,108400"
-st "SIGNAL sensor_array                 : sensor_array_type"
-)
-)
-*226 (Net
+xt "-172000,108400,-142500,109200"
+st "SIGNAL sensor_array                 : sensor_array_type
+"
+)
+)
+*227 (Net
 uid 5632,0
 lang 10
@@ -7878 +7965 @@
 font "Courier New,8,0"
 )
-xt "-172000,58800,-137000,59600"
-st "SIGNAL adc_otr                      : std_logic_vector(3 DOWNTO 0)"
-)
-)
-*227 (Net
+xt "-172000,59600,-137000,60400"
+st "SIGNAL adc_otr                      : std_logic_vector(3 DOWNTO 0)
+"
+)
+)
+*228 (Net
 uid 5640,0
 decl (Decl
@@ -7895 +7983 @@
 font "Courier New,8,0"
 )
-xt "-172000,58000,-141500,58800"
-st "SIGNAL adc_data_array_int           : adc_data_array_type"
-)
-)
-*228 (SaComponent
+xt "-172000,58800,-141500,59600"
+st "SIGNAL adc_data_array_int           : adc_data_array_type
+"
+)
+)
+*229 (SaComponent
 uid 5678,0
 optionalChildren [
-*229 (CptPort
+*230 (CptPort
 uid 5658,0
 ps "OnEdgeStrategy"
@@ -7937 +8026 @@
 )
 )
-*230 (CptPort
+*231 (CptPort
 uid 5662,0
 ps "OnEdgeStrategy"
@@ -7974 +8063 @@
 )
 )
-*231 (CptPort
+*232 (CptPort
 uid 5666,0
 ps "OnEdgeStrategy"
@@ -8013 +8102 @@
 )
 )
-*232 (CptPort
+*233 (CptPort
 uid 5670,0
 ps "OnEdgeStrategy"
@@ -8049 +8138 @@
 )
 )
-*233 (CptPort
+*234 (CptPort
 uid 5674,0
 ps "OnEdgeStrategy"
@@ -8102 +8191 @@
 stg "VerticalLayoutStrategy"
 textVec [
-*234 (Text
+*235 (Text
 uid 5681,0
 va (VaSet
@@ -8112 +8201 @@
 tm "BdLibraryNameMgr"
 )
-*235 (Text
+*236 (Text
 uid 5682,0
 va (VaSet
@@ -8122 +8211 @@
 tm "CptNameMgr"
 )
-*236 (Text
+*237 (Text
 uid 5683,0
 va (VaSet
@@ -8171 +8260 @@
 archFileType "UNKNOWN"
 )
-*237 (SaComponent
+*238 (SaComponent
 uid 5793,0
 optionalChildren [
-*238 (CptPort
+*239 (CptPort
 uid 5753,0
 ps "OnEdgeStrategy"
@@ -8209 +8298 @@
 )
 )
-*239 (CptPort
+*240 (CptPort
 uid 5761,0
 ps "OnEdgeStrategy"
@@ -8244 +8333 @@
 )
 )
-*240 (CptPort
+*241 (CptPort
 uid 5765,0
 ps "OnEdgeStrategy"
@@ -8280 +8369 @@
 )
 )
-*241 (CptPort
+*242 (CptPort
 uid 5769,0
 ps "OnEdgeStrategy"
@@ -8315 +8404 @@
 )
 )
-*242 (CptPort
+*243 (CptPort
 uid 5773,0
 ps "OnEdgeStrategy"
@@ -8351 +8440 @@
 )
 )
-*243 (CptPort
+*244 (CptPort
 uid 5777,0
 ps "OnEdgeStrategy"
@@ -8387 +8476 @@
 )
 )
-*244 (CptPort
+*245 (CptPort
 uid 5781,0
 ps "OnEdgeStrategy"
@@ -8422 +8511 @@
 )
 )
-*245 (CptPort
+*246 (CptPort
 uid 5785,0
 ps "OnEdgeStrategy"
@@ -8458 +8547 @@
 )
 )
-*246 (CptPort
+*247 (CptPort
 uid 5789,0
 ps "OnEdgeStrategy"
@@ -8494 +8583 @@
 )
 )
-*247 (CptPort
+*248 (CptPort
 uid 6154,0
 ps "OnEdgeStrategy"
@@ -8530 +8619 @@
 )
 )
-*248 (CptPort
+*249 (CptPort
 uid 6317,0
 ps "OnEdgeStrategy"
@@ -8567 +8656 @@
 )
 )
-*249 (CptPort
+*250 (CptPort
 uid 20147,0
 ps "OnEdgeStrategy"
@@ -8605 +8694 @@
 )
 )
-*250 (CptPort
+*251 (CptPort
 uid 21545,0
 ps "OnEdgeStrategy"
@@ -8656 +8745 @@
 stg "VerticalLayoutStrategy"
 textVec [
-*251 (Text
+*252 (Text
 uid 5796,0
 va (VaSet
@@ -8666 +8755 @@
 tm "BdLibraryNameMgr"
 )
-*252 (Text
+*253 (Text
 uid 5797,0
 va (VaSet
@@ -8676 +8765 @@
 tm "CptNameMgr"
 )
-*253 (Text
+*254 (Text
 uid 5798,0
 va (VaSet
@@ -8722 +8811 @@
 archFileType "UNKNOWN"
 )
-*254 (Net
+*255 (Net
 uid 5811,0
 decl (Decl
@@ -8736 +8825 @@
 )
 xt "-172000,36800,-150000,37600"
-st "sclk                         : std_logic"
-)
-)
-*255 (Net
+st "sclk                         : std_logic
+"
+)
+)
+*256 (Net
 uid 5819,0
 decl (Decl
@@ -8754 +8844 @@
 font "Courier New,8,0"
 )
-xt "-172000,44000,-150000,44800"
-st "sio                          : std_logic"
-)
-)
-*256 (Net
+xt "-172000,44800,-150000,45600"
+st "sio                          : std_logic
+"
+)
+)
+*257 (Net
 uid 5827,0
 decl (Decl
@@ -8772 +8863 @@
 )
 xt "-172000,28000,-150000,28800"
-st "dac_cs                       : std_logic"
-)
-)
-*257 (Net
+st "dac_cs                       : std_logic
+"
+)
+)
+*258 (Net
 uid 5835,0
 decl (Decl
@@ -8790 +8882 @@
 )
 xt "-172000,37600,-140500,38400"
-st "sensor_cs                    : std_logic_vector(3 DOWNTO 0)"
-)
-)
-*258 (PortIoOut
+st "sensor_cs                    : std_logic_vector(3 DOWNTO 0)
+"
+)
+)
+*259 (PortIoOut
 uid 5843,0
 shape (CompositeShape
@@ -8838 +8931 @@
 )
 )
-*259 (PortIoInOut
+*260 (PortIoInOut
 uid 5849,0
 shape (CompositeShape
@@ -8883 +8976 @@
 )
 )
-*260 (PortIoOut
+*261 (PortIoOut
 uid 5855,0
 shape (CompositeShape
@@ -8928 +9021 @@
 )
 )
-*261 (PortIoOut
+*262 (PortIoOut
 uid 5861,0
 shape (CompositeShape
@@ -8973 +9066 @@
 )
 )
-*262 (Net
+*263 (Net
 uid 6158,0
 decl (Decl
@@ -8988 +9081 @@
 )
 xt "-172000,35200,-129000,36000"
-st "mosi                         : std_logic                                    := '0'"
-)
-)
-*263 (PortIoOut
+st "mosi                         : std_logic                                    := '0'
+"
+)
+)
+*264 (PortIoOut
 uid 6166,0
 shape (CompositeShape
@@ -9036 +9130 @@
 )
 )
-*264 (Net
+*265 (Net
 uid 6360,0
 decl (Decl
@@ -9053 +9147 @@
 )
 xt "-172000,30400,-115500,31200"
-st "denable                      : std_logic                                    := '0' -- default domino wave off"
-)
-)
-*265 (PortIoOut
+st "denable                      : std_logic                                    := '0' -- default domino wave off
+"
+)
+)
+*266 (PortIoOut
 uid 6368,0
 shape (CompositeShape
@@ -9100 +9195 @@
 )
 )
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+*267 (MWC
 uid 6529,0
 optionalChildren [
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+*268 (CptPort
 uid 6501,0
 optionalChildren [
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+*269 (Line
 uid 6505,0
 layer 5
@@ -9119 +9214 @@
 ]
 )
-*269 (Property
+*270 (Property
 uid 6506,0
 pclass "_MW_GEOM_"
@@ -9164 +9259 @@
 )
 )
-*270 (CptPort
+*271 (CptPort
 uid 6507,0
 optionalChildren [
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+*272 (Line
 uid 6511,0
 layer 5
@@ -9219 +9314 @@
 )
 )
-*272 (CptPort
+*273 (CptPort
 uid 6512,0
 optionalChildren [
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+*274 (Line
 uid 6516,0
 layer 5
@@ -9274 +9369 @@
 )
 )
-*274 (CommentGraphic
+*275 (CommentGraphic
 uid 6517,0
 optionalChildren [
-*275 (Property
+*276 (Property
 uid 6519,0
 pclass "_MW_GEOM_"
@@ -9301 +9396 @@
 oxt "11000,10000,11000,10000"
 )
-*276 (CommentGraphic
+*277 (CommentGraphic
 uid 6520,0
 optionalChildren [
-*277 (Property
+*278 (Property
 uid 6522,0
 pclass "_MW_GEOM_"
@@ -9328 +9423 @@
 oxt "11000,6000,11000,6000"
 )
-*278 (Grouping
+*279 (Grouping
 uid 6523,0
 optionalChildren [
-*279 (CommentGraphic
+*280 (CommentGraphic
 uid 6525,0
 shape (PolyLine2D
@@ -9352 +9447 @@
 oxt "9000,6000,11000,10000"
 )
-*280 (CommentGraphic
+*281 (CommentGraphic
 uid 6527,0
 shape (Arc2D
@@ -9405 +9500 @@
 stg "VerticalLayoutStrategy"
 textVec [
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+*282 (Text
 uid 6532,0
 va (VaSet
@@ -9415 +9510 @@
 blo "-91500,76300"
 )
-*282 (Text
+*283 (Text
 uid 6533,0
 va (VaSet
@@ -9424 +9519 @@
 blo "-91500,77300"
 )
-*283 (Text
+*284 (Text
 uid 6534,0
 va (VaSet
@@ -9469 +9564 @@
 )
 )
-*284 (SaComponent
+*285 (SaComponent
 uid 8277,0
 optionalChildren [
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+*286 (CptPort
 uid 8246,0
 ps "OnEdgeStrategy"
@@ -9509 +9604 @@
 )
 )
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+*287 (CptPort
 uid 8250,0
 ps "OnEdgeStrategy"
@@ -9547 +9642 @@
 )
 )
-*287 (CptPort
+*288 (CptPort
 uid 8254,0
 ps "OnEdgeStrategy"
@@ -9585 +9680 @@
 )
 )
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+*289 (CptPort
 uid 8258,0
 ps "OnEdgeStrategy"
@@ -9623 +9718 @@
 )
 )
-*289 (CptPort
+*290 (CptPort
 uid 8262,0
 ps "OnEdgeStrategy"
@@ -9661 +9756 @@
 )
 )
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+*291 (CptPort
 uid 8266,0
 ps "OnEdgeStrategy"
@@ -9700 +9795 @@
 )
 )
-*291 (CptPort
+*292 (CptPort
 uid 8270,0
 ps "OnEdgeStrategy"
@@ -9757 +9852 @@
 stg "VerticalLayoutStrategy"
 textVec [
-*292 (Text
+*293 (Text
 uid 8280,0
 va (VaSet
@@ -9767 +9862 @@
 tm "BdLibraryNameMgr"
 )
-*293 (Text
+*294 (Text
 uid 8281,0
 va (VaSet
@@ -9777 +9872 @@
 tm "CptNameMgr"
 )
-*294 (Text
+*295 (Text
 uid 8282,0
 va (VaSet
@@ -9825 +9920 @@
 archFileType "UNKNOWN"
 )
-*295 (Net
+*296 (Net
 uid 8746,0
 decl (Decl
@@ -9838 +9933 @@
 font "Courier New,8,0"
 )
-xt "-172000,106800,-146500,107600"
-st "SIGNAL sclk_enable                  : std_logic"
-)
-)
-*296 (Net
+xt "-172000,107600,-146500,108400"
+st "SIGNAL sclk_enable                  : std_logic
+"
+)
+)
+*297 (Net
 uid 9004,0
 lang 2
@@ -9856 +9952 @@
 font "Courier New,8,0"
 )
-xt "-172000,57200,-146500,58000"
-st "SIGNAL adc_clk_en                   : std_logic"
-)
-)
-*297 (SaComponent
+xt "-172000,58000,-146500,58800"
+st "SIGNAL adc_clk_en                   : std_logic
+"
+)
+)
+*298 (SaComponent
 uid 9175,0
 optionalChildren [
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+*299 (CptPort
 uid 9120,0
 ps "OnEdgeStrategy"
@@ -9900 +9997 @@
 )
 )
-*299 (CptPort
+*300 (CptPort
 uid 9124,0
 ps "OnEdgeStrategy"
@@ -9937 +10034 @@
 )
 )
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+*301 (CptPort
 uid 9128,0
 ps "OnEdgeStrategy"
@@ -9972 +10069 @@
 )
 )
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+*302 (CptPort
 uid 9211,0
 ps "OnEdgeStrategy"
@@ -10009 +10106 @@
 )
 )
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 uid 9215,0
 ps "OnEdgeStrategy"
@@ -10044 +10141 @@
 )
 )
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+*304 (CptPort
 uid 9219,0
 ps "OnEdgeStrategy"
@@ -10079 +10176 @@
 )
 )
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 uid 10030,0
 ps "OnEdgeStrategy"
@@ -10114 +10211 @@
 )
 )
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+*306 (CptPort
 uid 15170,0
 ps "OnEdgeStrategy"
@@ -10155 +10252 @@
 )
 )
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 uid 23071,0
 ps "OnEdgeStrategy"
@@ -10192 +10289 @@
 )
 )
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+*308 (CptPort
 uid 23075,0
 ps "OnEdgeStrategy"
@@ -10246 +10343 @@
 stg "VerticalLayoutStrategy"
 textVec [
-*308 (Text
+*309 (Text
 uid 9178,0
 va (VaSet
@@ -10256 +10353 @@
 tm "BdLibraryNameMgr"
 )
-*309 (Text
+*310 (Text
 uid 9179,0
 va (VaSet
@@ -10266 +10363 @@
 tm "CptNameMgr"
 )
-*310 (Text
+*311 (Text
 uid 9180,0
 va (VaSet
@@ -10312 +10409 @@
 archFileType "UNKNOWN"
 )
-*311 (Net
+*312 (Net
 uid 9231,0
 decl (Decl
@@ -10328 +10425 @@
 font "Courier New,8,0"
 )
-xt "-172000,91600,-110000,92400"
-st "SIGNAL ps_direction                 : std_logic                                    := '1' -- default phase shift upwards"
-)
-)
-*312 (Net
+xt "-172000,92400,-110000,93200"
+st "SIGNAL ps_direction                 : std_logic                                    := '1' -- default phase shift upwards
+"
+)
+)
+*313 (Net
 uid 9239,0
 decl (Decl
@@ -10349 +10447 @@
 font "Courier New,8,0"
 )
-xt "-172000,92400,-109000,93200"
-st "SIGNAL ps_do_phase_shift            : std_logic                                    := '0' --pulse this to phase shift once"
-)
-)
-*313 (Net
+xt "-172000,93200,-109000,94000"
+st "SIGNAL ps_do_phase_shift            : std_logic                                    := '0' --pulse this to phase shift once
+"
+)
+)
+*314 (Net
 uid 9941,0
 decl (Decl
@@ -10369 +10468 @@
 font "Courier New,8,0"
 )
-xt "-172000,93200,-101500,94000"
-st "SIGNAL ps_reset                     : std_logic                                    := '0' -- pulse this to reset the variable phase shift"
-)
-)
-*314 (Net
+xt "-172000,94000,-101500,94800"
+st "SIGNAL ps_reset                     : std_logic                                    := '0' -- pulse this to reset the variable phase shift
+"
+)
+)
+*315 (Net
 uid 9949,0
 decl (Decl
@@ -10387 +10487 @@
 font "Courier New,8,0"
 )
-xt "-172000,113200,-125500,114000"
-st "SIGNAL srclk_enable                 : std_logic                                    := '0'"
-)
-)
-*315 (MWC
+xt "-172000,114000,-125500,114800"
+st "SIGNAL srclk_enable                 : std_logic                                    := '0'
+"
+)
+)
+*316 (MWC
 uid 9957,0
 optionalChildren [
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 uid 9966,0
 optionalChildren [
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 uid 9970,0
 layer 5
@@ -10410 +10511 @@
 ]
 )
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+*319 (Property
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 pclass "_MW_GEOM_"
@@ -10454 +10555 @@
 )
 )
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 optionalChildren [
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 layer 5
@@ -10508 +10609 @@
 )
 )
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 uid 9977,0
 optionalChildren [
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 layer 5
@@ -10562 +10663 @@
 )
 )
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 uid 9982,0
 optionalChildren [
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+*325 (Property
 uid 9984,0
 pclass "_MW_GEOM_"
@@ -10589 +10690 @@
 oxt "11000,10000,11000,10000"
 )
-*325 (CommentGraphic
+*326 (CommentGraphic
 uid 9985,0
 optionalChildren [
-*326 (Property
+*327 (Property
 uid 9987,0
 pclass "_MW_GEOM_"
@@ -10616 +10717 @@
 oxt "11000,6000,11000,6000"
 )
-*327 (Grouping
+*328 (Grouping
 uid 9988,0
 optionalChildren [
-*328 (CommentGraphic
+*329 (CommentGraphic
 uid 9990,0
 shape (PolyLine2D
@@ -10640 +10741 @@
 oxt "9000,6000,11000,10000"
 )
-*329 (CommentGraphic
+*330 (CommentGraphic
 uid 9992,0
 shape (Arc2D
@@ -10693 +10794 @@
 stg "VerticalLayoutStrategy"
 textVec [
-*330 (Text
+*331 (Text
 uid 9960,0
 va (VaSet
@@ -10703 +10804 @@
 blo "-69500,56300"
 )
-*331 (Text
+*332 (Text
 uid 9961,0
 va (VaSet
@@ -10712 +10813 @@
 blo "-69500,57300"
 )
-*332 (Text
+*333 (Text
 uid 9962,0
 va (VaSet
@@ -10757 +10858 @@
 )
 )
-*333 (Net
+*334 (Net
 uid 10008,0
 decl (Decl
@@ -10771 +10872 @@
 font "Courier New,8,0"
 )
-xt "-172000,56400,-125500,57200"
-st "SIGNAL SRCLK1                       : std_logic                                    := '0'"
-)
-)
-*334 (Net
+xt "-172000,57200,-125500,58000"
+st "SIGNAL SRCLK1                       : std_logic                                    := '0'
+"
+)
+)
+*335 (Net
 uid 10264,0
 decl (Decl
@@ -10788 +10890 @@
 font "Courier New,8,0"
 )
-xt "-172000,105200,-146500,106000"
-st "SIGNAL s_trigger                    : std_logic"
-)
-)
-*335 (Net
+xt "-172000,106000,-146500,106800"
+st "SIGNAL s_trigger                    : std_logic
+"
+)
+)
+*336 (Net
 uid 10296,0
 decl (Decl
@@ -10805 +10908 @@
 font "Courier New,8,0"
 )
-xt "-172000,115600,-146500,116400"
-st "SIGNAL start_srin_write_8b          : std_logic"
-)
-)
-*336 (Net
+xt "-172000,116400,-146500,117200"
+st "SIGNAL start_srin_write_8b          : std_logic
+"
+)
+)
+*337 (Net
 uid 10302,0
 decl (Decl
@@ -10823 +10927 @@
 font "Courier New,8,0"
 )
-xt "-172000,114000,-125500,114800"
-st "SIGNAL srin_write_ack               : std_logic                                    := '0'"
-)
-)
-*337 (Net
+xt "-172000,114800,-125500,115600"
+st "SIGNAL srin_write_ack               : std_logic                                    := '0'
+"
+)
+)
+*338 (Net
 uid 10308,0
 decl (Decl
@@ -10841 +10946 @@
 font "Courier New,8,0"
 )
-xt "-172000,114800,-125500,115600"
-st "SIGNAL srin_write_ready             : std_logic                                    := '0'"
-)
-)
-*338 (Net
+xt "-172000,115600,-125500,116400"
+st "SIGNAL srin_write_ready             : std_logic                                    := '0'
+"
+)
+)
+*339 (Net
 uid 10314,0
 decl (Decl
@@ -10860 +10966 @@
 font "Courier New,8,0"
 )
-xt "-172000,83600,-119500,84400"
-st "SIGNAL drs_srin_data                : std_logic_vector(7 downto 0)                 := (others => '0')"
-)
-)
-*339 (Net
+xt "-172000,84400,-119500,85200"
+st "SIGNAL drs_srin_data                : std_logic_vector(7 downto 0)                 := (others => '0')
+"
+)
+)
+*340 (Net
 uid 10320,0
 decl (Decl
@@ -10879 +10986 @@
 )
 xt "-172000,23200,-129000,24000"
-st "SRIN_out                     : std_logic                                    := '0'"
-)
-)
-*340 (PortIoOut
+st "SRIN_out                     : std_logic                                    := '0'
+"
+)
+)
+*341 (PortIoOut
 uid 10328,0
 shape (CompositeShape
@@ -10927 +11035 @@
 )
 )
-*341 (MWC
+*342 (MWC
 uid 10380,0
 optionalChildren [
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+*343 (CptPort
 uid 10344,0
 optionalChildren [
-*343 (Line
+*344 (Line
 uid 10348,0
 layer 5
@@ -10985 +11093 @@
 )
 )
-*344 (CptPort
+*345 (CptPort
 uid 10349,0
 optionalChildren [
-*345 (Property
+*346 (Property
 uid 10353,0
 pclass "_MW_GEOM_"
@@ -10994 +11102 @@
 ptn "String"
 )
-*346 (Line
+*347 (Line
 uid 10354,0
 layer 5
@@ -11048 +11156 @@
 )
 )
-*347 (CptPort
+*348 (CptPort
 uid 10355,0
 optionalChildren [
-*348 (Line
+*349 (Line
 uid 10359,0
 layer 5
@@ -11101 +11209 @@
 )
 )
-*349 (CommentGraphic
+*350 (CommentGraphic
 uid 10360,0
 shape (Arc2D
@@ -11122 +11230 @@
 oxt "7000,6003,11000,8000"
 )
-*350 (CommentGraphic
+*351 (CommentGraphic
 uid 10362,0
 shape (Arc2D
@@ -11143 +11251 @@
 oxt "6996,8005,11000,10000"
 )
-*351 (Grouping
+*352 (Grouping
 uid 10364,0
 optionalChildren [
-*352 (CommentGraphic
+*353 (CommentGraphic
 uid 10366,0
 optionalChildren [
-*353 (Property
+*354 (Property
 uid 10368,0
 pclass "_MW_GEOM_"
@@ -11180 +11288 @@
 oxt "7000,6000,11000,9998"
 )
-*354 (CommentGraphic
+*355 (CommentGraphic
 uid 10369,0
 optionalChildren [
-*355 (Property
+*356 (Property
 uid 10371,0
 pclass "_MW_GEOM_"
@@ -11225 +11333 @@
 oxt "7000,6000,11000,10000"
 )
-*356 (CommentGraphic
+*357 (CommentGraphic
 uid 10372,0
 shape (PolyLine2D
@@ -11244 +11352 @@
 oxt "11000,8000,11000,8000"
 )
-*357 (CommentGraphic
+*358 (CommentGraphic
 uid 10374,0
 optionalChildren [
-*358 (Property
+*359 (Property
 uid 10376,0
 pclass "_MW_GEOM_"
@@ -11271 +11379 @@
 oxt "7000,6000,7000,6000"
 )
-*359 (CommentGraphic
+*360 (CommentGraphic
 uid 10377,0
 optionalChildren [
-*360 (Property
+*361 (Property
 uid 10379,0
 pclass "_MW_GEOM_"
@@ -11317 +11425 @@
 stg "VerticalLayoutStrategy"
 textVec [
-*361 (Text
+*362 (Text
 uid 10383,0
 va (VaSet
@@ -11327 +11435 @@
 blo "-98500,70300"
 )
-*362 (Text
+*363 (Text
 uid 10384,0
 va (VaSet
@@ -11336 +11444 @@
 blo "-98500,71300"
 )
-*363 (Text
+*364 (Text
 uid 10385,0
 va (VaSet
@@ -11381 +11489 @@
 )
 )
-*364 (Net
+*365 (Net
 uid 10627,0
 decl (Decl
@@ -11394 +11502 @@
 font "Courier New,8,0"
 )
-xt "-172000,109200,-146500,110000"
-st "SIGNAL socks_connected              : std_logic"
-)
-)
-*365 (Net
+xt "-172000,110000,-146500,110800"
+st "SIGNAL socks_connected              : std_logic
+"
+)
+)
+*366 (Net
 uid 10635,0
 decl (Decl
@@ -11411 +11520 @@
 font "Courier New,8,0"
 )
-xt "-172000,110000,-146500,110800"
-st "SIGNAL socks_waiting                : std_logic"
-)
-)
-*366 (Net
+xt "-172000,110800,-146500,111600"
+st "SIGNAL socks_waiting                : std_logic
+"
+)
+)
+*367 (Net
 uid 10721,0
 decl (Decl
@@ -11429 +11539 @@
 )
 xt "-172000,32800,-150000,33600"
-st "green                        : std_logic"
-)
-)
-*367 (PortIoOut
+st "green                        : std_logic
+"
+)
+)
+*368 (PortIoOut
 uid 10729,0
 shape (CompositeShape
@@ -11476 +11587 @@
 )
 )
-*368 (Net
+*369 (Net
 uid 10735,0
 decl (Decl
@@ -11490 +11601 @@
 )
 xt "-172000,26400,-150000,27200"
-st "amber                        : std_logic"
-)
-)
-*369 (PortIoOut
+st "amber                        : std_logic
+"
+)
+)
+*370 (PortIoOut
 uid 10743,0
 shape (CompositeShape
@@ -11537 +11649 @@
 )
 )
-*370 (Net
+*371 (Net
 uid 10749,0
 decl (Decl
@@ -11551 +11663 @@
 )
 xt "-172000,36000,-150000,36800"
-st "red                          : std_logic"
-)
-)
-*371 (PortIoOut
+st "red                          : std_logic
+"
+)
+)
+*372 (PortIoOut
 uid 10757,0
 shape (CompositeShape
@@ -11598 +11711 @@
 )
 )
-*372 (SaComponent
+*373 (SaComponent
 uid 11209,0
 optionalChildren [
-*373 (CptPort
+*374 (CptPort
 uid 11181,0
 ps "OnEdgeStrategy"
@@ -11634 +11747 @@
 )
 )
-*374 (CptPort
+*375 (CptPort
 uid 11185,0
 ps "OnEdgeStrategy"
@@ -11669 +11782 @@
 )
 )
-*375 (CptPort
+*376 (CptPort
 uid 11189,0
 ps "OnEdgeStrategy"
@@ -11704 +11817 @@
 )
 )
-*376 (CptPort
+*377 (CptPort
 uid 11193,0
 ps "OnEdgeStrategy"
@@ -11739 +11852 @@
 )
 )
-*377 (CptPort
+*378 (CptPort
 uid 11197,0
 ps "OnEdgeStrategy"
@@ -11772 +11885 @@
 )
 )
-*378 (CptPort
+*379 (CptPort
 uid 11201,0
 ps "OnEdgeStrategy"
@@ -11805 +11918 @@
 )
 )
-*379 (CptPort
+*380 (CptPort
 uid 11205,0
 ps "OnEdgeStrategy"
@@ -11838 +11951 @@
 )
 )
-*380 (CptPort
+*381 (CptPort
 uid 12693,0
 ps "OnEdgeStrategy"
@@ -11873 +11986 @@
 )
 )
-*381 (CptPort
+*382 (CptPort
 uid 22344,0
 ps "OnEdgeStrategy"
@@ -11906 +12019 @@
 )
 )
-*382 (CptPort
+*383 (CptPort
 uid 22348,0
 ps "OnEdgeStrategy"
@@ -11956 +12069 @@
 stg "VerticalLayoutStrategy"
 textVec [
-*383 (Text
+*384 (Text
 uid 11212,0
 va (VaSet
@@ -11966 +12079 @@
 tm "BdLibraryNameMgr"
 )
-*384 (Text
+*385 (Text
 uid 11213,0
 va (VaSet
@@ -11976 +12089 @@
 tm "CptNameMgr"
 )
-*385 (Text
+*386 (Text
 uid 11214,0
 va (VaSet
@@ -12035 +12148 @@
 archFileType "UNKNOWN"
 )
-*386 (Net
+*387 (Net
 uid 11403,0
 decl (Decl
@@ -12048 +12161 @@
 font "Courier New,8,0"
 )
-xt "-172000,82000,-146500,82800"
-st "SIGNAL drs_readout_started          : std_logic"
-)
-)
-*387 (Net
+xt "-172000,82800,-146500,83600"
+st "SIGNAL drs_readout_started          : std_logic
+"
+)
+)
+*388 (Net
 uid 11856,0
 decl (Decl
@@ -12065 +12179 @@
 font "Courier New,8,0"
 )
-xt "-172000,117200,-146500,118000"
-st "SIGNAL trigger_enable               : std_logic"
-)
-)
-*388 (MWC
+xt "-172000,118000,-146500,118800"
+st "SIGNAL trigger_enable               : std_logic
+"
+)
+)
+*389 (MWC
 uid 12295,0
 optionalChildren [
-*389 (CptPort
+*390 (CptPort
 uid 12267,0
 optionalChildren [
-*390 (Line
+*391 (Line
 uid 12271,0
 layer 5
@@ -12088 +12203 @@
 ]
 )
-*391 (Property
+*392 (Property
 uid 12272,0
 pclass "_MW_GEOM_"
@@ -12135 +12250 @@
 )
 )
-*392 (CptPort
+*393 (CptPort
 uid 12273,0
 optionalChildren [
-*393 (Line
+*394 (Line
 uid 12277,0
 layer 5
@@ -12190 +12305 @@
 )
 )
-*394 (CptPort
+*395 (CptPort
 uid 12278,0
 optionalChildren [
-*395 (Line
+*396 (Line
 uid 12282,0
 layer 5
@@ -12243 +12358 @@
 )
 )
-*396 (CommentGraphic
+*397 (CommentGraphic
 uid 12283,0
 optionalChildren [
-*397 (Property
+*398 (Property
 uid 12285,0
 pclass "_MW_GEOM_"
@@ -12270 +12385 @@
 oxt "7000,10000,7000,10000"
 )
-*398 (CommentGraphic
+*399 (CommentGraphic
 uid 12286,0
 optionalChildren [
-*399 (Property
+*400 (Property
 uid 12288,0
 pclass "_MW_GEOM_"
@@ -12297 +12412 @@
 oxt "7000,6000,7000,6000"
 )
-*400 (Grouping
+*401 (Grouping
 uid 12289,0
 optionalChildren [
-*401 (CommentGraphic
+*402 (CommentGraphic
 uid 12291,0
 shape (PolyLine2D
@@ -12321 +12436 @@
 oxt "7000,6000,9000,10000"
 )
-*402 (CommentGraphic
+*403 (CommentGraphic
 uid 12293,0
 shape (Arc2D
@@ -12374 +12489 @@
 stg "VerticalLayoutStrategy"
 textVec [
-*403 (Text
+*404 (Text
 uid 12298,0
 va (VaSet
@@ -12384 +12499 @@
 blo "-92500,71300"
 )
-*404 (Text
+*405 (Text
 uid 12299,0
 va (VaSet
@@ -12393 +12508 @@
 blo "-92500,72300"
 )
-*405 (Text
+*406 (Text
 uid 12300,0
 va (VaSet
@@ -12438 +12553 @@
 )
 )
-*406 (SaComponent
+*407 (SaComponent
 uid 12625,0
 optionalChildren [
-*407 (CptPort
+*408 (CptPort
 uid 12605,0
 ps "OnEdgeStrategy"
@@ -12474 +12589 @@
 )
 )
-*408 (CptPort
+*409 (CptPort
 uid 12609,0
 ps "OnEdgeStrategy"
@@ -12510 +12625 @@
 )
 )
-*409 (CptPort
+*410 (CptPort
 uid 12613,0
 ps "OnEdgeStrategy"
@@ -12545 +12660 @@
 )
 )
-*410 (CptPort
+*411 (CptPort
 uid 12617,0
 ps "OnEdgeStrategy"
@@ -12579 +12694 @@
 )
 )
-*411 (CptPort
+*412 (CptPort
 uid 12621,0
 ps "OnEdgeStrategy"
@@ -12615 +12730 @@
 )
 )
-*412 (CptPort
+*413 (CptPort
 uid 12673,0
 ps "OnEdgeStrategy"
@@ -12665 +12780 @@
 stg "VerticalLayoutStrategy"
 textVec [
-*413 (Text
+*414 (Text
 uid 12628,0
 va (VaSet
@@ -12675 +12790 @@
 tm "BdLibraryNameMgr"
 )
-*414 (Text
+*415 (Text
 uid 12629,0
 va (VaSet
@@ -12685 +12800 @@
 tm "CptNameMgr"
 )
-*415 (Text
+*416 (Text
 uid 12630,0
 va (VaSet
@@ -12732 +12847 @@
 archFileType "UNKNOWN"
 )
-*416 (Net
+*417 (Net
 uid 12647,0
 decl (Decl
@@ -12750 +12865 @@
 font "Courier New,8,0"
 )
-xt "-172000,78800,-125500,81200"
+xt "-172000,79600,-125500,82000"
 st "-- --
 --      drs_dwrite : out std_logic := '1';
-SIGNAL drs_readout_ready            : std_logic                                    := '0'"
-)
-)
-*417 (Net
+SIGNAL drs_readout_ready            : std_logic                                    := '0'
+"
+)
+)
+*418 (Net
 uid 12653,0
 decl (Decl
@@ -12769 +12885 @@
 font "Courier New,8,0"
 )
-xt "-172000,81200,-146500,82000"
-st "SIGNAL drs_readout_ready_ack        : std_logic"
-)
-)
-*418 (SaComponent
+xt "-172000,82000,-146500,82800"
+st "SIGNAL drs_readout_ready_ack        : std_logic
+"
+)
+)
+*419 (SaComponent
 uid 13117,0
 optionalChildren [
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+*420 (CptPort
 uid 13101,0
 ps "OnEdgeStrategy"
@@ -12810 +12927 @@
 )
 )
-*420 (CptPort
+*421 (CptPort
 uid 13105,0
 ps "OnEdgeStrategy"
@@ -12844 +12961 @@
 )
 )
-*421 (CptPort
+*422 (CptPort
 uid 13109,0
 ps "OnEdgeStrategy"
@@ -12879 +12996 @@
 )
 )
-*422 (CptPort
+*423 (CptPort
 uid 13113,0
 ps "OnEdgeStrategy"
@@ -12930 +13047 @@
 stg "VerticalLayoutStrategy"
 textVec [
-*423 (Text
+*424 (Text
 uid 13120,0
 va (VaSet
@@ -12940 +13057 @@
 tm "BdLibraryNameMgr"
 )
-*424 (Text
+*425 (Text
 uid 13121,0
 va (VaSet
@@ -12950 +13067 @@
 tm "CptNameMgr"
 )
-*425 (Text
+*426 (Text
 uid 13122,0
 va (VaSet
@@ -13009 +13126 @@
 archFileType "UNKNOWN"
 )
-*426 (Net
+*427 (Net
 uid 13157,0
 decl (Decl
@@ -13023 +13140 @@
 font "Courier New,8,0"
 )
-xt "-172000,60400,-125500,61200"
-st "SIGNAL c_trigger_enable             : std_logic                                    := '0'"
-)
-)
-*427 (MWC
+xt "-172000,61200,-125500,62000"
+st "SIGNAL c_trigger_enable             : std_logic                                    := '0'
+"
+)
+)
+*428 (MWC
 uid 13266,0
 optionalChildren [
-*428 (CptPort
+*429 (CptPort
 uid 13230,0
 optionalChildren [
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+*430 (Line
 uid 13234,0
 layer 5
@@ -13084 +13202 @@
 )
 )
-*430 (CptPort
+*431 (CptPort
 uid 13235,0
 optionalChildren [
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+*432 (Property
 uid 13239,0
 pclass "_MW_GEOM_"
@@ -13093 +13211 @@
 ptn "String"
 )
-*432 (Line
+*433 (Line
 uid 13240,0
 layer 5
@@ -13144 +13262 @@
 )
 )
-*433 (CptPort
+*434 (CptPort
 uid 13241,0
 optionalChildren [
-*434 (Line
+*435 (Line
 uid 13245,0
 layer 5
@@ -13198 +13316 @@
 )
 )
-*435 (CommentGraphic
+*436 (CommentGraphic
 uid 13246,0
 shape (Arc2D
@@ -13219 +13337 @@
 oxt "7000,6003,11000,8000"
 )
-*436 (CommentGraphic
+*437 (CommentGraphic
 uid 13248,0
 shape (Arc2D
@@ -13240 +13358 @@
 oxt "7000,8005,11004,10000"
 )
-*437 (Grouping
+*438 (Grouping
 uid 13250,0
 optionalChildren [
-*438 (CommentGraphic
+*439 (CommentGraphic
 uid 13252,0
 optionalChildren [
-*439 (Property
+*440 (Property
 uid 13254,0
 pclass "_MW_GEOM_"
@@ -13277 +13395 @@
 oxt "7000,6000,11000,9998"
 )
-*440 (CommentGraphic
+*441 (CommentGraphic
 uid 13255,0
 optionalChildren [
-*441 (Property
+*442 (Property
 uid 13257,0
 pclass "_MW_GEOM_"
@@ -13322 +13440 @@
 oxt "7000,6000,11000,10000"
 )
-*442 (CommentGraphic
+*443 (CommentGraphic
 uid 13258,0
 shape (PolyLine2D
@@ -13341 +13459 @@
 oxt "7000,8000,7000,8000"
 )
-*443 (CommentGraphic
+*444 (CommentGraphic
 uid 13260,0
 optionalChildren [
-*444 (Property
+*445 (Property
 uid 13262,0
 pclass "_MW_GEOM_"
@@ -13368 +13486 @@
 oxt "11000,6000,11000,6000"
 )
-*445 (CommentGraphic
+*446 (CommentGraphic
 uid 13263,0
 optionalChildren [
-*446 (Property
+*447 (Property
 uid 13265,0
 pclass "_MW_GEOM_"
@@ -13414 +13532 @@
 stg "VerticalLayoutStrategy"
 textVec [
-*447 (Text
+*448 (Text
 uid 13269,0
 va (VaSet
@@ -13424 +13542 @@
 blo "43500,62300"
 )
-*448 (Text
+*449 (Text
 uid 13270,0
 va (VaSet
@@ -13433 +13551 @@
 blo "43500,63300"
 )
-*449 (Text
+*450 (Text
 uid 13271,0
 va (VaSet
@@ -13478 +13596 @@
 )
 )
-*450 (PortIoIn
+*451 (PortIoIn
 uid 13689,0
 shape (CompositeShape
@@ -13523 +13641 @@
 )
 )
-*451 (Net
+*452 (Net
 uid 13701,0
 decl (Decl
@@ -13538 +13656 @@
 )
 xt "-172000,4000,-140500,4800"
-st "D_T_in                       : std_logic_vector(1 DOWNTO 0)"
-)
-)
-*452 (PortIoIn
+st "D_T_in                       : std_logic_vector(1 DOWNTO 0)
+"
+)
+)
+*453 (PortIoIn
 uid 14042,0
 shape (CompositeShape
@@ -13586 +13705 @@
 )
 )
-*453 (Net
+*454 (Net
 uid 14054,0
 decl (Decl
@@ -13601 +13720 @@
 )
 xt "-172000,12000,-118500,12800"
-st "drs_refclk_in                : std_logic -- used to check if DRS REFCLK exsists, if not DENABLE inhibit"
-)
-)
-*454 (PortIoIn
+st "drs_refclk_in                : std_logic -- used to check if DRS REFCLK exsists, if not DENABLE inhibit
+"
+)
+)
+*455 (PortIoIn
 uid 14165,0
 shape (CompositeShape
@@ -13649 +13769 @@
 )
 )
-*455 (Net
+*456 (Net
 uid 14177,0
 decl (Decl
@@ -13665 +13785 @@
 )
 xt "-172000,12800,-111000,13600"
-st "plllock_in                   : std_logic_vector(3 DOWNTO 0) -- high level, if dominowave is running and DRS PLL locked"
-)
-)
-*456 (SaComponent
+st "plllock_in                   : std_logic_vector(3 DOWNTO 0) -- high level, if dominowave is running and DRS PLL locked
+"
+)
+)
+*457 (SaComponent
 uid 14417,0
 optionalChildren [
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+*458 (CptPort
 uid 14397,0
 ps "OnEdgeStrategy"
@@ -13704 +13825 @@
 )
 )
-*458 (CptPort
+*459 (CptPort
 uid 14401,0
 ps "OnEdgeStrategy"
@@ -13737 +13858 @@
 )
 )
-*459 (CptPort
+*460 (CptPort
 uid 14405,0
 ps "OnEdgeStrategy"
@@ -13774 +13895 @@
 )
 )
-*460 (CptPort
+*461 (CptPort
 uid 14409,0
 ps "OnEdgeStrategy"
@@ -13810 +13931 @@
 )
 )
-*461 (CptPort
+*462 (CptPort
 uid 14413,0
 ps "OnEdgeStrategy"
@@ -13863 +13984 @@
 stg "VerticalLayoutStrategy"
 textVec [
-*462 (Text
+*463 (Text
 uid 14420,0
 va (VaSet
@@ -13873 +13994 @@
 tm "BdLibraryNameMgr"
 )
-*463 (Text
+*464 (Text
 uid 14421,0
 va (VaSet
@@ -13883 +14004 @@
 tm "CptNameMgr"
 )
-*464 (Text
+*465 (Text
 uid 14422,0
 va (VaSet
@@ -13931 +14052 @@
 archFileType "UNKNOWN"
 )
-*465 (Net
+*466 (Net
 uid 14477,0
 decl (Decl
@@ -13945 +14066 @@
 )
 xt "-172000,24800,-150000,25600"
-st "alarm_refclk_too_high        : std_logic"
-)
-)
-*466 (PortIoOut
+st "alarm_refclk_too_high        : std_logic
+"
+)
+)
+*467 (PortIoOut
 uid 14485,0
 shape (CompositeShape
@@ -13992 +14114 @@
 )
 )
-*467 (Net
+*468 (Net
 uid 14491,0
 decl (Decl
@@ -14007 +14129 @@
 )
 xt "-172000,25600,-150000,26400"
-st "alarm_refclk_too_low         : std_logic"
-)
-)
-*468 (PortIoOut
+st "alarm_refclk_too_low         : std_logic
+"
+)
+)
+*469 (PortIoOut
 uid 14499,0
 shape (CompositeShape
@@ -14054 +14177 @@
 )
 )
-*469 (Net
+*470 (Net
 uid 14620,0
 decl (Decl
@@ -14069 +14192 @@
 )
 xt "-172000,27200,-140000,28000"
-st "counter_result               : std_logic_vector(11 DOWNTO 0)"
-)
-)
-*470 (PortIoOut
+st "counter_result               : std_logic_vector(11 DOWNTO 0)
+"
+)
+)
+*471 (PortIoOut
 uid 14628,0
 shape (CompositeShape
@@ -14116 +14240 @@
 )
 )
-*471 (MWC
+*472 (MWC
 uid 14991,0
 optionalChildren [
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+*473 (CptPort
 uid 14963,0
 optionalChildren [
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+*474 (Line
 uid 14967,0
 layer 5
@@ -14135 +14259 @@
 ]
 )
-*474 (Property
+*475 (Property
 uid 14968,0
 pclass "_MW_GEOM_"
@@ -14183 +14307 @@
 )
 )
-*475 (CptPort
+*476 (CptPort
 uid 14969,0
 optionalChildren [
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+*477 (Line
 uid 14973,0
 layer 5
@@ -14239 +14363 @@
 )
 )
-*477 (CptPort
+*478 (CptPort
 uid 14974,0
 optionalChildren [
-*478 (Line
+*479 (Line
 uid 14978,0
 layer 5
@@ -14295 +14419 @@
 )
 )
-*479 (CommentGraphic
+*480 (CommentGraphic
 uid 14979,0
 optionalChildren [
-*480 (Property
+*481 (Property
 uid 14981,0
 pclass "_MW_GEOM_"
@@ -14322 +14446 @@
 oxt "7000,10000,7000,10000"
 )
-*481 (CommentGraphic
+*482 (CommentGraphic
 uid 14982,0
 optionalChildren [
-*482 (Property
+*483 (Property
 uid 14984,0
 pclass "_MW_GEOM_"
@@ -14349 +14473 @@
 oxt "7000,6000,7000,6000"
 )
-*483 (Grouping
+*484 (Grouping
 uid 14985,0
 optionalChildren [
-*484 (CommentGraphic
+*485 (CommentGraphic
 uid 14987,0
 shape (PolyLine2D
@@ -14373 +14497 @@
 oxt "7000,6000,9000,10000"
 )
-*485 (CommentGraphic
+*486 (CommentGraphic
 uid 14989,0
 shape (Arc2D
@@ -14426 +14550 @@
 stg "VerticalLayoutStrategy"
 textVec [
-*486 (Text
+*487 (Text
 uid 14994,0
 va (VaSet
@@ -14436 +14560 @@
 blo "162500,76300"
 )
-*487 (Text
+*488 (Text
 uid 14995,0
 va (VaSet
@@ -14445 +14569 @@
 blo "162500,77300"
 )
-*488 (Text
+*489 (Text
 uid 14996,0
 va (VaSet
@@ -14490 +14614 @@
 )
 )
-*489 (MWC
+*490 (MWC
 uid 15058,0
 optionalChildren [
-*490 (CptPort
+*491 (CptPort
 uid 15045,0
 optionalChildren [
-*491 (Line
+*492 (Line
 uid 15049,0
 layer 5
@@ -14556 +14680 @@
 )
 )
-*492 (CptPort
+*493 (CptPort
 uid 15050,0
 optionalChildren [
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+*494 (Line
 uid 15054,0
 layer 5
@@ -14572 +14696 @@
 ]
 )
-*494 (Circle
+*495 (Circle
 uid 15055,0
 va (VaSet
@@ -14634 +14758 @@
 )
 )
-*495 (CommentGraphic
+*496 (CommentGraphic
 uid 15056,0
 shape (CustomPolygon
@@ -14676 +14800 @@
 stg "VerticalLayoutStrategy"
 textVec [
-*496 (Text
+*497 (Text
 uid 15061,0
 va (VaSet
@@ -14686 +14810 @@
 blo "155350,77900"
 )
-*497 (Text
+*498 (Text
 uid 15062,0
 va (VaSet
@@ -14695 +14819 @@
 blo "155350,78900"
 )
-*498 (Text
+*499 (Text
 uid 15063,0
 va (VaSet
@@ -14740 +14864 @@
 )
 )
-*499 (Net
+*500 (Net
 uid 15077,0
 decl (Decl
@@ -14756 +14880 @@
 font "Courier New,8,0"
 )
-xt "-172000,66800,-112000,67600"
-st "SIGNAL denable_prim                 : std_logic                                    := '0' -- default domino wave off"
-)
-)
-*500 (Net
+xt "-172000,67600,-112000,68400"
+st "SIGNAL denable_prim                 : std_logic                                    := '0' -- default domino wave off
+"
+)
+)
+*501 (Net
 uid 15079,0
 decl (Decl
@@ -14776 +14901 @@
 font "Courier New,8,0"
 )
-xt "-172000,70000,-112000,70800"
-st "SIGNAL din1                         : std_logic                                    := '0' -- default domino wave off"
-)
-)
-*501 (Net
+xt "-172000,70800,-112000,71600"
+st "SIGNAL din1                         : std_logic                                    := '0' -- default domino wave off
+"
+)
+)
+*502 (Net
 uid 15492,0
 decl (Decl
@@ -14793 +14919 @@
 font "Courier New,8,0"
 )
-xt "-172000,119600,-146500,120400"
-st "SIGNAL trigger_out                  : std_logic"
-)
-)
-*502 (Net
+xt "-172000,120400,-146500,121200"
+st "SIGNAL trigger_out                  : std_logic
+"
+)
+)
+*503 (Net
 uid 15748,0
 lang 2
@@ -14814 +14941 @@
 font "Courier New,8,0"
 )
-xt "-172000,118000,-136500,118800"
-st "SIGNAL trigger_id                   : std_logic_vector(31 downto 0)"
-)
-)
-*503 (Net
+xt "-172000,118800,-136500,119600"
+st "SIGNAL trigger_id                   : std_logic_vector(31 downto 0)
+"
+)
+)
+*504 (Net
 uid 16369,0
 decl (Decl
@@ -14835 +14963 @@
 font "Courier New,8,0"
 )
-xt "-172000,48400,-119500,49200"
-st "SIGNAL DCM_PS_status                : std_logic_vector(7 DOWNTO 0)                 := (OTHERS => '0')"
-)
-)
-*504 (SaComponent
+xt "-172000,49200,-119500,50000"
+st "SIGNAL DCM_PS_status                : std_logic_vector(7 DOWNTO 0)                 := (OTHERS => '0')
+"
+)
+)
+*505 (SaComponent
 uid 16404,0
 optionalChildren [
-*505 (CptPort
+*506 (CptPort
 uid 16388,0
 ps "OnEdgeStrategy"
@@ -14878 +15007 @@
 )
 )
-*506 (CptPort
+*507 (CptPort
 uid 16396,0
 ps "OnEdgeStrategy"
@@ -14918 +15047 @@
 )
 )
-*507 (CptPort
+*508 (CptPort
 uid 16400,0
 ps "OnEdgeStrategy"
@@ -14974 +15103 @@
 stg "VerticalLayoutStrategy"
 textVec [
-*508 (Text
+*509 (Text
 uid 16407,0
 va (VaSet
@@ -14984 +15113 @@
 tm "BdLibraryNameMgr"
 )
-*509 (Text
+*510 (Text
 uid 16408,0
 va (VaSet
@@ -14994 +15123 @@
 tm "CptNameMgr"
 )
-*510 (Text
+*511 (Text
 uid 16409,0
 va (VaSet
@@ -15041 +15170 @@
 archFileType "UNKNOWN"
 )
-*511 (Net
+*512 (Net
 uid 16545,0
 decl (Decl
@@ -15058 +15187 @@
 font "Courier New,8,0"
 )
-xt "-172000,70800,-119500,71600"
-st "SIGNAL dna                          : STD_LOGIC_VECTOR(63 DOWNTO 0)                := (others => '0')"
-)
-)
-*512 (Net
+xt "-172000,71600,-119500,72400"
+st "SIGNAL dna                          : STD_LOGIC_VECTOR(63 DOWNTO 0)                := (others => '0')
+"
+)
+)
+*513 (Net
 uid 16562,0
 decl (Decl
@@ -15078 +15208 @@
 font "Courier New,8,0"
 )
-xt "-172000,98000,-125500,98800"
-st "SIGNAL ready                        : STD_LOGIC                                    := '0'"
-)
-)
-*513 (SaComponent
+xt "-172000,98800,-125500,99600"
+st "SIGNAL ready                        : STD_LOGIC                                    := '0'
+"
+)
+)
+*514 (SaComponent
 uid 16865,0
 optionalChildren [
-*514 (CptPort
+*515 (CptPort
 uid 16841,0
 ps "OnEdgeStrategy"
@@ -15118 +15249 @@
 )
 )
-*515 (CptPort
+*516 (CptPort
 uid 16845,0
 ps "OnEdgeStrategy"
@@ -15154 +15285 @@
 )
 )
-*516 (CptPort
+*517 (CptPort
 uid 16849,0
 ps "OnEdgeStrategy"
@@ -15187 +15318 @@
 )
 )
-*517 (CptPort
+*518 (CptPort
 uid 16853,0
 ps "OnEdgeStrategy"
@@ -15223 +15354 @@
 )
 )
-*518 (CptPort
+*519 (CptPort
 uid 16857,0
 ps "OnEdgeStrategy"
@@ -15256 +15387 @@
 )
 )
-*519 (CptPort
+*520 (CptPort
 uid 16861,0
 ps "OnEdgeStrategy"
@@ -15306 +15437 @@
 stg "VerticalLayoutStrategy"
 textVec [
-*520 (Text
+*521 (Text
 uid 16868,0
 va (VaSet
@@ -15316 +15447 @@
 tm "BdLibraryNameMgr"
 )
-*521 (Text
+*522 (Text
 uid 16869,0
 va (VaSet
@@ -15326 +15457 @@
 tm "CptNameMgr"
 )
-*522 (Text
+*523 (Text
 uid 16870,0
 va (VaSet
@@ -15385 +15516 @@
 archFileType "UNKNOWN"
 )
-*523 (MWC
+*524 (MWC
 uid 16902,0
 optionalChildren [
-*524 (CptPort
+*525 (CptPort
 uid 16891,0
 optionalChildren [
-*525 (Line
+*526 (Line
 uid 16895,0
 layer 5
@@ -15453 +15584 @@
 )
 )
-*526 (Grouping
+*527 (Grouping
 uid 16896,0
 optionalChildren [
-*527 (CommentGraphic
+*528 (CommentGraphic
 uid 16898,0
 shape (PolyLine2D
@@ -15478 +15609 @@
 oxt "7000,6000,7000,8000"
 )
-*528 (CommentGraphic
+*529 (CommentGraphic
 uid 16900,0
 shape (PolyLine2D
@@ -15534 +15665 @@
 stg "VerticalLayoutStrategy"
 textVec [
-*529 (Text
+*530 (Text
 uid 16905,0
 va (VaSet
@@ -15544 +15675 @@
 blo "-84650,142900"
 )
-*530 (Text
+*531 (Text
 uid 16906,0
 va (VaSet
@@ -15553 +15684 @@
 blo "-84650,143900"
 )
-*531 (Text
+*532 (Text
 uid 16907,0
 va (VaSet
@@ -15598 +15729 @@
 )
 )
-*532 (Net
+*533 (Net
 uid 16912,0
 decl (Decl
@@ -15611 +15742 @@
 font "Courier New,8,0"
 )
-xt "-172000,86800,-146500,87600"
-st "SIGNAL enable_i                     : std_logic"
-)
-)
-*533 (MWC
+xt "-172000,87600,-146500,88400"
+st "SIGNAL enable_i                     : std_logic
+"
+)
+)
+*534 (MWC
 uid 16927,0
 optionalChildren [
-*534 (CptPort
+*535 (CptPort
 uid 16918,0
 optionalChildren [
-*535 (Line
+*536 (Line
 uid 16922,0
 layer 5
@@ -15683 +15815 @@
 )
 )
-*536 (CommentGraphic
+*537 (CommentGraphic
 uid 16923,0
 shape (PolyLine2D
@@ -15702 +15834 @@
 oxt "7000,7000,7000,8000"
 )
-*537 (CommentGraphic
+*538 (CommentGraphic
 uid 16925,0
 shape (CustomPolygon
@@ -15744 +15876 @@
 stg "VerticalLayoutStrategy"
 textVec [
-*538 (Text
+*539 (Text
 uid 16930,0
 va (VaSet
@@ -15754 +15886 @@
 blo "-81550,150495"
 )
-*539 (Text
+*540 (Text
 uid 16931,0
 va (VaSet
@@ -15763 +15895 @@
 blo "-81550,151495"
 )
-*540 (Text
+*541 (Text
 uid 16932,0
 va (VaSet
@@ -15808 +15940 @@
 )
 )
-*541 (Net
+*542 (Net
 uid 16937,0
 decl (Decl
@@ -15821 +15953 @@
 font "Courier New,8,0"
 )
-xt "-172000,99600,-146500,100400"
-st "SIGNAL reset_synch_i                : std_logic"
-)
-)
-*542 (Net
+xt "-172000,100400,-146500,101200"
+st "SIGNAL reset_synch_i                : std_logic
+"
+)
+)
+*543 (Net
 uid 16951,0
 decl (Decl
@@ -15839 +15972 @@
 font "Courier New,8,0"
 )
-xt "-172000,116400,-136500,117200"
-st "SIGNAL time                         : std_logic_vector(31 DOWNTO 0)"
-)
-)
-*543 (Net
+xt "-172000,117200,-136500,118000"
+st "SIGNAL time                         : std_logic_vector(31 DOWNTO 0)
+"
+)
+)
+*544 (Net
 uid 17001,0
 decl (Decl
@@ -15859 +15993 @@
 font "Courier New,8,0"
 )
-xt "-172000,102800,-132000,103600"
-st "SIGNAL rs465_data                   : std_logic_vector(55 DOWNTO 0) --7 byte"
-)
-)
-*544 (Net
+xt "-172000,103600,-132000,104400"
+st "SIGNAL rs465_data                   : std_logic_vector(55 DOWNTO 0) --7 byte
+"
+)
+)
+*545 (Net
 uid 17025,0
 decl (Decl
@@ -15882 +16017 @@
 font "Courier New,8,0"
 )
-xt "-172000,50800,-123500,55600"
+xt "-172000,51600,-123500,56400"
 st "--
 
@@ -15888 +16023 @@
 -- during EVT header wrinting, this field is left out ... and only written into event header,
 -- when the DRS chip were read out already.
-SIGNAL FTM_RS485_ready              : std_logic"
-)
-)
-*545 (Net
+SIGNAL FTM_RS485_ready              : std_logic
+"
+)
+)
+*546 (Net
 uid 17391,0
 decl (Decl
@@ -15906 +16042 @@
 font "Courier New,8,0"
 )
-xt "-172000,61200,-136500,62000"
-st "SIGNAL c_trigger_mult               : std_logic_vector(15 DOWNTO 0)"
-)
-)
-*546 (Net
+xt "-172000,62000,-136500,62800"
+st "SIGNAL c_trigger_mult               : std_logic_vector(15 DOWNTO 0)
+"
+)
+)
+*547 (Net
 uid 18457,0
 lang 2
@@ -15924 +16061 @@
 font "Courier New,8,0"
 )
-xt "-172000,65200,-146500,66000"
-st "SIGNAL data_ram_empty               : std_logic"
-)
-)
-*547 (PortIoOut
+xt "-172000,66000,-146500,66800"
+st "SIGNAL data_ram_empty               : std_logic
+"
+)
+)
+*548 (PortIoOut
 uid 18968,0
 shape (CompositeShape
@@ -15973 +16111 @@
 )
 )
-*548 (Net
+*549 (Net
 uid 18980,0
 lang 2
@@ -15988 +16126 @@
 )
 xt "-172000,15200,-150000,16000"
-st "ADC_CLK                      : std_logic"
-)
-)
-*549 (MWC
+st "ADC_CLK                      : std_logic
+"
+)
+)
+*550 (MWC
 uid 19265,0
 optionalChildren [
-*550 (CptPort
+*551 (CptPort
 uid 19237,0
 optionalChildren [
-*551 (Line
+*552 (Line
 uid 19241,0
 layer 5
@@ -16010 +16149 @@
 ]
 )
-*552 (Property
+*553 (Property
 uid 19242,0
 pclass "_MW_GEOM_"
@@ -16055 +16194 @@
 )
 )
-*553 (CptPort
+*554 (CptPort
 uid 19243,0
 optionalChildren [
-*554 (Line
+*555 (Line
 uid 19247,0
 layer 5
@@ -16110 +16249 @@
 )
 )
-*555 (CptPort
+*556 (CptPort
 uid 19248,0
 optionalChildren [
-*556 (Line
+*557 (Line
 uid 19252,0
 layer 5
@@ -16164 +16303 @@
 )
 )
-*557 (CommentGraphic
+*558 (CommentGraphic
 uid 19253,0
 optionalChildren [
-*558 (Property
+*559 (Property
 uid 19255,0
 pclass "_MW_GEOM_"
@@ -16192 +16331 @@
 oxt "-125000,62000,-125000,62000"
 )
-*559 (CommentGraphic
+*560 (CommentGraphic
 uid 19256,0
 optionalChildren [
-*560 (Property
+*561 (Property
 uid 19258,0
 pclass "_MW_GEOM_"
@@ -16220 +16359 @@
 oxt "-125000,66000,-125000,66000"
 )
-*561 (Grouping
+*562 (Grouping
 uid 19259,0
 optionalChildren [
-*562 (CommentGraphic
+*563 (CommentGraphic
 uid 19261,0
 shape (PolyLine2D
@@ -16245 +16384 @@
 oxt "-127000,62000,-125000,66000"
 )
-*563 (CommentGraphic
+*564 (CommentGraphic
 uid 19263,0
 shape (Arc2D
@@ -16301 +16440 @@
 stg "VerticalLayoutStrategy"
 textVec [
-*564 (Text
+*565 (Text
 uid 19268,0
 va (VaSet
@@ -16311 +16450 @@
 blo "-49500,37300"
 )
-*565 (Text
+*566 (Text
 uid 19269,0
 va (VaSet
@@ -16320 +16459 @@
 blo "-49500,38300"
 )
-*566 (Text
+*567 (Text
 uid 19270,0
 va (VaSet
@@ -16365 +16504 @@
 )
 )
-*567 (Net
+*568 (Net
 uid 20151,0
 lang 10
@@ -16380 +16519 @@
 font "Courier New,8,0"
 )
-xt "-172000,62800,-120000,63600"
-st "SIGNAL current_dac_array            : dac_array_type                               := ( others => 0)"
-)
-)
-*568 (Net
+xt "-172000,63600,-120000,64400"
+st "SIGNAL current_dac_array            : dac_array_type                               := ( others => 0)
+"
+)
+)
+*569 (Net
 uid 20511,0
 decl (Decl
@@ -16399 +16539 @@
 font "Courier New,8,0"
 )
-xt "-172000,118800,-146500,119600"
-st "SIGNAL trigger_or_s_trigger         : std_logic"
-)
-)
-*569 (Net
+xt "-172000,119600,-146500,120400"
+st "SIGNAL trigger_or_s_trigger         : std_logic
+"
+)
+)
+*570 (Net
 uid 20513,0
 decl (Decl
@@ -16418 +16559 @@
 font "Courier New,8,0"
 )
-xt "-172000,87600,-146500,88400"
-st "SIGNAL enabled_trigger_or_s_trigger : std_logic"
-)
-)
-*570 (Net
+xt "-172000,88400,-146500,89200"
+st "SIGNAL enabled_trigger_or_s_trigger : std_logic
+"
+)
+)
+*571 (Net
 uid 20519,0
 decl (Decl
@@ -16435 +16577 @@
 font "Courier New,8,0"
 )
-xt "-172000,62000,-146500,62800"
-st "SIGNAL cont_trigger                 : std_logic"
-)
-)
-*571 (Net
+xt "-172000,62800,-146500,63600"
+st "SIGNAL cont_trigger                 : std_logic
+"
+)
+)
+*572 (Net
 uid 20521,0
 decl (Decl
@@ -16452 +16595 @@
 font "Courier New,8,0"
 )
-xt "-172000,106000,-146500,106800"
-st "SIGNAL s_trigger_or_cont_trigger    : std_logic"
-)
-)
-*572 (Net
+xt "-172000,106800,-146500,107600"
+st "SIGNAL s_trigger_or_cont_trigger    : std_logic
+"
+)
+)
+*573 (Net
 uid 20921,0
 decl (Decl
@@ -16472 +16616 @@
 font "Courier New,8,0"
 )
-xt "-172000,63600,-98500,64400"
-st "SIGNAL dac_setting                  : dac_array_type                               := DEFAULT_DAC --<<-- default defined in fad_definitions.vhd"
-)
-)
-*573 (Net
+xt "-172000,64400,-98500,65200"
+st "SIGNAL dac_setting                  : dac_array_type                               := DEFAULT_DAC --<<-- default defined in fad_definitions.vhd
+"
+)
+)
+*574 (Net
 uid 20937,0
 decl (Decl
@@ -16489 +16634 @@
 font "Courier New,8,0"
 )
-xt "-172000,102000,-144000,102800"
-st "SIGNAL roi_setting                  : roi_array_type"
-)
-)
-*574 (Net
+xt "-172000,102800,-144000,103600"
+st "SIGNAL roi_setting                  : roi_array_type
+"
+)
+)
+*575 (Net
 uid 21033,0
 decl (Decl
@@ -16507 +16653 @@
 font "Courier New,8,0"
 )
-xt "-172000,89200,-125500,90000"
-st "SIGNAL memory_manager_config_start  : std_logic                                    := '0'"
-)
-)
-*575 (Net
+xt "-172000,90000,-125500,90800"
+st "SIGNAL memory_manager_config_start  : std_logic                                    := '0'
+"
+)
+)
+*576 (Net
 uid 21037,0
 decl (Decl
@@ -16524 +16671 @@
 font "Courier New,8,0"
 )
-xt "-172000,90000,-146500,90800"
-st "SIGNAL memory_manager_config_valid  : std_logic"
-)
-)
-*576 (Net
+xt "-172000,90800,-146500,91600"
+st "SIGNAL memory_manager_config_valid  : std_logic
+"
+)
+)
+*577 (Net
 uid 21039,0
 decl (Decl
@@ -16542 +16690 @@
 font "Courier New,8,0"
 )
-xt "-172000,111600,-125500,112400"
-st "SIGNAL spi_interface_config_start   : std_logic                                    := '0'"
-)
-)
-*577 (Net
+xt "-172000,112400,-125500,113200"
+st "SIGNAL spi_interface_config_start   : std_logic                                    := '0'
+"
+)
+)
+*578 (Net
 uid 21043,0
 decl (Decl
@@ -16559 +16708 @@
 font "Courier New,8,0"
 )
-xt "-172000,112400,-146500,113200"
-st "SIGNAL spi_interface_config_valid   : std_logic"
-)
-)
-*578 (MWC
+xt "-172000,113200,-146500,114000"
+st "SIGNAL spi_interface_config_valid   : std_logic
+"
+)
+)
+*579 (MWC
 uid 21806,0
 optionalChildren [
-*579 (CptPort
+*580 (CptPort
 uid 21784,0
 optionalChildren [
-*580 (Property
+*581 (Property
 uid 21788,0
 pclass "_MW_GEOM_"
@@ -16575 +16725 @@
 ptn "String"
 )
-*581 (Property
+*582 (Property
 uid 21789,0
 pclass "_MW_GEOM_"
@@ -16620 +16770 @@
 )
 )
-*582 (CommentText
+*583 (CommentText
 uid 21790,0
 shape (Rectangle
@@ -16654 +16804 @@
 position 1
 )
-*583 (CommentText
+*584 (CommentText
 uid 21793,0
 shape (Rectangle
@@ -16688 +16838 @@
 position 1
 )
-*584 (CommentGraphic
+*585 (CommentGraphic
 uid 21796,0
 shape (PolyLine2D
@@ -16709 +16859 @@
 oxt "6000,8000,8000,8000"
 )
-*585 (CommentGraphic
+*586 (CommentGraphic
 uid 21798,0
 optionalChildren [
-*586 (Property
+*587 (Property
 uid 21800,0
 pclass "_MW_GEOM_"
@@ -16738 +16888 @@
 oxt "10000,9000,10000,9000"
 )
-*587 (CommentGraphic
+*588 (CommentGraphic
 uid 21801,0
 optionalChildren [
-*588 (Property
+*589 (Property
 uid 21803,0
 pclass "_MW_GEOM_"
@@ -16767 +16917 @@
 oxt "10000,7000,10000,7000"
 )
-*589 (CommentGraphic
+*590 (CommentGraphic
 uid 21804,0
 shape (CustomPolygon
@@ -16789 +16939 @@
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 va (VaSet
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 shape (PolyLine2D
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 oxt "7000,6000,9000,10000"
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 va (VaSet
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 blo "-79500,122300"
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 va (VaSet
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 blo "-79500,123300"
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 decl (Decl
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 font "Courier New,8,0"
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-xt "-172000,72400,-146500,73200"
-st "SIGNAL dout0                        : STD_LOGIC"
-)
-)
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+xt "-172000,73200,-146500,74000"
+st "SIGNAL dout0                        : STD_LOGIC
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+)
+)
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 uid 21921,0
 decl (Decl
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 font "Courier New,8,0"
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-xt "-172000,73200,-146500,74000"
-st "SIGNAL dout1                        : STD_LOGIC"
-)
-)
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+xt "-172000,74000,-146500,74800"
+st "SIGNAL dout1                        : STD_LOGIC
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+)
+)
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 uid 21927,0
 decl (Decl
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 font "Courier New,8,0"
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-xt "-172000,74000,-146500,74800"
-st "SIGNAL dout2                        : STD_LOGIC"
-)
-)
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+xt "-172000,74800,-146500,75600"
+st "SIGNAL dout2                        : STD_LOGIC
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+)
+)
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 uid 21933,0
 decl (Decl
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 font "Courier New,8,0"
 )
-xt "-172000,74800,-146500,75600"
-st "SIGNAL dout3                        : STD_LOGIC"
-)
-)
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+xt "-172000,75600,-146500,76400"
+st "SIGNAL dout3                        : STD_LOGIC
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+)
+)
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 pclass "_MW_GEOM_"
@@ -17576 +17730 @@
 ptn "String"
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 layer 5
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 shape (Arc2D
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 oxt "7000,6003,11000,8000"
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 shape (Arc2D
@@ -17670 +17824 @@
 oxt "6996,8005,11000,10000"
 )
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 optionalChildren [
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 optionalChildren [
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 pclass "_MW_GEOM_"
@@ -17707 +17861 @@
 oxt "7000,6000,11000,9998"
 )
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 optionalChildren [
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 pclass "_MW_GEOM_"
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 oxt "7000,6000,11000,10000"
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 shape (PolyLine2D
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 oxt "11000,8000,11000,8000"
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 pclass "_MW_GEOM_"
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 oxt "7000,6000,7000,6000"
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 pclass "_MW_GEOM_"
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 oxt "7000,10000,7000,10000"
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 sl 0
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 )
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 sl 0
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 stg "VerticalLayoutStrategy"
 textVec [
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 va (VaSet
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 blo "-64500,125300"
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 va (VaSet
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 blo "-64500,126300"
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 va (VaSet
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 uid 21984,0
 decl (Decl
@@ -18025 +18179 @@
 font "Courier New,8,0"
 )
-xt "-172000,71600,-146500,72400"
-st "SIGNAL dout                         : STD_LOGIC"
-)
-)
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+xt "-172000,72400,-146500,73200"
+st "SIGNAL dout                         : STD_LOGIC
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+)
+)
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 uid 21998,0
 decl (Decl
@@ -18042 +18197 @@
 font "Courier New,8,0"
 )
-xt "-172000,55600,-146500,56400"
-st "SIGNAL I_really_want_dwrite         : STD_LOGIC"
-)
-)
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+xt "-172000,56400,-146500,57200"
+st "SIGNAL I_really_want_dwrite         : STD_LOGIC
+"
+)
+)
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 uid 22043,0
 decl (Decl
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 font "Courier New,8,0"
 )
-xt "-172000,84400,-125500,85200"
-st "SIGNAL dwrite_enable_w5300          : std_logic                                    := '1'"
-)
-)
-*649 (Net
+xt "-172000,85200,-125500,86000"
+st "SIGNAL dwrite_enable_w5300          : std_logic                                    := '1'
+"
+)
+)
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 uid 22076,0
 decl (Decl
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 font "Courier New,8,0"
 )
-xt "-172000,85200,-125500,86000"
-st "SIGNAL dwrite_global_enable         : std_logic                                    := '1'"
-)
-)
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+xt "-172000,86000,-125500,86800"
+st "SIGNAL dwrite_global_enable         : std_logic                                    := '1'
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+)
+)
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 layer 5
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 pclass "_MW_GEOM_"
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 optionalChildren [
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 pclass "_MW_GEOM_"
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 oxt "7000,10000,7000,10000"
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 optionalChildren [
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 pclass "_MW_GEOM_"
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 oxt "7000,6000,7000,6000"
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 shape (PolyLine2D
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 oxt "7000,6000,9000,10000"
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 shape (Arc2D
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 stg "VerticalLayoutStrategy"
 textVec [
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 va (VaSet
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 blo "-55500,124300"
 )
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 va (VaSet
@@ -18404 +18562 @@
 blo "-55500,125300"
 )
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 uid 22121,0
 va (VaSet
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 )
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 uid 22125,0
 decl (Decl
@@ -18462 +18620 @@
 font "Courier New,8,0"
 )
-xt "-172000,75600,-146500,76400"
-st "SIGNAL dout4                        : STD_LOGIC"
-)
-)
-*669 (Net
+xt "-172000,76400,-146500,77200"
+st "SIGNAL dout4                        : STD_LOGIC
+"
+)
+)
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 uid 22131,0
 decl (Decl
@@ -18480 +18639 @@
 font "Courier New,8,0"
 )
-xt "-172000,86000,-125500,86800"
-st "SIGNAL dwrite_trigger_manager       : std_logic                                    := '1'"
-)
-)
-*670 (MWC
+xt "-172000,86800,-125500,87600"
+st "SIGNAL dwrite_trigger_manager       : std_logic                                    := '1'
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+)
+)
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 uid 23004,0
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@@ -18552 +18712 @@
 )
 )
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 uid 22998,0
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 uid 23000,0
 shape (PolyLine2D
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 oxt "7000,6000,7000,8000"
 )
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 uid 23002,0
 shape (PolyLine2D
@@ -18633 +18793 @@
 stg "VerticalLayoutStrategy"
 textVec [
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 uid 23007,0
 va (VaSet
@@ -18643 +18803 @@
 blo "-93650,125900"
 )
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 uid 23008,0
 va (VaSet
@@ -18652 +18812 @@
 blo "-93650,126900"
 )
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 uid 23009,0
 va (VaSet
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 )
 )
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 uid 23034,0
 optionalChildren [
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 optionalChildren [
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 layer 5
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 )
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 optionalChildren [
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 layer 5
@@ -18837 +18997 @@
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 )
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 uid 23024,0
 shape (PolyLine2D
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 oxt "6000,6000,7000,7000"
 )
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 uid 23026,0
 shape (PolyLine2D
@@ -18879 +19039 @@
 oxt "6000,7000,7000,8000"
 )
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 uid 23028,0
 shape (PolyLine2D
@@ -18900 +19060 @@
 oxt "6988,7329,7988,7329"
 )
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 uid 23030,0
 shape (PolyLine2D
@@ -18919 +19079 @@
 oxt "8000,7000,9000,7000"
 )
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 uid 23032,0
 shape (PolyLine2D
@@ -18960 +19120 @@
 stg "VerticalLayoutStrategy"
 textVec [
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 uid 23037,0
 va (VaSet
@@ -18970 +19130 @@
 blo "173350,80900"
 )
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 uid 23038,0
 va (VaSet
@@ -18979 +19139 @@
 blo "173350,81900"
 )
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 uid 23039,0
 va (VaSet
@@ -19024 +19184 @@
 )
 )
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 uid 23051,0
 decl (Decl
@@ -19040 +19200 @@
 font "Courier New,8,0"
 )
-xt "-172000,67600,-112000,68400"
-st "SIGNAL denable_sig                  : std_logic                                    := '0' -- default domino wave off"
-)
-)
-*693 (Net
+xt "-172000,68400,-112000,69200"
+st "SIGNAL denable_sig                  : std_logic                                    := '0' -- default domino wave off
+"
+)
+)
+*694 (Net
 uid 23341,0
 decl (Decl
@@ -19057 +19218 @@
 font "Courier New,8,0"
 )
-xt "-172000,49200,-146500,50000"
-st "SIGNAL DCM_locked_status            : std_logic"
-)
-)
-*694 (Net
+xt "-172000,50000,-146500,50800"
+st "SIGNAL DCM_locked_status            : std_logic
+"
+)
+)
+*695 (Net
 uid 23349,0
 decl (Decl
@@ -19074 +19236 @@
 font "Courier New,8,0"
 )
-xt "-172000,50000,-146500,50800"
-st "SIGNAL DCM_ready_status             : std_logic"
-)
-)
-*695 (Net
+xt "-172000,50800,-146500,51600"
+st "SIGNAL DCM_ready_status             : std_logic
+"
+)
+)
+*696 (Net
 uid 24076,0
 decl (Decl
@@ -19092 +19255 @@
 font "Courier New,8,0"
 )
-xt "-172000,38400,-129000,39200"
-st "trigger_veto                 : std_logic                                    := '1'"
-)
-)
-*696 (PortIoOut
+xt "-172000,39200,-129000,40000"
+st "trigger_veto                 : std_logic                                    := '1'
+"
+)
+)
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 uid 24084,0
 shape (CompositeShape
@@ -19140 +19304 @@
 )
 )
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+*698 (SaComponent
 uid 24570,0
 optionalChildren [
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 uid 24538,0
 ps "OnEdgeStrategy"
@@ -19176 +19340 @@
 )
 )
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 uid 24542,0
 ps "OnEdgeStrategy"
@@ -19210 +19374 @@
 )
 )
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 uid 24546,0
 ps "OnEdgeStrategy"
@@ -19245 +19409 @@
 )
 )
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 uid 24550,0
 ps "OnEdgeStrategy"
@@ -19280 +19444 @@
 )
 )
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 uid 24554,0
 ps "OnEdgeStrategy"
@@ -19315 +19479 @@
 )
 )
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 uid 24558,0
 ps "OnEdgeStrategy"
@@ -19349 +19513 @@
 )
 )
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 uid 24562,0
 ps "OnEdgeStrategy"
@@ -19386 +19550 @@
 )
 )
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 uid 24566,0
 ps "OnEdgeStrategy"
@@ -19422 +19586 @@
 )
 )
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 uid 24732,0
 ps "OnEdgeStrategy"
@@ -19475 +19639 @@
 stg "VerticalLayoutStrategy"
 textVec [
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 uid 24573,0
 va (VaSet
@@ -19485 +19649 @@
 tm "BdLibraryNameMgr"
 )
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 uid 24574,0
 va (VaSet
@@ -19495 +19659 @@
 tm "CptNameMgr"
 )
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+*710 (Text
 uid 24575,0
 va (VaSet
@@ -19556 +19720 @@
 archFileType "UNKNOWN"
 )
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 uid 24652,0
 shape (CompositeShape
@@ -19600 +19764 @@
 )
 )
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 uid 24666,0
 shape (CompositeShape
@@ -19644 +19808 @@
 )
 )
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 uid 24680,0
 shape (CompositeShape
@@ -19688 +19852 @@
 )
 )
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+*714 (PortIoOut
 uid 24694,0
 shape (CompositeShape
@@ -19732 +19896 @@
 )
 )
-*714 (Net
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 uid 24700,0
 decl (Decl
@@ -19746 +19910 @@
 )
 xt "-172000,4800,-150000,5600"
-st "FTM_RS485_rx_d               : std_logic"
-)
-)
-*715 (Net
+st "FTM_RS485_rx_d               : std_logic
+"
+)
+)
+*716 (Net
 uid 24702,0
 decl (Decl
@@ -19763 +19928 @@
 )
 xt "-172000,20000,-150000,20800"
-st "FTM_RS485_tx_d               : std_logic"
-)
-)
-*716 (Net
+st "FTM_RS485_tx_d               : std_logic
+"
+)
+)
+*717 (Net
 uid 24704,0
 decl (Decl
@@ -19780 +19946 @@
 )
 xt "-172000,19200,-150000,20000"
-st "FTM_RS485_rx_en              : std_logic"
-)
-)
-*717 (Net
+st "FTM_RS485_rx_en              : std_logic
+"
+)
+)
+*718 (Net
 uid 24706,0
 decl (Decl
@@ -19797 +19964 @@
 )
 xt "-172000,20800,-150000,21600"
-st "FTM_RS485_tx_en              : std_logic"
-)
-)
-*718 (Net
+st "FTM_RS485_tx_en              : std_logic
+"
+)
+)
+*719 (Net
 uid 24736,0
 decl (Decl
@@ -19814 +19982 @@
 font "Courier New,8,0"
 )
-xt "-172000,98800,-125500,99600"
-st "SIGNAL rec_timeout_occured          : std_logic                                    := '0'"
-)
-)
-*719 (Net
+xt "-172000,99600,-125500,100400"
+st "SIGNAL rec_timeout_occured          : std_logic                                    := '0'
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+)
+)
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 uid 25027,0
 decl (Decl
@@ -19832 +20001 @@
 font "Courier New,8,0"
 )
-xt "-172000,100400,-125500,101200"
-st "SIGNAL reset_trigger_id             : std_logic                                    := '0'"
-)
-)
-*720 (PortIoOut
+xt "-172000,101200,-125500,102000"
+st "SIGNAL reset_trigger_id             : std_logic                                    := '0'
+"
+)
+)
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 uid 25304,0
 shape (CompositeShape
@@ -19880 +20050 @@
 )
 )
-*721 (Net
+*722 (Net
 uid 25310,0
 decl (Decl
@@ -19896 +20066 @@
 font "Courier New,8,0"
 )
-xt "-172000,39200,-115000,40000"
-st "w5300_state                  : std_logic_vector(7 DOWNTO 0) -- state is encoded here ... useful for debugging."
-)
-)
-*722 (Net
+xt "-172000,40000,-115000,40800"
+st "w5300_state                  : std_logic_vector(7 DOWNTO 0) -- state is encoded here ... useful for debugging.
+"
+)
+)
+*723 (Net
 uid 25541,0
 decl (Decl
@@ -19914 +20085 @@
 )
 xt "-172000,28800,-150000,29600"
-st "debug_data_ram_empty         : std_logic"
-)
-)
-*723 (PortIoOut
+st "debug_data_ram_empty         : std_logic
+"
+)
+)
+*724 (PortIoOut
 uid 25549,0
 shape (CompositeShape
@@ -19961 +20133 @@
 )
 )
-*724 (Net
+*725 (Net
 uid 25555,0
 decl (Decl
@@ -19975 +20147 @@
 )
 xt "-172000,29600,-150000,30400"
-st "debug_data_valid             : std_logic"
-)
-)
-*725 (PortIoOut
+st "debug_data_valid             : std_logic
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+)
+)
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 uid 25563,0
 shape (CompositeShape
@@ -20022 +20195 @@
 )
 )
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 uid 25830,0
 optionalChildren [
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 va (VaSet
 )
@@ -30043 +30329 @@
 font "Arial,8,1"
 )
-xt "-174000,45600,-170200,46600"
+xt "-174000,46400,-170200,47400"
 st "Pre User:"
-blo "-174000,46400"
+blo "-174000,47200"
 )
 preUserText (MLText
@@ -30060 +30346 @@
 font "Arial,8,1"
 )
-xt "-174000,46600,-166900,47600"
+xt "-174000,47400,-166900,48400"
 st "Diagram Signals:"
-blo "-174000,47400"
+blo "-174000,48200"
 )
 postUserLabel (Text
@@ -30069 +30355 @@
 font "Arial,8,1"
 )
-xt "-174000,126000,-169300,127000"
+xt "-174000,126800,-169300,127800"
 st "Post User:"
-blo "-174000,126800"
+blo "-174000,127600"
 )
 postUserText (MLText
@@ -30084 +30370 @@
 commonDM (CommonDM
 ldm (LogicalDM
-suid 419,0
+suid 421,0
 usingSuid 1
-emptyRow *1008 (LEmptyRow
+emptyRow *1012 (LEmptyRow
 )
 uid 54,0
 optionalChildren [
-*1009 (RefLabelRowHdr
-)
-*1010 (TitleRowHdr
-)
-*1011 (FilterRowHdr
-)
-*1012 (RefLabelColHdr
+*1013 (RefLabelRowHdr
+)
+*1014 (TitleRowHdr
+)
+*1015 (FilterRowHdr
+)
+*1016 (RefLabelColHdr
 tm "RefLabelColHdrMgr"
 )
-*1013 (RowExpandColHdr
+*1017 (RowExpandColHdr
 tm "RowExpandColHdrMgr"
 )
-*1014 (GroupColHdr
+*1018 (GroupColHdr
 tm "GroupColHdrMgr"
 )
-*1015 (NameColHdr
+*1019 (NameColHdr
 tm "BlockDiagramNameColHdrMgr"
 )
-*1016 (ModeColHdr
+*1020 (ModeColHdr
 tm "BlockDiagramModeColHdrMgr"
 )
-*1017 (TypeColHdr
+*1021 (TypeColHdr
 tm "BlockDiagramTypeColHdrMgr"
 )
-*1018 (BoundsColHdr
+*1022 (BoundsColHdr
 tm "BlockDiagramBoundsColHdrMgr"
 )
-*1019 (InitColHdr
+*1023 (InitColHdr
 tm "BlockDiagramInitColHdrMgr"
 )
-*1020 (EolColHdr
+*1024 (EolColHdr
 tm "BlockDiagramEolColHdrMgr"
 )
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+*1025 (LeafLogPort
 port (LogicalPort
 m 4
@@ -30137 +30423 @@
 uid 516,0
 )
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 port (LogicalPort
 m 4
@@ -30150 +30436 @@
 uid 518,0
 )
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 port (LogicalPort
 m 4
@@ -30163 +30449 @@
 uid 520,0
 )
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 port (LogicalPort
 m 4
@@ -30176 +30462 @@
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 )
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 port (LogicalPort
 m 4
@@ -30189 +30475 @@
 uid 532,0
 )
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 port (LogicalPort
 m 1
@@ -30202 +30488 @@
 uid 534,0
 )
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 port (LogicalPort
 m 1
@@ -30215 +30501 @@
 uid 536,0
 )
-*1028 (LeafLogPort
+*1032 (LeafLogPort
 port (LogicalPort
 m 2
@@ -30228 +30514 @@
 uid 538,0
 )
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 port (LogicalPort
 m 1
@@ -30241 +30527 @@
 uid 540,0
 )
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 port (LogicalPort
 m 1
@@ -30254 +30540 @@
 uid 542,0
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 port (LogicalPort
 m 1
@@ -30267 +30553 @@
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 )
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 port (LogicalPort
 decl (Decl
@@ -30278 +30564 @@
 uid 548,0
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 port (LogicalPort
 decl (Decl
@@ -30290 +30576 @@
 uid 1455,0
 )
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 port (LogicalPort
 decl (Decl
@@ -30303 +30589 @@
 uid 1457,0
 )
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 port (LogicalPort
 decl (Decl
@@ -30315 +30601 @@
 uid 1694,0
 )
-*1036 (LeafLogPort
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 port (LogicalPort
 m 4
@@ -30330 +30616 @@
 uid 2305,0
 )
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 port (LogicalPort
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@@ -30344 +30630 @@
 uid 2512,0
 )
-*1038 (LeafLogPort
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 port (LogicalPort
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@@ -30359 +30645 @@
 uid 2514,0
 )
-*1039 (LeafLogPort
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 port (LogicalPort
 lang 2
@@ -30375 +30661 @@
 uid 2516,0
 )
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 port (LogicalPort
 lang 2
@@ -30390 +30676 @@
 uid 2518,0
 )
-*1041 (LeafLogPort
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 port (LogicalPort
 lang 2
@@ -30404 +30690 @@
 uid 2520,0
 )
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 port (LogicalPort
 lang 2
@@ -30418 +30704 @@
 uid 2522,0
 )
-*1043 (LeafLogPort
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 port (LogicalPort
 m 4
@@ -30430 +30716 @@
 uid 2604,0
 )
-*1044 (LeafLogPort
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 port (LogicalPort
 m 4
@@ -30443 +30729 @@
 uid 2606,0
 )
-*1045 (LeafLogPort
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 port (LogicalPort
 m 4
@@ -30455 +30741 @@
 uid 2612,0
 )
-*1046 (LeafLogPort
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 port (LogicalPort
 m 4
@@ -30468 +30754 @@
 uid 2646,0
 )
-*1047 (LeafLogPort
+*1051 (LeafLogPort
 port (LogicalPort
 m 1
@@ -30481 +30767 @@
 uid 2812,0
 )
-*1048 (LeafLogPort
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 port (LogicalPort
 m 1
@@ -30493 +30779 @@
 uid 3902,0
 )
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 port (LogicalPort
 m 1
@@ -30507 +30793 @@
 uid 4070,0
 )
-*1050 (LeafLogPort
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 port (LogicalPort
 m 4
@@ -30521 +30807 @@
 uid 4212,0
 )
-*1051 (LeafLogPort
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 port (LogicalPort
 decl (Decl
@@ -30532 +30818 @@
 uid 4234,0
 )
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 port (LogicalPort
 decl (Decl
@@ -30544 +30830 @@
 uid 4262,0
 )
-*1053 (LeafLogPort
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 port (LogicalPort
 decl (Decl
@@ -30555 +30841 @@
 uid 4276,0
 )
-*1054 (LeafLogPort
+*1058 (LeafLogPort
 port (LogicalPort
 m 4
@@ -30568 +30854 @@
 uid 4563,0
 )
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 port (LogicalPort
 m 4
@@ -30580 +30866 @@
 uid 4565,0
 )
-*1056 (LeafLogPort
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 port (LogicalPort
 m 4
@@ -30593 +30879 @@
 uid 4569,0
 )
-*1057 (LeafLogPort
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 port (LogicalPort
 m 1
@@ -30607 +30893 @@
 uid 4585,0
 )
-*1058 (LeafLogPort
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 port (LogicalPort
 m 1
@@ -30620 +30906 @@
 uid 4587,0
 )
-*1059 (LeafLogPort
+*1063 (LeafLogPort
 port (LogicalPort
 decl (Decl
@@ -30631 +30917 @@
 uid 4733,0
 )
-*1060 (LeafLogPort
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 port (LogicalPort
 decl (Decl
@@ -30642 +30928 @@
 uid 4735,0
 )
-*1061 (LeafLogPort
+*1065 (LeafLogPort
 port (LogicalPort
 decl (Decl
@@ -30653 +30939 @@
 uid 4737,0
 )
-*1062 (LeafLogPort
+*1066 (LeafLogPort
 port (LogicalPort
 decl (Decl
@@ -30664 +30950 @@
 uid 4739,0
 )
-*1063 (LeafLogPort
+*1067 (LeafLogPort
 port (LogicalPort
 m 4
@@ -30676 +30962 @@
 uid 4749,0
 )
-*1064 (LeafLogPort
+*1068 (LeafLogPort
 port (LogicalPort
 m 1
@@ -30689 +30975 @@
 uid 4974,0
 )
-*1065 (LeafLogPort
+*1069 (LeafLogPort
 port (LogicalPort
 m 1
@@ -30702 +30988 @@
 uid 4976,0
 )
-*1066 (LeafLogPort
+*1070 (LeafLogPort
 port (LogicalPort
 m 1
@@ -30717 +31003 @@
 uid 5226,0
 )
-*1067 (LeafLogPort
+*1071 (LeafLogPort
 port (LogicalPort
 m 4
@@ -30729 +31015 @@
 uid 5502,0
 )
-*1068 (LeafLogPort
+*1072 (LeafLogPort
 port (LogicalPort
 m 4
@@ -30741 +31027 @@
 uid 5504,0
 )
-*1069 (LeafLogPort
+*1073 (LeafLogPort
 port (LogicalPort
 lang 10
@@ -30755 +31041 @@
 uid 5642,0
 )
-*1070 (LeafLogPort
+*1074 (LeafLogPort
 port (LogicalPort
 m 4
@@ -30767 +31053 @@
 uid 5644,0
 )
-*1071 (LeafLogPort
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 port (LogicalPort
 m 1
@@ -30779 +31065 @@
 uid 5867,0
 )
-*1072 (LeafLogPort
+*1076 (LeafLogPort
 port (LogicalPort
 m 2
@@ -30793 +31079 @@
 uid 5869,0
 )
-*1073 (LeafLogPort
+*1077 (LeafLogPort
 port (LogicalPort
 m 1
@@ -30805 +31091 @@
 uid 5871,0
 )
-*1074 (LeafLogPort
+*1078 (LeafLogPort
 port (LogicalPort
 m 1
@@ -30818 +31104 @@
 uid 5873,0
 )
-*1075 (LeafLogPort
+*1079 (LeafLogPort
 port (LogicalPort
 m 1
@@ -30831 +31117 @@
 uid 6172,0
 )
-*1076 (LeafLogPort
+*1080 (LeafLogPort
 port (LogicalPort
 m 1
@@ -30846 +31132 @@
 uid 6374,0
 )
-*1077 (LeafLogPort
+*1081 (LeafLogPort
 port (LogicalPort
 m 4
@@ -30858 +31144 @@
 uid 8760,0
 )
-*1078 (LeafLogPort
+*1082 (LeafLogPort
 port (LogicalPort
 lang 2
@@ -30871 +31157 @@
 uid 9018,0
 )
-*1079 (LeafLogPort
+*1083 (LeafLogPort
 port (LogicalPort
 m 4
@@ -30886 +31172 @@
 uid 9247,0
 )
-*1080 (LeafLogPort
+*1084 (LeafLogPort
 port (LogicalPort
 m 4
@@ -30902 +31188 @@
 uid 9249,0
 )
-*1081 (LeafLogPort
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 port (LogicalPort
 m 4
@@ -30917 +31203 @@
 uid 10024,0
 )
-*1082 (LeafLogPort
+*1086 (LeafLogPort
 port (LogicalPort
 m 4
@@ -30930 +31216 @@
 uid 10026,0
 )
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 port (LogicalPort
 m 4
@@ -30943 +31229 @@
 uid 10028,0
 )
-*1084 (LeafLogPort
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 port (LogicalPort
 m 4
@@ -30955 +31241 @@
 uid 10294,0
 )
-*1085 (LeafLogPort
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 port (LogicalPort
 m 4
@@ -30967 +31253 @@
 uid 10334,0
 )
-*1086 (LeafLogPort
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 port (LogicalPort
 m 4
@@ -30980 +31266 @@
 uid 10336,0
 )
-*1087 (LeafLogPort
+*1091 (LeafLogPort
 port (LogicalPort
 m 4
@@ -30993 +31279 @@
 uid 10338,0
 )
-*1088 (LeafLogPort
+*1092 (LeafLogPort
 port (LogicalPort
 m 4
@@ -31007 +31293 @@
 uid 10340,0
 )
-*1089 (LeafLogPort
+*1093 (LeafLogPort
 port (LogicalPort
 m 1
@@ -31020 +31306 @@
 uid 10342,0
 )
-*1090 (LeafLogPort
+*1094 (LeafLogPort
 port (LogicalPort
 m 4
@@ -31031 +31317 @@
 )
 uid 10763,0
-)
-*1091 (LeafLogPort
-port (LogicalPort
-m 4
-decl (Decl
-n "socks_waiting"
-t "std_logic"
-o 124
-suid 244,0
-)
-)
-uid 10765,0
-)
-*1092 (LeafLogPort
-port (LogicalPort
-m 1
-decl (Decl
-n "green"
-t "std_logic"
-o 37
-suid 248,0
-)
-)
-uid 10767,0
-)
-*1093 (LeafLogPort
-port (LogicalPort
-m 1
-decl (Decl
-n "amber"
-t "std_logic"
-o 29
-suid 249,0
-)
-)
-uid 10769,0
-)
-*1094 (LeafLogPort
-port (LogicalPort
-m 1
-decl (Decl
-n "red"
-t "std_logic"
-o 41
-suid 250,0
-)
-)
-uid 10771,0
 )
 *1095 (LeafLogPort
@@ -31084 +31322 @@
 m 4
 decl (Decl
+n "socks_waiting"
+t "std_logic"
+o 124
+suid 244,0
+)
+)
+uid 10765,0
+)
+*1096 (LeafLogPort
+port (LogicalPort
+m 1
+decl (Decl
+n "green"
+t "std_logic"
+o 37
+suid 248,0
+)
+)
+uid 10767,0
+)
+*1097 (LeafLogPort
+port (LogicalPort
+m 1
+decl (Decl
+n "amber"
+t "std_logic"
+o 29
+suid 249,0
+)
+)
+uid 10769,0
+)
+*1098 (LeafLogPort
+port (LogicalPort
+m 1
+decl (Decl
+n "red"
+t "std_logic"
+o 41
+suid 250,0
+)
+)
+uid 10771,0
+)
+*1099 (LeafLogPort
+port (LogicalPort
+m 4
+decl (Decl
 n "drs_readout_started"
 t "std_logic"
@@ -31092 +31378 @@
 uid 11411,0
 )
-*1096 (LeafLogPort
+*1100 (LeafLogPort
 port (LogicalPort
 m 4
@@ -31104 +31390 @@
 uid 11966,0
 )
-*1097 (LeafLogPort
+*1101 (LeafLogPort
 port (LogicalPort
 m 4
@@ -31121 +31407 @@
 uid 12661,0
 )
-*1098 (LeafLogPort
+*1102 (LeafLogPort
 port (LogicalPort
 m 4
@@ -31133 +31419 @@
 uid 12663,0
 )
-*1099 (LeafLogPort
+*1103 (LeafLogPort
 port (LogicalPort
 m 4
@@ -31146 +31432 @@
 uid 13275,0
 )
-*1100 (LeafLogPort
+*1104 (LeafLogPort
 port (LogicalPort
 decl (Decl
@@ -31159 +31445 @@
 scheme 0
 )
-*1101 (LeafLogPort
+*1105 (LeafLogPort
 port (LogicalPort
 decl (Decl
@@ -31172 +31458 @@
 scheme 0
 )
-*1102 (LeafLogPort
+*1106 (LeafLogPort
 port (LogicalPort
 decl (Decl
@@ -31186 +31472 @@
 scheme 0
 )
-*1103 (LeafLogPort
+*1107 (LeafLogPort
 port (LogicalPort
 m 1
@@ -31198 +31484 @@
 uid 14507,0
 )
-*1104 (LeafLogPort
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 port (LogicalPort
 m 1
@@ -31211 +31497 @@
 uid 14509,0
 )
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 port (LogicalPort
 m 1
@@ -31224 +31510 @@
 uid 14634,0
 )
-*1106 (LeafLogPort
+*1110 (LeafLogPort
 port (LogicalPort
 m 4
@@ -31239 +31525 @@
 uid 15144,0
 )
-*1107 (LeafLogPort
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 port (LogicalPort
 m 4
@@ -31254 +31540 @@
 uid 15146,0
 )
-*1108 (LeafLogPort
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 port (LogicalPort
 m 4
@@ -31266 +31552 @@
 uid 15504,0
 )
-*1109 (LeafLogPort
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 port (LogicalPort
 lang 2
@@ -31282 +31568 @@
 uid 15754,0
 )
-*1110 (LeafLogPort
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 port (LogicalPort
 m 4
@@ -31298 +31584 @@
 uid 16386,0
 )
-*1111 (LeafLogPort
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 port (LogicalPort
 m 4
@@ -31314 +31600 @@
 uid 16571,0
 )
-*1112 (LeafLogPort
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 port (LogicalPort
 m 4
@@ -31329 +31615 @@
 uid 16573,0
 )
-*1113 (LeafLogPort
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 port (LogicalPort
 m 4
@@ -31341 +31627 @@
 uid 16961,0
 )
-*1114 (LeafLogPort
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 port (LogicalPort
 m 4
@@ -31353 +31639 @@
 uid 16963,0
 )
-*1115 (LeafLogPort
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 port (LogicalPort
 m 4
@@ -31366 +31652 @@
 uid 16965,0
 )
-*1116 (LeafLogPort
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 port (LogicalPort
 m 4
@@ -31381 +31667 @@
 uid 17033,0
 )
-*1117 (LeafLogPort
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 port (LogicalPort
 m 4
@@ -31399 +31685 @@
 uid 17035,0
 )
-*1118 (LeafLogPort
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 port (LogicalPort
 m 4
@@ -31413 +31699 @@
 uid 17397,0
 )
-*1119 (LeafLogPort
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 port (LogicalPort
 lang 2
@@ -31426 +31712 @@
 uid 18463,0
 )
-*1120 (LeafLogPort
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 port (LogicalPort
 lang 2
@@ -31440 +31726 @@
 scheme 0
 )
-*1121 (LeafLogPort
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 port (LogicalPort
 lang 10
@@ -31454 +31740 @@
 uid 20159,0
 )
-*1122 (LeafLogPort
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 port (LogicalPort
 m 4
@@ -31468 +31754 @@
 uid 20515,0
 )
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 port (LogicalPort
 m 4
@@ -31482 +31768 @@
 uid 20517,0
 )
-*1124 (LeafLogPort
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 port (LogicalPort
 m 4
@@ -31494 +31780 @@
 uid 20523,0
 )
-*1125 (LeafLogPort
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 port (LogicalPort
 m 4
@@ -31506 +31792 @@
 uid 20525,0
 )
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 port (LogicalPort
 m 4
@@ -31521 +31807 @@
 uid 21091,0
 )
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 port (LogicalPort
 m 4
@@ -31533 +31819 @@
 uid 21093,0
 )
-*1128 (LeafLogPort
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 port (LogicalPort
 m 4
@@ -31546 +31832 @@
 uid 21097,0
 )
-*1129 (LeafLogPort
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 port (LogicalPort
 m 4
@@ -31558 +31844 @@
 uid 21101,0
 )
-*1130 (LeafLogPort
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 port (LogicalPort
 m 4
@@ -31571 +31857 @@
 uid 21103,0
 )
-*1131 (LeafLogPort
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 port (LogicalPort
 m 4
@@ -31583 +31869 @@
 uid 21107,0
 )
-*1132 (LeafLogPort
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 port (LogicalPort
 m 4
@@ -31595 +31881 @@
 uid 22029,0
 )
-*1133 (LeafLogPort
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 port (LogicalPort
 m 4
@@ -31607 +31893 @@
 uid 22031,0
 )
-*1134 (LeafLogPort
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 port (LogicalPort
 m 4
@@ -31619 +31905 @@
 uid 22033,0
 )
-*1135 (LeafLogPort
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 port (LogicalPort
 m 4
@@ -31631 +31917 @@
 uid 22035,0
 )
-*1136 (LeafLogPort
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 port (LogicalPort
 m 4
@@ -31643 +31929 @@
 uid 22037,0
 )
-*1137 (LeafLogPort
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 port (LogicalPort
 m 4
@@ -31655 +31941 @@
 uid 22039,0
 )
-*1138 (LeafLogPort
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 port (LogicalPort
 m 4
@@ -31668 +31954 @@
 uid 22133,0
 )
-*1139 (LeafLogPort
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 port (LogicalPort
 m 4
@@ -31681 +31967 @@
 uid 22135,0
 )
-*1140 (LeafLogPort
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 port (LogicalPort
 m 4
@@ -31693 +31979 @@
 uid 22137,0
 )
-*1141 (LeafLogPort
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 port (LogicalPort
 m 4
@@ -31706 +31992 @@
 uid 22139,0
 )
-*1142 (LeafLogPort
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 port (LogicalPort
 m 4
@@ -31721 +32007 @@
 uid 23053,0
 )
-*1143 (LeafLogPort
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 port (LogicalPort
 m 4
@@ -31733 +32019 @@
 uid 23373,0
 )
-*1144 (LeafLogPort
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 port (LogicalPort
 m 4
@@ -31745 +32031 @@
 uid 23375,0
 )
-*1145 (LeafLogPort
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 port (LogicalPort
 m 1
@@ -31758 +32044 @@
 uid 24090,0
 )
-*1146 (LeafLogPort
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 port (LogicalPort
 decl (Decl
@@ -31769 +32055 @@
 uid 24716,0
 )
-*1147 (LeafLogPort
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 port (LogicalPort
 m 1
@@ -31781 +32067 @@
 uid 24718,0
 )
-*1148 (LeafLogPort
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 port (LogicalPort
 m 1
@@ -31793 +32079 @@
 uid 24720,0
 )
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 port (LogicalPort
 m 1
@@ -31805 +32091 @@
 uid 24722,0
 )
-*1150 (LeafLogPort
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 port (LogicalPort
 m 4
@@ -31818 +32104 @@
 uid 24744,0
 )
-*1151 (LeafLogPort
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 port (LogicalPort
 m 4
@@ -31831 +32117 @@
 uid 25043,0
 )
-*1152 (LeafLogPort
+*1156 (LeafLogPort
 port (LogicalPort
 m 1
@@ -31846 +32132 @@
 uid 25312,0
 )
-*1153 (LeafLogPort
+*1157 (LeafLogPort
 port (LogicalPort
 m 1
@@ -31858 +32144 @@
 uid 25569,0
 )
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-litem &1159
+*1311 (MRCItem
+litem &1163
 pos 138
 dimension 20
 uid 27138,0
 )
-*1307 (MRCItem
-litem &1160
+*1312 (MRCItem
+litem &1164
 pos 139
 dimension 20
 uid 27160,0
 )
-*1308 (MRCItem
-litem &1161
+*1313 (MRCItem
+litem &1165
 pos 140
 dimension 20
 uid 27162,0
 )
-*1309 (MRCItem
-litem &1162
+*1314 (MRCItem
+litem &1166
 pos 141
 dimension 20
 uid 27620,0
+)
+*1315 (MRCItem
+litem &1167
+pos 142
+dimension 20
+uid 28291,0
 )
 ]
@@ -32892 +33199 @@
 uid 73,0
 optionalChildren [
-*1310 (MRCItem
-litem &1012
+*1316 (MRCItem
+litem &1016
 pos 0
 dimension 20
 uid 74,0
 )
-*1311 (MRCItem
-litem &1014
+*1317 (MRCItem
+litem &1018
 pos 1
 dimension 50
 uid 75,0
 )
-*1312 (MRCItem
-litem &1015
+*1318 (MRCItem
+litem &1019
 pos 2
 dimension 100
 uid 76,0
 )
-*1313 (MRCItem
-litem &1016
+*1319 (MRCItem
+litem &1020
 pos 3
 dimension 50
 uid 77,0
 )
-*1314 (MRCItem
-litem &1017
+*1320 (MRCItem
+litem &1021
 pos 4
 dimension 100
 uid 78,0
 )
-*1315 (MRCItem
-litem &1018
+*1321 (MRCItem
+litem &1022
 pos 5
 dimension 100
 uid 79,0
 )
-*1316 (MRCItem
-litem &1019
+*1322 (MRCItem
+litem &1023
 pos 6
 dimension 50
 uid 80,0
 )
-*1317 (MRCItem
-litem &1020
+*1323 (MRCItem
+litem &1024
 pos 7
 dimension 290
@@ -32955 +33262 @@
 genericsCommonDM (CommonDM
 ldm (LogicalDM
-emptyRow *1318 (LEmptyRow
+emptyRow *1324 (LEmptyRow
 )
 uid 83,0
 optionalChildren [
-*1319 (RefLabelRowHdr
-)
-*1320 (TitleRowHdr
-)
-*1321 (FilterRowHdr
-)
-*1322 (RefLabelColHdr
+*1325 (RefLabelRowHdr
+)
+*1326 (TitleRowHdr
+)
+*1327 (FilterRowHdr
+)
+*1328 (RefLabelColHdr
 tm "RefLabelColHdrMgr"
 )
-*1323 (RowExpandColHdr
+*1329 (RowExpandColHdr
 tm "RowExpandColHdrMgr"
 )
-*1324 (GroupColHdr
+*1330 (GroupColHdr
 tm "GroupColHdrMgr"
 )
-*1325 (NameColHdr
+*1331 (NameColHdr
 tm "GenericNameColHdrMgr"
 )
-*1326 (TypeColHdr
+*1332 (TypeColHdr
 tm "GenericTypeColHdrMgr"
 )
-*1327 (InitColHdr
+*1333 (InitColHdr
 tm "GenericValueColHdrMgr"
 )
-*1328 (PragmaColHdr
+*1334 (PragmaColHdr
 tm "GenericPragmaColHdrMgr"
 )
-*1329 (EolColHdr
+*1335 (EolColHdr
 tm "GenericEolColHdrMgr"
 )
-*1330 (LogGeneric
+*1336 (LogGeneric
 generic (GiElement
 name "RAMADDRWIDTH64b"
@@ -33004 +33311 @@
 uid 95,0
 optionalChildren [
-*1331 (Sheet
+*1337 (Sheet
 sheetRow (SheetRow
 headerVa (MVa
@@ -33021 +33328 @@
 font "Tahoma,10,0"
 )
-emptyMRCItem *1332 (MRCItem
-litem &1318
+emptyMRCItem *1338 (MRCItem
+litem &1324
 pos 1
 dimension 20
@@ -33028 +33335 @@
 uid 97,0
 optionalChildren [
-*1333 (MRCItem
-litem &1319
+*1339 (MRCItem
+litem &1325
 pos 0
 dimension 20
 uid 98,0
 )
-*1334 (MRCItem
-litem &1320
+*1340 (MRCItem
+litem &1326
 pos 1
 dimension 23
 uid 99,0
 )
-*1335 (MRCItem
-litem &1321
+*1341 (MRCItem
+litem &1327
 pos 2
 hidden 1
@@ -33047 +33354 @@
 uid 100,0
 )
-*1336 (MRCItem
-litem &1330
+*1342 (MRCItem
+litem &1336
 pos 0
 dimension 20
@@ -33064 +33371 @@
 uid 101,0
 optionalChildren [
-*1337 (MRCItem
-litem &1322
+*1343 (MRCItem
+litem &1328
 pos 0
 dimension 20
 uid 102,0
 )
-*1338 (MRCItem
-litem &1324
+*1344 (MRCItem
+litem &1330
 pos 1
 dimension 50
 uid 103,0
 )
-*1339 (MRCItem
-litem &1325
+*1345 (MRCItem
+litem &1331
 pos 2
 dimension 186
 uid 104,0
 )
-*1340 (MRCItem
-litem &1326
+*1346 (MRCItem
+litem &1332
 pos 3
 dimension 96
 uid 105,0
 )
-*1341 (MRCItem
-litem &1327
+*1347 (MRCItem
+litem &1333
 pos 4
 dimension 50
 uid 106,0
 )
-*1342 (MRCItem
-litem &1328
+*1348 (MRCItem
+litem &1334
 pos 5
 dimension 50
 uid 107,0
 )
-*1343 (MRCItem
-litem &1329
+*1349 (MRCItem
+litem &1335
 pos 6
 dimension 80

firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib/hds/@f@a@d_main/symbol.sb ¶

@@ -22 +22 @@
 )
 version "24.1"
-appVersion "2009.1 (Build 12)"
+appVersion "2009.2 (Build 10)"
 model (Symbol
 commonDM (CommonDM
@@ -1348 +1348 @@
 (vvPair
 variable "HDLDir"
-value "D:\\firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hdl"
+value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hdl"
 )
 (vvPair
 variable "HDSDir"
-value "D:\\firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds"
+value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds"
 )
 (vvPair
 variable "SideDataDesignDir"
-value "D:\\firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds\\@f@a@d_main\\symbol.sb.info"
+value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds\\@f@a@d_main\\symbol.sb.info"
 )
 (vvPair
 variable "SideDataUserDir"
-value "D:\\firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds\\@f@a@d_main\\symbol.sb.user"
+value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds\\@f@a@d_main\\symbol.sb.user"
 )
 (vvPair
 variable "SourceDir"
-value "D:\\firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds"
+value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds"
 )
 (vvPair
@@ -1380 +1380 @@
 (vvPair
 variable "d"
-value "D:\\firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds\\@f@a@d_main"
+value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds\\@f@a@d_main"
 )
 (vvPair
 variable "d_logical"
-value "D:\\firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds\\FAD_main"
+value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds\\FAD_main"
 )
 (vvPair
 variable "date"
-value "25.05.2011"
+value "01.06.2011"
 )
 (vvPair
@@ -1400 +1400 @@
 (vvPair
 variable "dd"
-value "25"
+value "01"
 )
 (vvPair
@@ -1428 +1428 @@
 (vvPair
 variable "host"
-value "IHP110"
+value "E5B-LABOR6"
 )
 (vvPair
@@ -1464 +1464 @@
 (vvPair
 variable "mm"
-value "05"
+value "06"
 )
 (vvPair
@@ -1472 +1472 @@
 (vvPair
 variable "month"
-value "Mai"
+value "Jun"
 )
 (vvPair
 variable "month_long"
-value "Mai"
+value "Juni"
 )
 (vvPair
 variable "p"
-value "D:\\firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds\\@f@a@d_main\\symbol.sb"
+value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds\\@f@a@d_main\\symbol.sb"
 )
 (vvPair
 variable "p_logical"
-value "D:\\firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds\\FAD_main\\symbol.sb"
+value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_lib\\hds\\FAD_main\\symbol.sb"
 )
 (vvPair
@@ -1508 +1508 @@
 (vvPair
 variable "task_ModelSimPath"
-value "D:\\modeltech_6.5e\\win32"
+value "C:\\modeltech_6.6a\\win32"
 )
 (vvPair
@@ -1540 +1540 @@
 (vvPair
 variable "time"
-value "14:53:43"
+value "17:50:58"
 )
 (vvPair
@@ -1548 +1548 @@
 (vvPair
 variable "user"
-value "daqct3"
+value "dneise"
 )
 (vvPair
 variable "version"
-value "2009.1 (Build 12)"
+value "2009.2 (Build 10)"
 )
 (vvPair
@@ -1607 +1607 @@
 )
 xt "44000,42000,80500,42800"
-st "wiz_reset             : OUT    std_logic                     := '1' ;
-"
+st "wiz_reset             : OUT    std_logic                     := '1' ;"
 )
 thePort (LogicalPort
@@ -1654 +1653 @@
 )
 xt "44000,32400,86500,33200"
-st "led                   : OUT    std_logic_vector (7 DOWNTO 0) := (OTHERS => '0') ;
-"
+st "led                   : OUT    std_logic_vector (7 DOWNTO 0) := (OTHERS => '0') ;"
 )
 thePort (LogicalPort
@@ -1702 +1700 @@
 )
 xt "44000,12400,67500,13200"
-st "trigger               : IN     std_logic  ;
-"
+st "trigger               : IN     std_logic  ;"
 )
 thePort (LogicalPort
@@ -1748 +1745 @@
 )
 xt "44000,22800,80500,23600"
-st "adc_oeb               : OUT    std_logic                     := '1' ;
-"
+st "adc_oeb               : OUT    std_logic                     := '1' ;"
 )
 thePort (LogicalPort
@@ -1794 +1790 @@
 )
 xt "44000,9200,77000,10000"
-st "board_id              : IN     std_logic_vector (3 DOWNTO 0) ;
-"
+st "board_id              : IN     std_logic_vector (3 DOWNTO 0) ;"
 )
 thePort (LogicalPort
@@ -1839 +1834 @@
 )
 xt "44000,10000,77000,10800"
-st "crate_id              : IN     std_logic_vector (1 DOWNTO 0) ;
-"
+st "crate_id              : IN     std_logic_vector (1 DOWNTO 0) ;"
 )
 thePort (LogicalPort
@@ -1885 +1879 @@
 )
 xt "44000,39600,77000,40400"
-st "wiz_addr              : OUT    std_logic_vector (9 DOWNTO 0) ;
-"
+st "wiz_addr              : OUT    std_logic_vector (9 DOWNTO 0) ;"
 )
 thePort (LogicalPort
@@ -1932 +1925 @@
 )
 xt "44000,44400,76500,45200"
-st "wiz_data              : INOUT  std_logic_vector (15 DOWNTO 0)
-"
+st "wiz_data              : INOUT  std_logic_vector (15 DOWNTO 0)"
 )
 thePort (LogicalPort
@@ -1979 +1971 @@
 )
 xt "44000,40400,80500,41200"
-st "wiz_cs                : OUT    std_logic                     := '1' ;
-"
+st "wiz_cs                : OUT    std_logic                     := '1' ;"
 )
 thePort (LogicalPort
@@ -2026 +2017 @@
 )
 xt "44000,42800,80500,43600"
-st "wiz_wr                : OUT    std_logic                     := '1' ;
-"
+st "wiz_wr                : OUT    std_logic                     := '1' ;"
 )
 thePort (LogicalPort
@@ -2073 +2063 @@
 )
 xt "44000,41200,80500,42000"
-st "wiz_rd                : OUT    std_logic                     := '1' ;
-"
+st "wiz_rd                : OUT    std_logic                     := '1' ;"
 )
 thePort (LogicalPort
@@ -2120 +2109 @@
 )
 xt "44000,13200,67500,14000"
-st "wiz_int               : IN     std_logic  ;
-"
+st "wiz_int               : IN     std_logic  ;"
 )
 thePort (LogicalPort
@@ -2164 +2152 @@
 )
 xt "44000,14800,67500,15600"
-st "CLK_25_PS             : OUT    std_logic  ;
-"
+st "CLK_25_PS             : OUT    std_logic  ;"
 )
 thePort (LogicalPort
@@ -2209 +2196 @@
 )
 xt "44000,15600,67500,16400"
-st "CLK_50                : OUT    std_logic  ;
-"
+st "CLK_50                : OUT    std_logic  ;"
 )
 thePort (LogicalPort
@@ -2256 +2242 @@
 )
 xt "44000,2000,67500,2800"
-st "CLK                   : IN     std_logic  ;
-"
+st "CLK                   : IN     std_logic  ;"
 )
 thePort (LogicalPort
@@ -2300 +2285 @@
 )
 xt "44000,8400,77000,9200"
-st "adc_otr_array         : IN     std_logic_vector (3 DOWNTO 0) ;
-"
+st "adc_otr_array         : IN     std_logic_vector (3 DOWNTO 0) ;"
 )
 thePort (LogicalPort
@@ -2345 +2329 @@
 )
 xt "44000,7600,72500,8400"
-st "adc_data_array        : IN     adc_data_array_type  ;
-"
+st "adc_data_array        : IN     adc_data_array_type  ;"
 )
 thePort (LogicalPort
@@ -2389 +2372 @@
 )
 xt "44000,30000,86500,30800"
-st "drs_channel_id        : OUT    std_logic_vector (3 downto 0) := (others => '0') ;
-"
+st "drs_channel_id        : OUT    std_logic_vector (3 downto 0) := (others => '0') ;"
 )
 thePort (LogicalPort
@@ -2436 +2418 @@
 )
 xt "44000,30800,80500,31600"
-st "drs_dwrite            : OUT    std_logic                     := '1' ;
-"
+st "drs_dwrite            : OUT    std_logic                     := '1' ;"
 )
 thePort (LogicalPort
@@ -2482 +2463 @@
 )
 xt "44000,4400,67500,5200"
-st "SROUT_in_0            : IN     std_logic  ;
-"
+st "SROUT_in_0            : IN     std_logic  ;"
 )
 thePort (LogicalPort
@@ -2526 +2506 @@
 )
 xt "44000,5200,67500,6000"
-st "SROUT_in_1            : IN     std_logic  ;
-"
+st "SROUT_in_1            : IN     std_logic  ;"
 )
 thePort (LogicalPort
@@ -2570 +2549 @@
 )
 xt "44000,6000,67500,6800"
-st "SROUT_in_2            : IN     std_logic  ;
-"
+st "SROUT_in_2            : IN     std_logic  ;"
 )
 thePort (LogicalPort
@@ -2614 +2592 @@
 )
 xt "44000,6800,67500,7600"
-st "SROUT_in_3            : IN     std_logic  ;
-"
+st "SROUT_in_3            : IN     std_logic  ;"
 )
 thePort (LogicalPort
@@ -2658 +2635 @@
 )
 xt "44000,20400,80500,21200"
-st "RSRLOAD               : OUT    std_logic                     := '0' ;
-"
+st "RSRLOAD               : OUT    std_logic                     := '0' ;"
 )
 thePort (LogicalPort
@@ -2704 +2680 @@
 )
 xt "44000,21200,80500,22000"
-st "SRCLK                 : OUT    std_logic                     := '0' ;
-"
+st "SRCLK                 : OUT    std_logic                     := '0' ;"
 )
 thePort (LogicalPort
@@ -2751 +2726 @@
 )
 xt "44000,35600,67500,36400"
-st "sclk                  : OUT    std_logic  ;
-"
+st "sclk                  : OUT    std_logic  ;"
 )
 thePort (LogicalPort
@@ -2797 +2771 @@
 )
 xt "44000,43600,67500,44400"
-st "sio                   : INOUT  std_logic  ;
-"
+st "sio                   : INOUT  std_logic  ;"
 )
 thePort (LogicalPort
@@ -2845 +2818 @@
 )
 xt "44000,26800,67500,27600"
-st "dac_cs                : OUT    std_logic  ;
-"
+st "dac_cs                : OUT    std_logic  ;"
 )
 thePort (LogicalPort
@@ -2891 +2863 @@
 )
 xt "44000,36400,77000,37200"
-st "sensor_cs             : OUT    std_logic_vector (3 DOWNTO 0) ;
-"
+st "sensor_cs             : OUT    std_logic_vector (3 DOWNTO 0) ;"
 )
 thePort (LogicalPort
@@ -2938 +2909 @@
 )
 xt "44000,34000,80500,34800"
-st "mosi                  : OUT    std_logic                     := '0' ;
-"
+st "mosi                  : OUT    std_logic                     := '0' ;"
 )
 thePort (LogicalPort
@@ -2985 +2955 @@
 )
 xt "44000,29200,94000,30000"
-st "denable               : OUT    std_logic                     := '0' ; -- default domino wave off
-"
+st "denable               : OUT    std_logic                     := '0' ; -- default domino wave off"
 )
 thePort (LogicalPort
@@ -3034 +3003 @@
 )
 xt "44000,22000,80500,22800"
-st "SRIN_out              : OUT    std_logic                     := '0' ;
-"
+st "SRIN_out              : OUT    std_logic                     := '0' ;"
 )
 thePort (LogicalPort
@@ -3081 +3049 @@
 )
 xt "44000,31600,67500,32400"
-st "green                 : OUT    std_logic  ;
-"
+st "green                 : OUT    std_logic  ;"
 )
 thePort (LogicalPort
@@ -3127 +3094 @@
 )
 xt "44000,25200,67500,26000"
-st "amber                 : OUT    std_logic  ;
-"
+st "amber                 : OUT    std_logic  ;"
 )
 thePort (LogicalPort
@@ -3173 +3139 @@
 )
 xt "44000,34800,67500,35600"
-st "red                   : OUT    std_logic  ;
-"
+st "red                   : OUT    std_logic  ;"
 )
 thePort (LogicalPort
@@ -3218 +3183 @@
 )
 xt "44000,2800,77000,3600"
-st "D_T_in                : IN     std_logic_vector (1 DOWNTO 0) ;
-"
+st "D_T_in                : IN     std_logic_vector (1 DOWNTO 0) ;"
 )
 thePort (LogicalPort
@@ -3263 +3227 @@
 )
 xt "44000,10800,99000,11600"
-st "drs_refclk_in         : IN     std_logic  ; -- used to check if DRS REFCLK exsists, if not DENABLE inhibit
-"
+st "drs_refclk_in         : IN     std_logic  ; -- used to check if DRS REFCLK exsists, if not DENABLE inhibit"
 )
 thePort (LogicalPort
@@ -3308 +3271 @@
 )
 xt "44000,11600,106500,12400"
-st "plllock_in            : IN     std_logic_vector (3 DOWNTO 0) ; -- high level, if dominowave is running and DRS PLL locked
-"
+st "plllock_in            : IN     std_logic_vector (3 DOWNTO 0) ; -- high level, if dominowave is running and DRS PLL locked"
 )
 thePort (LogicalPort
@@ -3355 +3317 @@
 )
 xt "44000,26000,77500,26800"
-st "counter_result        : OUT    std_logic_vector (11 DOWNTO 0) ;
-"
+st "counter_result        : OUT    std_logic_vector (11 DOWNTO 0) ;"
 )
 thePort (LogicalPort
@@ -3402 +3363 @@
 )
 xt "44000,23600,67500,24400"
-st "alarm_refclk_too_high : OUT    std_logic  ;
-"
+st "alarm_refclk_too_high : OUT    std_logic  ;"
 )
 thePort (LogicalPort
@@ -3448 +3408 @@
 )
 xt "44000,24400,67500,25200"
-st "alarm_refclk_too_low  : OUT    std_logic  ;
-"
+st "alarm_refclk_too_low  : OUT    std_logic  ;"
 )
 thePort (LogicalPort
@@ -3495 +3454 @@
 )
 xt "44000,14000,67500,14800"
-st "ADC_CLK               : OUT    std_logic  ;
-"
+st "ADC_CLK               : OUT    std_logic  ;"
 )
 thePort (LogicalPort
@@ -3542 +3500 @@
 )
 xt "44000,38000,80500,38800"
-st "trigger_veto          : OUT    std_logic                     := '1' ;
-"
+st "trigger_veto          : OUT    std_logic                     := '1' ;"
 )
 thePort (LogicalPort
@@ -3588 +3545 @@
 )
 xt "44000,3600,67500,4400"
-st "FTM_RS485_rx_d        : IN     std_logic  ;
-"
+st "FTM_RS485_rx_d        : IN     std_logic  ;"
 )
 thePort (LogicalPort
@@ -3633 +3589 @@
 )
 xt "44000,18800,67500,19600"
-st "FTM_RS485_tx_d        : OUT    std_logic  ;
-"
+st "FTM_RS485_tx_d        : OUT    std_logic  ;"
 )
 thePort (LogicalPort
@@ -3679 +3634 @@
 )
 xt "44000,18000,67500,18800"
-st "FTM_RS485_rx_en       : OUT    std_logic  ;
-"
+st "FTM_RS485_rx_en       : OUT    std_logic  ;"
 )
 thePort (LogicalPort
@@ -3725 +3679 @@
 )
 xt "44000,19600,67500,20400"
-st "FTM_RS485_tx_en       : OUT    std_logic  ;
-"
+st "FTM_RS485_tx_en       : OUT    std_logic  ;"
 )
 thePort (LogicalPort
@@ -3771 +3724 @@
 )
 xt "44000,38800,102500,39600"
-st "w5300_state           : OUT    std_logic_vector (7 DOWNTO 0) ; -- state is encoded here ... useful for debugging.
-"
+st "w5300_state           : OUT    std_logic_vector (7 DOWNTO 0) ; -- state is encoded here ... useful for debugging."
 )
 thePort (LogicalPort
@@ -3820 +3772 @@
 )
 xt "44000,27600,67500,28400"
-st "debug_data_ram_empty  : OUT    std_logic  ;
-"
+st "debug_data_ram_empty  : OUT    std_logic  ;"
 )
 thePort (LogicalPort
@@ -3866 +3817 @@
 )
 xt "44000,28400,67500,29200"
-st "debug_data_valid      : OUT    std_logic  ;
-"
+st "debug_data_valid      : OUT    std_logic  ;"
 )
 thePort (LogicalPort
@@ -3912 +3862 @@
 )
 xt "44000,33200,102500,34000"
-st "mem_manager_state     : OUT    std_logic_vector (3 DOWNTO 0) ; -- state is encoded here ... useful for debugging.
-"
+st "mem_manager_state     : OUT    std_logic_vector (3 DOWNTO 0) ; -- state is encoded here ... useful for debugging."
 )
 thePort (LogicalPort
@@ -3963 +3912 @@
 xt "44000,16400,77000,18000"
 st "-- for debugging
-DG_state              : OUT    std_logic_vector (7 downto 0) ;
-"
+DG_state              : OUT    std_logic_vector (7 downto 0) ;"
 )
 thePort (LogicalPort
@@ -4012 +3960 @@
 )
 xt "44000,37200,92500,38000"
-st "socket_tx_free_out    : OUT    std_logic_vector (16 DOWNTO 0) ; -- 17bit value .. that's true
-"
+st "socket_tx_free_out    : OUT    std_logic_vector (16 DOWNTO 0) ; -- 17bit value .. that's true"
 )
 thePort (LogicalPort
@@ -4076 +4023 @@
 st "Generic Declarations
 
-RAMADDRWIDTH64b integer 12  
-"
+RAMADDRWIDTH64b integer 12  "
 )
 header "Generic Declarations"
@@ -4117 +4063 @@
 bg "0,0,32768"
 )
-xt "36200,48000,47000,49000"
+xt "36200,48000,45900,49000"
 st "
 by %user on %dd %month %year
@@ -4148 +4094 @@
 bg "0,0,32768"
 )
-xt "53200,44000,56500,45000"
+xt "53200,44000,56200,45000"
 st "
 Project:
@@ -4179 +4125 @@
 bg "0,0,32768"
 )
-xt "36200,46000,47100,47000"
+xt "36200,46000,46200,47000"
 st "
 <enter diagram title here>
@@ -4210 +4156 @@
 bg "0,0,32768"
 )
-xt "32200,46000,34500,47000"
+xt "32200,46000,34300,47000"
 st "
 Title:
@@ -4241 +4187 @@
 bg "0,0,32768"
 )
-xt "53200,45200,63000,46200"
+xt "53200,45200,62400,46200"
 st "
 <enter comments here>
@@ -4271 +4217 @@
 bg "0,0,32768"
 )
-xt "57200,44000,61900,45000"
+xt "57200,44000,61700,45000"
 st "
 %project_name
@@ -4301 +4247 @@
 fg "32768,0,0"
 )
-xt "39200,44500,45800,45500"
+xt "39150,44500,45850,45500"
 st "
 <company name>
@@ -4333 +4279 @@
 bg "0,0,32768"
 )
-xt "32200,47000,34500,48000"
+xt "32200,47000,34300,48000"
 st "
 Path:
@@ -4364 +4310 @@
 bg "0,0,32768"
 )
-xt "32200,48000,35300,49000"
+xt "32200,48000,34900,49000"
 st "
 Edited:
@@ -4395 +4341 @@
 bg "0,0,32768"
 )
-xt "36200,47000,50400,48000"
+xt "36200,47000,49000,48000"
 st "
 %library/%unit/%view
@@ -4450 +4396 @@
 va (VaSet
 )
-xt "0,1000,16100,6000"
+xt "0,1000,14500,6000"
 st "LIBRARY ieee;
 USE ieee.std_logic_1164.all;
@@ -4479 +4425 @@
 fg "0,0,32768"
 )
-xt "200,200,2400,1200"
+xt "200,200,2000,1200"
 st "
 Text
@@ -4702 +4648 @@
 )
 )
-lastUid 8287,0
+lastUid 8310,0
 okToSyncOnLoad 1
 OkToSyncGenericsOnLoad 1