Changeset 11485 for firmware/FTM/ftu_control
- Timestamp:
- 07/20/11 14:54:17 (14 years ago)
- File:
-
- 1 edited
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- Unmodified
- Added
- Removed
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firmware/FTM/ftu_control/FTM_ftu_control.vhd
r10929 r11485 56 56 tx_d_3 : out STD_LOGIC; 57 57 58 -- commands from FTM main control 59 new_config : in std_logic; 60 ping_all : in std_logic; 61 read_rates : in std_logic; 62 63 -- answers to FTM main control 64 read_rates_started : out std_logic := '0'; 65 read_rates_done : out std_logic := '0'; 66 new_config_started : out std_logic := '0'; 67 new_config_done : out std_logic := '0'; 68 ping_all_started : out std_logic := '0'; 69 ping_all_done : out std_logic := '0'; 70 58 -- commands from FTM central control 59 new_config : in std_logic; 60 ping_all : in std_logic; 61 read_rates : in std_logic; 62 config_single_FTU : in std_logic; 63 64 -- answers to FTM central control 65 read_rates_started : out std_logic := '0'; 66 read_rates_done : out std_logic := '0'; 67 new_config_started : out std_logic := '0'; 68 new_config_done : out std_logic := '0'; 69 ping_all_started : out std_logic := '0'; 70 ping_all_done : out std_logic := '0'; 71 config_single_FTU_started : out std_logic := '0'; 72 config_single_FTU_done : out std_logic := '0'; 73 71 74 -- active FTU lists 72 75 ftu_active_cr0 : in std_logic_vector (15 downto 0); … … 75 78 ftu_active_cr3 : in std_logic_vector (15 downto 0); 76 79 80 -- parameter for config single FTU command 81 config_single_FTU_param : in std_logic_vector (15 DOWNTO 0); 82 77 83 --error message interface to ethernet control 78 84 ftu_error_calls : out std_logic_vector (15 DOWNTO 0) := (others => '0'); … … 123 129 124 130 -- FTU configuration data, read out from static RAM (board by board) 125 signal FTU_dac_array_RAM_sig : FTU_dac_array_type := ((others => '0'), (others => '0'), (others => '0'), (others => '0'), (others => '0')); 126 signal FTU_enable_array_RAM_sig : FTU_enable_array_type := ((others => '0'), (others => '0'), (others => '0'), (others => '0')); 127 signal FTU_prescaling_RAM_sig : std_logic_vector(15 downto 0) := (others => '0'); 131 signal FTU_dac_array_RAM_sig : FTU_dac_array_type := ((others => '0'), (others => '0'), (others => '0'), (others => '0'), (others => '0')); 132 signal FTU_dac_array_RAM_sig_2 : FTU_dac_array_type := ((others => '0'), (others => '0'), (others => '0'), (others => '0'), (others => '0')); 133 signal FTU_enable_array_RAM_sig : FTU_enable_array_type := ((others => '0'), (others => '0'), (others => '0'), (others => '0')); 134 signal FTU_enable_array_RAM_sig_2 : FTU_enable_array_type := ((others => '0'), (others => '0'), (others => '0'), (others => '0')); 135 signal FTU_prescaling_RAM_sig : std_logic_vector(15 downto 0) := (others => '0'); 128 136 129 137 -- signals for receiver of FTU communication … … 216 224 signal FTU_cnt : integer range 0 to NO_OF_FTUS_PER_CRATE := 0; 217 225 signal FTU_register_cnt : integer range 0 to (NO_OF_FTU_ENABLE_REG + NO_OF_FTU_DAC_REG + 1) := 0; 226 signal FTU_register_cnt_2 : integer range 0 to (NO_OF_FTU_ENABLE_REG + NO_OF_FTU_DAC_REG) := 0; 218 227 signal FTU_command_cnt : integer range 0 to 3 := 0; 228 signal FTU_command_cnt_2 : integer range 0 to 2 := 0; 219 229 signal frame_cnt : integer range 0 to (FTU_RS485_BLOCK_WIDTH / 8) := 0; 220 230 signal FTU_list_reg_cnt : integer range 0 to NO_OF_FTU_LIST_REG := 0; … … 229 239 signal FTU_cnt_offset_sig : integer range 0 to (NO_OF_DD_RAM_REG * NO_OF_FTUS_PER_CRATE) := 0; 230 240 signal crate_cnt_offset_sig : integer range 0 to (NO_OF_CRATES * NO_OF_FTUS_PER_CRATE * NO_OF_DD_RAM_REG) := 0; 241 242 --Crate and Slot number for config_single_FTU command 243 signal single_FTU_crate_sig : integer range 0 to 7 := 0; 244 signal single_FTU_slot_sig : integer range 0 to 15 := 0; 231 245 232 246 component FTM_ftu_rs485_interface … … 306 320 TRANSMIT_CONFIG_1, TRANSMIT_CONFIG_2, TRANSMIT_CONFIG_3, 307 321 PING_1, PING_2, PING_3, PING_END_1, PING_END_2, PING_END_3, 308 FTU_LIST_1, FTU_LIST_2, FTU_LIST_3); 322 FTU_LIST_1, FTU_LIST_2, FTU_LIST_3, 323 GET_FTU_PAR, READ_CONFIG_SINGLE_FTU, 324 READ_CONFIG_SINGLE_FTU_1, READ_CONFIG_SINGLE_FTU_2, READ_CONFIG_SINGLE_FTU_3, 325 TRANSMIT_CONFIG_SINGLE_FTU_1, TRANSMIT_CONFIG_SINGLE_FTU_2, TRANSMIT_CONFIG_SINGLE_FTU_3, 326 TRANSMIT_CONFIG_SINGLE_FTU, CONFIG_SINGLE_FTU_END); 309 327 signal FTM_ftu_rs485_control_State : FTM_ftu_rs485_control_StateType; 310 328 signal after_error_State : FTM_ftu_rs485_control_StateType; … … 446 464 --read_rates_done <= '0'; 447 465 if (new_config = '1') then 448 new_config_done <= '0'; --466 new_config_done <= '0'; 449 467 new_config_started <= '1'; 450 468 ping_all_started <= '0'; 451 469 read_rates_started <= '0'; 470 config_single_FTU_started <= '0'; 452 471 FTM_ftu_rs485_control_State <= ACTIVE_LIST; 453 472 elsif (new_config = '0' and ping_all = '1') then 454 ping_all_done <= '0'; --473 ping_all_done <= '0'; 455 474 new_config_started <= '0'; 456 475 ping_all_started <= '1'; 457 476 read_rates_started <= '0'; 477 config_single_FTU_started <= '0'; 458 478 rec_reset_sig <= '1'; 459 479 FTM_ftu_rs485_control_State <= PING; 460 480 elsif (new_config = '0' and ping_all = '0' and read_rates = '1') then 461 read_rates_done <= '0'; --481 read_rates_done <= '0'; 462 482 new_config_started <= '0'; 463 483 ping_all_started <= '0'; 464 484 read_rates_started <= '1'; 485 config_single_FTU_started <= '0'; 465 486 FTM_ftu_rs485_control_State <= RATES; 466 else 487 elsif (new_config = '0' and ping_all = '0' and read_rates = '0' and config_single_FTU = '1') then 488 config_single_FTU_done <= '0'; 467 489 new_config_started <= '0'; 468 490 ping_all_started <= '0'; 469 491 read_rates_started <= '0'; 492 config_single_FTU_started <= '1'; 493 FTM_ftu_rs485_control_State <= GET_FTU_PAR; 494 else 495 new_config_started <= '0'; 496 ping_all_started <= '0'; 497 read_rates_started <= '0'; 498 config_single_FTU_started <= '0'; 470 499 FTM_ftu_rs485_control_State <= IDLE; 471 500 end if; … … 477 506 active_FTU_array_sig(3) <= ftu_active_cr3; 478 507 FTM_ftu_rs485_control_State <= READ_CONFIG; 508 509 when GET_FTU_PAR => -- copy FTU parameter (crate and slot) from input 510 single_FTU_crate_sig <= conv_integer(unsigned(config_single_FTU_param( 2 downto 0))); 511 single_FTU_slot_sig <= conv_integer(unsigned(config_single_FTU_param(11 downto 8))); 512 FTM_ftu_rs485_control_State <= READ_CONFIG_SINGLE_FTU; 479 513 480 514 -- when ACTIVE_LIST => -- loop over 4 crates to get active FTU list … … 536 570 end if; 537 571 572 when READ_CONFIG_SINGLE_FTU => -- read configuration of one FTU 573 sel_crate_sig <= conv_std_logic_vector(single_FTU_crate_sig, 3); 574 if (FTU_register_cnt_2 < (NO_OF_FTU_ENABLE_REG + NO_OF_FTU_DAC_REG)) then 575 FTU_register_cnt_2 <= FTU_register_cnt_2 + 1; 576 FTM_ftu_rs485_control_State <= READ_CONFIG_SINGLE_FTU_1; 577 else 578 FTU_register_cnt_2 <= 0; 579 if (active_FTU_array_sig(single_FTU_crate_sig)(single_FTU_slot_sig) = '1') then 580 rec_reset_sig <= '1'; 581 FTM_ftu_rs485_control_State <= TRANSMIT_CONFIG_SINGLE_FTU; 582 else 583 FTM_ftu_rs485_control_State <= CONFIG_SINGLE_FTU_END; 584 end if; 585 end if; 586 538 587 when READ_CONFIG_1 => 539 588 if (static_RAM_busy = '0') then … … 545 594 FTM_ftu_rs485_control_State <= READ_CONFIG_2; 546 595 end if; 547 596 597 when READ_CONFIG_SINGLE_FTU_1 => 598 if (static_RAM_busy = '0') then 599 read_static_RAM <= '1'; 600 addr_static_RAM <= conv_std_logic_vector(STATIC_RAM_CFG_FTU_OFFSET + 601 single_FTU_crate_sig * NO_OF_FTUS_PER_CRATE * (NO_OF_FTU_ENABLE_REG + NO_OF_FTU_DAC_REG + 1) + 602 single_FTU_slot_sig * (NO_OF_FTU_ENABLE_REG + NO_OF_FTU_DAC_REG + 1) + 603 (FTU_register_cnt_2 - 1), STATIC_RAM_ADDR_WIDTH); 604 FTM_ftu_rs485_control_State <= READ_CONFIG_SINGLE_FTU_2; 605 end if; 606 548 607 when READ_CONFIG_2 => 549 608 if (static_RAM_started = '1') then 550 609 FTM_ftu_rs485_control_State <= READ_CONFIG_3; 551 610 end if; 552 611 612 when READ_CONFIG_SINGLE_FTU_2 => 613 if (static_RAM_started = '1') then 614 FTM_ftu_rs485_control_State <= READ_CONFIG_SINGLE_FTU_3; 615 end if; 616 553 617 when READ_CONFIG_3 => 554 618 if (static_RAM_ready = '1') then … … 562 626 read_static_RAM <= '0'; 563 627 FTM_ftu_rs485_control_State <= READ_CONFIG; 628 end if; 629 630 when READ_CONFIG_SINGLE_FTU_3 => 631 if (static_RAM_ready = '1') then 632 if ((FTU_register_cnt_2 - 1) < NO_OF_FTU_ENABLE_REG) then 633 FTU_enable_array_RAM_sig_2(FTU_register_cnt_2 - 1) <= data_static_RAM; 634 elsif ((FTU_register_cnt_2 - 1) < (NO_OF_FTU_ENABLE_REG + NO_OF_FTU_DAC_REG)) then 635 FTU_dac_array_RAM_sig_2((FTU_register_cnt_2 - 1) - NO_OF_FTU_ENABLE_REG) <= data_static_RAM; 636 end if; 637 read_static_RAM <= '0'; 638 FTM_ftu_rs485_control_State <= READ_CONFIG_SINGLE_FTU; 564 639 end if; 565 640 … … 621 696 FTM_ftu_rs485_control_State <= READ_CONFIG; 622 697 end if; 698 699 when TRANSMIT_CONFIG_SINGLE_FTU => -- send configuration to one FTU 700 rec_reset_sig <= '0'; 701 if (FTU_command_cnt_2 = 0) then -- DACs 702 FTU_command_cnt_2 <= FTU_command_cnt_2 + 1; 703 enable_crc_from_FSM_sig <= '1'; 704 crc_data_from_FSM_sig <= "00000000" 705 & "00000000" & "00000000" & "00000000" & "00000000" & "00000000" 706 & "00000000" & "00000000" & "00000000" & "00000000" & "00000000" 707 & "00000000" 708 & FTU_dac_array_RAM_sig_2(4)(15 downto 8) & FTU_dac_array_RAM_sig_2(4)(7 downto 0) 709 & FTU_dac_array_RAM_sig_2(3)(15 downto 8) & FTU_dac_array_RAM_sig_2(3)(7 downto 0) 710 & FTU_dac_array_RAM_sig_2(2)(15 downto 8) & FTU_dac_array_RAM_sig_2(2)(7 downto 0) 711 & FTU_dac_array_RAM_sig_2(1)(15 downto 8) & FTU_dac_array_RAM_sig_2(1)(7 downto 0) 712 & FTU_dac_array_RAM_sig_2(0)(15 downto 8) & FTU_dac_array_RAM_sig_2(0)(7 downto 0) 713 & "00000000" & FIRMWARE_ID & FTM_ADDRESS 714 & "00" & conv_std_logic_vector(single_FTU_slot_sig,4) & conv_std_logic_vector(single_FTU_crate_sig,2) 715 & FTU_RS485_START_DELIM; 716 FTU_brd_add_sig <= conv_std_logic_vector(single_FTU_slot_sig,4) & conv_std_logic_vector(single_FTU_crate_sig,2); 717 FTU_command_sig <= "00000000"; 718 FTM_ftu_rs485_control_State <= TRANSMIT_CONFIG_SINGLE_FTU_1; 719 elsif (FTU_command_cnt_2 = 1) then -- enables 720 FTU_command_cnt_2 <= FTU_command_cnt_2 + 1; 721 enable_crc_from_FSM_sig <= '1'; 722 crc_data_from_FSM_sig <= "00000000" 723 & "00000000" & "00000000" & "00000000" & "00000000" & "00000000" 724 & "00000000" & "00000000" & "00000000" & "00000000" & "00000000" 725 & "00000000" & "00000000" & "00000000" 726 & FTU_enable_array_RAM_sig_2(3)(15 downto 8) & FTU_enable_array_RAM_sig_2(3)(7 downto 0) 727 & FTU_enable_array_RAM_sig_2(2)(15 downto 8) & FTU_enable_array_RAM_sig_2(2)(7 downto 0) 728 & FTU_enable_array_RAM_sig_2(1)(15 downto 8) & FTU_enable_array_RAM_sig_2(1)(7 downto 0) 729 & FTU_enable_array_RAM_sig_2(0)(15 downto 8) & FTU_enable_array_RAM_sig_2(0)(7 downto 0) 730 & "00000011" & FIRMWARE_ID & FTM_ADDRESS 731 & "00" & conv_std_logic_vector(single_FTU_slot_sig,4) & conv_std_logic_vector(single_FTU_crate_sig,2) 732 & FTU_RS485_START_DELIM; 733 FTU_brd_add_sig <= conv_std_logic_vector(single_FTU_slot_sig,4) & conv_std_logic_vector(single_FTU_crate_sig,2); 734 FTU_command_sig <= "00000011"; 735 FTM_ftu_rs485_control_State <= TRANSMIT_CONFIG_SINGLE_FTU_1; 736 else 737 FTU_command_cnt_2 <= 0; 738 enable_crc_from_FSM_sig <= '0'; 739 FTM_ftu_rs485_control_State <= CONFIG_SINGLE_FTU_END; 740 end if; 623 741 624 742 when TRANSMIT_CONFIG_1 => -- wait one cycle for CRC calculation … … 626 744 crc_data_from_FSM_sig_cp <= crc_data_from_FSM_sig; 627 745 FTM_ftu_rs485_control_State <= TRANSMIT_CONFIG_2; 628 746 747 when TRANSMIT_CONFIG_SINGLE_FTU_1 => -- wait one cycle for CRC calculation 748 enable_crc_from_FSM_sig <= '0'; 749 crc_data_from_FSM_sig_cp <= crc_data_from_FSM_sig; 750 FTM_ftu_rs485_control_State <= TRANSMIT_CONFIG_SINGLE_FTU_2; 751 629 752 when TRANSMIT_CONFIG_2 => -- transmit byte by byte 630 753 if (tx_busy_sig = '0') then … … 650 773 FTM_ftu_rs485_control_State <= TRANSMIT_CONFIG_2; 651 774 end if; 775 776 when TRANSMIT_CONFIG_SINGLE_FTU_2 => -- transmit byte by byte 777 if (tx_busy_sig = '0') then 778 if (frame_cnt < 27) then 779 frame_cnt <= frame_cnt + 1; 780 tx_data_sig <= crc_data_from_FSM_sig (7 downto 0); 781 crc_data_from_FSM_sig <= "00000000" & crc_data_from_FSM_sig ((FTU_RS485_BLOCK_WIDTH - 9) downto 8); 782 tx_start_sig <= '1'; 783 FTM_ftu_rs485_control_State <= TRANSMIT_CONFIG_SINGLE_FTU_2; 784 elsif (frame_cnt = 27) then 785 frame_cnt <= frame_cnt + 1; 786 ftu_error_data <= crc_sig & crc_data_from_FSM_sig_cp; 787 tx_data_sig <= crc_sig; 788 tx_start_sig <= '1'; 789 FTM_ftu_rs485_control_State <= TRANSMIT_CONFIG_SINGLE_FTU_2; 790 else 791 frame_cnt <= 0; 792 reset_crc_from_FSM_sig <= '1'; 793 FTM_ftu_rs485_control_State <= TRANSMIT_CONFIG_SINGLE_FTU_3; 794 end if; 795 else 796 tx_start_sig <= '0'; 797 FTM_ftu_rs485_control_State <= TRANSMIT_CONFIG_SINGLE_FTU_2; 798 end if; 652 799 653 800 when TRANSMIT_CONFIG_3 => -- wait for FTU answer … … 687 834 end if; 688 835 836 when TRANSMIT_CONFIG_SINGLE_FTU_3 => -- wait for FTU answer 837 reset_crc_from_FSM_sig <= '0'; 838 if (FTU_answer_ok_sig = '1') then 839 timeout_cnt <= 0; 840 retry_cnt <= 0; 841 sel_crc_input_source_sig <= '0'; 842 if (retry_cnt = 0) then -- no errors 843 FTM_ftu_rs485_control_State <= TRANSMIT_CONFIG_SINGLE_FTU; 844 else -- send error message and move to next command; 845 ftu_error_calls <= conv_std_logic_vector((retry_cnt + 1), 16); 846 after_error_State <= TRANSMIT_CONFIG_SINGLE_FTU; 847 FTM_ftu_rs485_control_State <= SEND_ERROR_1; 848 end if; 849 else 850 if (timeout_cnt < FTU_RS485_TIMEOUT) then 851 timeout_cnt <= timeout_cnt + 1; 852 sel_crc_input_source_sig <= '1'; 853 FTM_ftu_rs485_control_State <= TRANSMIT_CONFIG_SINGLE_FTU_3; 854 else 855 timeout_cnt <= 0; 856 sel_crc_input_source_sig <= '0'; 857 rec_reset_sig <= '1'; 858 if (retry_cnt < FTU_RS485_NO_OF_RETRY) then 859 retry_cnt <= retry_cnt + 1; 860 FTU_command_cnt_2 <= FTU_command_cnt_2 - 1; -- try this command again 861 FTM_ftu_rs485_control_State <= TRANSMIT_CONFIG_SINGLE_FTU; 862 else 863 retry_cnt <= 0; 864 FTU_command_cnt_2 <= FTU_command_cnt_2; -- send error message and move to next command 865 ftu_error_calls <= (others => '0'); 866 after_error_State <= TRANSMIT_CONFIG_SINGLE_FTU; 867 FTM_ftu_rs485_control_State <= SEND_ERROR_1; 868 end if; 869 end if; 870 end if; 871 689 872 when SEND_ERROR_1 => -- send an error message 690 873 ftu_error_send <= '1'; … … 698 881 FTM_ftu_rs485_control_State <= after_error_state; 699 882 end if; 883 884 when CONFIG_SINGLE_FTU_END => 885 config_single_FTU_started <= '0'; 886 config_single_FTU_done <= '1'; 887 sel_crate_sig <= "111"; 888 FTM_ftu_rs485_control_State <= IDLE; 700 889 701 890 when PING => -- ping all FTUs
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