Index: firmware/FTM/FTM_central_control.vhd =================================================================== --- firmware/FTM/FTM_central_control.vhd (revision 11653) +++ firmware/FTM/FTM_central_control.vhd (revision 11654) @@ -65,4 +65,5 @@ config_started_cc : in std_logic; config_ready_cc : in std_logic; + cc_locked : in std_logic; config_start_lp : out std_logic := '0'; config_started_lp : in std_logic; @@ -277,5 +278,9 @@ when CP_IDLE => - current_cc_state <= FTM_STATE_IDLE; + if (cc_locked = '1') then + current_cc_state <= FTM_STATE_IDLE; + else + current_cc_state <= FTM_STATE_IDLE_NOT_LOCKED; + end if; reset_timer <= '0'; cc_state_test <= X"0D"; @@ -319,5 +324,9 @@ when CP_RUNNING => reset_timer <= '0'; - current_cc_state <= FTM_STATE_RUN; + if (cc_locked = '1') then + current_cc_state <= FTM_STATE_RUN; + else + current_cc_state <= FTM_STATE_RUN_NOT_LOCKED; + end if; cc_state_test <= X"0E"; if (start_run = '0') then @@ -328,5 +337,9 @@ when CP_RUNNING_01 => - current_cc_state <= FTM_STATE_RUN; + if (cc_locked = '1') then + current_cc_state <= FTM_STATE_RUN; + else + current_cc_state <= FTM_STATE_RUN_NOT_LOCKED; + end if; cc_state_test <= X"0F"; start_run_ack <= '1'; @@ -367,5 +380,9 @@ when CP_RUNNING_02 => - current_cc_state <= FTM_STATE_RUN; + if (cc_locked = '1') then + current_cc_state <= FTM_STATE_RUN; + else + current_cc_state <= FTM_STATE_RUN_NOT_LOCKED; + end if; cc_state_test <= X"10"; if (stop_run = '0') then Index: firmware/FTM/FTM_top.vhd =================================================================== --- firmware/FTM/FTM_top.vhd (revision 11653) +++ firmware/FTM/FTM_top.vhd (revision 11654) @@ -350,4 +350,5 @@ signal config_started_cc_sig : std_logic := '0'; signal config_ready_cc_sig : std_logic := '0'; + signal cc_locked_sig : std_logic := '0'; signal config_start_lp_sig : std_logic; -- initialized in central control @@ -517,23 +518,24 @@ component Clock_cond_interface is port( - clk : IN STD_LOGIC; - CLK_Clk_Cond : out STD_LOGIC; - LE_Clk_Cond : out STD_LOGIC; - DATA_Clk_Cond : out STD_LOGIC; - SYNC_Clk_Cond : out STD_LOGIC; - LD_Clk_Cond : in STD_LOGIC; - TIM_Sel : out STD_LOGIC; - cc_R0 : in std_logic_vector (31 downto 0) := (others => '0'); - cc_R1 : in std_logic_vector (31 downto 0) := (others => '0'); - cc_R8 : in std_logic_vector (31 downto 0) := (others => '0'); - cc_R9 : in std_logic_vector (31 downto 0) := (others => '0'); - cc_R11 : in std_logic_vector (31 downto 0) := (others => '0'); - cc_R13 : in std_logic_vector (31 downto 0) := (others => '0'); - cc_R14 : in std_logic_vector (31 downto 0) := (others => '0'); - cc_R15 : in std_logic_vector (31 downto 0) := (others => '0'); - start_config : in STD_LOGIC; - config_started : out STD_LOGIC; - config_done : out STD_LOGIC; - timemarker_select: in STD_LOGIC + clk : IN STD_LOGIC; + CLK_Clk_Cond : out STD_LOGIC; + LE_Clk_Cond : out STD_LOGIC; + DATA_Clk_Cond : out STD_LOGIC; + SYNC_Clk_Cond : out STD_LOGIC; + LD_Clk_Cond : in STD_LOGIC; + TIM_Sel : out STD_LOGIC; + cc_R0 : in std_logic_vector (31 downto 0) := (others => '0'); + cc_R1 : in std_logic_vector (31 downto 0) := (others => '0'); + cc_R8 : in std_logic_vector (31 downto 0) := (others => '0'); + cc_R9 : in std_logic_vector (31 downto 0) := (others => '0'); + cc_R11 : in std_logic_vector (31 downto 0) := (others => '0'); + cc_R13 : in std_logic_vector (31 downto 0) := (others => '0'); + cc_R14 : in std_logic_vector (31 downto 0) := (others => '0'); + cc_R15 : in std_logic_vector (31 downto 0) := (others => '0'); + start_config : in STD_LOGIC; + config_started : out STD_LOGIC; + config_done : out STD_LOGIC; + locked : out STD_LOGIC; + timemarker_select : in STD_LOGIC ); end component; @@ -572,4 +574,5 @@ config_started_cc : in std_logic; config_ready_cc : in std_logic; + cc_locked : in std_logic; config_start_lp : out std_logic := '0'; config_started_lp : in std_logic; @@ -973,22 +976,23 @@ Inst_Clock_cond_interface : Clock_cond_interface port map( - clk => clk_50M_sig, - CLK_Clk_Cond => CLK_Clk_Cond, - LE_Clk_Cond => LE_Clk_Cond, - DATA_Clk_Cond => DATA_Clk_Cond, - SYNC_Clk_Cond => SYNC_Clk_Cond, - LD_Clk_Cond => LD_Clk_Cond, - TIM_Sel => TIM_Sel, - cc_R0 => cc_R0_sig, - cc_R1 => cc_R1_sig, - cc_R8 => cc_R8_sig, - cc_R9 => cc_R9_sig, - cc_R11 => cc_R11_sig, - cc_R13 => cc_R13_sig, - cc_R14 => cc_R14_sig, - cc_R15 => cc_R15_sig, + clk => clk_50M_sig, + CLK_Clk_Cond => CLK_Clk_Cond, + LE_Clk_Cond => LE_Clk_Cond, + DATA_Clk_Cond => DATA_Clk_Cond, + SYNC_Clk_Cond => SYNC_Clk_Cond, + LD_Clk_Cond => LD_Clk_Cond, + TIM_Sel => TIM_Sel, + cc_R0 => cc_R0_sig, + cc_R1 => cc_R1_sig, + cc_R8 => cc_R8_sig, + cc_R9 => cc_R9_sig, + cc_R11 => cc_R11_sig, + cc_R13 => cc_R13_sig, + cc_R14 => cc_R14_sig, + cc_R15 => cc_R15_sig, start_config => config_start_cc_sig, config_started => config_started_cc_sig, config_done => config_ready_cc_sig, + locked => cc_locked_sig, timemarker_select => general_settings_sig(0) ); @@ -1027,4 +1031,5 @@ config_started_cc => config_started_cc_sig, config_ready_cc => config_ready_cc_sig, + cc_locked => cc_locked_sig, config_start_lp => config_start_lp_sig, config_started_lp => config_started_lp_sig, Index: firmware/FTM/ftm_definitions.vhd =================================================================== --- firmware/FTM/ftm_definitions.vhd (revision 11653) +++ firmware/FTM/ftm_definitions.vhd (revision 11654) @@ -64,6 +64,4 @@ -- changeover to firmware v3 -- --- - -- pv 25.07.: new constants for lightpulser firmware -- new clock conditioner interface: data only sent during configuration, @@ -71,5 +69,6 @@ -- changeover to firmware v4 -- --- +-- qw 27.07.: two new status states introduced to indicate the lock state of the +-- clock conditioner -> changeover to firmware v5 ---------------------------------------------------------------------------------- @@ -135,5 +134,5 @@ --FTM address and firmware ID constant FTM_ADDRESS : std_logic_vector(7 downto 0) := "11000000"; -- 192 - constant FIRMWARE_ID : std_logic_vector(7 downto 0) := "00000100"; -- firmware version + constant FIRMWARE_ID : std_logic_vector(7 downto 0) := "00000101"; -- firmware version --communication with FTUs @@ -282,4 +281,6 @@ constant FTM_STATE_RUN : std_logic_vector := X"0003"; --constant FTM_STATE_CALIB : std_logic_vector := X"0004"; + constant FTM_STATE_IDLE_NOT_LOCKED : std_logic_vector := X"2711"; + constant FTM_STATE_RUN_NOT_LOCKED : std_logic_vector := X"2713"; -- header length of data packages