Changeset 11667 for firmware/FSC
- Timestamp:
- 07/27/11 18:57:59 (13 years ago)
- Location:
- firmware/FSC/src
- Files:
-
- 6 edited
Legend:
- Unmodified
- Added
- Removed
-
firmware/FSC/src/FSC_eth_with_user_interface.c
r10911 r11667 46 46 U16 eth_red_bytes; 47 47 48 U08 rc; 49 48 50 app_init(); // Setup: Watchdog and I/Os 49 51 usart_init(); … … 62 64 63 65 for ( U08 i=0; i < (RESISTANCE_CHANNELS/8); ++i ) { 64 ad7719_enables[i]=0x 00;66 ad7719_enables[i]=0xFF; 65 67 ad7719_channels_ready[i]=0; 66 68 } … … 90 92 91 93 // checks if socket is okay and resets in case of problem the W5100 92 if (w5100_caretaker()) 94 rc=w5100_caretaker(); 95 if ( rc != 0x17 && rc != 0x14) 93 96 { 97 usart_write_str((pU08)"caretaker! error code:"); 98 usart_write_U08_hex(rc); 99 usart_write_crlf(); 94 100 // something is not okay with the ethernet ... 95 101 // will be reset in the next revolution.. but maybe we want to do more... … … 99 105 if ( (milisec % W5100_INPUT_CHECK_TIME == 0) && (w5100_ready) ) 100 106 { 101 eth_red_bytes = get_S0_RX_RSR(); 102 if (eth_red_bytes != 0) { // we have something to read 107 if ( (eth_red_bytes = get_S0_RX_RSR()) != 0) { 108 for (U08 rep=0; rep<1; ) { 109 if (eth_red_bytes == get_S0_RX_RSR() ) 110 rep++; 111 else 112 eth_red_bytes =get_S0_RX_RSR(); 113 } 103 114 usart_write_str((pU08)"ethgot:"); 104 115 usart_write_U16(eth_red_bytes, 7); … … 106 117 parse_w5300_incoming( w5100_get_RX(ETH_READ_BUFFER_SIZE, true) ); 107 118 } 119 108 120 } 109 121 … … 116 128 usart_write_U32(sec ,8); 117 129 print_adc_nicely(false,true); 130 write_status_via_eth(); 118 131 //print_adc_stupid(); 119 132 reset_voltage_done(); 120 133 reset_voltage_values(); 121 telegram_start();122 w5100_set_TX((U08*) adc_values, ADC_VALUES_LEN_BYTE);134 //telegram_start(); 135 //w5100_set_TX((U08*) adc_values, ADC_VALUES_LEN_BYTE); 123 136 124 137 reset_voltage_done(); … … 127 140 adc_values_printed = true; 128 141 print_adc_nicely(true,true); 142 write_status_via_eth(); 129 143 //print_adc_stupid(); 130 144 //reset_voltage_done(); 131 telegram_start();132 w5100_set_TX((U08*) adc_values, ADC_VALUES_LEN_BYTE);145 //telegram_start(); 146 //w5100_set_TX((U08*) adc_values, ADC_VALUES_LEN_BYTE); 133 147 134 148 } … … 138 152 139 153 if(ad7719_print_endless){ 140 usart_write_str((pU08)"R|");141 usart_write_U32(sec ,8);142 print_ad7719_nicely(false,true);154 155 print_ad7719_nicely(); 156 write_status_via_eth(); 143 157 reset_resistance_done(); 144 telegram_start(); 145 w5100_set_TX((U08*) ad7719_values, AD7719_VALUES_LEN_BYTE); 158 reset_voltage_done(); 159 160 //telegram_start(); 161 //w5100_set_TX((U08*) ad7719_values, AD7719_VALUES_LEN_BYTE); 146 162 147 163 } else … … 149 165 ad7719_values_printed = true; 150 166 print_ad7719_nicely(true,true); 167 write_status_via_eth(); 151 168 reset_resistance_done(); 152 telegram_start();153 w5100_set_TX((U08*) ad7719_values, AD7719_VALUES_LEN_BYTE);169 //telegram_start(); 170 //w5100_set_TX((U08*) ad7719_values, AD7719_VALUES_LEN_BYTE); 154 171 155 172 } -
firmware/FSC/src/parser.c
r10911 r11667 4 4 #include "usart.h" 5 5 #include "w5100_spi_interface.h" 6 #include "timer.h" 6 7 // this method parses the data, 7 8 // which came in via USART … … 350 351 case 'm': // *m*easure active channels commands 351 352 reset_done(); 353 ad7719_print_endless = true; 354 352 355 simple_acknowledge(); 353 356 break; … … 420 423 421 424 void write_status_via_eth() { 425 float resistance; 426 422 427 // take care: ethernet write buffer is just 32 bytes long. 423 428 eth_write_str("status: "); eth_writeln_str(nc_U32_to_hex(status)); … … 425 430 // otherwise the numbers in time_sec and time_ms might get corrupt during output. 426 431 cli(); 427 eth_write_str("time_s: "); eth_writeln_str(nc_U32_to_str(time_sec, 10)); 428 eth_write_str("mili_s: "); eth_writeln_str(nc_U16_to_str(time_ms, 6)); 432 eth_write_str("time_s: "); eth_write_str(nc_U32_to_str(sec, 1)); 433 eth_write_str(".");eth_writeln_str(nc_U16_to_str(milisec, 1)); 434 //eth_write_str("mili_s: "); eth_writeln_str(nc_U16_to_str(milisec, 1)); 429 435 sei(); 430 436 431 eth_write_str("R_ref : "); eth_writeln_str(nc_U16_to_str(ref_resistor, 6));437 //eth_write_str("R_ref : "); eth_writeln_str(nc_U16_to_str(ref_resistor, 6)); 432 438 433 439 eth_writeln_str("VOLTAGES\n"); 434 440 eth_write_str("enable:"); 435 for (U08 i=0; i< 4; i++){441 for (U08 i=0; i<VOLTAGE_REGS ; i++){ 436 442 eth_write_str(nc_U08_to_bin(adc_enables[i])); 437 443 // need to tweak here in order to get some nice spaces... … … 439 445 eth_write_index++; 440 446 } 441 eth_write ln_str(nc_U08_to_bin(adc_enables[4]));447 eth_write_buffer[eth_write_index++] = '\n'; 442 448 443 449 eth_write_str(" done:"); 444 for (U08 i=0; i< 4; i++){450 for (U08 i=0; i<VOLTAGE_REGS ; i++){ 445 451 eth_write_str(nc_U08_to_bin(adc_channels_ready[i])); 446 452 // need to tweak here in order to get some nice spaces... … … 448 454 eth_write_index++; 449 455 } 450 eth_write ln_str(nc_U08_to_bin(adc_channels_ready[4]));451 456 eth_write_buffer[eth_write_index++] = '\n'; 457 452 458 eth_write_str("values:"); 453 for (U08 i=0; i< 73; i++){454 eth_write_str(nc_U16_to_str(adc_values[i] , 6) );459 for (U08 i=0; i<VOLTAGE_CHANNELS ; i++){ 460 eth_write_str(nc_U16_to_str(adc_values[i]/10, 1) ); 455 461 // need to tweak here in order to get some nice spaces... 456 462 eth_write_buffer[eth_write_index] = ' '; 457 463 eth_write_index++; 458 464 } 459 eth_write ln_str(nc_U16_to_str(adc_values[73], 6) );465 eth_write_buffer[eth_write_index++] = '\n'; 460 466 461 467 eth_writeln_str("RESISTANCES\n"); 462 468 eth_write_str("enable:"); 463 for (U08 i=0; i< 7; i++){469 for (U08 i=0; i<(RESISTANCE_CHANNELS/8) ; i++){ 464 470 eth_write_str(nc_U08_to_bin(ad7719_enables[i])); 465 471 // need to tweak here in order to get some nice spaces... … … 467 473 eth_write_index++; 468 474 } 469 eth_write ln_str(nc_U08_to_bin(ad7719_enables[7]));475 eth_write_buffer[eth_write_index++] = '\n'; 470 476 471 477 eth_write_str(" done:"); 472 for (U08 i=0; i< 7; i++){478 for (U08 i=0; i<(RESISTANCE_CHANNELS/8) ; i++){ 473 479 eth_write_str(nc_U08_to_bin(ad7719_channels_ready[i])); 474 480 // need to tweak here in order to get some nice spaces... … … 476 482 eth_write_index++; 477 483 } 478 eth_writeln_str(nc_U08_to_bin(ad7719_channels_ready[7])); 479 480 eth_write_str("values:"); 481 for (U08 i=0; i<63 ; i++){ 482 eth_write_str(nc_U32_to_str(ad7719_values[i], 10) ); 484 eth_write_buffer[eth_write_index++] = '\n'; 485 486 eth_write_str("values:\n"); 487 for (U08 i=0; i<RESISTANCE_CHANNELS ; i++){ 488 //eth_write_str(nc_U32_to_str(ad7719_values[i], 10) ); 489 490 resistance = (6.25 * 1024 * ad7719_values[i]) / ((U32)1 << 25); 491 eth_write_str(nc_float_to_str(resistance , 2, 2) ); 483 492 // need to tweak here in order to get some nice spaces... 484 eth_write_buffer[eth_write_index] = ' '; 493 if (i%8 == 7) 494 eth_write_buffer[eth_write_index] = '\n'; 495 else 496 eth_write_buffer[eth_write_index] = ' '; 497 485 498 eth_write_index++; 486 499 } 487 eth_writeln_str( nc_U32_to_str(ad7719_values[63], 10));500 eth_writeln_str("\nend.\n"); 488 501 489 502 … … 491 504 492 505 void eth_write_stuff(void) { 493 S08 buf []="Test Ah Alarm!!\n"; 494 for (U08 i =0 ; i<7 ; i++) { 495 eth_write_str(buf); 496 } 497 } 506 S08 buf []="Test Ah A!!\n"; 507 for (U08 i =0 ; i<255 ; i++) { 508 eth_write_str(nc_U08_to_str(i,4)); 509 eth_write_str(buf); 510 } 511 } -
firmware/FSC/src/parser.h
r10910 r11667 24 24 // I hope this is convenient. 25 25 void write_status_via_eth(); 26 void eth_write_stuff(void); 26 27 #endif -
firmware/FSC/src/spi_master.c
r10697 r11667 16 16 17 17 void spi_setup_w5100() { 18 spi_clock_index = 4; // 1Mbps 19 // this is reasonable for W5100 because of slow level shifters on the FSC. 20 // in case the slow level shifters, are improved. this value may go up to 6! 21 18 spi_clock_index = 1; // 22 19 spi_dord = 0; // Data Order MSB first dord = 0 --> good for all devices 23 20 spi_cpol = 0; spi_cpha = 0; // SPI mode=0 good for ethernet. -
firmware/FSC/src/w5100_spi_interface.c
r10911 r11667 12 12 // INTERFACE CONTROL VARS 13 13 14 bool w5100_needs_reset = true;15 14 bool w5100_needs_init = true; 16 15 bool w5100_ready = false; 17 16 17 U16 last_samurai = 0x0000; 18 18 19 U08 w5100_caretaker() { 19 20 U08 socket_status; 20 if (w5100_needs_reset) 21 w5100_reset(); 22 21 23 22 socket_status = w5100_sock_status(); 23 //usart_write_str((pU08)"ss:"); 24 //usart_write_U08_hex(socket_status); 25 //usart_write_char(' '); 24 26 25 27 if (socket_status == SR_SOCK_ESTABLISHED) { 26 28 w5100_ready = true; 27 28 29 // everything is fine... 29 return 0; 30 } 31 else if(socket_status < SR_SOCK_ESTABLISHED) { 32 // it might be LISTENING ... or not even OPEN 33 if (socket_status == SR_SOCK_CLOSED) { 30 } 31 else if (socket_status == SR_SOCK_LISTEN) { 32 w5100_ready = false; 33 // wait for connection 34 } 35 else { 36 socket_status = w5100_sock_status(); 37 //usart_write_str((pU08)"ss2:"); 38 //usart_write_U08_hex(socket_status); 39 //usart_write_char(' '); 40 41 if (socket_status == SR_SOCK_ESTABLISHED) { 42 w5100_ready = true; 43 // everything is fine... 44 } 45 else if (socket_status == SR_SOCK_LISTEN) { 46 w5100_ready = false; 47 // wait for connection 48 } 49 else 50 { 51 // this should never happen 52 w5100_ready = false; 53 w5100_reset(); 34 54 w5100_init(); 35 55 } 36 if (socket_status == SR_SOCK_INIT) { 37 w5100_init(); 38 } 39 if (socket_status == SR_SOCK_LISTEN) { 40 41 } 42 } 43 else { // all other socket states need a reset 44 w5100_needs_reset = true; 45 } 46 w5100_ready = false; 47 return 1; 56 } 57 58 //usart_write_crlf(); 59 return socket_status; 48 60 } 49 61 … … 54 66 PORTB |= 1<<PB2; //#reset = HIGH --> W5100 is active 55 67 _delay_ms(5); // give it 5ms to accomodate. 56 w5100_needs_reset = false;57 68 } 58 69 … … 165 176 { 166 177 U16 freesize; 167 freesize=w5100_read(S0_TX_FSR0); 168 freesize = freesize << 8; 178 freesize=w5100_read(S0_TX_FSR0); // datasheet: user should read upper byte first, and lower byte later 179 freesize = freesize << 8; // to get correct value 169 180 freesize += w5100_read(S0_TX_FSR1); 170 181 return freesize; … … 195 206 { 196 207 U16 received_size; 197 received_size=w5100_read(S0_RX_RSR0); 198 received_size = received_size << 8; 199 received_size += w5100_read(S0_RX_RSR1); // S0_RX_RSR1 is the least significant byte ... 200 return received_size; 208 U08 highbyte, lowbyte; 209 highbyte = w5100_read(S0_RX_RSR0); 210 lowbyte = w5100_read(S0_RX_RSR1); 211 received_size = (highbyte<<8) | lowbyte; 212 213 // usart_write_str((pU08)"hi:"); 214 // usart_write_U08_hex(highbyte); 215 // usart_write_crlf(); 216 // 217 // usart_write_str((pU08)"lo:"); 218 // usart_write_U08_hex(lowbyte); 219 // usart_write_crlf(); 220 // 221 // usart_write_str((pU08)"total:"); 222 // usart_write_U16_hex(received_size); 223 // usart_write_crlf(); 224 225 // _delay_ms(200); 226 227 return received_size; 201 228 } 202 229 … … 205 232 { 206 233 U16 readpointer; 207 readpointer=w5100_read(S0_RX_RD0); 234 readpointer=w5100_read(S0_RX_RD0); 208 235 readpointer = readpointer << 8; 209 236 readpointer += w5100_read(S0_RX_RD1); … … 217 244 U08 high_byte = (value>>8); 218 245 U08 low_byte = value&0x00FF; 246 w5100_write(S0_TX_WR0, high_byte); 219 247 w5100_write(S0_TX_WR1, low_byte); 220 w5100_write(S0_TX_WR0, high_byte);221 222 248 } 223 249 … … 227 253 U08 high_byte = (value>>8); 228 254 U08 low_byte = value&0x00FF; 229 230 255 w5100_write(S0_RX_RD0, high_byte); 231 256 w5100_write(S0_RX_RD1, low_byte); … … 255 280 U16 start_address = S0_RX_BASE + offset; 256 281 282 usart_write_str((pU08)"lrp:"); 283 usart_write_U16_hex(last_RX_read_pointer); 284 usart_write_crlf(); 285 usart_write_str((pU08)"off:"); 286 usart_write_U16_hex(offset); 287 usart_write_crlf(); 288 usart_write_str((pU08)"sad:"); 289 usart_write_U16_hex(start_address); 290 usart_write_crlf(); 291 292 257 293 if ((offset + NumBytes) > (S0_RX_MASK + 1) ) // if data is turned over in RX-mem 258 294 { … … 277 313 278 314 // inform W5100 about how much data was read out. 279 set_S0_RX_RD(last_RX_read_pointer + NumBytes); 315 U16 new_read_pointer = last_RX_read_pointer + NumBytes; 316 usart_write_str((pU08)"nrp:"); 317 usart_write_U16_hex(new_read_pointer); 318 usart_write_crlf(); 319 320 set_S0_RX_RD(new_read_pointer); 280 321 w5100_write ( S0_CR, CR_RECV ); 281 322 … … 305 346 U16 w5100_set_TX(U08* string, U16 NumBytes) { 306 347 307 U16 freesize = get_S0_TX_FSR(); 348 U08 repetitions; 349 U16 freesize; 350 U16 last_TX_write_pointer; 351 352 //usart_write_str((pU08)"S0_IR:"); 353 //usart_write_U08_hex( w5100_read(S0_IR) ); 354 //usart_write_crlf(); 355 356 freesize = get_S0_TX_FSR(); 357 for (repetitions=0 ; repetitions < 3; ) // increase is *inside the loop* 358 { 359 if ( freesize != get_S0_TX_FSR()) { 360 freesize = get_S0_TX_FSR(); 361 } else { 362 repetitions++; 363 } 364 } 365 308 366 if (freesize == 0) 309 367 { … … 311 369 } 312 370 313 U16 last_TX_write_pointer = get_S0_TX_WR(); 371 last_TX_write_pointer = get_S0_TX_WR(); 372 for (repetitions=0 ; repetitions < 3; ) // increase is *inside the loop* 373 { 374 if ( last_TX_write_pointer != get_S0_TX_WR()) { 375 last_TX_write_pointer = get_S0_TX_WR(); 376 } else { 377 repetitions++; 378 } 379 } 380 314 381 U16 offset = last_TX_write_pointer & S0_TX_MASK; 315 382 U16 start_address = S0_TX_BASE + offset; 316 383 317 usart_write_crlf(); 318 usart_write_crlf(); 319 usart_write_str((pU08)"lwp :"); 320 usart_write_U16_hex(last_TX_write_pointer); 321 usart_write_crlf(); 322 323 usart_write_str((pU08)"off :"); 324 usart_write_U16_hex(offset); 325 usart_write_crlf(); 326 327 usart_write_str((pU08)"stad:"); 328 usart_write_U16_hex(start_address); 329 usart_write_crlf(); 384 if (last_samurai != last_TX_write_pointer) 385 usart_write_str((pU08)"Hilfeeeeeeeeeeeeeee\n"); 386 387 //usart_write_crlf(); 388 //usart_write_char('|');usart_write_U16_hex( last_TX_write_pointer ); 389 //usart_write_char('|');usart_write_U16_hex( offset ); 390 //usart_write_char('|');usart_write_U16_hex( start_address ); 391 392 393 //usart_write_crlf(); 394 //usart_write_crlf(); 395 //usart_write_str((pU08)"lwp :"); 396 //usart_write_U16_hex(last_TX_write_pointer); 397 //usart_write_crlf(); 398 // 399 //usart_write_str((pU08)"off :"); 400 //usart_write_U16_hex(offset); 401 //usart_write_crlf(); 402 // 403 //usart_write_str((pU08)"stad:"); 404 //usart_write_U16_hex(start_address); 405 //usart_write_crlf(); 330 406 331 407 … … 345 421 NumBytes = freesize; 346 422 } 347 423 //usart_write_char('|');usart_write_U16_hex( NumBytes ); 424 348 425 // now calculate the offset address 349 426 // calculated according to W5100 datasheet page: 44 350 351 427 if ((offset + NumBytes) > (S0_RX_MASK + 1) ) // if data is turned over in RX-mem 352 428 { … … 356 432 { 357 433 w5100_write(start_address + i, string[i]); 358 usart_write_str((pU08)"wr:");359 usart_write_U16_hex(start_address + i);360 usart_write_char(' ');361 usart_write_char(string[i]);362 usart_write_crlf();434 //usart_write_str((pU08)"wr:"); 435 //usart_write_U16_hex(start_address + i); 436 //usart_write_char(' '); 437 //usart_write_char(string[i]); 438 //usart_write_crlf(); 363 439 364 440 } … … 366 442 { 367 443 w5100_write(S0_RX_BASE + i, string[upper_size+i]); 368 usart_write_str((pU08)"wr:");369 usart_write_U16_hex(S0_RX_BASE + i);370 usart_write_char(' ');371 usart_write_char(string[upper_size+i]);372 usart_write_crlf();444 //usart_write_str((pU08)"wr:"); 445 //usart_write_U16_hex(S0_RX_BASE + i); 446 //usart_write_char(' '); 447 //usart_write_char(string[upper_size+i]); 448 //usart_write_crlf(); 373 449 374 450 } … … 379 455 { 380 456 w5100_write(start_address + i, string[i]); 381 usart_write_str((pU08)"wr:");382 usart_write_U16_hex(start_address + i);383 usart_write_char(' ');384 usart_write_char(string[i]);385 usart_write_crlf();457 //usart_write_str((pU08)"wr:"); 458 //usart_write_U16_hex(start_address + i); 459 //usart_write_char(' '); 460 //usart_write_char(string[i]); 461 //usart_write_crlf(); 386 462 387 463 } … … 389 465 390 466 // inform W5100 about how much data was written. 391 set_S0_TX_WR(last_TX_write_pointer + NumBytes); 392 usart_write_str((pU08)"wrpt:"); 393 usart_write_U16_hex(last_TX_write_pointer + NumBytes); 394 usart_write_crlf(); 467 U16 new_write_pointer = last_TX_write_pointer + NumBytes; 468 last_samurai = new_write_pointer; 469 470 471 set_S0_TX_WR(new_write_pointer); 472 //usart_write_char('|');usart_write_U16_hex( new_write_pointer ); 473 474 //usart_write_char('|'); 475 //usart_write_crlf(); 476 477 478 //usart_write_str((pU08)"wrpt:"); 479 //usart_write_U16_hex(last_TX_write_pointer + NumBytes); 480 //usart_write_crlf(); 395 481 396 482 // tell it to send now the data away 397 483 w5100_write( S0_CR, CR_SEND); 484 485 398 486 399 487 return NumBytes; … … 427 515 } 428 516 517 void eth_write_lf(void) { 518 if (eth_write_index < ETH_WRITE_BUFFER_SIZE) { 519 eth_write_buffer[eth_write_index++] = '\n'; 520 } 521 w5100_set_TX(eth_write_buffer, eth_write_index); 522 eth_write_index = 0; 523 } -
firmware/FSC/src/w5100_spi_interface.h
r10910 r11667 144 144 // NETWORK SETTING: 145 145 // set GAR to FSC_GATEWAY_ADDRESS 146 //#define FSC_GATEWAY_ADDRESS0 0xC0 // 192.33.96.1 147 //#define FSC_GATEWAY_ADDRESS1 0x21 148 //#define FSC_GATEWAY_ADDRESS2 0x60 149 //#define FSC_GATEWAY_ADDRESS3 0x01 150 151 #define FSC_GATEWAY_ADDRESS0 0xC0 // 192.168.0.1 152 #define FSC_GATEWAY_ADDRESS1 0x21 153 #define FSC_GATEWAY_ADDRESS2 0x60 154 #define FSC_GATEWAY_ADDRESS3 0x01 146 //#define FSC_GATEWAY_ADDRESS0 192 // 192.33.96.1 147 //#define FSC_GATEWAY_ADDRESS1 33 148 //#define FSC_GATEWAY_ADDRESS2 96 149 //#define FSC_GATEWAY_ADDRESS3 1 150 151 #define FSC_GATEWAY_ADDRESS0 10 152 #define FSC_GATEWAY_ADDRESS1 0 153 #define FSC_GATEWAY_ADDRESS2 0 154 #define FSC_GATEWAY_ADDRESS3 0 155 156 157 //#define FSC_GATEWAY_ADDRESS0 192 // 192.168.0.1 158 //#define FSC_GATEWAY_ADDRESS1 168 159 //#define FSC_GATEWAY_ADDRESS2 0 160 //#define FSC_GATEWAY_ADDRESS3 1 155 161 156 162 … … 162 168 #define FSC_MAC_ADDRESS4 0x22 163 169 #define FSC_MAC_ADDRESS5 0x01 170 164 171 // set SUBR to FSC_SUBNET_MASK 165 #define FSC_SUBNET_MASK0 255 //255.255.2 48.0172 #define FSC_SUBNET_MASK0 255 //255.255.255.0 166 173 #define FSC_SUBNET_MASK1 255 167 174 #define FSC_SUBNET_MASK2 255 168 175 #define FSC_SUBNET_MASK3 0 169 176 // set SIPR to FSC_IP_ADDRESS 170 //#define FSC_IP_ADDRESS0 0xC0 // 192.33.99.247 171 //#define FSC_IP_ADDRESS1 0x21 172 //#define FSC_IP_ADDRESS2 0x63 173 //#define FSC_IP_ADDRESS3 0xF7 174 #define FSC_IP_ADDRESS0 192 // 192.168.0.2 175 #define FSC_IP_ADDRESS1 168 176 #define FSC_IP_ADDRESS2 0 177 #define FSC_IP_ADDRESS3 2 177 178 //#define FSC_IP_ADDRESS0 192 // 192.33.99.247 179 //#define FSC_IP_ADDRESS1 33 180 //#define FSC_IP_ADDRESS2 99 181 //#define FSC_IP_ADDRESS3 247 182 183 #define FSC_IP_ADDRESS0 10 184 #define FSC_IP_ADDRESS1 0 185 #define FSC_IP_ADDRESS2 128 186 #define FSC_IP_ADDRESS3 127 187 188 189 //#define FSC_IP_ADDRESS0 192 // 192.168.0.2 190 //#define FSC_IP_ADDRESS1 168 191 //#define FSC_IP_ADDRESS2 0 192 //#define FSC_IP_ADDRESS3 2 193 194 178 195 //------------------------------------------------------------------------------ 179 196 // MEM SETTINGS: … … 218 235 U16 w5100_set_TX(U08* string, U16 NumBytes); 219 236 220 extern bool w5100_needs_reset;221 237 extern bool w5100_needs_init; 222 238 extern bool w5100_ready; … … 230 246 void eth_write_str( U08* str ); 231 247 void eth_writeln_str( U08* str ); 248 void eth_write_lf(void);
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