Index: FPGA/FTU/test_firmware/FTU_test2/FTU_test2_dac_control.vhd
===================================================================
--- FPGA/FTU/test_firmware/FTU_test2/FTU_test2_dac_control.vhd	(revision 237)
+++ FPGA/FTU/test_firmware/FTU_test2/FTU_test2_dac_control.vhd	(revision 238)
@@ -108,5 +108,5 @@
 
   -- FSM for dac control: second process
-  FSM_logic: process(state)
+  FSM_logic: process(state, config_ready_sig)
   begin
     next_state <= state;
Index: FPGA/FTU/test_firmware/FTU_test2/FTU_test2_spi_distributor.vhd
===================================================================
--- FPGA/FTU/test_firmware/FTU_test2/FTU_test2_spi_distributor.vhd	(revision 237)
+++ FPGA/FTU/test_firmware/FTU_test2/FTU_test2_spi_distributor.vhd	(revision 238)
@@ -35,5 +35,5 @@
     
   signal spi_distr_state       : TYPE_SPI_DISTRIBUTION_STATE := INIT;
-  signal dac_id_cnt            : integer range 0 to 7 := 0;
+  signal dac_id_cnt            : integer range 0 to 4 := 0;
   
 BEGIN
@@ -67,10 +67,6 @@
           if (dac_config_ready = '1') then
             dac_config_start <= '0';
-            if (dac_id_cnt < 7) then
-              if (dac_id_cnt = 3) then
-                dac_id_cnt <= 7;
-              else
-                dac_id_cnt <= dac_id_cnt + 1;
-              end if;
+            if (dac_id_cnt < 4) then
+              dac_id_cnt <= dac_id_cnt + 1;
               dac_config_start <= '1';
               spi_distr_state <= CONFIG_DAC;