Changeset 241 for FPGA/FTU/test_firmware/FTU_test2/FTU_test2.vhd
- Timestamp:
- 07/06/10 14:17:20 (16 years ago)
- File:
-
- 1 edited
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FPGA/FTU/test_firmware/FTU_test2/FTU_test2.vhd (modified) (3 diffs)
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FPGA/FTU/test_firmware/FTU_test2/FTU_test2.vhd
r237 r241 92 92 mosi : OUT STD_LOGIC; 93 93 sck : OUT STD_LOGIC; 94 cs_ld : OUT STD_LOGIC 94 cs_ld : OUT STD_LOGIC; 95 enable1 : out STD_LOGIC; 96 enable2 : out STD_LOGIC; 97 enable3 : out STD_LOGIC 95 98 ); 96 99 end component; … … 115 118 Inst_FTU_test2_dac_control : FTU_test2_dac_control 116 119 port map( 117 clk => clk_50M_sig, 118 reset => reset_sig, 119 clr => clr, 120 mosi => mosi, 121 sck => sck, 122 cs_ld => cs_ld 120 clk => clk_50M_sig, 121 reset => reset_sig, 122 clr => clr, 123 mosi => mosi, 124 sck => sck, 125 cs_ld => cs_ld, 126 enable1 => enables_A(1), 127 enable2 => enables_A(2), 128 enable3 => enables_A(3) 123 129 ); 124 130 … … 138 144 when Running => 139 145 reset_sig <= '0'; 146 enables_A(0) <= '1'; 140 147 end case; 141 148 end process FTU_test2_C_logic;
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