DocumentHdrVersion "1.1"
Header (DocumentHdr
version 2
dmPackageRefs [
(DmPackageRef
library "IEEE"
unitName "STD_LOGIC_1164"
itemName "ALL"
)
(DmPackageRef
library "IEEE"
unitName "NUMERIC_STD"
itemName "ALL"
)
]
libraryRefs [
"IEEE"
]
)
version "24.1"
appVersion "2009.2 (Build 10)"
model (Symbol
commonDM (CommonDM
ldm (LogicalDM
ordering 1
suid 3,0
usingSuid 1
emptyRow *1 (LEmptyRow
)
uid 82,0
optionalChildren [
*2 (RefLabelRowHdr
)
*3 (TitleRowHdr
)
*4 (FilterRowHdr
)
*5 (RefLabelColHdr
tm "RefLabelColHdrMgr"
)
*6 (RowExpandColHdr
tm "RowExpandColHdrMgr"
)
*7 (GroupColHdr
tm "GroupColHdrMgr"
)
*8 (NameColHdr
tm "NameColHdrMgr"
)
*9 (ModeColHdr
tm "ModeColHdrMgr"
)
*10 (TypeColHdr
tm "TypeColHdrMgr"
)
*11 (BoundsColHdr
tm "BoundsColHdrMgr"
)
*12 (InitColHdr
tm "InitColHdrMgr"
)
*13 (EolColHdr
tm "EolColHdrMgr"
)
*14 (LogPort
port (LogicalPort
decl (Decl
n "clk"
t "STD_LOGIC"
preAdd 0
posAdd 0
o 1
suid 1,0
)
)
uid 71,0
)
*15 (LogPort
port (LogicalPort
decl (Decl
n "trigger_in"
t "STD_LOGIC"
prec "--           rst : in  STD_LOGIC;"
preAdd 0
posAdd 0
o 2
suid 2,0
)
)
uid 73,0
)
*16 (LogPort
port (LogicalPort
m 1
decl (Decl
n "trigger_out"
t "STD_LOGIC"
preAdd 0
posAdd 0
o 3
suid 3,0
i "'0'"
)
)
uid 75,0
)
]
)
pdm (PhysicalDM
displayShortBounds 1
editShortBounds 1
uid 95,0
optionalChildren [
*17 (Sheet
sheetRow (SheetRow
headerVa (MVa
cellColor "49152,49152,49152"
fontColor "0,0,0"
font "Tahoma,10,0"
)
cellVa (MVa
cellColor "65535,65535,65535"
fontColor "0,0,0"
font "Tahoma,10,0"
)
groupVa (MVa
cellColor "39936,56832,65280"
fontColor "0,0,0"
font "Tahoma,10,0"
)
emptyMRCItem *18 (MRCItem
litem &1
pos 3
dimension 20
)
uid 97,0
optionalChildren [
*19 (MRCItem
litem &2
pos 0
dimension 20
uid 98,0
)
*20 (MRCItem
litem &3
pos 1
dimension 23
uid 99,0
)
*21 (MRCItem
litem &4
pos 2
hidden 1
dimension 20
uid 100,0
)
*22 (MRCItem
litem &14
pos 0
dimension 20
uid 72,0
)
*23 (MRCItem
litem &15
pos 1
dimension 20
uid 74,0
)
*24 (MRCItem
litem &16
pos 2
dimension 20
uid 76,0
)
]
)
sheetCol (SheetCol
propVa (MVa
cellColor "0,49152,49152"
fontColor "0,0,0"
font "Tahoma,10,0"
textAngle 90
)
uid 101,0
optionalChildren [
*25 (MRCItem
litem &5
pos 0
dimension 20
uid 102,0
)
*26 (MRCItem
litem &7
pos 1
dimension 50
uid 103,0
)
*27 (MRCItem
litem &8
pos 2
dimension 100
uid 104,0
)
*28 (MRCItem
litem &9
pos 3
dimension 50
uid 105,0
)
*29 (MRCItem
litem &10
pos 4
dimension 100
uid 106,0
)
*30 (MRCItem
litem &11
pos 5
dimension 100
uid 107,0
)
*31 (MRCItem
litem &12
pos 6
dimension 50
uid 108,0
)
*32 (MRCItem
litem &13
pos 7
dimension 80
uid 109,0
)
]
)
fixedCol 4
fixedRow 2
name "Ports"
uid 96,0
vaOverrides [
]
)
]
)
uid 81,0
)
genericsCommonDM (CommonDM
ldm (LogicalDM
emptyRow *33 (LEmptyRow
)
uid 111,0
optionalChildren [
*34 (RefLabelRowHdr
)
*35 (TitleRowHdr
)
*36 (FilterRowHdr
)
*37 (RefLabelColHdr
tm "RefLabelColHdrMgr"
)
*38 (RowExpandColHdr
tm "RowExpandColHdrMgr"
)
*39 (GroupColHdr
tm "GroupColHdrMgr"
)
*40 (NameColHdr
tm "GenericNameColHdrMgr"
)
*41 (TypeColHdr
tm "GenericTypeColHdrMgr"
)
*42 (InitColHdr
tm "GenericValueColHdrMgr"
)
*43 (PragmaColHdr
tm "GenericPragmaColHdrMgr"
)
*44 (EolColHdr
tm "GenericEolColHdrMgr"
)
*45 (LogGeneric
generic (GiElement
name "WIDTH"
type "INTEGER"
value "17"
)
uid 161,0
)
]
)
pdm (PhysicalDM
displayShortBounds 1
editShortBounds 1
uid 123,0
optionalChildren [
*46 (Sheet
sheetRow (SheetRow
headerVa (MVa
cellColor "49152,49152,49152"
fontColor "0,0,0"
font "Tahoma,10,0"
)
cellVa (MVa
cellColor "65535,65535,65535"
fontColor "0,0,0"
font "Tahoma,10,0"
)
groupVa (MVa
cellColor "39936,56832,65280"
fontColor "0,0,0"
font "Tahoma,10,0"
)
emptyMRCItem *47 (MRCItem
litem &33
pos 3
dimension 20
)
uid 125,0
optionalChildren [
*48 (MRCItem
litem &34
pos 0
dimension 20
uid 126,0
)
*49 (MRCItem
litem &35
pos 1
dimension 23
uid 127,0
)
*50 (MRCItem
litem &36
pos 2
hidden 1
dimension 20
uid 128,0
)
*51 (MRCItem
litem &45
pos 0
dimension 20
uid 162,0
)
]
)
sheetCol (SheetCol
propVa (MVa
cellColor "0,49152,49152"
fontColor "0,0,0"
font "Tahoma,10,0"
textAngle 90
)
uid 129,0
optionalChildren [
*52 (MRCItem
litem &37
pos 0
dimension 20
uid 130,0
)
*53 (MRCItem
litem &39
pos 1
dimension 50
uid 131,0
)
*54 (MRCItem
litem &40
pos 2
dimension 100
uid 132,0
)
*55 (MRCItem
litem &41
pos 3
dimension 100
uid 133,0
)
*56 (MRCItem
litem &42
pos 4
dimension 50
uid 134,0
)
*57 (MRCItem
litem &43
pos 5
dimension 50
uid 135,0
)
*58 (MRCItem
litem &44
pos 6
dimension 80
uid 136,0
)
]
)
fixedCol 3
fixedRow 2
name "Ports"
uid 124,0
vaOverrides [
]
)
]
)
uid 110,0
type 1
)
VExpander (VariableExpander
vvMap [
(vvPair
variable "HDLDir"
value "C:\\FPGA_projects\\FACT_FAD_22062010\\FACT_FAD_lib\\hdl"
)
(vvPair
variable "HDSDir"
value "C:\\FPGA_projects\\FACT_FAD_22062010\\FACT_FAD_lib\\hds"
)
(vvPair
variable "SideDataDesignDir"
value "C:\\FPGA_projects\\FACT_FAD_22062010\\FACT_FAD_lib\\hds\\debouncer\\symbol.sb.info"
)
(vvPair
variable "SideDataUserDir"
value "C:\\FPGA_projects\\FACT_FAD_22062010\\FACT_FAD_lib\\hds\\debouncer\\symbol.sb.user"
)
(vvPair
variable "SourceDir"
value "C:\\FPGA_projects\\FACT_FAD_22062010\\FACT_FAD_lib\\hds"
)
(vvPair
variable "appl"
value "HDL Designer"
)
(vvPair
variable "arch_name"
value "symbol"
)
(vvPair
variable "config"
value "%(unit)_%(view)_config"
)
(vvPair
variable "d"
value "C:\\FPGA_projects\\FACT_FAD_22062010\\FACT_FAD_lib\\hds\\debouncer"
)
(vvPair
variable "d_logical"
value "C:\\FPGA_projects\\FACT_FAD_22062010\\FACT_FAD_lib\\hds\\debouncer"
)
(vvPair
variable "date"
value "22.06.2010"
)
(vvPair
variable "day"
value "Di"
)
(vvPair
variable "day_long"
value "Dienstag"
)
(vvPair
variable "dd"
value "22"
)
(vvPair
variable "entity_name"
value "debouncer"
)
(vvPair
variable "ext"
value "<TBD>"
)
(vvPair
variable "f"
value "symbol.sb"
)
(vvPair
variable "f_logical"
value "symbol.sb"
)
(vvPair
variable "f_noext"
value "symbol"
)
(vvPair
variable "group"
value "UNKNOWN"
)
(vvPair
variable "host"
value "TU-CC4900F8C7D2"
)
(vvPair
variable "language"
value "VHDL"
)
(vvPair
variable "library"
value "FACT_FAD_lib"
)
(vvPair
variable "library_downstream_ISEPARInvoke"
value "$HDS_PROJECT_DIR/FACT_FAD_lib/ise"
)
(vvPair
variable "library_downstream_ImpactInvoke"
value "$HDS_PROJECT_DIR/FACT_FAD_lib/ise"
)
(vvPair
variable "library_downstream_ModelSimCompiler"
value "$HDS_PROJECT_DIR/FACT_FAD_lib/work"
)
(vvPair
variable "library_downstream_XSTDataPrep"
value "$HDS_PROJECT_DIR/FACT_FAD_lib/ise"
)
(vvPair
variable "mm"
value "06"
)
(vvPair
variable "module_name"
value "debouncer"
)
(vvPair
variable "month"
value "Jun"
)
(vvPair
variable "month_long"
value "Juni"
)
(vvPair
variable "p"
value "C:\\FPGA_projects\\FACT_FAD_22062010\\FACT_FAD_lib\\hds\\debouncer\\symbol.sb"
)
(vvPair
variable "p_logical"
value "C:\\FPGA_projects\\FACT_FAD_22062010\\FACT_FAD_lib\\hds\\debouncer\\symbol.sb"
)
(vvPair
variable "package_name"
value "<Undefined Variable>"
)
(vvPair
variable "project_name"
value "FACT_FAD"
)
(vvPair
variable "series"
value "HDL Designer Series"
)
(vvPair
variable "task_DesignCompilerPath"
value "<TBD>"
)
(vvPair
variable "task_LeonardoPath"
value "<TBD>"
)
(vvPair
variable "task_ModelSimPath"
value "<TBD>"
)
(vvPair
variable "task_NC-SimPath"
value "<TBD>"
)
(vvPair
variable "task_PrecisionRTLPath"
value "<TBD>"
)
(vvPair
variable "task_QuestaSimPath"
value "<TBD>"
)
(vvPair
variable "task_VCSPath"
value "<TBD>"
)
(vvPair
variable "this_ext"
value "sb"
)
(vvPair
variable "this_file"
value "symbol"
)
(vvPair
variable "this_file_logical"
value "symbol"
)
(vvPair
variable "time"
value "10:22:23"
)
(vvPair
variable "unit"
value "debouncer"
)
(vvPair
variable "user"
value "dneise"
)
(vvPair
variable "version"
value "2009.2 (Build 10)"
)
(vvPair
variable "view"
value "symbol"
)
(vvPair
variable "year"
value "2010"
)
(vvPair
variable "yy"
value "10"
)
]
)
LanguageMgr "VhdlLangMgr"
uid 80,0
optionalChildren [
*59 (SymbolBody
uid 8,0
optionalChildren [
*60 (CptPort
uid 48,0
ps "OnEdgeStrategy"
shape (Triangle
uid 49,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "24250,13625,25000,14375"
)
tg (CPTG
uid 50,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 51,0
va (VaSet
)
xt "26000,13500,27300,14500"
st "clk"
blo "26000,14300"
tm "CptPortNameMgr"
)
)
dt (MLText
uid 52,0
va (VaSet
font "Courier New,8,0"
)
xt "2000,8000,20000,8800"
st "clk         : IN     STD_LOGIC  ;
"
)
thePort (LogicalPort
decl (Decl
n "clk"
t "STD_LOGIC"
preAdd 0
posAdd 0
o 1
suid 1,0
)
)
)
*61 (CptPort
uid 53,0
ps "OnEdgeStrategy"
shape (Triangle
uid 54,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "24250,14625,25000,15375"
)
tg (CPTG
uid 55,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 56,0
va (VaSet
)
xt "26000,14500,30200,15500"
st "trigger_in"
blo "26000,15300"
tm "CptPortNameMgr"
)
)
dt (MLText
uid 57,0
va (VaSet
font "Courier New,8,0"
)
xt "2000,8800,20000,10400"
st "--           rst : in  STD_LOGIC;
trigger_in  : IN     STD_LOGIC  ;
"
)
thePort (LogicalPort
decl (Decl
n "trigger_in"
t "STD_LOGIC"
prec "--           rst : in  STD_LOGIC;"
preAdd 0
posAdd 0
o 2
suid 2,0
)
)
)
*62 (CptPort
uid 58,0
ps "OnEdgeStrategy"
shape (Triangle
uid 59,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "37000,14625,37750,15375"
)
tg (CPTG
uid 60,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 61,0
va (VaSet
)
xt "31400,14500,36000,15500"
st "trigger_out"
ju 2
blo "36000,15300"
tm "CptPortNameMgr"
)
)
dt (MLText
uid 62,0
va (VaSet
font "Courier New,8,0"
)
xt "2000,10400,22500,11200"
st "trigger_out : OUT    STD_LOGIC  := '0'
"
)
thePort (LogicalPort
m 1
decl (Decl
n "trigger_out"
t "STD_LOGIC"
preAdd 0
posAdd 0
o 3
suid 3,0
i "'0'"
)
)
)
*63 (CommentText
uid 68,0
ps "EdgeToEdgeStrategy"
shape (Rectangle
uid 69,0
layer 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
lineColor "0,0,32768"
)
xt "24500,3000,39500,7400"
)
oxt "24500,3000,39500,7000"
text (MLText
uid 70,0
va (VaSet
fg "0,0,32768"
)
xt "24700,3200,38600,7200"
st "
-- -- Uncomment the following library declaration if instantiating
-- -- any Xilinx primitives in this code.
-- library UNISIM;
-- use UNISIM.VComponents.all;
--
"
tm "CommentText"
wrapOption 3
visibleHeight 4400
visibleWidth 15000
)
included 1
excludeCommentLeader 1
)
]
shape (Rectangle
uid 160,0
va (VaSet
vasetType 1
fg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "25000,13000,37000,18000"
)
biTextGroup (BiTextGroup
uid 10,0
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
first (Text
uid 11,0
va (VaSet
font "Arial,8,1"
)
xt "25200,18000,31400,19000"
st "FACT_FAD_lib"
blo "25200,18800"
)
second (Text
uid 12,0
va (VaSet
font "Arial,8,1"
)
xt "25200,19000,29600,20000"
st "debouncer"
blo "25200,19800"
)
)
gi *64 (GenericInterface
uid 13,0
ps "CenterOffsetStrategy"
matrix (Matrix
uid 14,0
text (MLText
uid 15,0
va (VaSet
font "Courier New,8,0"
)
xt "24500,4600,36000,7000"
st "Generic Declarations

WIDTH INTEGER 17  
"
)
header "Generic Declarations"
showHdrWhenContentsEmpty 1
)
elements [
(GiElement
name "WIDTH"
type "INTEGER"
value "17"
)
]
)
portInstanceVisAsIs 1
portInstanceVis (PortSigDisplay
)
portVis (PortSigDisplay
)
)
*65 (Grouping
uid 16,0
optionalChildren [
*66 (CommentText
uid 18,0
shape (Rectangle
uid 19,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "29000,26000,46000,27000"
)
oxt "18000,70000,35000,71000"
text (MLText
uid 20,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "29200,26000,38900,27000"
st "
by %user on %dd %month %year
"
tm "CommentText"
wrapOption 3
visibleHeight 1000
visibleWidth 17000
)
position 1
ignorePrefs 1
titleBlock 1
)
*67 (CommentText
uid 21,0
shape (Rectangle
uid 22,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "46000,22000,50000,23000"
)
oxt "35000,66000,39000,67000"
text (MLText
uid 23,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "46200,22000,49200,23000"
st "
Project:
"
tm "CommentText"
wrapOption 3
visibleHeight 1000
visibleWidth 4000
)
position 1
ignorePrefs 1
titleBlock 1
)
*68 (CommentText
uid 24,0
shape (Rectangle
uid 25,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "29000,24000,46000,25000"
)
oxt "18000,68000,35000,69000"
text (MLText
uid 26,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "29200,24000,39200,25000"
st "
<enter diagram title here>
"
tm "CommentText"
wrapOption 3
visibleHeight 1000
visibleWidth 17000
)
position 1
ignorePrefs 1
titleBlock 1
)
*69 (CommentText
uid 27,0
shape (Rectangle
uid 28,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "25000,24000,29000,25000"
)
oxt "14000,68000,18000,69000"
text (MLText
uid 29,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "25200,24000,27300,25000"
st "
Title:
"
tm "CommentText"
wrapOption 3
visibleHeight 1000
visibleWidth 4000
)
position 1
ignorePrefs 1
titleBlock 1
)
*70 (CommentText
uid 30,0
shape (Rectangle
uid 31,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "46000,23000,66000,27000"
)
oxt "35000,67000,55000,71000"
text (MLText
uid 32,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "46200,23200,55400,24200"
st "
<enter comments here>
"
tm "CommentText"
wrapOption 3
visibleHeight 4000
visibleWidth 20000
)
ignorePrefs 1
titleBlock 1
)
*71 (CommentText
uid 33,0
shape (Rectangle
uid 34,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "50000,22000,66000,23000"
)
oxt "39000,66000,55000,67000"
text (MLText
uid 35,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "50200,22000,54700,23000"
st "
%project_name
"
tm "CommentText"
wrapOption 3
visibleHeight 1000
visibleWidth 16000
)
position 1
ignorePrefs 1
titleBlock 1
)
*72 (CommentText
uid 36,0
shape (Rectangle
uid 37,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "25000,22000,46000,24000"
)
oxt "14000,66000,35000,68000"
text (MLText
uid 38,0
va (VaSet
fg "32768,0,0"
)
xt "32700,22000,38300,24000"
st "
TU Dortmund 
Physik / EE
"
ju 0
tm "CommentText"
wrapOption 3
visibleHeight 2000
visibleWidth 21000
)
position 1
ignorePrefs 1
titleBlock 1
)
*73 (CommentText
uid 39,0
shape (Rectangle
uid 40,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "25000,25000,29000,26000"
)
oxt "14000,69000,18000,70000"
text (MLText
uid 41,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "25200,25000,27300,26000"
st "
Path:
"
tm "CommentText"
wrapOption 3
visibleHeight 1000
visibleWidth 4000
)
position 1
ignorePrefs 1
titleBlock 1
)
*74 (CommentText
uid 42,0
shape (Rectangle
uid 43,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "25000,26000,29000,27000"
)
oxt "14000,70000,18000,71000"
text (MLText
uid 44,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "25200,26000,27900,27000"
st "
Edited:
"
tm "CommentText"
wrapOption 3
visibleHeight 1000
visibleWidth 4000
)
position 1
ignorePrefs 1
titleBlock 1
)
*75 (CommentText
uid 45,0
shape (Rectangle
uid 46,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "29000,25000,46000,26000"
)
oxt "18000,69000,35000,70000"
text (MLText
uid 47,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "29200,25000,41900,26000"
st "
%library/%unit/%view
"
tm "CommentText"
wrapOption 3
visibleHeight 1000
visibleWidth 17000
)
position 1
ignorePrefs 1
titleBlock 1
)
]
shape (GroupingShape
uid 17,0
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineStyle 2
lineWidth 2
)
xt "25000,22000,66000,27000"
)
oxt "14000,66000,55000,71000"
)
*76 (CommentText
uid 65,0
shape (Rectangle
uid 66,0
layer 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
lineColor "0,0,32768"
)
xt "0,-6000,33000,0"
)
text (MLText
uid 67,0
va (VaSet
fg "0,0,32768"
font "Arial,10,0"
)
xt "200,-5800,32200,-600"
st "
Created using Mentor Graphics HDL2Graphics(TM) Technology
on - 08:37:05 24.03.2010
from - D:\\E5b\\E5b_09_189\\FPGA\\FACT_FAD\\FACT_FAD_test_devices_lib\\hdl\\debouncer.vhd

"
tm "CommentText"
wrapOption 3
visibleHeight 5600
visibleWidth 32600
)
)
]
bg "65535,65535,65535"
grid (Grid
origin "0,0"
isVisible 1
isActive 1
xSpacing 1000
xySpacing 1000
xShown 1
yShown 1
color "26368,26368,26368"
)
packageList *77 (PackageList
uid 77,0
stg "VerticalLayoutStrategy"
textVec [
*78 (Text
uid 78,0
va (VaSet
font "Arial,8,1"
)
xt "0,1000,5400,2000"
st "Package List"
blo "0,1800"
)
*79 (MLText
uid 79,0
va (VaSet
)
xt "0,2000,13000,5000"
st "LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.NUMERIC_STD.ALL;"
tm "PackageList"
)
]
)
windowSize "0,0,1015,690"
viewArea "0,0,0,0"
cachedDiagramExtent "0,0,0,0"
pageBreakOrigin "0,0"
defaultCommentText (CommentText
shape (Rectangle
layer 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
lineColor "0,0,32768"
)
xt "0,0,15000,5000"
)
text (MLText
va (VaSet
fg "0,0,32768"
)
xt "200,200,2000,1200"
st "
Text
"
tm "CommentText"
wrapOption 3
visibleHeight 4600
visibleWidth 14600
)
)
defaultPanel (Panel
shape (RectFrame
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "32768,0,0"
lineWidth 3
)
xt "0,0,20000,20000"
)
title (TextAssociate
ps "TopLeftStrategy"
text (Text
va (VaSet
font "Arial,8,1"
)
xt "1000,1000,3800,2000"
st "Panel0"
blo "1000,1800"
tm "PanelText"
)
)
)
parentGraphicsRef (HdmGraphicsRef
libraryName ""
entityName ""
viewName ""
)
defaultSymbolBody (SymbolBody
shape (Rectangle
va (VaSet
vasetType 1
fg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "15000,6000,33000,26000"
)
biTextGroup (BiTextGroup
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
first (Text
va (VaSet
font "Arial,8,1"
)
xt "22200,15000,25800,16000"
st "<library>"
blo "22200,15800"
)
second (Text
va (VaSet
font "Arial,8,1"
)
xt "22200,16000,24800,17000"
st "<cell>"
blo "22200,16800"
)
)
gi *80 (GenericInterface
ps "CenterOffsetStrategy"
matrix (Matrix
text (MLText
va (VaSet
font "Courier New,8,0"
)
xt "0,12000,11500,12800"
st "Generic Declarations"
)
header "Generic Declarations"
showHdrWhenContentsEmpty 1
)
elements [
]
)
portInstanceVisAsIs 1
portInstanceVis (PortSigDisplay
sIVOD 1
)
portVis (PortSigDisplay
sIVOD 1
)
)
defaultCptPort (CptPort
ps "OnEdgeStrategy"
shape (Triangle
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "0,0,750,750"
)
tg (CPTG
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
va (VaSet
)
xt "0,750,1400,1750"
st "In0"
blo "0,1550"
tm "CptPortNameMgr"
)
)
dt (MLText
va (VaSet
font "Courier New,8,0"
)
)
thePort (LogicalPort
decl (Decl
n "In0"
t "std_logic_vector"
b "(15 DOWNTO 0)"
o 0
)
)
)
defaultCptPortBuffer (CptPort
ps "OnEdgeStrategy"
shape (Diamond
va (VaSet
vasetType 1
fg "65535,65535,65535"
bg "0,0,0"
)
xt "0,0,750,750"
)
tg (CPTG
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
va (VaSet
)
xt "0,750,2800,1750"
st "Buffer0"
blo "0,1550"
tm "CptPortNameMgr"
)
)
dt (MLText
va (VaSet
font "Courier New,8,0"
)
)
thePort (LogicalPort
m 3
decl (Decl
n "Buffer0"
t "std_logic_vector"
b "(15 DOWNTO 0)"
o 0
)
)
)
DeclarativeBlock *81 (SymDeclBlock
uid 1,0
stg "SymDeclLayoutStrategy"
declLabel (Text
uid 2,0
va (VaSet
font "Arial,8,1"
)
xt "0,6000,5400,7000"
st "Declarations"
blo "0,6800"
)
portLabel (Text
uid 3,0
va (VaSet
font "Arial,8,1"
)
xt "0,7000,2700,8000"
st "Ports:"
blo "0,7800"
)
externalLabel (Text
uid 4,0
va (VaSet
font "Arial,8,1"
)
xt "0,11200,2400,12200"
st "User:"
blo "0,12000"
)
internalLabel (Text
uid 6,0
va (VaSet
isHidden 1
font "Arial,8,1"
)
xt "0,6000,5800,7000"
st "Internal User:"
blo "0,6800"
)
externalText (MLText
uid 5,0
va (VaSet
font "Courier New,8,0"
)
xt "2000,12200,2000,12200"
tm "SyDeclarativeTextMgr"
)
internalText (MLText
uid 7,0
va (VaSet
isHidden 1
font "Courier New,8,0"
)
xt "0,6000,0,6000"
tm "SyDeclarativeTextMgr"
)
)
lastUid 162,0
activeModelName "Symbol:CDM"
)
