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library "ieee"
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library "ieee"
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library "FACT_FAD_lib"
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version "29.1"
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"
)
)
*32 (Net
uid 1342,0
decl (Decl
n "sensor_start"
t "std_logic"
o 16
suid 34,0
)
declText (MLText
uid 1343,0
va (VaSet
font "Courier New,8,0"
)
xt "22000,17400,41000,18200"
st "SIGNAL sensor_start     : std_logic
"
)
)
*33 (Net
uid 1350,0
decl (Decl
n "sensor_valid"
t "std_logic"
o 17
suid 35,0
)
declText (MLText
uid 1351,0
va (VaSet
font "Courier New,8,0"
)
xt "22000,18200,41000,19000"
st "SIGNAL sensor_valid     : std_logic
"
)
)
*34 (PortIoOut
uid 1576,0
shape (CompositeShape
uid 1577,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 1578,0
sl 0
ro 90
xt "2000,28625,3500,29375"
)
(Line
uid 1579,0
sl 0
ro 90
xt "3500,29000,4000,29000"
pts [
"4000,29000"
"3500,29000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 1580,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 1581,0
va (VaSet
)
xt "-4200,28500,1000,29500"
st "sensor_array"
ju 2
blo "1000,29300"
tm "WireNameMgr"
)
)
)
*35 (PortIoOut
uid 1582,0
shape (CompositeShape
uid 1583,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 1584,0
sl 0
ro 90
xt "2000,27625,3500,28375"
)
(Line
uid 1585,0
sl 0
ro 90
xt "3500,28000,4000,28000"
pts [
"4000,28000"
"3500,28000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 1586,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 1587,0
va (VaSet
)
xt "-4300,27500,1000,28500"
st "sensor_ready"
ju 2
blo "1000,28300"
tm "WireNameMgr"
)
)
)
*36 (Net
uid 1596,0
decl (Decl
n "sensor_array"
t "sensor_array_type"
o 7
suid 37,0
)
declText (MLText
uid 1597,0
va (VaSet
font "Courier New,8,0"
)
xt "22000,8400,41500,9200"
st "sensor_array     : sensor_array_type
"
)
)
*37 (Net
uid 1602,0
decl (Decl
n "sensor_ready"
t "std_logic"
o 9
suid 38,0
)
declText (MLText
uid 1603,0
va (VaSet
font "Courier New,8,0"
)
xt "22000,10000,37500,10800"
st "sensor_ready     : std_logic
"
)
)
*38 (SaComponent
uid 2195,0
optionalChildren [
*39 (CptPort
uid 2143,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2144,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "8250,22625,9000,23375"
)
tg (CPTG
uid 2145,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 2146,0
va (VaSet
)
xt "10000,22500,11300,23500"
st "clk"
blo "10000,23300"
)
)
thePort (LogicalPort
decl (Decl
n "clk"
t "std_logic"
o 1
)
)
)
*40 (CptPort
uid 2147,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2148,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "8250,23625,9000,24375"
)
tg (CPTG
uid 2149,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 2150,0
va (VaSet
)
xt "10000,23500,14800,24500"
st "config_start"
blo "10000,24300"
)
)
thePort (LogicalPort
decl (Decl
n "config_start"
t "std_logic"
o 2
)
)
)
*41 (CptPort
uid 2151,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2152,0
ro 270
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "8250,26625,9000,27375"
)
tg (CPTG
uid 2153,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 2154,0
va (VaSet
)
xt "10000,26500,15100,27500"
st "config_ready"
blo "10000,27300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "config_ready"
t "std_logic"
o 3
i "'0'"
)
)
)
*42 (CptPort
uid 2155,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2156,0
ro 270
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "8250,27625,9000,28375"
)
tg (CPTG
uid 2157,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 2158,0
va (VaSet
)
xt "10000,27500,15000,28500"
st "sensor_valid"
blo "10000,28300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "sensor_valid"
t "std_logic"
o 5
i "'0'"
)
)
)
*43 (CptPort
uid 2159,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2160,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "8250,25625,9000,26375"
)
tg (CPTG
uid 2161,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 2162,0
va (VaSet
)
xt "10000,25500,13700,26500"
st "dac_array"
blo "10000,26300"
)
)
thePort (LogicalPort
decl (Decl
n "dac_array"
t "dac_array_type"
o 6
)
)
)
*44 (CptPort
uid 2163,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2164,0
ro 270
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "8250,28625,9000,29375"
)
tg (CPTG
uid 2165,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 2166,0
va (VaSet
)
xt "10000,28500,15200,29500"
st "sensor_array"
blo "10000,29300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "sensor_array"
t "sensor_array_type"
o 7
)
)
)
*45 (CptPort
uid 2167,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2168,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "26000,25625,26750,26375"
)
tg (CPTG
uid 2169,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 2170,0
va (VaSet
)
xt "18600,25500,25000,26500"
st "dac_config_start"
ju 2
blo "25000,26300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "dac_config_start"
t "std_logic"
o 8
i "'0'"
)
)
)
*46 (CptPort
uid 2171,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2172,0
ro 270
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "26000,31625,26750,32375"
)
tg (CPTG
uid 2173,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 2174,0
va (VaSet
)
xt "18300,31500,25000,32500"
st "dac_config_ready"
ju 2
blo "25000,32300"
)
)
thePort (LogicalPort
decl (Decl
n "dac_config_ready"
t "std_logic"
o 9
)
)
)
*47 (CptPort
uid 2175,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2176,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "26000,26625,26750,27375"
)
tg (CPTG
uid 2177,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 2178,0
va (VaSet
)
xt "18100,26500,25000,27500"
st "sensor_read_start"
ju 2
blo "25000,27300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "sensor_read_start"
t "std_logic"
o 10
i "'0'"
)
)
)
*48 (CptPort
uid 2179,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2180,0
ro 270
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "26000,32625,26750,33375"
)
tg (CPTG
uid 2181,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 2182,0
va (VaSet
)
xt "18100,32500,25000,33500"
st "sensor_read_valid"
ju 2
blo "25000,33300"
)
)
thePort (LogicalPort
decl (Decl
n "sensor_read_valid"
t "std_logic"
o 11
)
)
)
*49 (CptPort
uid 2183,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2184,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "26000,22625,26750,23375"
)
tg (CPTG
uid 2185,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 2186,0
va (VaSet
)
xt "19800,22500,25000,23500"
st "dac_id : (2:0)"
ju 2
blo "25000,23300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "dac_id"
t "std_logic_vector"
b "(2 downto 0)"
o 12
i "(others => '0')"
)
)
)
*50 (CptPort
uid 2187,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2188,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "26000,23625,26750,24375"
)
tg (CPTG
uid 2189,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 2190,0
va (VaSet
)
xt "18700,23500,25000,24500"
st "sensor_id : (1:0)"
ju 2
blo "25000,24300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "sensor_id"
t "std_logic_vector"
b "(1 downto 0)"
o 13
i "(others => '0')"
)
)
)
*51 (CptPort
uid 2191,0
ps "OnEdgeStrategy"
shape (Diamond
uid 2192,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "26000,28625,26750,29375"
)
tg (CPTG
uid 2193,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 2194,0
va (VaSet
)
xt "20200,28500,25000,29500"
st "data : (15:0)"
ju 2
blo "25000,29300"
)
)
thePort (LogicalPort
m 2
decl (Decl
n "data"
t "std_logic_vector"
b "(15 downto 0)"
o 14
i "(others => 'Z')"
)
)
)
*52 (CptPort
uid 2304,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2305,0
ro 270
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "8250,24625,9000,25375"
)
tg (CPTG
uid 2306,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 2307,0
va (VaSet
)
xt "10000,24500,15600,25500"
st "config_started"
blo "10000,25300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "config_started"
t "std_logic"
o 4
i "'0'"
)
)
)
]
shape (Rectangle
uid 2196,0
va (VaSet
vasetType 1
fg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "9000,22000,26000,35000"
)
oxt "0,0,8000,10000"
ttg (MlTextGroup
uid 2197,0
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*53 (Text
uid 2198,0
va (VaSet
font "Arial,8,1"
)
xt "9350,35000,15550,36000"
st "FACT_FAD_lib"
blo "9350,35800"
tm "BdLibraryNameMgr"
)
*54 (Text
uid 2199,0
va (VaSet
font "Arial,8,1"
)
xt "9350,36000,15650,37000"
st "spi_distributor"
blo "9350,36800"
tm "CptNameMgr"
)
*55 (Text
uid 2200,0
va (VaSet
font "Arial,8,1"
)
xt "9350,37000,16250,38000"
st "I_spi_distributor"
blo "9350,37800"
tm "InstanceNameMgr"
)
]
)
ga (GenericAssociation
uid 2201,0
ps "EdgeToEdgeStrategy"
matrix (Matrix
uid 2202,0
text (MLText
uid 2203,0
va (VaSet
font "Courier New,8,0"
)
xt "9000,21200,29500,22000"
st "CLK_DIVIDER = 4*10**3    ( integer )  "
)
header ""
)
elements [
(GiElement
name "CLK_DIVIDER"
type "integer"
value "4*10**3"
)
]
)
viewicon (ZoomableIcon
uid 2204,0
sl 0
va (VaSet
vasetType 1
fg "49152,49152,49152"
)
xt "9250,33250,10750,34750"
iconName "VhdlFileViewIcon.png"
iconMaskName "VhdlFileViewIcon.msk"
ftype 10
)
ordering 1
viewiconposition 0
portVis (PortSigDisplay
)
archFileType "UNKNOWN"
)
*56 (SaComponent
uid 2249,0
optionalChildren [
*57 (CptPort
uid 2205,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2206,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "36250,21625,37000,22375"
)
tg (CPTG
uid 2207,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 2208,0
va (VaSet
)
xt "38000,21500,39300,22500"
st "clk"
blo "38000,22300"
)
)
thePort (LogicalPort
decl (Decl
n "clk"
t "std_logic"
o 1
)
)
)
*58 (CptPort
uid 2213,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2214,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "36250,22625,37000,23375"
)
tg (CPTG
uid 2215,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 2216,0
va (VaSet
)
xt "38000,22500,43200,23500"
st "dac_id : (2:0)"
blo "38000,23300"
)
)
thePort (LogicalPort
decl (Decl
n "dac_id"
t "std_logic_vector"
b "(2 DOWNTO 0)"
o 4
)
)
)
*59 (CptPort
uid 2217,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2218,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "36250,23625,37000,24375"
)
tg (CPTG
uid 2219,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 2220,0
va (VaSet
)
xt "38000,23500,44300,24500"
st "sensor_id : (1:0)"
blo "38000,24300"
)
)
thePort (LogicalPort
decl (Decl
n "sensor_id"
t "std_logic_vector"
b "(1 downto 0)"
o 5
)
)
)
*60 (CptPort
uid 2221,0
ps "OnEdgeStrategy"
shape (Diamond
uid 2222,0
ro 270
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "36250,27625,37000,28375"
)
tg (CPTG
uid 2223,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 2224,0
va (VaSet
)
xt "38000,27500,42800,28500"
st "data : (15:0)"
blo "38000,28300"
)
)
thePort (LogicalPort
m 2
decl (Decl
n "data"
t "std_logic_vector"
b "(15 DOWNTO 0)"
o 6
i "(others => 'Z')"
)
)
)
*61 (CptPort
uid 2225,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2226,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "53000,23625,53750,24375"
)
tg (CPTG
uid 2227,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 2228,0
va (VaSet
)
xt "49200,23500,52000,24500"
st "dac_cs"
ju 2
blo "52000,24300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "dac_cs"
t "std_logic"
o 7
i "'1'"
)
)
)
*62 (CptPort
uid 2229,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2230,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "53000,28625,53750,29375"
)
tg (CPTG
uid 2231,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 2232,0
va (VaSet
)
xt "45500,28500,52000,29500"
st "sensor_cs : (3:0)"
ju 2
blo "52000,29300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "sensor_cs"
t "std_logic_vector"
b "(3 DOWNTO 0)"
o 8
i "(others => '1')"
)
)
)
*63 (CptPort
uid 2233,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2234,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "36250,24625,37000,25375"
)
tg (CPTG
uid 2235,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 2236,0
va (VaSet
)
xt "38000,24500,41500,25500"
st "dac_start"
blo "38000,25300"
)
)
thePort (LogicalPort
decl (Decl
n "dac_start"
t "std_logic"
o 9
)
)
)
*64 (CptPort
uid 2237,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2238,0
ro 270
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "36250,29625,37000,30375"
)
tg (CPTG
uid 2239,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 2240,0
va (VaSet
)
xt "38000,29500,41800,30500"
st "dac_ready"
blo "38000,30300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "dac_ready"
t "std_logic"
o 10
i "'0'"
)
)
)
*65 (CptPort
uid 2241,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2242,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "36250,25625,37000,26375"
)
tg (CPTG
uid 2243,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 2244,0
va (VaSet
)
xt "38000,25500,43000,26500"
st "sensor_start"
blo "38000,26300"
)
)
thePort (LogicalPort
decl (Decl
n "sensor_start"
t "std_logic"
o 11
)
)
)
*66 (CptPort
uid 2245,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2246,0
ro 270
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "36250,30625,37000,31375"
)
tg (CPTG
uid 2247,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 2248,0
va (VaSet
)
xt "38000,30500,43000,31500"
st "sensor_valid"
blo "38000,31300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "sensor_valid"
t "std_logic"
o 12
i "'0'"
)
)
)
*67 (CptPort
uid 2351,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2352,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "53000,22625,53750,23375"
)
tg (CPTG
uid 2353,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 2354,0
va (VaSet
)
xt "50000,22500,52000,23500"
st "mosi"
ju 2
blo "52000,23300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "mosi"
t "std_logic"
o 3
i "'0'"
)
)
)
*68 (CptPort
uid 2398,0
ps "OnEdgeStrategy"
shape (Diamond
uid 2399,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "53000,21625,53750,22375"
)
tg (CPTG
uid 2400,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 2401,0
va (VaSet
)
xt "50000,21500,52000,22500"
st "miso"
ju 2
blo "52000,22300"
)
)
thePort (LogicalPort
m 2
decl (Decl
n "miso"
t "std_logic"
o 2
i "'Z'"
)
)
)
]
shape (Rectangle
uid 2250,0
va (VaSet
vasetType 1
fg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "37000,21000,53000,33000"
)
oxt "0,0,8000,10000"
ttg (MlTextGroup
uid 2251,0
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*69 (Text
uid 2252,0
va (VaSet
font "Arial,8,1"
)
xt "36900,34000,43100,35000"
st "FACT_FAD_lib"
blo "36900,34800"
tm "BdLibraryNameMgr"
)
*70 (Text
uid 2253,0
va (VaSet
font "Arial,8,1"
)
xt "36900,35000,42800,36000"
st "spi_controller"
blo "36900,35800"
tm "CptNameMgr"
)
*71 (Text
uid 2254,0
va (VaSet
font "Arial,8,1"
)
xt "36900,36000,43400,37000"
st "I_spi_controller"
blo "36900,36800"
tm "InstanceNameMgr"
)
]
)
ga (GenericAssociation
uid 2255,0
ps "EdgeToEdgeStrategy"
matrix (Matrix
uid 2256,0
text (MLText
uid 2257,0
va (VaSet
font "Courier New,8,0"
)
xt "45000,21000,45000,21000"
)
header ""
)
elements [
]
)
viewicon (ZoomableIcon
uid 2258,0
sl 0
va (VaSet
vasetType 1
fg "49152,49152,49152"
)
xt "37250,31250,38750,32750"
iconName "VhdlFileViewIcon.png"
iconMaskName "VhdlFileViewIcon.msk"
ftype 10
)
ordering 1
viewiconposition 0
portVis (PortSigDisplay
)
archFileType "UNKNOWN"
)
*72 (SaComponent
uid 2267,0
optionalChildren [
*73 (CptPort
uid 2259,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2260,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "12250,39625,13000,40375"
)
tg (CPTG
uid 2261,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 2262,0
va (VaSet
)
xt "14000,39500,15300,40500"
st "clk"
blo "14000,40300"
)
)
thePort (LogicalPort
decl (Decl
n "clk"
t "std_logic"
o 1
)
)
)
*74 (CptPort
uid 2263,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2264,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "21000,39625,21750,40375"
)
tg (CPTG
uid 2265,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 2266,0
va (VaSet
)
xt "18300,39500,20000,40500"
st "sclk"
ju 2
blo "20000,40300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "sclk"
t "std_logic"
o 2
i "'0'"
)
)
)
]
shape (Rectangle
uid 2268,0
va (VaSet
vasetType 1
fg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "13000,39000,21000,42000"
)
oxt "0,0,8000,10000"
ttg (MlTextGroup
uid 2269,0
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*75 (Text
uid 2270,0
va (VaSet
font "Arial,8,1"
)
xt "12900,42000,19100,43000"
st "FACT_FAD_lib"
blo "12900,42800"
tm "BdLibraryNameMgr"
)
*76 (Text
uid 2271,0
va (VaSet
font "Arial,8,1"
)
xt "12900,43000,21100,44000"
st "spi_clock_generator"
blo "12900,43800"
tm "CptNameMgr"
)
*77 (Text
uid 2272,0
va (VaSet
font "Arial,8,1"
)
xt "12900,44000,18200,45000"
st "I_spi_clkgen"
blo "12900,44800"
tm "InstanceNameMgr"
)
]
)
ga (GenericAssociation
uid 2273,0
ps "EdgeToEdgeStrategy"
matrix (Matrix
uid 2274,0
text (MLText
uid 2275,0
va (VaSet
font "Courier New,8,0"
)
xt "13000,38200,39500,39000"
st "CLK_DIVIDER = 25    ( integer ) --2 MHz @ 50 MHz "
)
header ""
)
elements [
(GiElement
name "CLK_DIVIDER"
type "integer"
value "25"
e "--2 MHz @ 50 MHz"
)
]
)
viewicon (ZoomableIcon
uid 2276,0
sl 0
va (VaSet
vasetType 1
fg "49152,49152,49152"
)
xt "13250,40250,14750,41750"
iconName "VhdlFileViewIcon.png"
iconMaskName "VhdlFileViewIcon.msk"
ftype 10
)
ordering 1
viewiconposition 0
portVis (PortSigDisplay
)
archFileType "UNKNOWN"
)
*78 (Net
uid 2308,0
decl (Decl
n "config_started"
t "std_logic"
o 18
suid 45,0
i "'0'"
)
declText (MLText
uid 2309,0
va (VaSet
font "Courier New,8,0"
)
xt "22000,5200,41000,6000"
st "config_started   : std_logic := '0'
"
)
)
*79 (PortIoOut
uid 2316,0
shape (CompositeShape
uid 2317,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 2318,0
sl 0
ro 90
xt "2000,24625,3500,25375"
)
(Line
uid 2319,0
sl 0
ro 90
xt "3500,25000,4000,25000"
pts [
"4000,25000"
"3500,25000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 2320,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 2321,0
va (VaSet
)
xt "-4600,24500,1000,25500"
st "config_started"
ju 2
blo "1000,25300"
tm "WireNameMgr"
)
)
)
*80 (Net
uid 2355,0
decl (Decl
n "mosi"
t "std_logic"
o 19
suid 46,0
i "'0'"
)
declText (MLText
uid 2356,0
va (VaSet
font "Courier New,8,0"
)
xt "22000,6800,41000,7600"
st "mosi             : std_logic := '0'
"
)
)
*81 (PortIoOut
uid 2363,0
shape (CompositeShape
uid 2364,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 2365,0
sl 0
ro 270
xt "55500,22625,57000,23375"
)
(Line
uid 2366,0
sl 0
ro 270
xt "55000,23000,55500,23000"
pts [
"55000,23000"
"55500,23000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 2367,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 2368,0
va (VaSet
)
xt "58000,22500,60000,23500"
st "mosi"
blo "58000,23300"
tm "WireNameMgr"
)
)
)
*82 (Net
uid 2402,0
decl (Decl
n "miso"
t "std_logic"
preAdd 0
posAdd 0
o 10
suid 47,0
)
declText (MLText
uid 2403,0
va (VaSet
font "Courier New,8,0"
)
xt "22000,10800,37500,11600"
st "miso             : std_logic
"
)
)
*83 (SaComponent
uid 2421,0
optionalChildren [
*84 (CptPort
uid 2406,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2407,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "250,13625,1000,14375"
)
tg (CPTG
uid 2408,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 2409,0
va (VaSet
)
xt "2000,13500,3300,14500"
st "clk"
blo "2000,14300"
)
)
thePort (LogicalPort
decl (Decl
n "clk"
t "STD_LOGIC"
preAdd 0
posAdd 0
o 1
suid 1,0
)
)
)
*85 (CptPort
uid 2410,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2411,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "250,14625,1000,15375"
)
tg (CPTG
uid 2412,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 2413,0
va (VaSet
)
xt "2000,14500,6200,15500"
st "trigger_in"
blo "2000,15300"
)
)
thePort (LogicalPort
decl (Decl
n "trigger_in"
t "STD_LOGIC"
prec "--           rst : in  STD_LOGIC;"
preAdd 0
posAdd 0
o 2
suid 2,0
)
)
)
*86 (CptPort
uid 2414,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2415,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "13000,14625,13750,15375"
)
tg (CPTG
uid 2416,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 2417,0
va (VaSet
)
xt "7400,14500,12000,15500"
st "trigger_out"
ju 2
blo "12000,15300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "trigger_out"
t "STD_LOGIC"
preAdd 0
posAdd 0
o 3
suid 3,0
i "'0'"
)
)
)
*87 (CommentText
uid 2418,0
ps "EdgeToEdgeStrategy"
shape (Rectangle
uid 2419,0
layer 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
lineColor "0,0,32768"
)
xt "500,3000,15500,7000"
)
oxt "24500,3000,39500,7000"
text (MLText
uid 2420,0
va (VaSet
fg "0,0,32768"
)
xt "700,3200,13600,7200"
st "
-- Uncomment the following library declaration if instantiating
-- any Xilinx primitives in this code.
library UNISIM;
use UNISIM.VComponents.all;

"
tm "CommentText"
wrapOption 3
visibleHeight 4000
visibleWidth 15000
)
included 1
)
]
shape (Rectangle
uid 2422,0
va (VaSet
vasetType 1
fg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "1000,13000,13000,18000"
)
oxt "25000,13000,37000,18000"
ttg (MlTextGroup
uid 2423,0
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*88 (Text
uid 2424,0
va (VaSet
font "Arial,8,1"
)
xt "1200,18000,12800,19000"
st "FACT_FAD_test_devices_lib"
blo "1200,18800"
tm "BdLibraryNameMgr"
)
*89 (Text
uid 2425,0
va (VaSet
font "Arial,8,1"
)
xt "1200,19000,5600,20000"
st "debouncer"
blo "1200,19800"
tm "CptNameMgr"
)
*90 (Text
uid 2426,0
va (VaSet
font "Arial,8,1"
)
xt "1200,20000,2200,21000"
st "I0"
blo "1200,20800"
tm "InstanceNameMgr"
)
]
)
ga (GenericAssociation
uid 2427,0
ps "EdgeToEdgeStrategy"
matrix (Matrix
uid 2428,0
text (MLText
uid 2429,0
va (VaSet
font "Courier New,8,0"
)
xt "500,6200,15500,7000"
st "WIDTH = 17    ( INTEGER )  
"
)
header ""
)
elements [
(GiElement
name "WIDTH"
type "INTEGER"
value "17"
)
]
)
viewicon (ZoomableIcon
uid 2430,0
sl 0
va (VaSet
vasetType 1
fg "49152,49152,49152"
)
xt "1250,16250,2750,17750"
iconName "VhdlFileViewIcon.png"
iconMaskName "VhdlFileViewIcon.msk"
ftype 10
)
ordering 1
viewiconposition 0
portVis (PortSigDisplay
)
archFileType "UNKNOWN"
)
*91 (Net
uid 2431,0
decl (Decl
n "trigger_out"
t "STD_LOGIC"
preAdd 0
posAdd 0
o 20
suid 48,0
i "'0'"
)
declText (MLText
uid 2432,0
va (VaSet
font "Courier New,8,0"
)
xt "22000,20600,45000,21400"
st "SIGNAL trigger_out      : STD_LOGIC := '0'
"
)
)
*92 (Net
uid 2439,0
decl (Decl
n "clk"
t "STD_LOGIC"
preAdd 0
posAdd 0
o 21
suid 49,0
)
declText (MLText
uid 2440,0
va (VaSet
font "Courier New,8,0"
)
xt "22000,12600,41000,13400"
st "SIGNAL clk              : STD_LOGIC
"
)
)
*93 (Net
uid 2447,0
decl (Decl
n "trigger_in"
t "STD_LOGIC"
prec "--           rst : in  STD_LOGIC;"
preAdd 0
posAdd 0
o 22
suid 50,0
)
declText (MLText
uid 2448,0
va (VaSet
font "Courier New,8,0"
)
xt "22000,19000,41000,20600"
st "--           rst : in  STD_LOGIC;
SIGNAL trigger_in       : STD_LOGIC
"
)
)
*94 (Wire
uid 214,0
shape (OrthoPolyLine
uid 215,0
va (VaSet
vasetType 3
)
xt "21750,40000,56000,40000"
pts [
"21750,40000"
"56000,40000"
]
)
start &74
end &21
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 218,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 219,0
va (VaSet
)
xt "38000,39000,39700,40000"
st "sclk"
blo "38000,39800"
tm "WireNameMgr"
)
)
on &12
)
*95 (Wire
uid 222,0
shape (OrthoPolyLine
uid 223,0
va (VaSet
vasetType 3
)
xt "10000,40000,12250,40000"
pts [
"12250,40000"
"10000,40000"
]
)
start &73
end &14
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 226,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 227,0
va (VaSet
isHidden 1
)
xt "12000,39000,16200,40000"
st "clk_50MHz"
blo "12000,39800"
tm "WireNameMgr"
)
)
on &13
)
*96 (Wire
uid 244,0
shape (OrthoPolyLine
uid 245,0
va (VaSet
vasetType 3
)
xt "53750,22000,55000,22000"
pts [
"53750,22000"
"55000,22000"
]
)
start &68
end &17
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 248,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 249,0
va (VaSet
isHidden 1
)
xt "55000,21000,57000,22000"
st "miso"
blo "55000,21800"
tm "WireNameMgr"
)
)
on &82
)
*97 (Wire
uid 252,0
shape (OrthoPolyLine
uid 253,0
va (VaSet
vasetType 3
)
xt "53750,24000,55000,24000"
pts [
"53750,24000"
"55000,24000"
]
)
start &61
end &18
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 256,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 257,0
va (VaSet
isHidden 1
)
xt "55000,23000,57800,24000"
st "dac_cs"
blo "55000,23800"
tm "WireNameMgr"
)
)
on &15
)
*98 (Wire
uid 260,0
shape (OrthoPolyLine
uid 261,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "53750,29000,55000,29000"
pts [
"53750,29000"
"55000,29000"
]
)
start &62
end &19
sat 32
eat 32
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
uid 264,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 265,0
va (VaSet
isHidden 1
)
xt "57000,28000,60900,29000"
st "sensor_cs"
blo "57000,28800"
tm "WireNameMgr"
)
)
on &16
)
*99 (Wire
uid 451,0
shape (OrthoPolyLine
uid 452,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "26750,28000,36250,29000"
pts [
"36250,28000"
"32000,28000"
"32000,29000"
"26750,29000"
]
)
start &60
end &51
sat 32
eat 32
sty 1
st 0
sf 1
si 0
tg (WTG
uid 455,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 456,0
va (VaSet
)
xt "31000,27000,35800,28000"
st "data : (15:0)"
blo "31000,27800"
tm "WireNameMgr"
)
)
on &22
)
*100 (Wire
uid 489,0
shape (OrthoPolyLine
uid 490,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "4000,26000,8250,26000"
pts [
"4000,26000"
"8250,26000"
]
)
start &23
end &43
sat 32
eat 32
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
uid 493,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 494,0
va (VaSet
isHidden 1
)
xt "11000,28000,14700,29000"
st "dac_array"
blo "11000,28800"
tm "WireNameMgr"
)
)
on &24
)
*101 (Wire
uid 1227,0
shape (OrthoPolyLine
uid 1228,0
va (VaSet
vasetType 3
)
xt "4000,24000,8250,24000"
pts [
"8250,24000"
"4000,24000"
]
)
start &40
end &20
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 1229,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 1230,0
va (VaSet
isHidden 1
)
xt "7250,31000,12050,32000"
st "config_start"
blo "7250,31800"
tm "WireNameMgr"
)
)
on &26
)
*102 (Wire
uid 1233,0
shape (OrthoPolyLine
uid 1234,0
va (VaSet
vasetType 3
)
xt "4000,27000,8250,27000"
pts [
"8250,27000"
"4000,27000"
]
)
start &41
end &25
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 1235,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 1236,0
va (VaSet
isHidden 1
)
xt "10250,36000,15350,37000"
st "config_ready"
blo "10250,36800"
tm "WireNameMgr"
)
)
on &27
)
*103 (Wire
uid 1245,0
shape (OrthoPolyLine
uid 1246,0
va (VaSet
vasetType 3
)
xt "26750,30000,36250,32000"
pts [
"26750,32000"
"32000,32000"
"32000,30000"
"36250,30000"
]
)
start &46
end &64
sat 32
eat 32
st 0
sf 1
si 0
tg (WTG
uid 1247,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 1248,0
va (VaSet
)
xt "47000,25000,53700,26000"
st "dac_config_ready"
blo "47000,25800"
tm "WireNameMgr"
)
)
on &28
)
*104 (Wire
uid 1251,0
shape (OrthoPolyLine
uid 1252,0
va (VaSet
vasetType 3
)
xt "26750,25000,36250,26000"
pts [
"26750,26000"
"29000,26000"
"29000,25000"
"36250,25000"
]
)
start &45
end &63
sat 32
eat 32
st 0
sf 1
si 0
tg (WTG
uid 1253,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 1254,0
va (VaSet
)
xt "29000,24000,35400,25000"
st "dac_config_start"
blo "29000,24800"
tm "WireNameMgr"
)
)
on &29
)
*105 (Wire
uid 1328,0
shape (OrthoPolyLine
uid 1329,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "26750,23000,36250,23000"
pts [
"36250,23000"
"26750,23000"
]
)
start &58
end &49
sat 32
eat 32
sty 1
st 0
sf 1
si 0
tg (WTG
uid 1332,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 1333,0
va (VaSet
)
xt "29000,22000,34200,23000"
st "dac_id : (2:0)"
blo "29000,22800"
tm "WireNameMgr"
)
)
on &30
)
*106 (Wire
uid 1336,0
shape (OrthoPolyLine
uid 1337,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "26750,24000,36250,24000"
pts [
"36250,24000"
"26750,24000"
]
)
start &59
end &50
sat 32
eat 32
sty 1
st 0
sf 1
si 0
tg (WTG
uid 1340,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 1341,0
va (VaSet
)
xt "29000,23000,35300,24000"
st "sensor_id : (1:0)"
blo "29000,23800"
tm "WireNameMgr"
)
)
on &31
)
*107 (Wire
uid 1344,0
shape (OrthoPolyLine
uid 1345,0
va (VaSet
vasetType 3
)
xt "26750,26000,36250,27000"
pts [
"26750,27000"
"32000,27000"
"32000,26000"
"36250,26000"
]
)
start &47
end &65
sat 32
eat 32
st 0
sf 1
si 0
tg (WTG
uid 1348,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 1349,0
va (VaSet
)
xt "29000,25000,34000,26000"
st "sensor_start"
blo "29000,25800"
tm "WireNameMgr"
)
)
on &32
)
*108 (Wire
uid 1352,0
shape (OrthoPolyLine
uid 1353,0
va (VaSet
vasetType 3
)
xt "26750,31000,36250,33000"
pts [
"36250,31000"
"33000,31000"
"33000,33000"
"26750,33000"
]
)
start &66
end &48
sat 32
eat 32
st 0
sf 1
si 0
tg (WTG
uid 1356,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 1357,0
va (VaSet
)
xt "47000,26000,52000,27000"
st "sensor_valid"
blo "47000,26800"
tm "WireNameMgr"
)
)
on &33
)
*109 (Wire
uid 1469,0
shape (OrthoPolyLine
uid 1470,0
va (VaSet
vasetType 3
)
xt "4000,23000,8250,23000"
pts [
"8250,23000"
"4000,23000"
]
)
start &39
sat 32
eat 16
st 0
sf 1
si 0
tg (WTG
uid 1473,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 1474,0
va (VaSet
)
xt "5000,22000,6700,23000"
st "sclk"
blo "5000,22800"
tm "WireNameMgr"
)
)
on &12
)
*110 (Wire
uid 1598,0
shape (OrthoPolyLine
uid 1599,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "4000,29000,8250,29000"
pts [
"8250,29000"
"4000,29000"
]
)
start &44
end &34
sat 32
eat 32
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
uid 1600,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 1601,0
va (VaSet
isHidden 1
)
xt "3250,32000,8450,33000"
st "sensor_array"
blo "3250,32800"
tm "WireNameMgr"
)
)
on &36
)
*111 (Wire
uid 1604,0
shape (OrthoPolyLine
uid 1605,0
va (VaSet
vasetType 3
)
xt "4000,28000,8250,28000"
pts [
"8250,28000"
"4000,28000"
]
)
start &42
end &35
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 1606,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 1607,0
va (VaSet
isHidden 1
)
xt "2250,35000,7550,36000"
st "sensor_ready"
blo "2250,35800"
tm "WireNameMgr"
)
)
on &37
)
*112 (Wire
uid 2002,0
shape (OrthoPolyLine
uid 2003,0
va (VaSet
vasetType 3
)
xt "32000,22000,36250,22000"
pts [
"32000,22000"
"36250,22000"
]
)
end &57
sat 16
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 2004,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 2005,0
va (VaSet
)
xt "33000,21000,34700,22000"
st "sclk"
blo "33000,21800"
tm "WireNameMgr"
)
)
on &12
)
*113 (Wire
uid 2310,0
shape (OrthoPolyLine
uid 2311,0
va (VaSet
vasetType 3
)
xt "4000,25000,8250,25000"
pts [
"8250,25000"
"4000,25000"
]
)
start &52
end &79
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 2314,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 2315,0
va (VaSet
isHidden 1
)
xt "5000,24000,10600,25000"
st "config_started"
blo "5000,24800"
tm "WireNameMgr"
)
)
on &78
)
*114 (Wire
uid 2357,0
shape (OrthoPolyLine
uid 2358,0
va (VaSet
vasetType 3
)
xt "53750,23000,55000,23000"
pts [
"53750,23000"
"55000,23000"
]
)
start &67
end &81
es 0
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 2361,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 2362,0
va (VaSet
isHidden 1
)
xt "55000,29000,57000,30000"
st "mosi"
blo "55000,29800"
tm "WireNameMgr"
)
)
on &80
)
*115 (Wire
uid 2433,0
shape (OrthoPolyLine
uid 2434,0
va (VaSet
vasetType 3
)
xt "13750,15000,21000,15000"
pts [
"13750,15000"
"21000,15000"
]
)
start &86
sat 32
eat 16
st 0
sf 1
si 0
tg (WTG
uid 2437,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 2438,0
va (VaSet
)
xt "15000,14000,19600,15000"
st "trigger_out"
blo "15000,14800"
tm "WireNameMgr"
)
)
on &91
)
*116 (Wire
uid 2441,0
shape (OrthoPolyLine
uid 2442,0
va (VaSet
vasetType 3
)
xt "-6000,14000,250,14000"
pts [
"-6000,14000"
"250,14000"
]
)
end &84
sat 16
eat 32
st 0
sf 1
si 0
tg (WTG
uid 2445,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 2446,0
va (VaSet
)
xt "-5000,13000,-3700,14000"
st "clk"
blo "-5000,13800"
tm "WireNameMgr"
)
)
on &92
)
*117 (Wire
uid 2449,0
shape (OrthoPolyLine
uid 2450,0
va (VaSet
vasetType 3
)
xt "-6000,15000,250,15000"
pts [
"-6000,15000"
"250,15000"
]
)
end &85
sat 16
eat 32
st 0
sf 1
si 0
tg (WTG
uid 2453,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 2454,0
va (VaSet
)
xt "-5000,14000,-800,15000"
st "trigger_in"
blo "-5000,14800"
tm "WireNameMgr"
)
)
on &93
)
]
bg "65535,65535,65535"
grid (Grid
origin "0,0"
isVisible 1
isActive 1
xSpacing 1000
xySpacing 1000
xShown 1
yShown 1
color "26368,26368,26368"
)
packageList *118 (PackageList
uid 41,0
stg "VerticalLayoutStrategy"
textVec [
*119 (Text
uid 42,0
va (VaSet
font "arial,8,1"
)
xt "0,0,5400,1000"
st "Package List"
blo "0,800"
)
*120 (MLText
uid 43,0
va (VaSet
)
xt "0,1000,14500,8000"
st "LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_arith.all;
USE ieee.std_logic_unsigned.all;
LIBRARY FACT_FAD_lib;
USE FACT_FAD_lib.fad_definitions.all;
USE IEEE.NUMERIC_STD.ALL;"
tm "PackageList"
)
]
)
compDirBlock (MlTextGroup
uid 44,0
stg "VerticalLayoutStrategy"
textVec [
*121 (Text
uid 45,0
va (VaSet
isHidden 1
font "Arial,8,1"
)
xt "20000,0,28100,1000"
st "Compiler Directives"
blo "20000,800"
)
*122 (Text
uid 46,0
va (VaSet
isHidden 1
font "Arial,8,1"
)
xt "20000,1000,29600,2000"
st "Pre-module directives:"
blo "20000,1800"
)
*123 (MLText
uid 47,0
va (VaSet
isHidden 1
)
xt "20000,2000,27500,4000"
st "`resetall
`timescale 1ns/10ps"
tm "BdCompilerDirectivesTextMgr"
)
*124 (Text
uid 48,0
va (VaSet
isHidden 1
font "Arial,8,1"
)
xt "20000,4000,30100,5000"
st "Post-module directives:"
blo "20000,4800"
)
*125 (MLText
uid 49,0
va (VaSet
isHidden 1
)
xt "20000,0,20000,0"
tm "BdCompilerDirectivesTextMgr"
)
*126 (Text
uid 50,0
va (VaSet
isHidden 1
font "Arial,8,1"
)
xt "20000,5000,29900,6000"
st "End-module directives:"
blo "20000,5800"
)
*127 (MLText
uid 51,0
va (VaSet
isHidden 1
)
xt "20000,6000,20000,6000"
tm "BdCompilerDirectivesTextMgr"
)
]
associable 1
)
windowSize "-4,-4,1684,1024"
viewArea "-3966,3162,62785,44694"
cachedDiagramExtent "-6400,0,63000,51000"
pageSetupInfo (PageSetupInfo
ptrCmd "\\\\printer\\hpk_e25,winspool,"
fileName "Samba Printer Port"
toPrinter 1
numCopies 2
paperWidth 1077
paperHeight 761
windowsPaperWidth 1077
windowsPaperHeight 761
paperType "A4"
windowsPaperName "A4"
windowsPaperType 9
exportedDirectories [
"$HDS_PROJECT_DIR/HTMLExport"
]
exportStdIncludeRefs 1
exportStdPackageRefs 1
)
hasePageBreakOrigin 1
pageBreakOrigin "-5000,0"
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shape (Rectangle
layer 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
lineColor "0,0,32768"
)
xt "0,0,15000,5000"
)
text (MLText
va (VaSet
fg "0,0,32768"
)
xt "200,200,2000,1200"
st "
Text
"
tm "CommentText"
wrapOption 3
visibleHeight 4600
visibleWidth 14600
)
)
defaultPanel (Panel
shape (RectFrame
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "32768,0,0"
lineWidth 2
)
xt "0,0,20000,20000"
)
title (TextAssociate
ps "TopLeftStrategy"
text (Text
va (VaSet
font "Arial,8,1"
)
xt "1000,1000,3800,2000"
st "Panel0"
blo "1000,1800"
tm "PanelText"
)
)
)
defaultBlk (Blk
shape (Rectangle
va (VaSet
vasetType 1
fg "39936,56832,65280"
lineColor "0,0,32768"
lineWidth 2
)
xt "0,0,8000,10000"
)
ttg (MlTextGroup
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*128 (Text
va (VaSet
font "Arial,8,1"
)
xt "2200,3500,5800,4500"
st "<library>"
blo "2200,4300"
tm "BdLibraryNameMgr"
)
*129 (Text
va (VaSet
font "Arial,8,1"
)
xt "2200,4500,5600,5500"
st "<block>"
blo "2200,5300"
tm "BlkNameMgr"
)
*130 (Text
va (VaSet
font "Arial,8,1"
)
xt "2200,5500,3200,6500"
st "I0"
blo "2200,6300"
tm "InstanceNameMgr"
)
]
)
ga (GenericAssociation
ps "EdgeToEdgeStrategy"
matrix (Matrix
text (MLText
va (VaSet
font "Courier New,8,0"
)
xt "2200,13500,2200,13500"
)
header ""
)
elements [
]
)
viewicon (ZoomableIcon
sl 0
va (VaSet
vasetType 1
fg "49152,49152,49152"
)
xt "0,0,1500,1500"
iconName "UnknownFile.png"
iconMaskName "UnknownFile.msk"
)
viewiconposition 0
)
defaultMWComponent (MWC
shape (Rectangle
va (VaSet
vasetType 1
fg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "0,0,8000,10000"
)
ttg (MlTextGroup
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*131 (Text
va (VaSet
font "Arial,8,1"
)
xt "550,3500,3450,4500"
st "Library"
blo "550,4300"
)
*132 (Text
va (VaSet
font "Arial,8,1"
)
xt "550,4500,7450,5500"
st "MWComponent"
blo "550,5300"
)
*133 (Text
va (VaSet
font "Arial,8,1"
)
xt "550,5500,1550,6500"
st "I0"
blo "550,6300"
tm "InstanceNameMgr"
)
]
)
ga (GenericAssociation
ps "EdgeToEdgeStrategy"
matrix (Matrix
text (MLText
va (VaSet
font "Courier New,8,0"
)
xt "-6450,1500,-6450,1500"
)
header ""
)
elements [
]
)
portVis (PortSigDisplay
)
prms (Property
pclass "params"
pname "params"
ptn "String"
)
visOptions (mwParamsVisibilityOptions
)
)
defaultSaComponent (SaComponent
shape (Rectangle
va (VaSet
vasetType 1
fg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "0,0,8000,10000"
)
ttg (MlTextGroup
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*134 (Text
va (VaSet
font "Arial,8,1"
)
xt "900,3500,3800,4500"
st "Library"
blo "900,4300"
tm "BdLibraryNameMgr"
)
*135 (Text
va (VaSet
font "Arial,8,1"
)
xt "900,4500,7100,5500"
st "SaComponent"
blo "900,5300"
tm "CptNameMgr"
)
*136 (Text
va (VaSet
font "Arial,8,1"
)
xt "900,5500,1900,6500"
st "I0"
blo "900,6300"
tm "InstanceNameMgr"
)
]
)
ga (GenericAssociation
ps "EdgeToEdgeStrategy"
matrix (Matrix
text (MLText
va (VaSet
font "Courier New,8,0"
)
xt "-6100,1500,-6100,1500"
)
header ""
)
elements [
]
)
viewicon (ZoomableIcon
sl 0
va (VaSet
vasetType 1
fg "49152,49152,49152"
)
xt "0,0,1500,1500"
iconName "UnknownFile.png"
iconMaskName "UnknownFile.msk"
)
viewiconposition 0
portVis (PortSigDisplay
)
archFileType "UNKNOWN"
)
defaultVhdlComponent (VhdlComponent
shape (Rectangle
va (VaSet
vasetType 1
fg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "0,0,8000,10000"
)
ttg (MlTextGroup
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*137 (Text
va (VaSet
font "Arial,8,1"
)
xt "500,3500,3400,4500"
st "Library"
blo "500,4300"
)
*138 (Text
va (VaSet
font "Arial,8,1"
)
xt "500,4500,7500,5500"
st "VhdlComponent"
blo "500,5300"
)
*139 (Text
va (VaSet
font "Arial,8,1"
)
xt "500,5500,1500,6500"
st "I0"
blo "500,6300"
tm "InstanceNameMgr"
)
]
)
ga (GenericAssociation
ps "EdgeToEdgeStrategy"
matrix (Matrix
text (MLText
va (VaSet
font "Courier New,8,0"
)
xt "-6500,1500,-6500,1500"
)
header ""
)
elements [
]
)
portVis (PortSigDisplay
)
entityPath ""
archName ""
archPath ""
)
defaultVerilogComponent (VerilogComponent
shape (Rectangle
va (VaSet
vasetType 1
fg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "-450,0,8450,10000"
)
ttg (MlTextGroup
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*140 (Text
va (VaSet
font "Arial,8,1"
)
xt "50,3500,2950,4500"
st "Library"
blo "50,4300"
)
*141 (Text
va (VaSet
font "Arial,8,1"
)
xt "50,4500,7950,5500"
st "VerilogComponent"
blo "50,5300"
)
*142 (Text
va (VaSet
font "Arial,8,1"
)
xt "50,5500,1050,6500"
st "I0"
blo "50,6300"
tm "InstanceNameMgr"
)
]
)
ga (GenericAssociation
ps "EdgeToEdgeStrategy"
matrix (Matrix
text (MLText
va (VaSet
font "Courier New,8,0"
)
xt "-6950,1500,-6950,1500"
)
header ""
)
elements [
]
)
entityPath ""
)
defaultHdlText (HdlText
shape (Rectangle
va (VaSet
vasetType 1
fg "65535,65535,37120"
lineColor "0,0,32768"
lineWidth 2
)
xt "0,0,8000,10000"
)
ttg (MlTextGroup
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*143 (Text
va (VaSet
font "Arial,8,1"
)
xt "3150,4000,4850,5000"
st "eb1"
blo "3150,4800"
tm "HdlTextNameMgr"
)
*144 (Text
va (VaSet
font "Arial,8,1"
)
xt "3150,5000,3950,6000"
st "1"
blo "3150,5800"
tm "HdlTextNumberMgr"
)
]
)
viewicon (ZoomableIcon
sl 0
va (VaSet
vasetType 1
fg "49152,49152,49152"
)
xt "0,0,1500,1500"
iconName "UnknownFile.png"
iconMaskName "UnknownFile.msk"
)
viewiconposition 0
)
defaultEmbeddedText (EmbeddedText
commentText (CommentText
ps "CenterOffsetStrategy"
shape (Rectangle
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "0,0,32768"
lineWidth 2
)
xt "0,0,18000,5000"
)
text (MLText
va (VaSet
)
xt "200,200,2000,1200"
st "
Text
"
tm "HdlTextMgr"
wrapOption 3
visibleHeight 4600
visibleWidth 17600
)
)
)
defaultGlobalConnector (GlobalConnector
shape (Circle
va (VaSet
vasetType 1
fg "65535,65535,0"
)
xt "-1000,-1000,1000,1000"
radius 1000
)
name (Text
va (VaSet
font "Arial,8,1"
)
xt "-500,-500,500,500"
st "G"
blo "-500,300"
)
)
defaultRipper (Ripper
ps "OnConnectorStrategy"
shape (Line2D
pts [
"0,0"
"1000,1000"
]
va (VaSet
vasetType 1
)
xt "0,0,1000,1000"
)
)
defaultBdJunction (BdJunction
ps "OnConnectorStrategy"
shape (Circle
va (VaSet
vasetType 1
)
xt "-400,-400,400,400"
radius 400
)
)
defaultPortIoIn (PortIoIn
shape (CompositeShape
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
sl 0
ro 270
xt "-2000,-375,-500,375"
)
(Line
sl 0
ro 270
xt "-500,0,0,0"
pts [
"-500,0"
"0,0"
]
)
]
)
stc 0
sf 1
tg (WTG
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
va (VaSet
)
xt "-1375,-1000,-1375,-1000"
ju 2
blo "-1375,-1000"
tm "WireNameMgr"
)
)
)
defaultPortIoOut (PortIoOut
shape (CompositeShape
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
sl 0
ro 270
xt "500,-375,2000,375"
)
(Line
sl 0
ro 270
xt "0,0,500,0"
pts [
"0,0"
"500,0"
]
)
]
)
stc 0
sf 1
tg (WTG
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
va (VaSet
)
xt "625,-1000,625,-1000"
blo "625,-1000"
tm "WireNameMgr"
)
)
)
defaultPortIoInOut (PortIoInOut
shape (CompositeShape
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Hexagon
sl 0
xt "500,-375,2000,375"
)
(Line
sl 0
xt "0,0,500,0"
pts [
"0,0"
"500,0"
]
)
]
)
stc 0
sf 1
tg (WTG
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
va (VaSet
)
xt "0,-375,0,-375"
blo "0,-375"
tm "WireNameMgr"
)
)
)
defaultPortIoBuffer (PortIoBuffer
shape (CompositeShape
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "0,0,32768"
)
optionalChildren [
(Hexagon
sl 0
xt "500,-375,2000,375"
)
(Line
sl 0
xt "0,0,500,0"
pts [
"0,0"
"500,0"
]
)
]
)
stc 0
sf 1
tg (WTG
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
va (VaSet
)
xt "0,-375,0,-375"
blo "0,-375"
tm "WireNameMgr"
)
)
)
defaultSignal (Wire
shape (OrthoPolyLine
va (VaSet
vasetType 3
)
pts [
"0,0"
"0,0"
]
)
ss 0
es 0
sat 32
eat 32
st 0
sf 1
si 0
tg (WTG
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
va (VaSet
)
xt "0,0,1900,1000"
st "sig0"
blo "0,800"
tm "WireNameMgr"
)
)
)
defaultBus (Wire
shape (OrthoPolyLine
va (VaSet
vasetType 3
lineWidth 2
)
pts [
"0,0"
"0,0"
]
)
ss 0
es 0
sat 32
eat 32
sty 1
st 0
sf 1
si 0
tg (WTG
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
va (VaSet
)
xt "0,0,2400,1000"
st "dbus0"
blo "0,800"
tm "WireNameMgr"
)
)
)
defaultBundle (Bundle
shape (OrthoPolyLine
va (VaSet
vasetType 3
lineColor "32768,0,0"
lineWidth 2
)
pts [
"0,0"
"0,0"
]
)
ss 0
es 0
sat 32
eat 32
textGroup (BiTextGroup
ps "ConnStartEndStrategy"
stg "VerticalLayoutStrategy"
first (Text
va (VaSet
)
xt "0,0,3000,1000"
st "bundle0"
blo "0,800"
tm "BundleNameMgr"
)
second (MLText
va (VaSet
)
xt "0,1000,1000,2000"
st "()"
tm "BundleContentsMgr"
)
)
bundleNet &0
)
defaultPortMapFrame (PortMapFrame
ps "PortMapFrameStrategy"
shape (RectFrame
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "0,0,32768"
lineWidth 2
)
xt "0,0,10000,12000"
)
portMapText (BiTextGroup
ps "BottomRightOffsetStrategy"
stg "VerticalLayoutStrategy"
first (MLText
va (VaSet
)
)
second (MLText
va (VaSet
)
tm "PortMapTextMgr"
)
)
)
defaultGenFrame (Frame
shape (RectFrame
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "26368,26368,26368"
lineStyle 2
lineWidth 2
)
xt "0,0,20000,20000"
)
title (TextAssociate
ps "TopLeftStrategy"
text (MLText
va (VaSet
)
xt "0,-1100,12600,-100"
st "g0: FOR i IN 0 TO n GENERATE"
tm "FrameTitleTextMgr"
)
)
seqNum (FrameSequenceNumber
ps "TopLeftStrategy"
shape (Rectangle
va (VaSet
vasetType 1
fg "65535,65535,65535"
)
xt "50,50,1250,1450"
)
num (Text
va (VaSet
)
xt "250,250,1050,1250"
st "1"
blo "250,1050"
tm "FrameSeqNumMgr"
)
)
decls (MlTextGroup
ps "BottomRightOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*145 (Text
va (VaSet
font "Arial,8,1"
)
xt "14100,20000,22000,21000"
st "Frame Declarations"
blo "14100,20800"
)
*146 (MLText
va (VaSet
)
xt "14100,21000,14100,21000"
tm "BdFrameDeclTextMgr"
)
]
)
)
defaultBlockFrame (Frame
shape (RectFrame
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "26368,26368,26368"
lineStyle 1
lineWidth 2
)
xt "0,0,20000,20000"
)
title (TextAssociate
ps "TopLeftStrategy"
text (MLText
va (VaSet
)
xt "0,-1100,7400,-100"
st "b0: BLOCK (guard)"
tm "FrameTitleTextMgr"
)
)
seqNum (FrameSequenceNumber
ps "TopLeftStrategy"
shape (Rectangle
va (VaSet
vasetType 1
fg "65535,65535,65535"
)
xt "50,50,1250,1450"
)
num (Text
va (VaSet
)
xt "250,250,1050,1250"
st "1"
blo "250,1050"
tm "FrameSeqNumMgr"
)
)
decls (MlTextGroup
ps "BottomRightOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*147 (Text
va (VaSet
font "Arial,8,1"
)
xt "14100,20000,22000,21000"
st "Frame Declarations"
blo "14100,20800"
)
*148 (MLText
va (VaSet
)
xt "14100,21000,14100,21000"
tm "BdFrameDeclTextMgr"
)
]
)
style 3
)
defaultSaCptPort (CptPort
ps "OnEdgeStrategy"
shape (Triangle
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "0,0,750,750"
)
tg (CPTG
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
va (VaSet
)
xt "0,750,1800,1750"
st "Port"
blo "0,1550"
)
)
thePort (LogicalPort
decl (Decl
n "Port"
t ""
o 0
)
)
)
defaultSaCptPortBuffer (CptPort
ps "OnEdgeStrategy"
shape (Diamond
va (VaSet
vasetType 1
fg "65535,65535,65535"
)
xt "0,0,750,750"
)
tg (CPTG
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
va (VaSet
)
xt "0,750,1800,1750"
st "Port"
blo "0,1550"
)
)
thePort (LogicalPort
m 3
decl (Decl
n "Port"
t ""
o 0
)
)
)
defaultDeclText (MLText
va (VaSet
font "Courier New,8,0"
)
)
archDeclarativeBlock (BdArchDeclBlock
uid 1,0
stg "BdArchDeclBlockLS"
declLabel (Text
uid 2,0
va (VaSet
font "Arial,8,1"
)
xt "20000,0,25400,1000"
st "Declarations"
blo "20000,800"
)
portLabel (Text
uid 3,0
va (VaSet
font "Arial,8,1"
)
xt "20000,1000,22700,2000"
st "Ports:"
blo "20000,1800"
)
preUserLabel (Text
uid 4,0
va (VaSet
isHidden 1
font "Arial,8,1"
)
xt "20000,0,23800,1000"
st "Pre User:"
blo "20000,800"
)
preUserText (MLText
uid 5,0
va (VaSet
isHidden 1
font "Courier New,8,0"
)
xt "20000,0,20000,0"
tm "BdDeclarativeTextMgr"
)
diagSignalLabel (Text
uid 6,0
va (VaSet
font "Arial,8,1"
)
xt "20000,11600,27100,12600"
st "Diagram Signals:"
blo "20000,12400"
)
postUserLabel (Text
uid 7,0
va (VaSet
isHidden 1
font "Arial,8,1"
)
xt "20000,0,24700,1000"
st "Post User:"
blo "20000,800"
)
postUserText (MLText
uid 8,0
va (VaSet
isHidden 1
font "Courier New,8,0"
)
xt "20000,0,20000,0"
tm "BdDeclarativeTextMgr"
)
showAttributes 1
)
commonDM (CommonDM
ldm (LogicalDM
suid 50,0
usingSuid 1
emptyRow *149 (LEmptyRow
)
uid 54,0
optionalChildren [
*150 (RefLabelRowHdr
)
*151 (TitleRowHdr
)
*152 (FilterRowHdr
)
*153 (RefLabelColHdr
tm "RefLabelColHdrMgr"
)
*154 (RowExpandColHdr
tm "RowExpandColHdrMgr"
)
*155 (GroupColHdr
tm "GroupColHdrMgr"
)
*156 (NameColHdr
tm "BlockDiagramNameColHdrMgr"
)
*157 (ModeColHdr
tm "BlockDiagramModeColHdrMgr"
)
*158 (TypeColHdr
tm "BlockDiagramTypeColHdrMgr"
)
*159 (BoundsColHdr
tm "BlockDiagramBoundsColHdrMgr"
)
*160 (InitColHdr
tm "BlockDiagramInitColHdrMgr"
)
*161 (EolColHdr
tm "BlockDiagramEolColHdrMgr"
)
*162 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "sclk"
t "std_logic"
o 6
suid 1,0
)
)
uid 390,0
)
*163 (LeafLogPort
port (LogicalPort
decl (Decl
n "clk_50MHz"
t "std_logic"
preAdd 0
posAdd 0
o 1
suid 2,0
)
)
uid 392,0
)
*164 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "dac_cs"
t "std_logic"
o 5
suid 5,0
)
)
uid 398,0
)
*165 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "sensor_cs"
t "std_logic_vector"
b "(3 DOWNTO 0)"
o 8
suid 6,0
)
)
uid 400,0
)
*166 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "data"
t "std_logic_vector"
b "(15 downto 0)"
o 14
suid 14,0
)
)
uid 497,0
)
*167 (LeafLogPort
port (LogicalPort
decl (Decl
n "dac_array"
t "dac_array_type"
o 3
suid 17,0
)
)
uid 499,0
)
*168 (LeafLogPort
port (LogicalPort
decl (Decl
n "config_start"
t "std_logic"
o 2
suid 27,0
)
)
uid 1255,0
)
*169 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "config_ready"
t "std_logic"
o 4
suid 28,0
)
)
uid 1257,0
)
*170 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "dac_config_ready"
t "std_logic"
o 11
suid 30,0
)
)
uid 1259,0
)
*171 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "dac_config_start"
t "std_logic"
o 12
suid 31,0
)
)
uid 1261,0
)
*172 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "dac_id"
t "std_logic_vector"
b "(2 DOWNTO 0)"
o 13
suid 32,0
)
)
uid 1358,0
)
*173 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "sensor_id"
t "std_logic_vector"
b "(1 DOWNTO 0)"
o 15
suid 33,0
)
)
uid 1360,0
)
*174 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "sensor_start"
t "std_logic"
o 16
suid 34,0
)
)
uid 1362,0
)
*175 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "sensor_valid"
t "std_logic"
o 17
suid 35,0
)
)
uid 1364,0
)
*176 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "sensor_array"
t "sensor_array_type"
o 7
suid 37,0
)
)
uid 1608,0
)
*177 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "sensor_ready"
t "std_logic"
o 9
suid 38,0
)
)
uid 1610,0
)
*178 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "config_started"
t "std_logic"
o 18
suid 45,0
i "'0'"
)
)
uid 2322,0
)
*179 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "mosi"
t "std_logic"
o 19
suid 46,0
i "'0'"
)
)
uid 2369,0
)
*180 (LeafLogPort
port (LogicalPort
m 2
decl (Decl
n "miso"
t "std_logic"
preAdd 0
posAdd 0
o 10
suid 47,0
)
)
uid 2404,0
)
*181 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "trigger_out"
t "STD_LOGIC"
preAdd 0
posAdd 0
o 20
suid 48,0
i "'0'"
)
)
uid 2455,0
)
*182 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "clk"
t "STD_LOGIC"
preAdd 0
posAdd 0
o 21
suid 49,0
)
)
uid 2457,0
)
*183 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "trigger_in"
t "STD_LOGIC"
prec "--           rst : in  STD_LOGIC;"
preAdd 0
posAdd 0
o 22
suid 50,0
)
)
uid 2459,0
)
]
)
pdm (PhysicalDM
displayShortBounds 1
editShortBounds 1
uid 67,0
optionalChildren [
*184 (Sheet
sheetRow (SheetRow
headerVa (MVa
cellColor "49152,49152,49152"
fontColor "0,0,0"
font "Tahoma,10,0"
)
cellVa (MVa
cellColor "65535,65535,65535"
fontColor "0,0,0"
font "Tahoma,10,0"
)
groupVa (MVa
cellColor "39936,56832,65280"
fontColor "0,0,0"
font "Tahoma,10,0"
)
emptyMRCItem *185 (MRCItem
litem &149
pos 22
dimension 20
)
uid 69,0
optionalChildren [
*186 (MRCItem
litem &150
pos 0
dimension 20
uid 70,0
)
*187 (MRCItem
litem &151
pos 1
dimension 23
uid 71,0
)
*188 (MRCItem
litem &152
pos 2
hidden 1
dimension 20
uid 72,0
)
*189 (MRCItem
litem &162
pos 0
dimension 20
uid 391,0
)
*190 (MRCItem
litem &163
pos 1
dimension 20
uid 393,0
)
*191 (MRCItem
litem &164
pos 2
dimension 20
uid 399,0
)
*192 (MRCItem
litem &165
pos 3
dimension 20
uid 401,0
)
*193 (MRCItem
litem &166
pos 9
dimension 20
uid 498,0
)
*194 (MRCItem
litem &167
pos 4
dimension 20
uid 500,0
)
*195 (MRCItem
litem &168
pos 5
dimension 20
uid 1256,0
)
*196 (MRCItem
litem &169
pos 6
dimension 20
uid 1258,0
)
*197 (MRCItem
litem &170
pos 10
dimension 20
uid 1260,0
)
*198 (MRCItem
litem &171
pos 11
dimension 20
uid 1262,0
)
*199 (MRCItem
litem &172
pos 12
dimension 20
uid 1359,0
)
*200 (MRCItem
litem &173
pos 13
dimension 20
uid 1361,0
)
*201 (MRCItem
litem &174
pos 14
dimension 20
uid 1363,0
)
*202 (MRCItem
litem &175
pos 15
dimension 20
uid 1365,0
)
*203 (MRCItem
litem &176
pos 7
dimension 20
uid 1609,0
)
*204 (MRCItem
litem &177
pos 8
dimension 20
uid 1611,0
)
*205 (MRCItem
litem &178
pos 16
dimension 20
uid 2323,0
)
*206 (MRCItem
litem &179
pos 17
dimension 20
uid 2370,0
)
*207 (MRCItem
litem &180
pos 18
dimension 20
uid 2405,0
)
*208 (MRCItem
litem &181
pos 19
dimension 20
uid 2456,0
)
*209 (MRCItem
litem &182
pos 20
dimension 20
uid 2458,0
)
*210 (MRCItem
litem &183
pos 21
dimension 20
uid 2460,0
)
]
)
sheetCol (SheetCol
propVa (MVa
cellColor "0,49152,49152"
fontColor "0,0,0"
font "Tahoma,10,0"
textAngle 90
)
uid 73,0
optionalChildren [
*211 (MRCItem
litem &153
pos 0
dimension 20
uid 74,0
)
*212 (MRCItem
litem &155
pos 1
dimension 50
uid 75,0
)
*213 (MRCItem
litem &156
pos 2
dimension 100
uid 76,0
)
*214 (MRCItem
litem &157
pos 3
dimension 50
uid 77,0
)
*215 (MRCItem
litem &158
pos 4
dimension 100
uid 78,0
)
*216 (MRCItem
litem &159
pos 5
dimension 100
uid 79,0
)
*217 (MRCItem
litem &160
pos 6
dimension 50
uid 80,0
)
*218 (MRCItem
litem &161
pos 7
dimension 80
uid 81,0
)
]
)
fixedCol 4
fixedRow 2
name "Ports"
uid 68,0
vaOverrides [
]
)
]
)
uid 53,0
)
genericsCommonDM (CommonDM
ldm (LogicalDM
emptyRow *219 (LEmptyRow
)
uid 83,0
optionalChildren [
*220 (RefLabelRowHdr
)
*221 (TitleRowHdr
)
*222 (FilterRowHdr
)
*223 (RefLabelColHdr
tm "RefLabelColHdrMgr"
)
*224 (RowExpandColHdr
tm "RowExpandColHdrMgr"
)
*225 (GroupColHdr
tm "GroupColHdrMgr"
)
*226 (NameColHdr
tm "GenericNameColHdrMgr"
)
*227 (TypeColHdr
tm "GenericTypeColHdrMgr"
)
*228 (InitColHdr
tm "GenericValueColHdrMgr"
)
*229 (PragmaColHdr
tm "GenericPragmaColHdrMgr"
)
*230 (EolColHdr
tm "GenericEolColHdrMgr"
)
]
)
pdm (PhysicalDM
displayShortBounds 1
editShortBounds 1
uid 95,0
optionalChildren [
*231 (Sheet
sheetRow (SheetRow
headerVa (MVa
cellColor "49152,49152,49152"
fontColor "0,0,0"
font "Tahoma,10,0"
)
cellVa (MVa
cellColor "65535,65535,65535"
fontColor "0,0,0"
font "Tahoma,10,0"
)
groupVa (MVa
cellColor "39936,56832,65280"
fontColor "0,0,0"
font "Tahoma,10,0"
)
emptyMRCItem *232 (MRCItem
litem &219
pos 0
dimension 20
)
uid 97,0
optionalChildren [
*233 (MRCItem
litem &220
pos 0
dimension 20
uid 98,0
)
*234 (MRCItem
litem &221
pos 1
dimension 23
uid 99,0
)
*235 (MRCItem
litem &222
pos 2
hidden 1
dimension 20
uid 100,0
)
]
)
sheetCol (SheetCol
propVa (MVa
cellColor "0,49152,49152"
fontColor "0,0,0"
font "Tahoma,10,0"
textAngle 90
)
uid 101,0
optionalChildren [
*236 (MRCItem
litem &223
pos 0
dimension 20
uid 102,0
)
*237 (MRCItem
litem &225
pos 1
dimension 50
uid 103,0
)
*238 (MRCItem
litem &226
pos 2
dimension 100
uid 104,0
)
*239 (MRCItem
litem &227
pos 3
dimension 100
uid 105,0
)
*240 (MRCItem
litem &228
pos 4
dimension 50
uid 106,0
)
*241 (MRCItem
litem &229
pos 5
dimension 50
uid 107,0
)
*242 (MRCItem
litem &230
pos 6
dimension 80
uid 108,0
)
]
)
fixedCol 3
fixedRow 2
name "Ports"
uid 96,0
vaOverrides [
]
)
]
)
uid 82,0
type 1
)
activeModelName "BlockDiag"
)
