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version "29.1"
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va (VaSet
)
xt "53000,67500,54900,68500"
st "CLK"
blo "53000,68300"
)
)
thePort (LogicalPort
decl (Decl
n "CLK"
t "std_logic"
o 1
suid 38,0
)
)
)
*28 (CptPort
uid 1389,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1390,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "51250,94625,52000,95375"
)
tg (CPTG
uid 1391,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1392,0
va (VaSet
)
xt "53000,94500,58900,95500"
st "adc_data_array"
blo "53000,95300"
)
)
thePort (LogicalPort
decl (Decl
n "adc_data_array"
t "adc_data_array_type"
o 6
suid 39,0
)
)
)
*29 (CptPort
uid 1511,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1512,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "51250,88625,52000,89375"
)
tg (CPTG
uid 1513,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1514,0
va (VaSet
)
xt "53000,88500,61000,89500"
st "adc_otr_array : (3:0)"
blo "53000,89300"
)
)
thePort (LogicalPort
decl (Decl
n "adc_otr_array"
t "std_logic_vector"
b "(3 DOWNTO 0)"
o 7
suid 40,0
)
)
)
*30 (CptPort
uid 1572,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1573,0
ro 270
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "51250,108625,52000,109375"
)
tg (CPTG
uid 1574,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1575,0
va (VaSet
)
xt "53000,108500,61500,109500"
st "drs_channel_id : (3:0)"
blo "53000,109300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "drs_channel_id"
t "std_logic_vector"
b "(3 downto 0)"
o 32
suid 48,0
i "(others => '0')"
)
)
)
*31 (CptPort
uid 1576,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1577,0
ro 270
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "51250,109625,52000,110375"
)
tg (CPTG
uid 1578,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1579,0
va (VaSet
)
xt "53000,109500,57300,110500"
st "drs_dwrite"
blo "53000,110300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "drs_dwrite"
t "std_logic"
o 33
suid 49,0
i "'1'"
)
)
)
*32 (CptPort
uid 1588,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1589,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "51250,104625,52000,105375"
)
tg (CPTG
uid 1590,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1591,0
va (VaSet
)
xt "53000,104500,58400,105500"
st "SROUT_in_0"
blo "53000,105300"
)
)
thePort (LogicalPort
decl (Decl
n "SROUT_in_0"
t "std_logic"
o 2
suid 42,0
)
)
)
*33 (CptPort
uid 1592,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1593,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "51250,105625,52000,106375"
)
tg (CPTG
uid 1594,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1595,0
va (VaSet
)
xt "53000,105500,58400,106500"
st "SROUT_in_1"
blo "53000,106300"
)
)
thePort (LogicalPort
decl (Decl
n "SROUT_in_1"
t "std_logic"
o 3
suid 43,0
)
)
)
*34 (CptPort
uid 1596,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1597,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "51250,106625,52000,107375"
)
tg (CPTG
uid 1598,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1599,0
va (VaSet
)
xt "53000,106500,58400,107500"
st "SROUT_in_2"
blo "53000,107300"
)
)
thePort (LogicalPort
decl (Decl
n "SROUT_in_2"
t "std_logic"
o 4
suid 44,0
)
)
)
*35 (CptPort
uid 1600,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1601,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "51250,107625,52000,108375"
)
tg (CPTG
uid 1602,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1603,0
va (VaSet
)
xt "53000,107500,58400,108500"
st "SROUT_in_3"
blo "53000,108300"
)
)
thePort (LogicalPort
decl (Decl
n "SROUT_in_3"
t "std_logic"
o 5
suid 45,0
)
)
)
*36 (CptPort
uid 2379,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2380,0
ro 270
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "51250,110625,52000,111375"
)
tg (CPTG
uid 2381,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 2382,0
va (VaSet
)
xt "53000,110500,57200,111500"
st "RSRLOAD"
blo "53000,111300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "RSRLOAD"
t "std_logic"
o 26
suid 56,0
i "'0'"
)
)
)
*37 (CptPort
uid 2383,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2384,0
ro 270
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "51250,112625,52000,113375"
)
tg (CPTG
uid 2385,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 2386,0
va (VaSet
)
xt "53000,112500,56000,113500"
st "SRCLK"
blo "53000,113300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "SRCLK"
t "std_logic"
o 27
suid 57,0
i "'0'"
)
)
)
*38 (CptPort
uid 2969,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2970,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80000,86625,80750,87375"
)
tg (CPTG
uid 2971,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 2972,0
va (VaSet
)
xt "76200,86500,79000,87500"
st "dac_cs"
ju 2
blo "79000,87300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "dac_cs"
t "std_logic"
o 30
suid 64,0
)
)
)
*39 (CptPort
uid 2973,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2974,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80000,97625,80750,98375"
)
tg (CPTG
uid 2975,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 2976,0
va (VaSet
)
xt "77300,97500,79000,98500"
st "sclk"
ju 2
blo "79000,98300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "sclk"
t "std_logic"
o 38
suid 62,0
)
)
)
*40 (CptPort
uid 2977,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2978,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80000,88625,80750,89375"
)
tg (CPTG
uid 2979,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 2980,0
va (VaSet
)
xt "72500,88500,79000,89500"
st "sensor_cs : (3:0)"
ju 2
blo "79000,89300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "sensor_cs"
t "std_logic_vector"
b "(3 DOWNTO 0)"
o 39
suid 65,0
)
)
)
*41 (CptPort
uid 2981,0
ps "OnEdgeStrategy"
shape (Diamond
uid 2982,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80000,98625,80750,99375"
)
tg (CPTG
uid 2983,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 2984,0
va (VaSet
)
xt "77600,98500,79000,99500"
st "sio"
ju 2
blo "79000,99300"
)
)
thePort (LogicalPort
m 2
decl (Decl
n "sio"
t "std_logic"
preAdd 0
posAdd 0
o 46
suid 63,0
)
)
)
*42 (CptPort
uid 3670,0
ps "OnEdgeStrategy"
shape (Triangle
uid 3671,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80000,99625,80750,100375"
)
tg (CPTG
uid 3672,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 3673,0
va (VaSet
)
xt "77000,99500,79000,100500"
st "mosi"
ju 2
blo "79000,100300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "mosi"
t "std_logic"
o 35
suid 66,0
i "'0'"
)
)
)
*43 (CptPort
uid 6427,0
ps "OnEdgeStrategy"
shape (Triangle
uid 6428,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80000,120625,80750,121375"
)
tg (CPTG
uid 6429,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 6430,0
va (VaSet
)
xt "76000,120500,79000,121500"
st "denable"
ju 2
blo "79000,121300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "denable"
t "std_logic"
eolc "-- default domino wave off"
posAdd 0
o 31
suid 67,0
i "'0'"
)
)
)
*44 (CptPort
uid 10046,0
ps "OnEdgeStrategy"
shape (Triangle
uid 10047,0
ro 270
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "51250,72625,52000,73375"
)
tg (CPTG
uid 10048,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 10049,0
va (VaSet
)
xt "53000,72500,57500,73500"
st "adc_clk_en"
blo "53000,73300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "adc_clk_en"
t "std_logic"
o 28
suid 69,0
i "'0'"
)
)
)
*45 (CptPort
uid 10246,0
ps "OnEdgeStrategy"
shape (Triangle
uid 10247,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80000,129625,80750,130375"
)
tg (CPTG
uid 10248,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 10249,0
va (VaSet
)
xt "73800,129500,79000,130500"
st "DCM_locked"
ju 2
blo "79000,130300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "DCM_locked"
t "std_logic"
preAdd 0
posAdd 0
o 17
suid 76,0
)
)
)
*46 (CptPort
uid 10250,0
ps "OnEdgeStrategy"
shape (Triangle
uid 10251,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80000,137625,80750,138375"
)
tg (CPTG
uid 10252,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 10253,0
va (VaSet
)
xt "71700,137500,79000,138500"
st "DCM_status : (7:0)"
ju 2
blo "79000,138300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "DCM_status"
t "std_logic_vector"
b "(7 downto 0)"
preAdd 0
posAdd 0
o 18
suid 75,0
)
)
)
*47 (CptPort
uid 10254,0
ps "OnEdgeStrategy"
shape (Triangle
uid 10255,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80000,135625,80750,136375"
)
tg (CPTG
uid 10256,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 10257,0
va (VaSet
)
xt "71300,135500,79000,136500"
st "LOCKED_extraOUT"
ju 2
blo "79000,136300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "LOCKED_extraOUT"
t "std_logic"
o 19
suid 70,0
)
)
)
*48 (CptPort
uid 10258,0
ps "OnEdgeStrategy"
shape (Triangle
uid 10259,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80000,138625,80750,139375"
)
tg (CPTG
uid 10260,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 10261,0
va (VaSet
)
xt "74200,138500,79000,139500"
st "offset : (7:0)"
ju 2
blo "79000,139300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "offset"
t "std_logic_vector"
b "(7 downto 0)"
preAdd 0
posAdd 0
o 36
suid 77,0
i "(OTHERS => '0')"
)
)
)
*49 (CptPort
uid 10262,0
ps "OnEdgeStrategy"
shape (Triangle
uid 10263,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80000,125625,80750,126375"
)
tg (CPTG
uid 10264,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 10265,0
va (VaSet
)
xt "74600,125500,79000,126500"
st "PS_DIR_IN"
ju 2
blo "79000,126300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "PS_DIR_IN"
t "std_logic"
o 24
suid 80,0
)
)
)
*50 (CptPort
uid 10266,0
ps "OnEdgeStrategy"
shape (Triangle
uid 10267,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80000,126625,80750,127375"
)
tg (CPTG
uid 10268,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 10269,0
va (VaSet
)
xt "74800,126500,79000,127500"
st "PS_DO_IN"
ju 2
blo "79000,127300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "PS_DO_IN"
t "std_logic"
o 25
suid 81,0
)
)
)
*51 (CptPort
uid 10270,0
ps "OnEdgeStrategy"
shape (Triangle
uid 10271,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80000,134625,80750,135375"
)
tg (CPTG
uid 10272,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 10273,0
va (VaSet
)
xt "74000,134500,79000,135500"
st "PSCLK_OUT"
ju 2
blo "79000,135300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "PSCLK_OUT"
t "std_logic"
o 20
suid 74,0
)
)
)
*52 (CptPort
uid 10274,0
ps "OnEdgeStrategy"
shape (Triangle
uid 10275,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80000,133625,80750,134375"
)
tg (CPTG
uid 10276,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 10277,0
va (VaSet
)
xt "71200,133500,79000,134500"
st "PSDONE_extraOUT"
ju 2
blo "79000,134300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "PSDONE_extraOUT"
t "std_logic"
o 21
suid 71,0
)
)
)
*53 (CptPort
uid 10278,0
ps "OnEdgeStrategy"
shape (Triangle
uid 10279,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80000,128625,80750,129375"
)
tg (CPTG
uid 10280,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 10281,0
va (VaSet
)
xt "74400,128500,79000,129500"
st "PSEN_OUT"
ju 2
blo "79000,129300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "PSEN_OUT"
t "std_logic"
o 22
suid 73,0
)
)
)
*54 (CptPort
uid 10282,0
ps "OnEdgeStrategy"
shape (Triangle
uid 10283,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80000,127625,80750,128375"
)
tg (CPTG
uid 10284,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 10285,0
va (VaSet
)
xt "72000,127500,79000,128500"
st "PSINCDEC_OUT"
ju 2
blo "79000,128300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "PSINCDEC_OUT"
t "std_logic"
o 23
suid 72,0
)
)
)
*55 (CptPort
uid 10286,0
ps "OnEdgeStrategy"
shape (Triangle
uid 10287,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80000,131625,80750,132375"
)
tg (CPTG
uid 10288,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 10289,0
va (VaSet
)
xt "76800,131500,79000,132500"
st "ready"
ju 2
blo "79000,132300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "ready"
t "std_logic"
preAdd 0
posAdd 0
o 37
suid 79,0
i "'0'"
)
)
)
*56 (CptPort
uid 10290,0
ps "OnEdgeStrategy"
shape (Triangle
uid 10291,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80000,132625,80750,133375"
)
tg (CPTG
uid 10292,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 10293,0
va (VaSet
)
xt "76100,132500,79000,133500"
st "shifting"
ju 2
blo "79000,133300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "shifting"
t "std_logic"
prec "-- status:"
preAdd 0
posAdd 0
o 40
suid 78,0
i "'0'"
)
)
)
*57 (CptPort
uid 10320,0
ps "OnEdgeStrategy"
shape (Triangle
uid 10321,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80000,123625,80750,124375"
)
tg (CPTG
uid 10322,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 10323,0
va (VaSet
)
xt "74200,123500,79000,124500"
st "CLK25_OUT"
ju 2
blo "79000,124300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "CLK25_OUT"
t "std_logic"
o 12
suid 83,0
)
)
)
*58 (CptPort
uid 10324,0
ps "OnEdgeStrategy"
shape (Triangle
uid 10325,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80000,124625,80750,125375"
)
tg (CPTG
uid 10326,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 10327,0
va (VaSet
)
xt "72800,124500,79000,125500"
st "CLK25_PSOUT"
ju 2
blo "79000,125300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "CLK25_PSOUT"
t "std_logic"
o 13
suid 84,0
)
)
)
*59 (CptPort
uid 10328,0
ps "OnEdgeStrategy"
shape (Triangle
uid 10329,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80000,122625,80750,123375"
)
tg (CPTG
uid 10330,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 10331,0
va (VaSet
)
xt "74200,122500,79000,123500"
st "CLK50_OUT"
ju 2
blo "79000,123300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "CLK50_OUT"
t "std_logic"
o 14
suid 82,0
)
)
)
]
shape (Rectangle
uid 170,0
va (VaSet
vasetType 1
fg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "52000,66000,80000,140000"
)
oxt "15000,-1000,43000,27000"
ttg (MlTextGroup
uid 171,0
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*60 (Text
uid 172,0
va (VaSet
font "Arial,8,1"
)
xt "52200,123000,58400,124000"
st "FACT_FAD_lib"
blo "52200,123800"
tm "BdLibraryNameMgr"
)
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uid 173,0
va (VaSet
font "Arial,8,1"
)
xt "52200,124000,56400,125000"
st "FAD_main"
blo "52200,124800"
tm "CptNameMgr"
)
*62 (Text
uid 174,0
va (VaSet
font "Arial,8,1"
)
xt "52200,125000,58000,126000"
st "I_board_main"
blo "52200,125800"
tm "InstanceNameMgr"
)
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ga (GenericAssociation
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ps "EdgeToEdgeStrategy"
matrix (Matrix
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text (MLText
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va (VaSet
font "Courier New,8,0"
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xt "52000,65200,81500,66000"
st "RAMADDRWIDTH64b = LOG2_OF_RAM_SIZE_64B    ( integer )  "
)
header ""
)
elements [
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type "integer"
value "LOG2_OF_RAM_SIZE_64B"
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viewicon (ZoomableIcon
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sl 0
va (VaSet
vasetType 1
fg "49152,49152,49152"
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xt "52250,138250,53750,139750"
iconName "BlockDiagram.png"
iconMaskName "BlockDiagram.msk"
ftype 1
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viewiconposition 0
portVis (PortSigDisplay
)
archFileType "UNKNOWN"
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shape (CompositeShape
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va (VaSet
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fg "0,0,32768"
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(Line
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stc 0
sf 1
tg (WTG
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ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
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va (VaSet
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xt "16900,77500,19000,78500"
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blo "19000,78300"
tm "WireNameMgr"
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*64 (PortIoIn
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shape (CompositeShape
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va (VaSet
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fg "0,0,32768"
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(Line
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xt "20500,68000,21000,68000"
pts [
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tg (WTG
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ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
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va (VaSet
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xt "15200,67500,18000,68500"
st "X_50M"
ju 2
blo "18000,68300"
tm "WireNameMgr"
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xt "32000,83000,44000,87000"
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oxt "12000,27000,20000,31000"
text (MLText
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va (VaSet
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xt "32200,83200,39700,86200"
st "
-- hard-wired IDs
board_id <= \"0101\";
crate_id <= \"01\";
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tm "HdlTextMgr"
wrapOption 3
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)
)
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shape (Rectangle
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va (VaSet
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lineColor "0,0,32768"
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xt "24000,80000,32000,87000"
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ttg (MlTextGroup
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tm "HdlTextNameMgr"
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va (VaSet
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xt "26150,82000,26950,83000"
st "1"
blo "26150,82800"
tm "HdlTextNumberMgr"
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viewicon (ZoomableIcon
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sl 0
va (VaSet
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xt "24250,85250,25750,86750"
iconName "TextFile.png"
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b "(3 downto 0)"
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o 55
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declText (MLText
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va (VaSet
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xt "39000,57600,67500,58400"
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)
)
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n "crate_id"
t "std_logic_vector"
b "(1 downto 0)"
o 56
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declText (MLText
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va (VaSet
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xt "39000,58400,67500,59200"
st "SIGNAL crate_id        : std_logic_vector(1 downto 0)
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shape (CompositeShape
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va (VaSet
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fg "0,0,32768"
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xt "111500,70625,113000,71375"
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(Line
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ro 270
xt "111000,71000,111500,71000"
pts [
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stc 0
sf 1
tg (WTG
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ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
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va (VaSet
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xt "114000,70500,117100,71500"
st "W_RES"
blo "114000,71300"
tm "WireNameMgr"
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*72 (PortIoOut
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shape (CompositeShape
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va (VaSet
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fg "0,0,32768"
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optionalChildren [
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xt "111500,67625,113000,68375"
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(Line
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sl 0
ro 270
xt "111000,68000,111500,68000"
pts [
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stc 0
sf 1
tg (WTG
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ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
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va (VaSet
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xt "114000,67500,116000,68500"
st "W_A"
blo "114000,68300"
tm "WireNameMgr"
)
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*73 (PortIoOut
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shape (CompositeShape
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va (VaSet
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optionalChildren [
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xt "111500,74625,113000,75375"
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(Line
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sl 0
ro 270
xt "111000,75000,111500,75000"
pts [
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stc 0
sf 1
tg (WTG
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ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
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va (VaSet
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xt "114000,74500,116600,75500"
st "W_CS"
blo "114000,75300"
tm "WireNameMgr"
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*74 (PortIoInOut
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shape (CompositeShape
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va (VaSet
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fg "0,0,32768"
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optionalChildren [
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uid 492,0
sl 0
xt "111500,68625,113000,69375"
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(Line
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sl 0
xt "111000,69000,111500,69000"
pts [
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]
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stc 0
sf 1
tg (WTG
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ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
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va (VaSet
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xt "114000,68500,116100,69500"
st "W_D"
blo "114000,69300"
tm "WireNameMgr"
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)
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*75 (PortIoIn
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shape (CompositeShape
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va (VaSet
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fg "0,0,32768"
)
optionalChildren [
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uid 498,0
sl 0
ro 90
xt "111500,73625,113000,74375"
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(Line
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sl 0
ro 90
xt "111000,74000,111500,74000"
pts [
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"111000,74000"
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)
]
)
stc 0
sf 1
tg (WTG
uid 500,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
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va (VaSet
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xt "114000,73500,116800,74500"
st "W_INT"
blo "114000,74300"
tm "WireNameMgr"
)
)
)
*76 (PortIoOut
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shape (CompositeShape
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va (VaSet
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fg "0,0,32768"
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optionalChildren [
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uid 504,0
sl 0
ro 270
xt "111500,71625,113000,72375"
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(Line
uid 505,0
sl 0
ro 270
xt "111000,72000,111500,72000"
pts [
"111000,72000"
"111500,72000"
]
)
]
)
stc 0
sf 1
tg (WTG
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ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
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va (VaSet
)
xt "114000,71500,116700,72500"
st "W_RD"
blo "114000,72300"
tm "WireNameMgr"
)
)
)
*77 (PortIoOut
uid 508,0
shape (CompositeShape
uid 509,0
va (VaSet
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fg "0,0,32768"
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optionalChildren [
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uid 510,0
sl 0
ro 270
xt "111500,72625,113000,73375"
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(Line
uid 511,0
sl 0
ro 270
xt "111000,73000,111500,73000"
pts [
"111000,73000"
"111500,73000"
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)
]
)
stc 0
sf 1
tg (WTG
uid 512,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
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va (VaSet
)
xt "114000,72500,116800,73500"
st "W_WR"
blo "114000,73300"
tm "WireNameMgr"
)
)
)
*78 (Net
uid 1465,0
decl (Decl
n "adc_data_array"
t "adc_data_array_type"
o 54
suid 29,0
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declText (MLText
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va (VaSet
font "Courier New,8,0"
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xt "39000,56800,63000,57600"
st "SIGNAL adc_data_array  : adc_data_array_type
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)
)
*79 (Net
uid 2407,0
decl (Decl
n "RSRLOAD"
t "std_logic"
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suid 57,0
i "'0'"
)
declText (MLText
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va (VaSet
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)
xt "39000,31000,68500,31800"
st "RSRLOAD         : std_logic                      := '0'
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)
)
*80 (PortIoOut
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shape (CompositeShape
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va (VaSet
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fg "0,0,32768"
)
optionalChildren [
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uid 2417,0
sl 0
ro 90
xt "19000,110625,20500,111375"
)
(Line
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sl 0
ro 90
xt "20500,111000,21000,111000"
pts [
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"20500,111000"
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)
]
)
stc 0
sf 1
tg (WTG
uid 2419,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
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va (VaSet
)
xt "13800,110500,18000,111500"
st "RSRLOAD"
ju 2
blo "18000,111300"
tm "WireNameMgr"
)
)
)
*81 (Net
uid 2421,0
decl (Decl
n "SRCLK"
t "std_logic"
o 52
suid 58,0
i "'0'"
)
declText (MLText
uid 2422,0
va (VaSet
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xt "39000,55200,72000,56000"
st "SIGNAL SRCLK           : std_logic                      := '0'
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)
)
*82 (Net
uid 3019,0
decl (Decl
n "sensor_cs"
t "std_logic_vector"
b "(3 DOWNTO 0)"
o 59
suid 65,0
)
declText (MLText
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va (VaSet
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)
xt "39000,61600,67500,62400"
st "SIGNAL sensor_cs       : std_logic_vector(3 DOWNTO 0)
"
)
)
*83 (Net
uid 3025,0
decl (Decl
n "DAC_CS"
t "std_logic"
o 21
suid 66,0
)
declText (MLText
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va (VaSet
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)
xt "39000,19800,54000,20600"
st "DAC_CS          : std_logic
"
)
)
*84 (PortIoOut
uid 3153,0
shape (CompositeShape
uid 3154,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
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uid 3155,0
sl 0
ro 90
xt "19000,69625,20500,70375"
)
(Line
uid 3156,0
sl 0
ro 90
xt "20500,70000,21000,70000"
pts [
"21000,70000"
"20500,70000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3157,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
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va (VaSet
)
xt "15200,69500,18000,70500"
st "A_CLK"
ju 2
blo "18000,70300"
tm "WireNameMgr"
)
)
)
*85 (Net
uid 3216,0
decl (Decl
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t "STD_LOGIC"
preAdd 0
posAdd 0
o 14
suid 67,0
)
declText (MLText
uid 3217,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,13400,54000,14200"
st "X_50M           : STD_LOGIC
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)
)
*86 (Net
uid 3226,0
decl (Decl
n "TRG"
t "STD_LOGIC"
o 12
suid 68,0
)
declText (MLText
uid 3227,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,11800,54000,12600"
st "TRG             : STD_LOGIC
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)
)
*87 (HdlText
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optionalChildren [
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uid 3254,0
commentText (CommentText
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ps "CenterOffsetStrategy"
shape (Rectangle
uid 3256,0
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "0,0,32768"
lineWidth 2
)
xt "29000,71000,41000,77000"
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oxt "0,0,18000,5000"
text (MLText
uid 3257,0
va (VaSet
)
xt "29200,71200,41100,77200"
st "
-- ADC_CLK 2
A_CLK (0) <= CLK_25_PS;
A_CLK (1) <= CLK_25_PS;
A_CLK (2) <= CLK_25_PS;
A_CLK (3) <= CLK_25_PS;                                        
"
tm "HdlTextMgr"
wrapOption 3
visibleHeight 6000
visibleWidth 12000
)
)
)
]
shape (Rectangle
uid 3249,0
va (VaSet
vasetType 1
fg "65535,65535,37120"
lineColor "0,0,32768"
lineWidth 2
)
xt "24000,69000,29000,77000"
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oxt "0,0,8000,10000"
ttg (MlTextGroup
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ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
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va (VaSet
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xt "24150,73000,28350,74000"
st "ADC_CLK"
blo "24150,73800"
tm "HdlTextNameMgr"
)
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va (VaSet
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xt "24150,74000,24950,75000"
st "2"
blo "24150,74800"
tm "HdlTextNumberMgr"
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]
)
viewicon (ZoomableIcon
uid 3253,0
sl 0
va (VaSet
vasetType 1
fg "49152,49152,49152"
)
xt "24250,75250,25750,76750"
iconName "TextFile.png"
iconMaskName "TextFile.msk"
ftype 21
)
viewiconposition 0
)
*91 (Net
uid 3266,0
decl (Decl
n "A_CLK"
t "std_logic_vector"
b "(3 downto 0)"
o 16
suid 71,0
)
declText (MLText
uid 3267,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,15800,64000,16600"
st "A_CLK           : std_logic_vector(3 downto 0)
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)
)
*92 (Net
uid 3268,0
decl (Decl
n "CLK_25_PS"
t "std_logic"
o 50
suid 72,0
)
declText (MLText
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va (VaSet
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)
xt "39000,46400,57500,47200"
st "SIGNAL CLK_25_PS       : std_logic
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)
)
*93 (PortIoOut
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shape (CompositeShape
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va (VaSet
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fg "0,0,32768"
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optionalChildren [
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uid 3286,0
sl 0
ro 90
xt "19000,89625,20500,90375"
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(Line
uid 3287,0
sl 0
ro 90
xt "20500,90000,21000,90000"
pts [
"21000,90000"
"20500,90000"
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)
]
)
stc 0
sf 1
tg (WTG
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ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
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va (VaSet
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xt "14400,89500,18000,90500"
st "OE_ADC"
ju 2
blo "18000,90300"
tm "WireNameMgr"
)
)
)
*94 (Net
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decl (Decl
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t "STD_LOGIC"
preAdd 0
posAdd 0
o 30
suid 73,0
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declText (MLText
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va (VaSet
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xt "39000,27000,54000,27800"
st "OE_ADC          : STD_LOGIC
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)
*95 (PortIoIn
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shape (CompositeShape
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va (VaSet
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fg "0,0,32768"
)
optionalChildren [
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uid 3294,0
sl 0
ro 270
xt "19000,88625,20500,89375"
)
(Line
uid 3295,0
sl 0
ro 270
xt "20500,89000,21000,89000"
pts [
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"21000,89000"
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)
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)
stc 0
sf 1
tg (WTG
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ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
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va (VaSet
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xt "15000,88500,18000,89500"
st "A_OTR"
ju 2
blo "18000,89300"
tm "WireNameMgr"
)
)
)
*96 (Net
uid 3298,0
decl (Decl
n "A_OTR"
t "std_logic_vector"
b "(3 DOWNTO 0)"
o 5
suid 74,0
)
declText (MLText
uid 3299,0
va (VaSet
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xt "39000,7000,64000,7800"
st "A_OTR           : std_logic_vector(3 DOWNTO 0)
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)
)
*97 (HdlText
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optionalChildren [
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commentText (CommentText
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shape (Rectangle
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va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "0,0,32768"
lineWidth 2
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xt "32000,96000,44000,102000"
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oxt "0,0,18000,5000"
text (MLText
uid 3309,0
va (VaSet
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xt "32200,96200,44200,102200"
st "
-- ADC_DATA 3 
adc_data_array (0) <= A0_D;
adc_data_array (1) <= A1_D;
adc_data_array (2) <= A2_D;
adc_data_array (3) <= A3_D;                                       
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tm "HdlTextMgr"
wrapOption 3
visibleHeight 6000
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)
]
shape (Rectangle
uid 3301,0
va (VaSet
vasetType 1
fg "65535,65535,37120"
lineColor "0,0,32768"
lineWidth 2
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xt "24000,94000,32000,102000"
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oxt "0,0,8000,10000"
ttg (MlTextGroup
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ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
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va (VaSet
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xt "27150,95000,31750,96000"
st "ADC_DATA"
blo "27150,95800"
tm "HdlTextNameMgr"
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va (VaSet
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xt "27150,96000,27950,97000"
st "3"
blo "27150,96800"
tm "HdlTextNumberMgr"
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viewicon (ZoomableIcon
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sl 0
va (VaSet
vasetType 1
fg "49152,49152,49152"
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xt "24250,100250,25750,101750"
iconName "TextFile.png"
iconMaskName "TextFile.msk"
ftype 21
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viewiconposition 0
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*101 (PortIoIn
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shape (CompositeShape
uid 3311,0
va (VaSet
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fg "0,0,32768"
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optionalChildren [
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uid 3312,0
sl 0
ro 270
xt "19000,94625,20500,95375"
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(Line
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sl 0
ro 270
xt "20500,95000,21000,95000"
pts [
"20500,95000"
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)
]
)
stc 0
sf 1
tg (WTG
uid 3314,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3315,0
va (VaSet
)
xt "15700,94500,18000,95500"
st "A0_D"
ju 2
blo "18000,95300"
tm "WireNameMgr"
)
)
)
*102 (PortIoIn
uid 3332,0
shape (CompositeShape
uid 3333,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3334,0
sl 0
ro 270
xt "19000,95625,20500,96375"
)
(Line
uid 3335,0
sl 0
ro 270
xt "20500,96000,21000,96000"
pts [
"20500,96000"
"21000,96000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3336,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3337,0
va (VaSet
)
xt "15700,95500,18000,96500"
st "A1_D"
ju 2
blo "18000,96300"
tm "WireNameMgr"
)
)
)
*103 (PortIoIn
uid 3338,0
shape (CompositeShape
uid 3339,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3340,0
sl 0
ro 270
xt "19000,96625,20500,97375"
)
(Line
uid 3341,0
sl 0
ro 270
xt "20500,97000,21000,97000"
pts [
"20500,97000"
"21000,97000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3342,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3343,0
va (VaSet
)
xt "15700,96500,18000,97500"
st "A2_D"
ju 2
blo "18000,97300"
tm "WireNameMgr"
)
)
)
*104 (PortIoIn
uid 3344,0
shape (CompositeShape
uid 3345,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3346,0
sl 0
ro 270
xt "19000,97625,20500,98375"
)
(Line
uid 3347,0
sl 0
ro 270
xt "20500,98000,21000,98000"
pts [
"20500,98000"
"21000,98000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3348,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3349,0
va (VaSet
)
xt "15700,97500,18000,98500"
st "A3_D"
ju 2
blo "18000,98300"
tm "WireNameMgr"
)
)
)
*105 (Net
uid 3374,0
decl (Decl
n "A0_D"
t "std_logic_vector"
b "(11 DOWNTO 0)"
o 1
suid 79,0
)
declText (MLText
uid 3375,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,3800,64500,4600"
st "A0_D            : std_logic_vector(11 DOWNTO 0)
"
)
)
*106 (Net
uid 3376,0
decl (Decl
n "A1_D"
t "std_logic_vector"
b "(11 DOWNTO 0)"
o 2
suid 80,0
)
declText (MLText
uid 3377,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,4600,64500,5400"
st "A1_D            : std_logic_vector(11 DOWNTO 0)
"
)
)
*107 (Net
uid 3378,0
decl (Decl
n "A2_D"
t "std_logic_vector"
b "(11 DOWNTO 0)"
o 3
suid 81,0
)
declText (MLText
uid 3379,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,5400,64500,6200"
st "A2_D            : std_logic_vector(11 DOWNTO 0)
"
)
)
*108 (Net
uid 3380,0
decl (Decl
n "A3_D"
t "std_logic_vector"
b "(11 DOWNTO 0)"
o 4
suid 82,0
)
declText (MLText
uid 3381,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,6200,64500,7000"
st "A3_D            : std_logic_vector(11 DOWNTO 0)
"
)
)
*109 (HdlText
uid 3394,0
optionalChildren [
*110 (EmbeddedText
uid 3400,0
commentText (CommentText
uid 3401,0
ps "CenterOffsetStrategy"
shape (Rectangle
uid 3402,0
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "0,0,32768"
lineWidth 2
)
xt "32000,114000,44000,120000"
)
oxt "0,0,18000,5000"
text (MLText
uid 3403,0
va (VaSet
)
xt "32200,114200,44200,120200"
st "
-- SRCLK 4         
D0_SRCLK <= SRCLK;
D1_SRCLK <= SRCLK;
D2_SRCLK <= SRCLK;
D3_SRCLK <= SRCLK;                               
"
tm "HdlTextMgr"
wrapOption 3
visibleHeight 6000
visibleWidth 12000
)
)
)
]
shape (Rectangle
uid 3395,0
va (VaSet
vasetType 1
fg "65535,65535,37120"
lineColor "0,0,32768"
lineWidth 2
)
xt "24000,112000,32000,120000"
)
oxt "0,0,8000,10000"
ttg (MlTextGroup
uid 3396,0
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*111 (Text
uid 3397,0
va (VaSet
font "Arial,8,1"
)
xt "27150,113000,30350,114000"
st "SRCLK"
blo "27150,113800"
tm "HdlTextNameMgr"
)
*112 (Text
uid 3398,0
va (VaSet
font "Arial,8,1"
)
xt "27150,114000,27950,115000"
st "4"
blo "27150,114800"
tm "HdlTextNumberMgr"
)
]
)
viewicon (ZoomableIcon
uid 3399,0
sl 0
va (VaSet
vasetType 1
fg "49152,49152,49152"
)
xt "24250,118250,25750,119750"
iconName "TextFile.png"
iconMaskName "TextFile.msk"
ftype 21
)
viewiconposition 0
)
*113 (Net
uid 3460,0
decl (Decl
n "D0_SRCLK"
t "STD_LOGIC"
o 17
suid 87,0
)
declText (MLText
uid 3461,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,16600,54000,17400"
st "D0_SRCLK        : STD_LOGIC
"
)
)
*114 (Net
uid 3462,0
decl (Decl
n "D1_SRCLK"
t "STD_LOGIC"
o 18
suid 88,0
)
declText (MLText
uid 3463,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,17400,54000,18200"
st "D1_SRCLK        : STD_LOGIC
"
)
)
*115 (Net
uid 3464,0
decl (Decl
n "D2_SRCLK"
t "STD_LOGIC"
o 19
suid 89,0
)
declText (MLText
uid 3465,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,18200,54000,19000"
st "D2_SRCLK        : STD_LOGIC
"
)
)
*116 (Net
uid 3466,0
decl (Decl
n "D3_SRCLK"
t "STD_LOGIC"
o 20
suid 90,0
)
declText (MLText
uid 3467,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,19000,54000,19800"
st "D3_SRCLK        : STD_LOGIC
"
)
)
*117 (PortIoIn
uid 3476,0
shape (CompositeShape
uid 3477,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3478,0
sl 0
ro 270
xt "19000,104625,20500,105375"
)
(Line
uid 3479,0
sl 0
ro 270
xt "20500,105000,21000,105000"
pts [
"20500,105000"
"21000,105000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3480,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3481,0
va (VaSet
)
xt "13400,104500,18000,105500"
st "D0_SROUT"
ju 2
blo "18000,105300"
tm "WireNameMgr"
)
)
)
*118 (PortIoIn
uid 3482,0
shape (CompositeShape
uid 3483,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3484,0
sl 0
ro 270
xt "19000,105625,20500,106375"
)
(Line
uid 3485,0
sl 0
ro 270
xt "20500,106000,21000,106000"
pts [
"20500,106000"
"21000,106000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3486,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3487,0
va (VaSet
)
xt "13400,105500,18000,106500"
st "D1_SROUT"
ju 2
blo "18000,106300"
tm "WireNameMgr"
)
)
)
*119 (PortIoIn
uid 3488,0
shape (CompositeShape
uid 3489,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3490,0
sl 0
ro 270
xt "19000,106625,20500,107375"
)
(Line
uid 3491,0
sl 0
ro 270
xt "20500,107000,21000,107000"
pts [
"20500,107000"
"21000,107000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3492,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3493,0
va (VaSet
)
xt "13400,106500,18000,107500"
st "D2_SROUT"
ju 2
blo "18000,107300"
tm "WireNameMgr"
)
)
)
*120 (PortIoIn
uid 3494,0
shape (CompositeShape
uid 3495,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3496,0
sl 0
ro 270
xt "19000,107625,20500,108375"
)
(Line
uid 3497,0
sl 0
ro 270
xt "20500,108000,21000,108000"
pts [
"20500,108000"
"21000,108000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3498,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3499,0
va (VaSet
)
xt "13400,107500,18000,108500"
st "D3_SROUT"
ju 2
blo "18000,108300"
tm "WireNameMgr"
)
)
)
*121 (Net
uid 3500,0
decl (Decl
n "D0_SROUT"
t "std_logic"
o 6
suid 91,0
)
declText (MLText
uid 3501,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,7800,54000,8600"
st "D0_SROUT        : std_logic
"
)
)
*122 (Net
uid 3502,0
decl (Decl
n "D1_SROUT"
t "std_logic"
o 7
suid 92,0
)
declText (MLText
uid 3503,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,8600,54000,9400"
st "D1_SROUT        : std_logic
"
)
)
*123 (Net
uid 3504,0
decl (Decl
n "D2_SROUT"
t "std_logic"
o 8
suid 93,0
)
declText (MLText
uid 3505,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,9400,54000,10200"
st "D2_SROUT        : std_logic
"
)
)
*124 (Net
uid 3506,0
decl (Decl
n "D3_SROUT"
t "std_logic"
o 9
suid 94,0
)
declText (MLText
uid 3507,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,10200,54000,11000"
st "D3_SROUT        : std_logic
"
)
)
*125 (PortIoOut
uid 3508,0
shape (CompositeShape
uid 3509,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3510,0
sl 0
ro 90
xt "10000,125625,11500,126375"
)
(Line
uid 3511,0
sl 0
ro 90
xt "11500,126000,12000,126000"
pts [
"12000,126000"
"11500,126000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3512,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3513,0
va (VaSet
)
xt "7100,125500,9000,126500"
st "D_A"
ju 2
blo "9000,126300"
tm "WireNameMgr"
)
)
)
*126 (Net
uid 3514,0
decl (Decl
n "D_A"
t "std_logic_vector"
b "(3 DOWNTO 0)"
o 24
suid 95,0
i "(others => '0')"
)
declText (MLText
uid 3515,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,22200,74500,23000"
st "D_A             : std_logic_vector(3 DOWNTO 0)   := (others => '0')
"
)
)
*127 (PortIoOut
uid 3516,0
shape (CompositeShape
uid 3517,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3518,0
sl 0
ro 90
xt "19000,109625,20500,110375"
)
(Line
uid 3519,0
sl 0
ro 90
xt "20500,110000,21000,110000"
pts [
"21000,110000"
"20500,110000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3520,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3521,0
va (VaSet
)
xt "14500,109500,18000,110500"
st "DWRITE"
ju 2
blo "18000,110300"
tm "WireNameMgr"
)
)
)
*128 (Net
uid 3522,0
decl (Decl
n "DWRITE"
t "std_logic"
o 23
suid 96,0
i "'0'"
)
declText (MLText
uid 3523,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,21400,68500,22200"
st "DWRITE          : std_logic                      := '0'
"
)
)
*129 (PortIoOut
uid 3536,0
shape (CompositeShape
uid 3537,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3538,0
sl 0
ro 270
xt "111500,86625,113000,87375"
)
(Line
uid 3539,0
sl 0
ro 270
xt "111000,87000,111500,87000"
pts [
"111000,87000"
"111500,87000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3540,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3541,0
va (VaSet
)
xt "114000,86500,117600,87500"
st "DAC_CS"
blo "114000,87300"
tm "WireNameMgr"
)
)
)
*130 (HdlText
uid 3542,0
optionalChildren [
*131 (EmbeddedText
uid 3612,0
commentText (CommentText
uid 3613,0
ps "CenterOffsetStrategy"
shape (Rectangle
uid 3614,0
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "0,0,32768"
lineWidth 2
)
xt "88000,90000,100000,96000"
)
oxt "0,0,18000,5000"
text (MLText
uid 3615,0
va (VaSet
)
xt "88200,90200,100100,96200"
st "
-- T_CS 5
T0_CS <= sensor_cs (0); 
T1_CS <= sensor_cs (1);
T2_CS <= sensor_cs (2);
T3_CS <= sensor_cs (3);                                      
"
tm "HdlTextMgr"
wrapOption 3
visibleHeight 6000
visibleWidth 12000
)
)
)
]
shape (Rectangle
uid 3543,0
va (VaSet
vasetType 1
fg "65535,65535,37120"
lineColor "0,0,32768"
lineWidth 2
)
xt "100000,88000,108000,96000"
)
oxt "0,0,8000,10000"
ttg (MlTextGroup
uid 3544,0
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*132 (Text
uid 3545,0
va (VaSet
font "Arial,8,1"
)
xt "103150,89000,105550,90000"
st "T_CS"
blo "103150,89800"
tm "HdlTextNameMgr"
)
*133 (Text
uid 3546,0
va (VaSet
font "Arial,8,1"
)
xt "103150,90000,103950,91000"
st "5"
blo "103150,90800"
tm "HdlTextNumberMgr"
)
]
)
viewicon (ZoomableIcon
uid 3547,0
sl 0
va (VaSet
vasetType 1
fg "49152,49152,49152"
)
xt "100250,94250,101750,95750"
iconName "TextFile.png"
iconMaskName "TextFile.msk"
ftype 21
)
viewiconposition 0
)
*134 (PortIoOut
uid 3548,0
shape (CompositeShape
uid 3549,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3550,0
sl 0
ro 270
xt "111500,88625,113000,89375"
)
(Line
uid 3551,0
sl 0
ro 270
xt "111000,89000,111500,89000"
pts [
"111000,89000"
"111500,89000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3552,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3553,0
va (VaSet
)
xt "114000,88500,116800,89500"
st "T0_CS"
blo "114000,89300"
tm "WireNameMgr"
)
)
)
*135 (PortIoOut
uid 3554,0
shape (CompositeShape
uid 3555,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3556,0
sl 0
ro 270
xt "111500,89625,113000,90375"
)
(Line
uid 3557,0
sl 0
ro 270
xt "111000,90000,111500,90000"
pts [
"111000,90000"
"111500,90000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3558,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3559,0
va (VaSet
)
xt "114000,89500,116800,90500"
st "T1_CS"
blo "114000,90300"
tm "WireNameMgr"
)
)
)
*136 (PortIoOut
uid 3560,0
shape (CompositeShape
uid 3561,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3562,0
sl 0
ro 270
xt "111500,90625,113000,91375"
)
(Line
uid 3563,0
sl 0
ro 270
xt "111000,91000,111500,91000"
pts [
"111000,91000"
"111500,91000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3564,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3565,0
va (VaSet
)
xt "114000,90500,116800,91500"
st "T2_CS"
blo "114000,91300"
tm "WireNameMgr"
)
)
)
*137 (PortIoOut
uid 3566,0
shape (CompositeShape
uid 3567,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3568,0
sl 0
ro 270
xt "111500,91625,113000,92375"
)
(Line
uid 3569,0
sl 0
ro 270
xt "111000,92000,111500,92000"
pts [
"111000,92000"
"111500,92000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3570,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3571,0
va (VaSet
)
xt "114000,91500,116800,92500"
st "T3_CS"
blo "114000,92300"
tm "WireNameMgr"
)
)
)
*138 (Net
uid 3604,0
decl (Decl
n "T0_CS"
t "std_logic"
o 38
suid 101,0
)
declText (MLText
uid 3605,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,33400,54000,34200"
st "T0_CS           : std_logic
"
)
)
*139 (Net
uid 3606,0
decl (Decl
n "T1_CS"
t "std_logic"
o 39
suid 102,0
)
declText (MLText
uid 3607,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,34200,54000,35000"
st "T1_CS           : std_logic
"
)
)
*140 (Net
uid 3608,0
decl (Decl
n "T2_CS"
t "std_logic"
o 40
suid 103,0
)
declText (MLText
uid 3609,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,35000,54000,35800"
st "T2_CS           : std_logic
"
)
)
*141 (Net
uid 3610,0
decl (Decl
n "T3_CS"
t "std_logic"
o 41
suid 104,0
)
declText (MLText
uid 3611,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,35800,54000,36600"
st "T3_CS           : std_logic
"
)
)
*142 (PortIoOut
uid 3624,0
shape (CompositeShape
uid 3625,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3626,0
sl 0
ro 270
xt "111500,97625,113000,98375"
)
(Line
uid 3627,0
sl 0
ro 270
xt "111000,98000,111500,98000"
pts [
"111000,98000"
"111500,98000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3628,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3629,0
va (VaSet
)
xt "113750,97500,116550,98500"
st "S_CLK"
blo "113750,98300"
tm "WireNameMgr"
)
)
)
*143 (Net
uid 3630,0
decl (Decl
n "S_CLK"
t "std_logic"
o 37
suid 105,0
)
declText (MLText
uid 3631,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,32600,54000,33400"
st "S_CLK           : std_logic
"
)
)
*144 (Net
uid 3632,0
decl (Decl
n "W_A"
t "std_logic_vector"
b "(9 DOWNTO 0)"
o 43
suid 106,0
)
declText (MLText
uid 3633,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,37400,64000,38200"
st "W_A             : std_logic_vector(9 DOWNTO 0)
"
)
)
*145 (Net
uid 3634,0
decl (Decl
n "W_D"
t "std_logic_vector"
b "(15 DOWNTO 0)"
o 49
suid 107,0
)
declText (MLText
uid 3635,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,42200,64500,43000"
st "W_D             : std_logic_vector(15 DOWNTO 0)
"
)
)
*146 (Net
uid 3636,0
decl (Decl
n "W_RES"
t "std_logic"
o 46
suid 108,0
i "'1'"
)
declText (MLText
uid 3637,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,39800,68500,40600"
st "W_RES           : std_logic                      := '1'
"
)
)
*147 (Net
uid 3638,0
decl (Decl
n "W_RD"
t "std_logic"
o 45
suid 109,0
i "'1'"
)
declText (MLText
uid 3639,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,39000,68500,39800"
st "W_RD            : std_logic                      := '1'
"
)
)
*148 (Net
uid 3640,0
decl (Decl
n "W_WR"
t "std_logic"
o 47
suid 110,0
i "'1'"
)
declText (MLText
uid 3641,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,40600,68500,41400"
st "W_WR            : std_logic                      := '1'
"
)
)
*149 (Net
uid 3642,0
decl (Decl
n "W_INT"
t "std_logic"
o 13
suid 111,0
)
declText (MLText
uid 3643,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,12600,54000,13400"
st "W_INT           : std_logic
"
)
)
*150 (Net
uid 3644,0
decl (Decl
n "W_CS"
t "std_logic"
o 44
suid 112,0
i "'1'"
)
declText (MLText
uid 3645,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,38200,68500,39000"
st "W_CS            : std_logic                      := '1'
"
)
)
*151 (PortIoInOut
uid 3674,0
shape (CompositeShape
uid 3675,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Hexagon
uid 3676,0
sl 0
xt "111500,98625,113000,99375"
)
(Line
uid 3677,0
sl 0
xt "111000,99000,111500,99000"
pts [
"111000,99000"
"111500,99000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3678,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3679,0
va (VaSet
)
xt "114000,98500,116400,99500"
st "MISO"
blo "114000,99300"
tm "WireNameMgr"
)
)
)
*152 (Net
uid 3680,0
decl (Decl
n "MOSI"
t "std_logic"
o 29
suid 113,0
i "'0'"
)
declText (MLText
uid 3681,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,26200,68500,27000"
st "MOSI            : std_logic                      := '0'
"
)
)
*153 (PortIoOut
uid 3688,0
shape (CompositeShape
uid 3689,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3690,0
sl 0
ro 270
xt "111500,99625,113000,100375"
)
(Line
uid 3691,0
sl 0
ro 270
xt "111000,100000,111500,100000"
pts [
"111000,100000"
"111500,100000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3692,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3693,0
va (VaSet
)
xt "114000,99500,116400,100500"
st "MOSI"
blo "114000,100300"
tm "WireNameMgr"
)
)
)
*154 (Net
uid 3694,0
decl (Decl
n "MISO"
t "std_logic"
preAdd 0
posAdd 0
o 48
suid 114,0
)
declText (MLText
uid 3695,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,41400,54000,42200"
st "MISO            : std_logic
"
)
)
*155 (HdlText
uid 3700,0
optionalChildren [
*156 (EmbeddedText
uid 3706,0
commentText (CommentText
uid 3707,0
ps "CenterOffsetStrategy"
shape (Rectangle
uid 3708,0
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "0,0,32768"
lineWidth 2
)
xt "82000,102000,100000,118000"
)
oxt "0,0,18000,5000"
text (MLText
uid 3709,0
va (VaSet
)
xt "82200,102200,98600,118200"
st "
-- MISC 6     
TRG_V <= '0';
RS485_C_RE <= '1'; 
RS485_C_DE <= '0';   
RS485_E_RE <= '1';      
RS485_E_DE <= '0'; 

-- DENABLE <= '0'; -- domino wave stopped
-- DENABLE <= '1'; -- domino wave running

SRIN <= '1';
EE_CS <= '1';
-- LEDs are low active
LED(0) <= '1';
LED(1) <= '0'; -- on
LED(2) <= '1';
                              



"
tm "HdlTextMgr"
wrapOption 3
visibleHeight 16000
visibleWidth 18000
)
)
)
]
shape (Rectangle
uid 3701,0
va (VaSet
vasetType 1
fg "65535,65535,37120"
lineColor "0,0,32768"
lineWidth 2
)
xt "100000,102000,108000,115000"
)
oxt "0,0,8000,10000"
ttg (MlTextGroup
uid 3702,0
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*157 (Text
uid 3703,0
va (VaSet
font "Arial,8,1"
)
xt "103150,106000,105550,107000"
st "MISC"
blo "103150,106800"
tm "HdlTextNameMgr"
)
*158 (Text
uid 3704,0
va (VaSet
font "Arial,8,1"
)
xt "103150,107000,103950,108000"
st "6"
blo "103150,107800"
tm "HdlTextNumberMgr"
)
]
)
viewicon (ZoomableIcon
uid 3705,0
sl 0
va (VaSet
vasetType 1
fg "49152,49152,49152"
)
xt "100250,113250,101750,114750"
iconName "TextFile.png"
iconMaskName "TextFile.msk"
ftype 21
)
viewiconposition 0
)
*159 (PortIoOut
uid 3710,0
shape (CompositeShape
uid 3711,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3712,0
sl 0
ro 270
xt "111500,102625,113000,103375"
)
(Line
uid 3713,0
sl 0
ro 270
xt "111000,103000,111500,103000"
pts [
"111000,103000"
"111500,103000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3714,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3715,0
va (VaSet
)
xt "114000,102500,117000,103500"
st "TRG_V"
blo "114000,103300"
tm "WireNameMgr"
)
)
)
*160 (PortIoOut
uid 3716,0
shape (CompositeShape
uid 3717,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3718,0
sl 0
ro 270
xt "111500,103625,113000,104375"
)
(Line
uid 3719,0
sl 0
ro 270
xt "111000,104000,111500,104000"
pts [
"111000,104000"
"111500,104000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3720,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3721,0
va (VaSet
)
xt "114000,103500,119600,104500"
st "RS485_C_RE"
blo "114000,104300"
tm "WireNameMgr"
)
)
)
*161 (PortIoOut
uid 3722,0
shape (CompositeShape
uid 3723,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3724,0
sl 0
ro 270
xt "111500,104625,113000,105375"
)
(Line
uid 3725,0
sl 0
ro 270
xt "111000,105000,111500,105000"
pts [
"111000,105000"
"111500,105000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3726,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3727,0
va (VaSet
)
xt "114000,104500,119600,105500"
st "RS485_C_DE"
blo "114000,105300"
tm "WireNameMgr"
)
)
)
*162 (PortIoOut
uid 3728,0
shape (CompositeShape
uid 3729,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3730,0
sl 0
ro 270
xt "111500,105625,113000,106375"
)
(Line
uid 3731,0
sl 0
ro 270
xt "111000,106000,111500,106000"
pts [
"111000,106000"
"111500,106000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3732,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3733,0
va (VaSet
)
xt "114000,105500,119500,106500"
st "RS485_E_RE"
blo "114000,106300"
tm "WireNameMgr"
)
)
)
*163 (PortIoOut
uid 3734,0
shape (CompositeShape
uid 3735,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3736,0
sl 0
ro 270
xt "111500,106625,113000,107375"
)
(Line
uid 3737,0
sl 0
ro 270
xt "111000,107000,111500,107000"
pts [
"111000,107000"
"111500,107000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3738,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3739,0
va (VaSet
)
xt "114000,106500,119500,107500"
st "RS485_E_DE"
blo "114000,107300"
tm "WireNameMgr"
)
)
)
*164 (PortIoOut
uid 3740,0
shape (CompositeShape
uid 3741,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3742,0
sl 0
ro 270
xt "111500,120625,113000,121375"
)
(Line
uid 3743,0
sl 0
ro 270
xt "111000,121000,111500,121000"
pts [
"111000,121000"
"111500,121000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3744,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3745,0
va (VaSet
)
xt "114000,120500,118000,121500"
st "DENABLE"
blo "114000,121300"
tm "WireNameMgr"
)
)
)
*165 (PortIoOut
uid 3746,0
shape (CompositeShape
uid 3747,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3748,0
sl 0
ro 270
xt "111500,108625,113000,109375"
)
(Line
uid 3749,0
sl 0
ro 270
xt "111000,109000,111500,109000"
pts [
"111000,109000"
"111500,109000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3750,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3751,0
va (VaSet
)
xt "114000,108500,116300,109500"
st "SRIN"
blo "114000,109300"
tm "WireNameMgr"
)
)
)
*166 (PortIoOut
uid 3752,0
shape (CompositeShape
uid 3753,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3754,0
sl 0
ro 270
xt "111500,109625,113000,110375"
)
(Line
uid 3755,0
sl 0
ro 270
xt "111000,110000,111500,110000"
pts [
"111000,110000"
"111500,110000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3756,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3757,0
va (VaSet
)
xt "114000,109500,116900,110500"
st "EE_CS"
blo "114000,110300"
tm "WireNameMgr"
)
)
)
*167 (PortIoOut
uid 3758,0
shape (CompositeShape
uid 3759,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3760,0
sl 0
ro 270
xt "111500,110625,113000,111375"
)
(Line
uid 3761,0
sl 0
ro 270
xt "111000,111000,111500,111000"
pts [
"111000,111000"
"111500,111000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3762,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3763,0
va (VaSet
)
xt "114000,110500,115900,111500"
st "LED"
blo "114000,111300"
tm "WireNameMgr"
)
)
)
*168 (Net
uid 3864,0
decl (Decl
n "TRG_V"
t "std_logic"
o 42
suid 126,0
)
declText (MLText
uid 3865,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,36600,54000,37400"
st "TRG_V           : std_logic
"
)
)
*169 (Net
uid 3866,0
decl (Decl
n "RS485_C_RE"
t "std_logic"
o 32
suid 127,0
)
declText (MLText
uid 3867,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,28600,54000,29400"
st "RS485_C_RE      : std_logic
"
)
)
*170 (Net
uid 3868,0
decl (Decl
n "RS485_C_DE"
t "std_logic"
o 31
suid 128,0
)
declText (MLText
uid 3869,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,27800,54000,28600"
st "RS485_C_DE      : std_logic
"
)
)
*171 (Net
uid 3870,0
decl (Decl
n "RS485_E_RE"
t "std_logic"
o 34
suid 129,0
)
declText (MLText
uid 3871,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,30200,54000,31000"
st "RS485_E_RE      : std_logic
"
)
)
*172 (Net
uid 3872,0
decl (Decl
n "RS485_E_DE"
t "std_logic"
o 33
suid 130,0
)
declText (MLText
uid 3873,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,29400,54000,30200"
st "RS485_E_DE      : std_logic
"
)
)
*173 (Net
uid 3874,0
decl (Decl
n "DENABLE"
t "std_logic"
o 22
suid 131,0
i "'0'"
)
declText (MLText
uid 3875,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,20600,68500,21400"
st "DENABLE         : std_logic                      := '0'
"
)
)
*174 (Net
uid 3876,0
decl (Decl
n "SRIN"
t "std_logic"
o 36
suid 132,0
)
declText (MLText
uid 3877,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,31800,54000,32600"
st "SRIN            : std_logic
"
)
)
*175 (Net
uid 3878,0
decl (Decl
n "EE_CS"
t "std_logic"
o 27
suid 133,0
)
declText (MLText
uid 3879,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,24600,54000,25400"
st "EE_CS           : std_logic
"
)
)
*176 (Net
uid 3880,0
decl (Decl
n "LED"
t "std_logic_vector"
b "( 2 DOWNTO 0 )"
o 28
suid 134,0
i "(others => '1')"
)
declText (MLText
uid 3881,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,25400,74500,26200"
st "LED             : std_logic_vector( 2 DOWNTO 0 ) := (others => '1')
"
)
)
*177 (PortIoOut
uid 3995,0
shape (CompositeShape
uid 3996,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 3997,0
sl 0
ro 90
xt "19000,112625,20500,113375"
)
(Line
uid 3998,0
sl 0
ro 90
xt "20500,113000,21000,113000"
pts [
"21000,113000"
"20500,113000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 3999,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 4000,0
va (VaSet
)
xt "13600,112500,18000,113500"
st "D0_SRCLK"
ju 2
blo "18000,113300"
tm "WireNameMgr"
)
)
)
*178 (PortIoOut
uid 4001,0
shape (CompositeShape
uid 4002,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 4003,0
sl 0
ro 90
xt "19000,113625,20500,114375"
)
(Line
uid 4004,0
sl 0
ro 90
xt "20500,114000,21000,114000"
pts [
"21000,114000"
"20500,114000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 4005,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 4006,0
va (VaSet
)
xt "13600,113500,18000,114500"
st "D1_SRCLK"
ju 2
blo "18000,114300"
tm "WireNameMgr"
)
)
)
*179 (PortIoOut
uid 4007,0
shape (CompositeShape
uid 4008,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 4009,0
sl 0
ro 90
xt "19000,114625,20500,115375"
)
(Line
uid 4010,0
sl 0
ro 90
xt "20500,115000,21000,115000"
pts [
"21000,115000"
"20500,115000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 4011,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 4012,0
va (VaSet
)
xt "13600,114500,18000,115500"
st "D2_SRCLK"
ju 2
blo "18000,115300"
tm "WireNameMgr"
)
)
)
*180 (PortIoOut
uid 4013,0
shape (CompositeShape
uid 4014,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 4015,0
sl 0
ro 90
xt "19000,115625,20500,116375"
)
(Line
uid 4016,0
sl 0
ro 90
xt "20500,116000,21000,116000"
pts [
"21000,116000"
"20500,116000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 4017,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 4018,0
va (VaSet
)
xt "13600,115500,18000,116500"
st "D3_SRCLK"
ju 2
blo "18000,116300"
tm "WireNameMgr"
)
)
)
*181 (PortIoOut
uid 4916,0
shape (CompositeShape
uid 4917,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 4918,0
sl 0
ro 270
xt "111500,119625,113000,120375"
)
(Line
uid 4919,0
sl 0
ro 270
xt "111000,120000,111500,120000"
pts [
"111000,120000"
"111500,120000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 4920,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 4921,0
va (VaSet
)
xt "114000,119500,115900,120500"
st "D_T"
blo "114000,120300"
tm "WireNameMgr"
)
)
)
*182 (Net
uid 5320,0
decl (Decl
n "D_T"
t "std_logic_vector"
b "(7 DOWNTO 0)"
o 25
suid 141,0
i "(OTHERS => '0')"
)
declText (MLText
uid 5321,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,23000,74500,23800"
st "D_T             : std_logic_vector(7 DOWNTO 0)   := (OTHERS => '0')
"
)
)
*183 (PortIoIn
uid 6781,0
shape (CompositeShape
uid 6782,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 6783,0
sl 0
ro 270
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b "(7 DOWNTO 0)"
o 60
suid 166,0
i "(others => '0')"
)
declText (MLText
uid 10309,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,14200,74500,15000"
st "A0_T            : std_logic_vector(7 DOWNTO 0)   := (others => '0')
"
)
)
*235 (HdlText
uid 10310,0
optionalChildren [
*236 (EmbeddedText
uid 10316,0
commentText (CommentText
uid 10317,0
ps "CenterOffsetStrategy"
shape (Rectangle
uid 10318,0
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "0,0,32768"
lineWidth 2
)
xt "105000,137000,123000,162000"
)
oxt "0,0,18000,5000"
text (MLText
uid 10319,0
va (VaSet
)
xt "105200,137200,117800,156200"
st "
-- eb3 9                          
A0_T(0) <= CLK50_OUT;
A0_T(1)  <= CLK25_OUT;
A0_T(2) <= CLK25_PSOUT;
A0_T(3) <= PS_DIR_IN;
A0_T(4) <= PS_DO_IN;
A0_T(5) <= PSINCDEC_OUT;
A0_T(6) <= PSEN_OUT;
A0_T(7) <= DCM_locked;

A1_T(0) <= ready;
A1_T(1) <= shifting;
A1_T(2) <= PSDONE_extraOUT;
A1_T(3) <= PSCLK_OUT;
A1_T(4) <= LOCKED_extraOUT;

A1_T(5) <= '0';
A1_T(6) <= '0';
A1_T(7) <= '0';
"
tm "HdlTextMgr"
wrapOption 3
visibleHeight 25000
visibleWidth 18000
)
)
)
]
shape (Rectangle
uid 10311,0
va (VaSet
vasetType 1
fg "65535,65535,37120"
lineColor "0,0,32768"
lineWidth 2
)
xt "106000,122000,112000,136000"
)
oxt "0,0,8000,10000"
ttg (MlTextGroup
uid 10312,0
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*237 (Text
uid 10313,0
va (VaSet
font "Arial,8,1"
)
xt "109150,125000,110850,126000"
st "eb3"
blo "109150,125800"
tm "HdlTextNameMgr"
)
*238 (Text
uid 10314,0
va (VaSet
font "Arial,8,1"
)
xt "109150,126000,109950,127000"
st "9"
blo "109150,126800"
tm "HdlTextNumberMgr"
)
]
)
viewicon (ZoomableIcon
uid 10315,0
sl 0
va (VaSet
vasetType 1
fg "49152,49152,49152"
)
xt "106250,134250,107750,135750"
iconName "TextFile.png"
iconMaskName "TextFile.msk"
ftype 21
)
viewiconposition 0
)
*239 (Net
uid 10496,0
decl (Decl
n "CLK50_OUT"
t "std_logic"
o 61
suid 184,0
)
declText (MLText
uid 10497,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,45600,57500,46400"
st "SIGNAL CLK50_OUT       : std_logic
"
)
)
*240 (Net
uid 10504,0
decl (Decl
n "CLK25_OUT"
t "std_logic"
o 62
suid 185,0
)
declText (MLText
uid 10505,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,44000,57500,44800"
st "SIGNAL CLK25_OUT       : std_logic
"
)
)
*241 (Net
uid 10512,0
decl (Decl
n "CLK25_PSOUT"
t "std_logic"
o 63
suid 186,0
)
declText (MLText
uid 10513,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,44800,57500,45600"
st "SIGNAL CLK25_PSOUT     : std_logic
"
)
)
*242 (Net
uid 10520,0
decl (Decl
n "PS_DIR_IN"
t "std_logic"
o 64
suid 187,0
)
declText (MLText
uid 10521,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,53600,57500,54400"
st "SIGNAL PS_DIR_IN       : std_logic
"
)
)
*243 (Net
uid 10528,0
decl (Decl
n "PS_DO_IN"
t "std_logic"
o 65
suid 188,0
)
declText (MLText
uid 10529,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,54400,57500,55200"
st "SIGNAL PS_DO_IN        : std_logic
"
)
)
*244 (Net
uid 10536,0
decl (Decl
n "PSEN_OUT"
t "std_logic"
o 66
suid 189,0
)
declText (MLText
uid 10537,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,52000,57500,52800"
st "SIGNAL PSEN_OUT        : std_logic
"
)
)
*245 (Net
uid 10544,0
decl (Decl
n "PSINCDEC_OUT"
t "std_logic"
o 67
suid 190,0
)
declText (MLText
uid 10545,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,52800,57500,53600"
st "SIGNAL PSINCDEC_OUT    : std_logic
"
)
)
*246 (Net
uid 10552,0
decl (Decl
n "DCM_locked"
t "std_logic"
preAdd 0
posAdd 0
o 68
suid 191,0
)
declText (MLText
uid 10553,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,48800,57500,49600"
st "SIGNAL DCM_locked      : std_logic
"
)
)
*247 (Net
uid 10560,0
decl (Decl
n "ready"
t "std_logic"
preAdd 0
posAdd 0
o 69
suid 192,0
i "'0'"
)
declText (MLText
uid 10561,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,60800,72000,61600"
st "SIGNAL ready           : std_logic                      := '0'
"
)
)
*248 (Net
uid 10568,0
decl (Decl
n "shifting"
t "std_logic"
prec "-- status:"
preAdd 0
posAdd 0
o 70
suid 193,0
i "'0'"
)
declText (MLText
uid 10569,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,62400,72000,64000"
st "-- status:
SIGNAL shifting        : std_logic                      := '0'
"
)
)
*249 (Net
uid 10576,0
decl (Decl
n "PSDONE_extraOUT"
t "std_logic"
o 71
suid 194,0
)
declText (MLText
uid 10577,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,51200,57500,52000"
st "SIGNAL PSDONE_extraOUT : std_logic
"
)
)
*250 (Net
uid 10584,0
decl (Decl
n "PSCLK_OUT"
t "std_logic"
o 72
suid 195,0
)
declText (MLText
uid 10585,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,50400,57500,51200"
st "SIGNAL PSCLK_OUT       : std_logic
"
)
)
*251 (Net
uid 10592,0
decl (Decl
n "LOCKED_extraOUT"
t "std_logic"
o 73
suid 196,0
)
declText (MLText
uid 10593,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,49600,57500,50400"
st "SIGNAL LOCKED_extraOUT : std_logic
"
)
)
*252 (Wire
uid 245,0
shape (OrthoPolyLine
uid 246,0
va (VaSet
vasetType 3
)
xt "21000,68000,51250,68000"
pts [
"51250,68000"
"21000,68000"
]
)
start &27
end &64
ss 0
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 249,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 250,0
va (VaSet
isHidden 1
)
xt "53250,67000,56050,68000"
st "X_50M"
blo "53250,67800"
tm "WireNameMgr"
)
)
on &85
)
*253 (Wire
uid 277,0
shape (OrthoPolyLine
uid 278,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "32000,81000,51250,81000"
pts [
"51250,81000"
"32000,81000"
]
)
start &17
end &65
sat 32
eat 2
sty 1
st 0
sf 1
si 0
tg (WTG
uid 281,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 282,0
va (VaSet
)
xt "44000,80000,49900,81000"
st "board_id : (3:0)"
blo "44000,80800"
tm "WireNameMgr"
)
)
on &69
)
*254 (Wire
uid 285,0
shape (OrthoPolyLine
uid 286,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "32000,82000,51250,82000"
pts [
"51250,82000"
"32000,82000"
]
)
start &18
end &65
sat 32
eat 2
sty 1
st 0
sf 1
si 0
tg (WTG
uid 289,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 290,0
va (VaSet
)
xt "45000,81000,50700,82000"
st "crate_id : (1:0)"
blo "45000,81800"
tm "WireNameMgr"
)
)
on &70
)
*255 (Wire
uid 362,0
shape (OrthoPolyLine
uid 363,0
va (VaSet
vasetType 3
)
xt "21000,90000,51250,90000"
pts [
"21000,90000"
"51250,90000"
]
)
start &93
end &16
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 364,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 365,0
va (VaSet
isHidden 1
)
xt "22000,89000,25600,90000"
st "OE_ADC"
blo "22000,89800"
tm "WireNameMgr"
)
)
on &94
)
*256 (Wire
uid 418,0
shape (OrthoPolyLine
uid 419,0
va (VaSet
vasetType 3
)
xt "80750,71000,111000,71000"
pts [
"80750,71000"
"111000,71000"
]
)
start &13
end &71
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 422,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 423,0
va (VaSet
isHidden 1
)
xt "82000,70000,85100,71000"
st "W_RES"
blo "82000,70800"
tm "WireNameMgr"
)
)
on &146
)
*257 (Wire
uid 426,0
shape (OrthoPolyLine
uid 427,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "80750,68000,111000,68000"
pts [
"80750,68000"
"111000,68000"
]
)
start &19
end &72
sat 32
eat 32
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
uid 430,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 431,0
va (VaSet
isHidden 1
)
xt "82000,67000,84000,68000"
st "W_A"
blo "82000,67800"
tm "WireNameMgr"
)
)
on &144
)
*258 (Wire
uid 434,0
shape (OrthoPolyLine
uid 435,0
va (VaSet
vasetType 3
)
xt "80750,75000,111000,75000"
pts [
"80750,75000"
"111000,75000"
]
)
start &20
end &73
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 438,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 439,0
va (VaSet
isHidden 1
)
xt "82000,74000,84600,75000"
st "W_CS"
blo "82000,74800"
tm "WireNameMgr"
)
)
on &150
)
*259 (Wire
uid 442,0
shape (OrthoPolyLine
uid 443,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "80750,69000,111000,69000"
pts [
"80750,69000"
"111000,69000"
]
)
start &21
end &74
sat 32
eat 32
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
uid 446,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 447,0
va (VaSet
isHidden 1
)
xt "82000,68000,84100,69000"
st "W_D"
blo "82000,68800"
tm "WireNameMgr"
)
)
on &145
)
*260 (Wire
uid 450,0
shape (OrthoPolyLine
uid 451,0
va (VaSet
vasetType 3
)
xt "80750,74000,111000,74000"
pts [
"111000,74000"
"80750,74000"
]
)
start &75
end &22
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 454,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 455,0
va (VaSet
isHidden 1
)
xt "82000,73000,84800,74000"
st "W_INT"
blo "82000,73800"
tm "WireNameMgr"
)
)
on &149
)
*261 (Wire
uid 458,0
shape (OrthoPolyLine
uid 459,0
va (VaSet
vasetType 3
)
xt "80750,72000,111000,72000"
pts [
"80750,72000"
"111000,72000"
]
)
start &23
end &76
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 462,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 463,0
va (VaSet
isHidden 1
)
xt "82000,71000,84700,72000"
st "W_RD"
blo "82000,71800"
tm "WireNameMgr"
)
)
on &147
)
*262 (Wire
uid 466,0
shape (OrthoPolyLine
uid 467,0
va (VaSet
vasetType 3
)
xt "80750,73000,111000,73000"
pts [
"80750,73000"
"111000,73000"
]
)
start &24
end &77
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 470,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 471,0
va (VaSet
isHidden 1
)
xt "82000,72000,84800,73000"
st "W_WR"
blo "82000,72800"
tm "WireNameMgr"
)
)
on &148
)
*263 (Wire
uid 1467,0
shape (OrthoPolyLine
uid 1468,0
va (VaSet
vasetType 3
)
xt "32000,95000,51250,95000"
pts [
"32000,95000"
"51250,95000"
]
)
start &97
end &28
sat 2
eat 32
st 0
sf 1
si 0
tg (WTG
uid 1471,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 1472,0
va (VaSet
)
xt "34000,94000,39900,95000"
st "adc_data_array"
blo "34000,94800"
tm "WireNameMgr"
)
)
on &78
)
*264 (Wire
uid 1730,0
shape (OrthoPolyLine
uid 1731,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "21000,89000,51250,89000"
pts [
"21000,89000"
"51250,89000"
]
)
start &95
end &29
sat 32
eat 32
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
uid 1734,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 1735,0
va (VaSet
isHidden 1
)
xt "22000,88000,25000,89000"
st "A_OTR"
blo "22000,88800"
tm "WireNameMgr"
)
)
on &96
)
*265 (Wire
uid 1833,0
shape (OrthoPolyLine
uid 1834,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "12000,126000,21000,126000"
pts [
"21000,126000"
"12000,126000"
]
)
start &191
end &125
sat 2
eat 32
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
uid 1837,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 1838,0
va (VaSet
isHidden 1
)
xt "13000,125000,14900,126000"
st "D_A"
blo "13000,125800"
tm "WireNameMgr"
)
)
on &126
)
*266 (Wire
uid 1841,0
shape (OrthoPolyLine
uid 1842,0
va (VaSet
vasetType 3
)
xt "21000,110000,51250,110000"
pts [
"51250,110000"
"21000,110000"
]
)
start &31
end &127
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 1845,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 1846,0
va (VaSet
isHidden 1
)
xt "22000,109000,25500,110000"
st "DWRITE"
blo "22000,109800"
tm "WireNameMgr"
)
)
on &128
)
*267 (Wire
uid 1865,0
shape (OrthoPolyLine
uid 1866,0
va (VaSet
vasetType 3
)
xt "21000,105000,51250,105000"
pts [
"21000,105000"
"51250,105000"
]
)
start &117
end &32
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 1869,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 1870,0
va (VaSet
isHidden 1
)
xt "22000,104000,26600,105000"
st "D0_SROUT"
blo "22000,104800"
tm "WireNameMgr"
)
)
on &121
)
*268 (Wire
uid 1873,0
shape (OrthoPolyLine
uid 1874,0
va (VaSet
vasetType 3
)
xt "21000,106000,51250,106000"
pts [
"21000,106000"
"51250,106000"
]
)
start &118
end &33
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 1877,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 1878,0
va (VaSet
isHidden 1
)
xt "22000,105000,26600,106000"
st "D1_SROUT"
blo "22000,105800"
tm "WireNameMgr"
)
)
on &122
)
*269 (Wire
uid 1881,0
shape (OrthoPolyLine
uid 1882,0
va (VaSet
vasetType 3
)
xt "21000,107000,51250,107000"
pts [
"21000,107000"
"51250,107000"
]
)
start &119
end &34
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 1885,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 1886,0
va (VaSet
isHidden 1
)
xt "22000,106000,26600,107000"
st "D2_SROUT"
blo "22000,106800"
tm "WireNameMgr"
)
)
on &123
)
*270 (Wire
uid 1889,0
shape (OrthoPolyLine
uid 1890,0
va (VaSet
vasetType 3
)
xt "21000,108000,51250,108000"
pts [
"21000,108000"
"51250,108000"
]
)
start &120
end &35
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 1893,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 1894,0
va (VaSet
isHidden 1
)
xt "22000,107000,26600,108000"
st "D3_SROUT"
blo "22000,107800"
tm "WireNameMgr"
)
)
on &124
)
*271 (Wire
uid 2409,0
shape (OrthoPolyLine
uid 2410,0
va (VaSet
vasetType 3
)
xt "21000,111000,51250,111000"
pts [
"51250,111000"
"21000,111000"
]
)
start &36
end &80
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 2413,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 2414,0
va (VaSet
isHidden 1
)
xt "22000,110000,26200,111000"
st "RSRLOAD"
blo "22000,110800"
tm "WireNameMgr"
)
)
on &79
)
*272 (Wire
uid 2423,0
shape (OrthoPolyLine
uid 2424,0
va (VaSet
vasetType 3
)
xt "32000,113000,51250,113000"
pts [
"51250,113000"
"32000,113000"
]
)
start &37
end &109
sat 32
eat 1
stc 0
st 0
sf 1
si 0
tg (WTG
uid 2427,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 2428,0
va (VaSet
isHidden 1
)
xt "66250,109000,69250,110000"
st "SRCLK"
blo "66250,109800"
tm "WireNameMgr"
)
)
on &81
)
*273 (Wire
uid 3009,0
shape (OrthoPolyLine
uid 3010,0
va (VaSet
vasetType 3
)
xt "80750,98000,111000,98000"
pts [
"80750,98000"
"111000,98000"
]
)
start &39
end &142
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 3011,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3012,0
va (VaSet
isHidden 1
)
xt "82000,97000,84800,98000"
st "S_CLK"
blo "82000,97800"
tm "WireNameMgr"
)
)
on &143
)
*274 (Wire
uid 3015,0
shape (OrthoPolyLine
uid 3016,0
va (VaSet
vasetType 3
)
xt "80750,99000,111000,99000"
pts [
"80750,99000"
"111000,99000"
]
)
start &41
end &151
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 3017,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3018,0
va (VaSet
isHidden 1
)
xt "82750,98000,85150,99000"
st "MISO"
blo "82750,98800"
tm "WireNameMgr"
)
)
on &154
)
*275 (Wire
uid 3021,0
shape (OrthoPolyLine
uid 3022,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "80750,89000,100000,89000"
pts [
"80750,89000"
"100000,89000"
]
)
start &40
end &130
sat 32
eat 1
sty 1
st 0
sf 1
si 0
tg (WTG
uid 3023,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3024,0
va (VaSet
)
xt "92000,88000,98500,89000"
st "sensor_cs : (3:0)"
blo "92000,88800"
tm "WireNameMgr"
)
)
on &82
)
*276 (Wire
uid 3027,0
shape (OrthoPolyLine
uid 3028,0
va (VaSet
vasetType 3
)
xt "94000,87000,111000,87000"
pts [
"94000,87000"
"111000,87000"
]
)
start &201
end &129
ss 0
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 3031,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3032,0
va (VaSet
isHidden 1
)
xt "95000,86000,98600,87000"
st "DAC_CS"
blo "95000,86800"
tm "WireNameMgr"
)
)
on &83
)
*277 (Wire
uid 3218,0
shape (OrthoPolyLine
uid 3219,0
va (VaSet
vasetType 3
)
xt "22000,78000,51250,78000"
pts [
"22000,78000"
"51250,78000"
]
)
start &63
end &15
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 3220,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3221,0
va (VaSet
isHidden 1
)
xt "33000,77000,35100,78000"
st "TRG"
blo "33000,77800"
tm "WireNameMgr"
)
)
on &86
)
*278 (Wire
uid 3260,0
shape (OrthoPolyLine
uid 3261,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "21000,70000,24000,70000"
pts [
"21000,70000"
"24000,70000"
]
)
start &84
end &87
sat 32
eat 2
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
uid 3264,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3265,0
va (VaSet
isHidden 1
)
xt "23000,69000,25800,70000"
st "A_CLK"
blo "23000,69800"
tm "WireNameMgr"
)
)
on &91
)
*279 (Wire
uid 3270,0
shape (OrthoPolyLine
uid 3271,0
va (VaSet
vasetType 3
)
xt "29000,70000,43000,72000"
pts [
"43000,72000"
"43000,70000"
"32000,70000"
"29000,70000"
]
)
start &214
end &87
sat 32
eat 1
st 0
sf 1
si 0
tg (WTG
uid 3274,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3275,0
va (VaSet
)
xt "35000,69000,39500,70000"
st "CLK_25_PS"
blo "35000,69800"
tm "WireNameMgr"
)
)
on &92
)
*280 (Wire
uid 3318,0
shape (OrthoPolyLine
uid 3319,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "21000,95000,24000,95000"
pts [
"21000,95000"
"24000,95000"
]
)
start &101
end &97
sat 32
eat 1
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
uid 3322,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3323,0
va (VaSet
isHidden 1
)
xt "23000,94000,25300,95000"
st "A0_D"
blo "23000,94800"
tm "WireNameMgr"
)
)
on &105
)
*281 (Wire
uid 3352,0
shape (OrthoPolyLine
uid 3353,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "21000,96000,24000,96000"
pts [
"21000,96000"
"24000,96000"
]
)
start &102
end &97
sat 32
eat 1
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
uid 3356,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3357,0
va (VaSet
isHidden 1
)
xt "23000,95000,25300,96000"
st "A1_D"
blo "23000,95800"
tm "WireNameMgr"
)
)
on &106
)
*282 (Wire
uid 3360,0
shape (OrthoPolyLine
uid 3361,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "21000,97000,24000,97000"
pts [
"21000,97000"
"24000,97000"
]
)
start &103
end &97
sat 32
eat 1
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
uid 3364,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3365,0
va (VaSet
isHidden 1
)
xt "23000,96000,25300,97000"
st "A2_D"
blo "23000,96800"
tm "WireNameMgr"
)
)
on &107
)
*283 (Wire
uid 3368,0
shape (OrthoPolyLine
uid 3369,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "21000,98000,24000,98000"
pts [
"21000,98000"
"24000,98000"
]
)
start &104
end &97
sat 32
eat 1
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
uid 3372,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3373,0
va (VaSet
isHidden 1
)
xt "23000,97000,25300,98000"
st "A3_D"
blo "23000,97800"
tm "WireNameMgr"
)
)
on &108
)
*284 (Wire
uid 3430,0
shape (OrthoPolyLine
uid 3431,0
va (VaSet
vasetType 3
)
xt "21000,113000,24000,113000"
pts [
"21000,113000"
"24000,113000"
]
)
start &177
end &109
sat 32
eat 2
stc 0
st 0
sf 1
si 0
tg (WTG
uid 3434,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3435,0
va (VaSet
isHidden 1
)
xt "23000,112000,27400,113000"
st "D0_SRCLK"
blo "23000,112800"
tm "WireNameMgr"
)
)
on &113
)
*285 (Wire
uid 3438,0
shape (OrthoPolyLine
uid 3439,0
va (VaSet
vasetType 3
)
xt "21000,114000,24000,114000"
pts [
"21000,114000"
"24000,114000"
]
)
start &178
end &109
sat 32
eat 2
stc 0
st 0
sf 1
si 0
tg (WTG
uid 3442,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3443,0
va (VaSet
isHidden 1
)
xt "23000,113000,27400,114000"
st "D1_SRCLK"
blo "23000,113800"
tm "WireNameMgr"
)
)
on &114
)
*286 (Wire
uid 3446,0
shape (OrthoPolyLine
uid 3447,0
va (VaSet
vasetType 3
)
xt "21000,115000,24000,115000"
pts [
"21000,115000"
"24000,115000"
]
)
start &179
end &109
sat 32
eat 2
stc 0
st 0
sf 1
si 0
tg (WTG
uid 3450,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3451,0
va (VaSet
isHidden 1
)
xt "23000,114000,27400,115000"
st "D2_SRCLK"
blo "23000,114800"
tm "WireNameMgr"
)
)
on &115
)
*287 (Wire
uid 3454,0
shape (OrthoPolyLine
uid 3455,0
va (VaSet
vasetType 3
)
xt "21000,116000,24000,116000"
pts [
"21000,116000"
"24000,116000"
]
)
start &180
end &109
sat 32
eat 2
stc 0
st 0
sf 1
si 0
tg (WTG
uid 3458,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3459,0
va (VaSet
isHidden 1
)
xt "23000,115000,27400,116000"
st "D3_SRCLK"
blo "23000,115800"
tm "WireNameMgr"
)
)
on &116
)
*288 (Wire
uid 3574,0
shape (OrthoPolyLine
uid 3575,0
va (VaSet
vasetType 3
)
xt "108000,89000,111000,89000"
pts [
"111000,89000"
"108000,89000"
]
)
start &134
end &130
sat 32
eat 2
stc 0
st 0
sf 1
si 0
tg (WTG
uid 3578,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3579,0
va (VaSet
isHidden 1
)
xt "108000,88000,110800,89000"
st "T0_CS"
blo "108000,88800"
tm "WireNameMgr"
)
)
on &138
)
*289 (Wire
uid 3582,0
shape (OrthoPolyLine
uid 3583,0
va (VaSet
vasetType 3
)
xt "108000,90000,111000,90000"
pts [
"111000,90000"
"108000,90000"
]
)
start &135
end &130
sat 32
eat 2
stc 0
st 0
sf 1
si 0
tg (WTG
uid 3586,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3587,0
va (VaSet
isHidden 1
)
xt "108000,89000,110800,90000"
st "T1_CS"
blo "108000,89800"
tm "WireNameMgr"
)
)
on &139
)
*290 (Wire
uid 3590,0
shape (OrthoPolyLine
uid 3591,0
va (VaSet
vasetType 3
)
xt "108000,91000,111000,91000"
pts [
"111000,91000"
"108000,91000"
]
)
start &136
end &130
sat 32
eat 2
stc 0
st 0
sf 1
si 0
tg (WTG
uid 3594,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3595,0
va (VaSet
isHidden 1
)
xt "108000,90000,110800,91000"
st "T2_CS"
blo "108000,90800"
tm "WireNameMgr"
)
)
on &140
)
*291 (Wire
uid 3598,0
shape (OrthoPolyLine
uid 3599,0
va (VaSet
vasetType 3
)
xt "108000,92000,111000,92000"
pts [
"111000,92000"
"108000,92000"
]
)
start &137
end &130
sat 32
eat 2
stc 0
st 0
sf 1
si 0
tg (WTG
uid 3602,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3603,0
va (VaSet
isHidden 1
)
xt "108000,91000,110800,92000"
st "T3_CS"
blo "108000,91800"
tm "WireNameMgr"
)
)
on &141
)
*292 (Wire
uid 3682,0
shape (OrthoPolyLine
uid 3683,0
va (VaSet
vasetType 3
)
xt "80750,100000,111000,100000"
pts [
"80750,100000"
"111000,100000"
]
)
start &42
end &153
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 3686,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3687,0
va (VaSet
isHidden 1
)
xt "82000,99000,84400,100000"
st "MOSI"
blo "82000,99800"
tm "WireNameMgr"
)
)
on &152
)
*293 (Wire
uid 3778,0
shape (OrthoPolyLine
uid 3779,0
va (VaSet
vasetType 3
)
xt "108000,103000,111000,103000"
pts [
"111000,103000"
"108000,103000"
]
)
start &159
end &155
sat 32
eat 2
stc 0
st 0
sf 1
si 0
tg (WTG
uid 3782,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3783,0
va (VaSet
isHidden 1
)
xt "108000,102000,111000,103000"
st "TRG_V"
blo "108000,102800"
tm "WireNameMgr"
)
)
on &168
)
*294 (Wire
uid 3786,0
shape (OrthoPolyLine
uid 3787,0
va (VaSet
vasetType 3
)
xt "108000,104000,111000,104000"
pts [
"111000,104000"
"108000,104000"
]
)
start &160
end &155
sat 32
eat 2
stc 0
st 0
sf 1
si 0
tg (WTG
uid 3790,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3791,0
va (VaSet
isHidden 1
)
xt "108000,103000,113600,104000"
st "RS485_C_RE"
blo "108000,103800"
tm "WireNameMgr"
)
)
on &169
)
*295 (Wire
uid 3794,0
shape (OrthoPolyLine
uid 3795,0
va (VaSet
vasetType 3
)
xt "108000,105000,111000,105000"
pts [
"111000,105000"
"108000,105000"
]
)
start &161
end &155
sat 32
eat 2
stc 0
st 0
sf 1
si 0
tg (WTG
uid 3798,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3799,0
va (VaSet
isHidden 1
)
xt "108000,104000,113600,105000"
st "RS485_C_DE"
blo "108000,104800"
tm "WireNameMgr"
)
)
on &170
)
*296 (Wire
uid 3802,0
shape (OrthoPolyLine
uid 3803,0
va (VaSet
vasetType 3
)
xt "108000,106000,111000,106000"
pts [
"111000,106000"
"108000,106000"
]
)
start &162
end &155
sat 32
eat 2
stc 0
st 0
sf 1
si 0
tg (WTG
uid 3806,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3807,0
va (VaSet
isHidden 1
)
xt "108000,105000,113500,106000"
st "RS485_E_RE"
blo "108000,105800"
tm "WireNameMgr"
)
)
on &171
)
*297 (Wire
uid 3810,0
shape (OrthoPolyLine
uid 3811,0
va (VaSet
vasetType 3
)
xt "108000,107000,111000,107000"
pts [
"111000,107000"
"108000,107000"
]
)
start &163
end &155
sat 32
eat 2
stc 0
st 0
sf 1
si 0
tg (WTG
uid 3814,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3815,0
va (VaSet
isHidden 1
)
xt "108000,106000,113500,107000"
st "RS485_E_DE"
blo "108000,106800"
tm "WireNameMgr"
)
)
on &172
)
*298 (Wire
uid 3826,0
shape (OrthoPolyLine
uid 3827,0
va (VaSet
vasetType 3
)
xt "108000,109000,111000,109000"
pts [
"111000,109000"
"108000,109000"
]
)
start &165
end &155
sat 32
eat 2
stc 0
st 0
sf 1
si 0
tg (WTG
uid 3830,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3831,0
va (VaSet
isHidden 1
)
xt "108000,108000,110300,109000"
st "SRIN"
blo "108000,108800"
tm "WireNameMgr"
)
)
on &174
)
*299 (Wire
uid 3834,0
shape (OrthoPolyLine
uid 3835,0
va (VaSet
vasetType 3
)
xt "108000,110000,111000,110000"
pts [
"111000,110000"
"108000,110000"
]
)
start &166
end &155
sat 32
eat 2
stc 0
st 0
sf 1
si 0
tg (WTG
uid 3838,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3839,0
va (VaSet
isHidden 1
)
xt "108000,109000,110900,110000"
st "EE_CS"
blo "108000,109800"
tm "WireNameMgr"
)
)
on &175
)
*300 (Wire
uid 3842,0
shape (OrthoPolyLine
uid 3843,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "108000,111000,111000,111000"
pts [
"111000,111000"
"108000,111000"
]
)
start &167
end &155
sat 32
eat 2
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
uid 3846,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 3847,0
va (VaSet
isHidden 1
)
xt "108000,110000,109900,111000"
st "LED"
blo "108000,110800"
tm "WireNameMgr"
)
)
on &176
)
*301 (Wire
uid 4942,0
shape (OrthoPolyLine
uid 4943,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "80750,120000,111000,120000"
pts [
"80750,120000"
"111000,120000"
]
)
start &14
end &181
sat 32
eat 32
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
uid 4948,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 4949,0
va (VaSet
isHidden 1
)
xt "82750,117000,84650,118000"
st "D_T"
blo "82750,117800"
tm "WireNameMgr"
)
)
on &182
)
*302 (Wire
uid 6431,0
shape (OrthoPolyLine
uid 6432,0
va (VaSet
vasetType 3
)
xt "80750,121000,111000,121000"
pts [
"80750,121000"
"111000,121000"
]
)
start &43
end &164
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 6435,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 6436,0
va (VaSet
isHidden 1
)
xt "92000,120000,96000,121000"
st "DENABLE"
blo "92000,120800"
tm "WireNameMgr"
)
)
on &173
)
*303 (Wire
uid 6787,0
shape (OrthoPolyLine
uid 6788,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "59000,145000,65000,145000"
pts [
"59000,145000"
"65000,145000"
]
)
start &183
end &187
sat 32
eat 1
sty 1
st 0
sf 1
si 0
tg (WTG
uid 6791,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 6792,0
va (VaSet
isHidden 1
)
xt "61000,144000,67800,145000"
st "D_PLLLCK : (3:0)"
blo "61000,144800"
tm "WireNameMgr"
)
)
on &184
)
*304 (Wire
uid 6880,0
shape (OrthoPolyLine
uid 6881,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "68000,145000,75000,145000"
pts [
"68000,145000"
"75000,145000"
]
)
start &187
end &185
sat 2
eat 32
sty 1
st 0
sf 1
si 0
tg (WTG
uid 6884,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 6885,0
va (VaSet
isHidden 1
)
xt "70000,144000,74900,145000"
st "D_T2 : (3:0)"
blo "70000,144800"
tm "WireNameMgr"
)
)
on &186
)
*305 (Wire
uid 7144,0
shape (OrthoPolyLine
uid 7145,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "122000,126000,132000,126000"
pts [
"122000,126000"
"132000,126000"
]
)
end &195
sat 16
eat 32
sty 1
st 0
sf 1
si 0
tg (WTG
uid 7148,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 7149,0
va (VaSet
isHidden 1
)
xt "124000,125000,128800,126000"
st "A1_T : (7:0)"
blo "124000,125800"
tm "WireNameMgr"
)
)
on &196
)
*306 (Wire
uid 7477,0
shape (OrthoPolyLine
uid 7478,0
va (VaSet
vasetType 3
)
xt "80750,87000,91000,87000"
pts [
"80750,87000"
"91000,87000"
]
)
start &38
end &199
es 0
sat 32
eat 32
st 0
sf 1
si 0
tg (WTG
uid 7483,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 7484,0
va (VaSet
)
xt "83000,86000,85700,87000"
st "dummy"
blo "83000,86800"
tm "WireNameMgr"
)
)
on &197
)
*307 (Wire
uid 8853,0
shape (OrthoPolyLine
uid 8854,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "18000,109000,51250,124000"
pts [
"51250,109000"
"18000,109000"
"18000,124000"
"21000,124000"
]
)
start &30
end &191
sat 32
eat 1
sty 1
st 0
sf 1
si 0
tg (WTG
uid 8857,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 8858,0
va (VaSet
)
xt "42000,108000,50500,109000"
st "drs_channel_id : (3:0)"
blo "42000,108800"
tm "WireNameMgr"
)
)
on &211
)
*308 (Wire
uid 9502,0
shape (OrthoPolyLine
uid 9503,0
va (VaSet
vasetType 3
)
xt "46000,69000,51250,69000"
pts [
"51250,69000"
"46000,69000"
]
)
start &26
sat 32
eat 16
st 0
sf 1
si 0
tg (WTG
uid 9506,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 9507,0
va (VaSet
)
xt "47000,68000,50100,69000"
st "CLK_50"
blo "47000,68800"
tm "WireNameMgr"
)
)
on &212
)
*309 (Wire
uid 10034,0
shape (OrthoPolyLine
uid 10035,0
va (VaSet
vasetType 3
)
xt "49000,70000,51250,71000"
pts [
"51250,70000"
"49000,70000"
"49000,71000"
]
)
start &25
end &219
sat 32
eat 32
st 0
sf 1
si 0
tg (WTG
uid 10036,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10037,0
va (VaSet
isHidden 1
)
xt "45250,69000,50550,70000"
st "CLK_25_PS1"
blo "45250,69800"
tm "WireNameMgr"
)
)
on &231
)
*310 (Wire
uid 10052,0
shape (OrthoPolyLine
uid 10053,0
va (VaSet
vasetType 3
)
xt "49000,73000,51250,73000"
pts [
"51250,73000"
"49000,73000"
]
)
start &44
end &217
sat 32
eat 32
st 0
sf 1
si 0
tg (WTG
uid 10054,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10055,0
va (VaSet
isHidden 1
)
xt "47000,72000,51500,73000"
st "adc_clk_en"
blo "47000,72800"
tm "WireNameMgr"
)
)
on &232
)
*311 (Wire
uid 10302,0
shape (OrthoPolyLine
uid 10303,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "122000,128000,132000,128000"
pts [
"122000,128000"
"132000,128000"
]
)
end &233
sat 16
eat 32
sty 1
st 0
sf 1
si 0
tg (WTG
uid 10306,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10307,0
va (VaSet
isHidden 1
)
xt "124000,127000,128800,128000"
st "A0_T : (7:0)"
blo "124000,127800"
tm "WireNameMgr"
)
)
on &234
)
*312 (Wire
uid 10452,0
shape (OrthoPolyLine
uid 10453,0
va (VaSet
vasetType 3
)
xt "112000,126000,122000,126000"
pts [
"112000,126000"
"122000,126000"
]
)
start &235
sat 2
eat 16
st 0
sf 1
si 0
tg (WTG
uid 10458,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10459,0
va (VaSet
)
xt "114000,125000,118800,126000"
st "A0_T : (7:0)"
blo "114000,125800"
tm "WireNameMgr"
)
)
on &234
)
*313 (Wire
uid 10460,0
shape (OrthoPolyLine
uid 10461,0
va (VaSet
vasetType 3
)
xt "112000,127000,122000,127000"
pts [
"112000,127000"
"122000,127000"
]
)
start &235
sat 2
eat 16
st 0
sf 1
si 0
tg (WTG
uid 10466,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10467,0
va (VaSet
)
xt "114000,126000,118800,127000"
st "A1_T : (7:0)"
blo "114000,126800"
tm "WireNameMgr"
)
)
on &196
)
*314 (Wire
uid 10498,0
shape (OrthoPolyLine
uid 10499,0
va (VaSet
vasetType 3
)
xt "80750,123000,88000,123000"
pts [
"80750,123000"
"88000,123000"
]
)
start &59
sat 32
eat 16
st 0
sf 1
si 0
tg (WTG
uid 10502,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10503,0
va (VaSet
)
xt "82000,122000,86800,123000"
st "CLK50_OUT"
blo "82000,122800"
tm "WireNameMgr"
)
)
on &239
)
*315 (Wire
uid 10506,0
shape (OrthoPolyLine
uid 10507,0
va (VaSet
vasetType 3
)
xt "80750,124000,88000,124000"
pts [
"80750,124000"
"88000,124000"
]
)
start &57
sat 32
eat 16
st 0
sf 1
si 0
tg (WTG
uid 10510,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10511,0
va (VaSet
)
xt "82000,123000,86800,124000"
st "CLK25_OUT"
blo "82000,123800"
tm "WireNameMgr"
)
)
on &240
)
*316 (Wire
uid 10514,0
shape (OrthoPolyLine
uid 10515,0
va (VaSet
vasetType 3
)
xt "80750,125000,89000,125000"
pts [
"80750,125000"
"89000,125000"
]
)
start &58
sat 32
eat 16
st 0
sf 1
si 0
tg (WTG
uid 10518,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10519,0
va (VaSet
)
xt "82000,124000,88200,125000"
st "CLK25_PSOUT"
blo "82000,124800"
tm "WireNameMgr"
)
)
on &241
)
*317 (Wire
uid 10522,0
shape (OrthoPolyLine
uid 10523,0
va (VaSet
vasetType 3
)
xt "80750,126000,87000,126000"
pts [
"80750,126000"
"87000,126000"
]
)
start &49
sat 32
eat 16
st 0
sf 1
si 0
tg (WTG
uid 10526,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10527,0
va (VaSet
)
xt "82000,125000,86400,126000"
st "PS_DIR_IN"
blo "82000,125800"
tm "WireNameMgr"
)
)
on &242
)
*318 (Wire
uid 10530,0
shape (OrthoPolyLine
uid 10531,0
va (VaSet
vasetType 3
)
xt "80750,127000,87000,127000"
pts [
"80750,127000"
"87000,127000"
]
)
start &50
sat 32
eat 16
st 0
sf 1
si 0
tg (WTG
uid 10534,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10535,0
va (VaSet
)
xt "82000,126000,86200,127000"
st "PS_DO_IN"
blo "82000,126800"
tm "WireNameMgr"
)
)
on &243
)
*319 (Wire
uid 10538,0
shape (OrthoPolyLine
uid 10539,0
va (VaSet
vasetType 3
)
xt "80750,129000,88000,129000"
pts [
"80750,129000"
"88000,129000"
]
)
start &53
sat 32
eat 16
st 0
sf 1
si 0
tg (WTG
uid 10542,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10543,0
va (VaSet
)
xt "82000,128000,86600,129000"
st "PSEN_OUT"
blo "82000,128800"
tm "WireNameMgr"
)
)
on &244
)
*320 (Wire
uid 10546,0
shape (OrthoPolyLine
uid 10547,0
va (VaSet
vasetType 3
)
xt "80750,128000,90000,128000"
pts [
"80750,128000"
"90000,128000"
]
)
start &54
sat 32
eat 16
st 0
sf 1
si 0
tg (WTG
uid 10550,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10551,0
va (VaSet
)
xt "82000,127000,89000,128000"
st "PSINCDEC_OUT"
blo "82000,127800"
tm "WireNameMgr"
)
)
on &245
)
*321 (Wire
uid 10554,0
shape (OrthoPolyLine
uid 10555,0
va (VaSet
vasetType 3
)
xt "80750,130000,88000,130000"
pts [
"80750,130000"
"88000,130000"
]
)
start &45
sat 32
eat 16
st 0
sf 1
si 0
tg (WTG
uid 10558,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10559,0
va (VaSet
)
xt "82000,129000,87200,130000"
st "DCM_locked"
blo "82000,129800"
tm "WireNameMgr"
)
)
on &246
)
*322 (Wire
uid 10562,0
shape (OrthoPolyLine
uid 10563,0
va (VaSet
vasetType 3
)
xt "80750,132000,85000,132000"
pts [
"80750,132000"
"85000,132000"
]
)
start &55
sat 32
eat 16
st 0
sf 1
si 0
tg (WTG
uid 10566,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10567,0
va (VaSet
)
xt "82000,131000,84200,132000"
st "ready"
blo "82000,131800"
tm "WireNameMgr"
)
)
on &247
)
*323 (Wire
uid 10570,0
shape (OrthoPolyLine
uid 10571,0
va (VaSet
vasetType 3
)
xt "80750,133000,86000,133000"
pts [
"80750,133000"
"86000,133000"
]
)
start &56
sat 32
eat 16
st 0
sf 1
si 0
tg (WTG
uid 10574,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10575,0
va (VaSet
)
xt "82000,132000,84900,133000"
st "shifting"
blo "82000,132800"
tm "WireNameMgr"
)
)
on &248
)
*324 (Wire
uid 10578,0
shape (OrthoPolyLine
uid 10579,0
va (VaSet
vasetType 3
)
xt "80750,134000,91000,134000"
pts [
"80750,134000"
"91000,134000"
]
)
start &52
sat 32
eat 16
st 0
sf 1
si 0
tg (WTG
uid 10582,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10583,0
va (VaSet
)
xt "82000,133000,89800,134000"
st "PSDONE_extraOUT"
blo "82000,133800"
tm "WireNameMgr"
)
)
on &249
)
*325 (Wire
uid 10586,0
shape (OrthoPolyLine
uid 10587,0
va (VaSet
vasetType 3
)
xt "80750,135000,88000,135000"
pts [
"80750,135000"
"88000,135000"
]
)
start &51
sat 32
eat 16
st 0
sf 1
si 0
tg (WTG
uid 10590,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10591,0
va (VaSet
)
xt "82000,134000,87000,135000"
st "PSCLK_OUT"
blo "82000,134800"
tm "WireNameMgr"
)
)
on &250
)
*326 (Wire
uid 10594,0
shape (OrthoPolyLine
uid 10595,0
va (VaSet
vasetType 3
)
xt "80750,136000,91000,136000"
pts [
"80750,136000"
"91000,136000"
]
)
start &47
sat 32
eat 16
st 0
sf 1
si 0
tg (WTG
uid 10598,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10599,0
va (VaSet
)
xt "82000,135000,89700,136000"
st "LOCKED_extraOUT"
blo "82000,135800"
tm "WireNameMgr"
)
)
on &251
)
*327 (Wire
uid 10600,0
shape (OrthoPolyLine
uid 10601,0
va (VaSet
vasetType 3
)
xt "96000,123000,106000,123000"
pts [
"96000,123000"
"106000,123000"
]
)
end &235
sat 16
eat 1
st 0
sf 1
si 0
tg (WTG
uid 10606,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10607,0
va (VaSet
)
xt "98000,122000,102800,123000"
st "CLK25_OUT"
blo "98000,122800"
tm "WireNameMgr"
)
)
on &240
)
*328 (Wire
uid 10608,0
shape (OrthoPolyLine
uid 10609,0
va (VaSet
vasetType 3
)
xt "96000,124000,106000,124000"
pts [
"96000,124000"
"106000,124000"
]
)
end &235
sat 16
eat 1
st 0
sf 1
si 0
tg (WTG
uid 10614,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10615,0
va (VaSet
)
xt "98000,123000,104200,124000"
st "CLK25_PSOUT"
blo "98000,123800"
tm "WireNameMgr"
)
)
on &241
)
*329 (Wire
uid 10616,0
shape (OrthoPolyLine
uid 10617,0
va (VaSet
vasetType 3
)
xt "96000,125000,106000,125000"
pts [
"96000,125000"
"106000,125000"
]
)
end &235
sat 16
eat 1
st 0
sf 1
si 0
tg (WTG
uid 10622,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10623,0
va (VaSet
)
xt "98000,124000,102800,125000"
st "CLK50_OUT"
blo "98000,124800"
tm "WireNameMgr"
)
)
on &239
)
*330 (Wire
uid 10624,0
shape (OrthoPolyLine
uid 10625,0
va (VaSet
vasetType 3
)
xt "96000,126000,106000,126000"
pts [
"96000,126000"
"106000,126000"
]
)
end &235
sat 16
eat 1
st 0
sf 1
si 0
tg (WTG
uid 10630,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10631,0
va (VaSet
)
xt "98000,125000,103200,126000"
st "DCM_locked"
blo "98000,125800"
tm "WireNameMgr"
)
)
on &246
)
*331 (Wire
uid 10632,0
shape (OrthoPolyLine
uid 10633,0
va (VaSet
vasetType 3
)
xt "96000,127000,106000,127000"
pts [
"96000,127000"
"106000,127000"
]
)
end &235
sat 16
eat 1
st 0
sf 1
si 0
tg (WTG
uid 10638,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10639,0
va (VaSet
)
xt "98000,126000,105700,127000"
st "LOCKED_extraOUT"
blo "98000,126800"
tm "WireNameMgr"
)
)
on &251
)
*332 (Wire
uid 10640,0
shape (OrthoPolyLine
uid 10641,0
va (VaSet
vasetType 3
)
xt "96000,128000,106000,128000"
pts [
"96000,128000"
"106000,128000"
]
)
end &235
sat 16
eat 1
st 0
sf 1
si 0
tg (WTG
uid 10646,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10647,0
va (VaSet
)
xt "98000,127000,103000,128000"
st "PSCLK_OUT"
blo "98000,127800"
tm "WireNameMgr"
)
)
on &250
)
*333 (Wire
uid 10648,0
shape (OrthoPolyLine
uid 10649,0
va (VaSet
vasetType 3
)
xt "96000,129000,106000,129000"
pts [
"96000,129000"
"106000,129000"
]
)
end &235
sat 16
eat 1
st 0
sf 1
si 0
tg (WTG
uid 10654,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10655,0
va (VaSet
)
xt "98000,128000,105800,129000"
st "PSDONE_extraOUT"
blo "98000,128800"
tm "WireNameMgr"
)
)
on &249
)
*334 (Wire
uid 10656,0
shape (OrthoPolyLine
uid 10657,0
va (VaSet
vasetType 3
)
xt "96000,130000,106000,130000"
pts [
"96000,130000"
"106000,130000"
]
)
end &235
sat 16
eat 1
st 0
sf 1
si 0
tg (WTG
uid 10662,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10663,0
va (VaSet
)
xt "98000,129000,102600,130000"
st "PSEN_OUT"
blo "98000,129800"
tm "WireNameMgr"
)
)
on &244
)
*335 (Wire
uid 10664,0
shape (OrthoPolyLine
uid 10665,0
va (VaSet
vasetType 3
)
xt "96000,131000,106000,131000"
pts [
"96000,131000"
"106000,131000"
]
)
end &235
sat 16
eat 1
st 0
sf 1
si 0
tg (WTG
uid 10670,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10671,0
va (VaSet
)
xt "98000,130000,105000,131000"
st "PSINCDEC_OUT"
blo "98000,130800"
tm "WireNameMgr"
)
)
on &245
)
*336 (Wire
uid 10672,0
shape (OrthoPolyLine
uid 10673,0
va (VaSet
vasetType 3
)
xt "96000,132000,106000,132000"
pts [
"96000,132000"
"106000,132000"
]
)
end &235
sat 16
eat 1
st 0
sf 1
si 0
tg (WTG
uid 10678,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10679,0
va (VaSet
)
xt "98000,131000,102400,132000"
st "PS_DIR_IN"
blo "98000,131800"
tm "WireNameMgr"
)
)
on &242
)
*337 (Wire
uid 10680,0
shape (OrthoPolyLine
uid 10681,0
va (VaSet
vasetType 3
)
xt "96000,133000,106000,133000"
pts [
"96000,133000"
"106000,133000"
]
)
end &235
sat 16
eat 1
st 0
sf 1
si 0
tg (WTG
uid 10686,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10687,0
va (VaSet
)
xt "98000,132000,102200,133000"
st "PS_DO_IN"
blo "98000,132800"
tm "WireNameMgr"
)
)
on &243
)
*338 (Wire
uid 10688,0
shape (OrthoPolyLine
uid 10689,0
va (VaSet
vasetType 3
)
xt "96000,134000,106000,134000"
pts [
"96000,134000"
"106000,134000"
]
)
end &235
sat 16
eat 1
st 0
sf 1
si 0
tg (WTG
uid 10694,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10695,0
va (VaSet
)
xt "98000,133000,100200,134000"
st "ready"
blo "98000,133800"
tm "WireNameMgr"
)
)
on &247
)
*339 (Wire
uid 10696,0
shape (OrthoPolyLine
uid 10697,0
va (VaSet
vasetType 3
)
xt "96000,135000,106000,135000"
pts [
"96000,135000"
"106000,135000"
]
)
end &235
sat 16
eat 1
st 0
sf 1
si 0
tg (WTG
uid 10702,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 10703,0
va (VaSet
)
xt "98000,134000,100900,135000"
st "shifting"
blo "98000,134800"
tm "WireNameMgr"
)
)
on &248
)
]
bg "65535,65535,65535"
grid (Grid
origin "0,0"
isVisible 1
isActive 1
xSpacing 1000
xySpacing 1000
xShown 1
yShown 1
color "26368,26368,26368"
)
packageList *340 (PackageList
uid 41,0
stg "VerticalLayoutStrategy"
textVec [
*341 (Text
uid 42,0
va (VaSet
font "arial,8,1"
)
xt "0,0,5400,1000"
st "Package List"
blo "0,800"
)
*342 (MLText
uid 43,0
va (VaSet
)
xt "0,1000,14500,9000"
st "LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_arith.all;
USE IEEE.NUMERIC_STD.all;
USE ieee.std_logic_unsigned.all;

LIBRARY FACT_FAD_lib;
USE FACT_FAD_lib.fad_definitions.all;"
tm "PackageList"
)
]
)
compDirBlock (MlTextGroup
uid 44,0
stg "VerticalLayoutStrategy"
textVec [
*343 (Text
uid 45,0
va (VaSet
isHidden 1
font "Arial,8,1"
)
xt "20000,0,28100,1000"
st "Compiler Directives"
blo "20000,800"
)
*344 (Text
uid 46,0
va (VaSet
isHidden 1
font "Arial,8,1"
)
xt "20000,1000,29600,2000"
st "Pre-module directives:"
blo "20000,1800"
)
*345 (MLText
uid 47,0
va (VaSet
isHidden 1
)
xt "20000,2000,27500,4000"
st "`resetall
`timescale 1ns/10ps"
tm "BdCompilerDirectivesTextMgr"
)
*346 (Text
uid 48,0
va (VaSet
isHidden 1
font "Arial,8,1"
)
xt "20000,4000,30100,5000"
st "Post-module directives:"
blo "20000,4800"
)
*347 (MLText
uid 49,0
va (VaSet
isHidden 1
)
xt "20000,0,20000,0"
tm "BdCompilerDirectivesTextMgr"
)
*348 (Text
uid 50,0
va (VaSet
isHidden 1
font "Arial,8,1"
)
xt "20000,5000,29900,6000"
st "End-module directives:"
blo "20000,5800"
)
*349 (MLText
uid 51,0
va (VaSet
isHidden 1
)
xt "20000,6000,20000,6000"
tm "BdCompilerDirectivesTextMgr"
)
]
associable 1
)
windowSize "1276,-4,2564,1028"
viewArea "50354,105045,134172,174344"
cachedDiagramExtent "0,0,699000,450107"
pageSetupInfo (PageSetupInfo
ptrCmd ""
toPrinter 1
exportedDirectories [
"$HDS_PROJECT_DIR/HTMLExport"
]
exportStdIncludeRefs 1
exportStdPackageRefs 1
)
hasePageBreakOrigin 1
pageBreakOrigin "0,0"
lastUid 10729,0
defaultCommentText (CommentText
shape (Rectangle
layer 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
lineColor "0,0,32768"
)
xt "0,0,15000,5000"
)
text (MLText
va (VaSet
fg "0,0,32768"
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visOptions (mwParamsVisibilityOptions
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defaultPortIoInOut (PortIoInOut
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fg "0,0,32768"
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(Line
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ss 0
es 0
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eat 32
st 0
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tg (WTG
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sat 32
eat 32
sty 1
st 0
sf 1
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tg (WTG
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lineColor "0,0,32768"
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xt "0,0,10000,12000"
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portMapText (BiTextGroup
ps "BottomRightOffsetStrategy"
stg "VerticalLayoutStrategy"
first (MLText
va (VaSet
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second (MLText
va (VaSet
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tm "PortMapTextMgr"
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)
defaultGenFrame (Frame
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lineColor "26368,26368,26368"
lineStyle 2
lineWidth 2
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xt "0,0,20000,20000"
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text (MLText
va (VaSet
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xt "0,-1100,12600,-100"
st "g0: FOR i IN 0 TO n GENERATE"
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xt "50,50,1250,1450"
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num (Text
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xt "250,250,1050,1250"
st "1"
blo "250,1050"
tm "FrameSeqNumMgr"
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decls (MlTextGroup
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stg "VerticalLayoutStrategy"
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va (VaSet
font "Arial,8,1"
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xt "14100,20000,22000,21000"
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*368 (MLText
va (VaSet
)
xt "14100,21000,14100,21000"
tm "BdFrameDeclTextMgr"
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shape (RectFrame
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "26368,26368,26368"
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lineWidth 2
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xt "0,0,20000,20000"
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title (TextAssociate
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text (MLText
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xt "0,-1100,7400,-100"
st "b0: BLOCK (guard)"
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xt "50,50,1250,1450"
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num (Text
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st "1"
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tm "FrameSeqNumMgr"
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stg "VerticalLayoutStrategy"
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tm "BdFrameDeclTextMgr"
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fg "0,65535,0"
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xt "0,0,750,750"
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tg (CPTG
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stg "VerticalLayoutStrategy"
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va (VaSet
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xt "0,750,1800,1750"
st "Port"
blo "0,1550"
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)
thePort (LogicalPort
decl (Decl
n "Port"
t ""
o 0
)
)
)
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ps "OnEdgeStrategy"
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vasetType 1
fg "65535,65535,65535"
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xt "0,0,750,750"
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tg (CPTG
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
va (VaSet
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xt "0,750,1800,1750"
st "Port"
blo "0,1550"
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)
thePort (LogicalPort
m 3
decl (Decl
n "Port"
t ""
o 0
)
)
)
defaultDeclText (MLText
va (VaSet
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archDeclarativeBlock (BdArchDeclBlock
uid 1,0
stg "BdArchDeclBlockLS"
declLabel (Text
uid 2,0
va (VaSet
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xt "37000,1800,42400,2800"
st "Declarations"
blo "37000,2600"
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portLabel (Text
uid 3,0
va (VaSet
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xt "37000,2800,39700,3800"
st "Ports:"
blo "37000,3600"
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uid 4,0
va (VaSet
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font "Arial,8,1"
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xt "37000,1800,40800,2800"
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blo "37000,2600"
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preUserText (MLText
uid 5,0
va (VaSet
isHidden 1
font "Courier New,8,0"
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xt "37000,1800,37000,1800"
tm "BdDeclarativeTextMgr"
)
diagSignalLabel (Text
uid 6,0
va (VaSet
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xt "37000,43000,44100,44000"
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blo "37000,43800"
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postUserLabel (Text
uid 7,0
va (VaSet
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font "Arial,8,1"
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xt "37000,1800,41700,2800"
st "Post User:"
blo "37000,2600"
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postUserText (MLText
uid 8,0
va (VaSet
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font "Courier New,8,0"
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xt "37000,1800,37000,1800"
tm "BdDeclarativeTextMgr"
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commonDM (CommonDM
ldm (LogicalDM
suid 196,0
usingSuid 1
emptyRow *371 (LEmptyRow
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uid 54,0
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*373 (TitleRowHdr
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*374 (FilterRowHdr
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*375 (RefLabelColHdr
tm "RefLabelColHdrMgr"
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*376 (RowExpandColHdr
tm "RowExpandColHdrMgr"
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*377 (GroupColHdr
tm "GroupColHdrMgr"
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*378 (NameColHdr
tm "BlockDiagramNameColHdrMgr"
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*379 (ModeColHdr
tm "BlockDiagramModeColHdrMgr"
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*380 (TypeColHdr
tm "BlockDiagramTypeColHdrMgr"
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*381 (BoundsColHdr
tm "BlockDiagramBoundsColHdrMgr"
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*382 (InitColHdr
tm "BlockDiagramInitColHdrMgr"
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*383 (EolColHdr
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port (LogicalPort
m 4
decl (Decl
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b "(3 downto 0)"
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o 55
suid 5,0
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uid 327,0
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o 56
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uid 329,0
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decl (Decl
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i "'0'"
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decl (Decl
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suid 65,0
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decl (Decl
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o 12
suid 68,0
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uid 3278,0
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m 1
decl (Decl
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b "(3 downto 0)"
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suid 71,0
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decl (Decl
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b "(11 DOWNTO 0)"
o 3
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uid 3390,0
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port (LogicalPort
decl (Decl
n "A3_D"
t "std_logic_vector"
b "(11 DOWNTO 0)"
o 4
suid 82,0
)
)
uid 3392,0
)
*401 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "D0_SRCLK"
t "STD_LOGIC"
o 17
suid 87,0
)
)
uid 3468,0
)
*402 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "D1_SRCLK"
t "STD_LOGIC"
o 18
suid 88,0
)
)
uid 3470,0
)
*403 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "D2_SRCLK"
t "STD_LOGIC"
o 19
suid 89,0
)
)
uid 3472,0
)
*404 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "D3_SRCLK"
t "STD_LOGIC"
o 20
suid 90,0
)
)
uid 3474,0
)
*405 (LeafLogPort
port (LogicalPort
decl (Decl
n "D0_SROUT"
t "std_logic"
o 6
suid 91,0
)
)
uid 3524,0
)
*406 (LeafLogPort
port (LogicalPort
decl (Decl
n "D1_SROUT"
t "std_logic"
o 7
suid 92,0
)
)
uid 3526,0
)
*407 (LeafLogPort
port (LogicalPort
decl (Decl
n "D2_SROUT"
t "std_logic"
o 8
suid 93,0
)
)
uid 3528,0
)
*408 (LeafLogPort
port (LogicalPort
decl (Decl
n "D3_SROUT"
t "std_logic"
o 9
suid 94,0
)
)
uid 3530,0
)
*409 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "D_A"
t "std_logic_vector"
b "(3 DOWNTO 0)"
o 24
suid 95,0
i "(others => '0')"
)
)
uid 3532,0
)
*410 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "DWRITE"
t "std_logic"
o 23
suid 96,0
i "'0'"
)
)
uid 3534,0
)
*411 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "T0_CS"
t "std_logic"
o 38
suid 101,0
)
)
uid 3646,0
)
*412 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "T1_CS"
t "std_logic"
o 39
suid 102,0
)
)
uid 3648,0
)
*413 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "T2_CS"
t "std_logic"
o 40
suid 103,0
)
)
uid 3650,0
)
*414 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "T3_CS"
t "std_logic"
o 41
suid 104,0
)
)
uid 3652,0
)
*415 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "S_CLK"
t "std_logic"
o 37
suid 105,0
)
)
uid 3654,0
)
*416 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "W_A"
t "std_logic_vector"
b "(9 DOWNTO 0)"
o 43
suid 106,0
)
)
uid 3656,0
)
*417 (LeafLogPort
port (LogicalPort
m 2
decl (Decl
n "W_D"
t "std_logic_vector"
b "(15 DOWNTO 0)"
o 49
suid 107,0
)
)
uid 3658,0
)
*418 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "W_RES"
t "std_logic"
o 46
suid 108,0
i "'1'"
)
)
uid 3660,0
)
*419 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "W_RD"
t "std_logic"
o 45
suid 109,0
i "'1'"
)
)
uid 3662,0
)
*420 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "W_WR"
t "std_logic"
o 47
suid 110,0
i "'1'"
)
)
uid 3664,0
)
*421 (LeafLogPort
port (LogicalPort
decl (Decl
n "W_INT"
t "std_logic"
o 13
suid 111,0
)
)
uid 3666,0
)
*422 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "W_CS"
t "std_logic"
o 44
suid 112,0
i "'1'"
)
)
uid 3668,0
)
*423 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "MOSI"
t "std_logic"
o 29
suid 113,0
i "'0'"
)
)
uid 3696,0
)
*424 (LeafLogPort
port (LogicalPort
m 2
decl (Decl
n "MISO"
t "std_logic"
preAdd 0
posAdd 0
o 48
suid 114,0
)
)
uid 3698,0
)
*425 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "TRG_V"
t "std_logic"
o 42
suid 126,0
)
)
uid 3886,0
)
*426 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "RS485_C_RE"
t "std_logic"
o 32
suid 127,0
)
)
uid 3888,0
)
*427 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "RS485_C_DE"
t "std_logic"
o 31
suid 128,0
)
)
uid 3890,0
)
*428 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "RS485_E_RE"
t "std_logic"
o 34
suid 129,0
)
)
uid 3892,0
)
*429 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "RS485_E_DE"
t "std_logic"
o 33
suid 130,0
)
)
uid 3894,0
)
*430 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "DENABLE"
t "std_logic"
o 22
suid 131,0
i "'0'"
)
)
uid 3896,0
)
*431 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "SRIN"
t "std_logic"
o 36
suid 132,0
)
)
uid 3898,0
)
*432 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "EE_CS"
t "std_logic"
o 27
suid 133,0
)
)
uid 3900,0
)
*433 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "LED"
t "std_logic_vector"
b "( 2 DOWNTO 0 )"
o 28
suid 134,0
i "(others => '1')"
)
)
uid 3902,0
)
*434 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "D_T"
t "std_logic_vector"
b "(7 DOWNTO 0)"
o 25
suid 141,0
i "(OTHERS => '0')"
)
)
uid 5322,0
)
*435 (LeafLogPort
port (LogicalPort
decl (Decl
n "D_PLLLCK"
t "std_logic_vector"
b "(3 DOWNTO 0)"
o 10
suid 152,0
)
)
uid 6777,0
scheme 0
)
*436 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "D_T2"
t "std_logic_vector"
b "(3 DOWNTO 0)"
o 26
suid 154,0
i "(others => '0')"
)
)
uid 6872,0
scheme 0
)
*437 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "A1_T"
t "std_logic_vector"
b "(7 DOWNTO 0)"
o 15
suid 155,0
i "(OTHERS => '0')"
)
)
uid 7134,0
scheme 0
)
*438 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "dummy"
t "std_logic"
o 58
suid 157,0
)
)
uid 7473,0
scheme 0
)
*439 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "drs_channel_id"
t "std_logic_vector"
b "(3 downto 0)"
o 57
suid 159,0
i "(others => '0')"
)
)
uid 8875,0
)
*440 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "CLK_50"
t "std_logic"
o 51
suid 163,0
)
)
uid 9516,0
)
*441 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "CLK_25_PS1"
t "std_logic"
o 58
suid 164,0
)
)
uid 10056,0
)
*442 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "adc_clk_en"
t "std_logic"
o 59
suid 165,0
i "'0'"
)
)
uid 10058,0
)
*443 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "A0_T"
t "std_logic_vector"
b "(7 DOWNTO 0)"
o 60
suid 166,0
i "(others => '0')"
)
)
uid 10294,0
scheme 0
)
*444 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "CLK50_OUT"
t "std_logic"
o 61
suid 184,0
)
)
uid 10704,0
)
*445 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "CLK25_OUT"
t "std_logic"
o 62
suid 185,0
)
)
uid 10706,0
)
*446 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "CLK25_PSOUT"
t "std_logic"
o 63
suid 186,0
)
)
uid 10708,0
)
*447 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "PS_DIR_IN"
t "std_logic"
o 64
suid 187,0
)
)
uid 10710,0
)
*448 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "PS_DO_IN"
t "std_logic"
o 65
suid 188,0
)
)
uid 10712,0
)
*449 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "PSEN_OUT"
t "std_logic"
o 66
suid 189,0
)
)
uid 10714,0
)
*450 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "PSINCDEC_OUT"
t "std_logic"
o 67
suid 190,0
)
)
uid 10716,0
)
*451 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "DCM_locked"
t "std_logic"
preAdd 0
posAdd 0
o 68
suid 191,0
)
)
uid 10718,0
)
*452 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "ready"
t "std_logic"
preAdd 0
posAdd 0
o 69
suid 192,0
i "'0'"
)
)
uid 10720,0
)
*453 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "shifting"
t "std_logic"
prec "-- status:"
preAdd 0
posAdd 0
o 70
suid 193,0
i "'0'"
)
)
uid 10722,0
)
*454 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "PSDONE_extraOUT"
t "std_logic"
o 71
suid 194,0
)
)
uid 10724,0
)
*455 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "PSCLK_OUT"
t "std_logic"
o 72
suid 195,0
)
)
uid 10726,0
)
*456 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "LOCKED_extraOUT"
t "std_logic"
o 73
suid 196,0
)
)
uid 10728,0
)
]
)
pdm (PhysicalDM
displayShortBounds 1
editShortBounds 1
uid 67,0
optionalChildren [
*457 (Sheet
sheetRow (SheetRow
headerVa (MVa
cellColor "49152,49152,49152"
fontColor "0,0,0"
font "Tahoma,10,0"
)
cellVa (MVa
cellColor "65535,65535,65535"
fontColor "0,0,0"
font "Tahoma,10,0"
)
groupVa (MVa
cellColor "39936,56832,65280"
fontColor "0,0,0"
font "Tahoma,10,0"
)
emptyMRCItem *458 (MRCItem
litem &371
pos 73
dimension 20
)
uid 69,0
optionalChildren [
*459 (MRCItem
litem &372
pos 0
dimension 20
uid 70,0
)
*460 (MRCItem
litem &373
pos 1
dimension 23
uid 71,0
)
*461 (MRCItem
litem &374
pos 2
hidden 1
dimension 20
uid 72,0
)
*462 (MRCItem
litem &384
pos 48
dimension 20
uid 328,0
)
*463 (MRCItem
litem &385
pos 49
dimension 20
uid 330,0
)
*464 (MRCItem
litem &386
pos 50
dimension 20
uid 1492,0
)
*465 (MRCItem
litem &387
pos 0
dimension 20
uid 2436,0
)
*466 (MRCItem
litem &388
pos 51
dimension 20
uid 2438,0
)
*467 (MRCItem
litem &389
pos 52
dimension 20
uid 3038,0
)
*468 (MRCItem
litem &390
pos 1
dimension 20
uid 3040,0
)
*469 (MRCItem
litem &391
pos 2
dimension 20
uid 3277,0
)
*470 (MRCItem
litem &392
pos 3
dimension 20
uid 3279,0
)
*471 (MRCItem
litem &393
pos 4
dimension 20
uid 3281,0
)
*472 (MRCItem
litem &394
pos 53
dimension 20
uid 3283,0
)
*473 (MRCItem
litem &395
pos 5
dimension 20
uid 3383,0
)
*474 (MRCItem
litem &396
pos 6
dimension 20
uid 3385,0
)
*475 (MRCItem
litem &397
pos 7
dimension 20
uid 3387,0
)
*476 (MRCItem
litem &398
pos 8
dimension 20
uid 3389,0
)
*477 (MRCItem
litem &399
pos 9
dimension 20
uid 3391,0
)
*478 (MRCItem
litem &400
pos 10
dimension 20
uid 3393,0
)
*479 (MRCItem
litem &401
pos 11
dimension 20
uid 3469,0
)
*480 (MRCItem
litem &402
pos 12
dimension 20
uid 3471,0
)
*481 (MRCItem
litem &403
pos 13
dimension 20
uid 3473,0
)
*482 (MRCItem
litem &404
pos 14
dimension 20
uid 3475,0
)
*483 (MRCItem
litem &405
pos 15
dimension 20
uid 3525,0
)
*484 (MRCItem
litem &406
pos 16
dimension 20
uid 3527,0
)
*485 (MRCItem
litem &407
pos 17
dimension 20
uid 3529,0
)
*486 (MRCItem
litem &408
pos 18
dimension 20
uid 3531,0
)
*487 (MRCItem
litem &409
pos 19
dimension 20
uid 3533,0
)
*488 (MRCItem
litem &410
pos 20
dimension 20
uid 3535,0
)
*489 (MRCItem
litem &411
pos 21
dimension 20
uid 3647,0
)
*490 (MRCItem
litem &412
pos 22
dimension 20
uid 3649,0
)
*491 (MRCItem
litem &413
pos 23
dimension 20
uid 3651,0
)
*492 (MRCItem
litem &414
pos 24
dimension 20
uid 3653,0
)
*493 (MRCItem
litem &415
pos 25
dimension 20
uid 3655,0
)
*494 (MRCItem
litem &416
pos 26
dimension 20
uid 3657,0
)
*495 (MRCItem
litem &417
pos 27
dimension 20
uid 3659,0
)
*496 (MRCItem
litem &418
pos 28
dimension 20
uid 3661,0
)
*497 (MRCItem
litem &419
pos 29
dimension 20
uid 3663,0
)
*498 (MRCItem
litem &420
pos 30
dimension 20
uid 3665,0
)
*499 (MRCItem
litem &421
pos 31
dimension 20
uid 3667,0
)
*500 (MRCItem
litem &422
pos 32
dimension 20
uid 3669,0
)
*501 (MRCItem
litem &423
pos 33
dimension 20
uid 3697,0
)
*502 (MRCItem
litem &424
pos 34
dimension 20
uid 3699,0
)
*503 (MRCItem
litem &425
pos 35
dimension 20
uid 3887,0
)
*504 (MRCItem
litem &426
pos 36
dimension 20
uid 3889,0
)
*505 (MRCItem
litem &427
pos 37
dimension 20
uid 3891,0
)
*506 (MRCItem
litem &428
pos 38
dimension 20
uid 3893,0
)
*507 (MRCItem
litem &429
pos 39
dimension 20
uid 3895,0
)
*508 (MRCItem
litem &430
pos 40
dimension 20
uid 3897,0
)
*509 (MRCItem
litem &431
pos 41
dimension 20
uid 3899,0
)
*510 (MRCItem
litem &432
pos 42
dimension 20
uid 3901,0
)
*511 (MRCItem
litem &433
pos 43
dimension 20
uid 3903,0
)
*512 (MRCItem
litem &434
pos 44
dimension 20
uid 5323,0
)
*513 (MRCItem
litem &435
pos 45
dimension 20
uid 6778,0
)
*514 (MRCItem
litem &436
pos 46
dimension 20
uid 6873,0
)
*515 (MRCItem
litem &437
pos 47
dimension 20
uid 7135,0
)
*516 (MRCItem
litem &438
pos 54
dimension 20
uid 7474,0
)
*517 (MRCItem
litem &439
pos 55
dimension 20
uid 8876,0
)
*518 (MRCItem
litem &440
pos 56
dimension 20
uid 9517,0
)
*519 (MRCItem
litem &441
pos 57
dimension 20
uid 10057,0
)
*520 (MRCItem
litem &442
pos 58
dimension 20
uid 10059,0
)
*521 (MRCItem
litem &443
pos 59
dimension 20
uid 10295,0
)
*522 (MRCItem
litem &444
pos 60
dimension 20
uid 10705,0
)
*523 (MRCItem
litem &445
pos 61
dimension 20
uid 10707,0
)
*524 (MRCItem
litem &446
pos 62
dimension 20
uid 10709,0
)
*525 (MRCItem
litem &447
pos 63
dimension 20
uid 10711,0
)
*526 (MRCItem
litem &448
pos 64
dimension 20
uid 10713,0
)
*527 (MRCItem
litem &449
pos 65
dimension 20
uid 10715,0
)
*528 (MRCItem
litem &450
pos 66
dimension 20
uid 10717,0
)
*529 (MRCItem
litem &451
pos 67
dimension 20
uid 10719,0
)
*530 (MRCItem
litem &452
pos 68
dimension 20
uid 10721,0
)
*531 (MRCItem
litem &453
pos 69
dimension 20
uid 10723,0
)
*532 (MRCItem
litem &454
pos 70
dimension 20
uid 10725,0
)
*533 (MRCItem
litem &455
pos 71
dimension 20
uid 10727,0
)
*534 (MRCItem
litem &456
pos 72
dimension 20
uid 10729,0
)
]
)
sheetCol (SheetCol
propVa (MVa
cellColor "0,49152,49152"
fontColor "0,0,0"
font "Tahoma,10,0"
textAngle 90
)
uid 73,0
optionalChildren [
*535 (MRCItem
litem &375
pos 0
dimension 20
uid 74,0
)
*536 (MRCItem
litem &377
pos 1
dimension 50
uid 75,0
)
*537 (MRCItem
litem &378
pos 2
dimension 100
uid 76,0
)
*538 (MRCItem
litem &379
pos 3
dimension 50
uid 77,0
)
*539 (MRCItem
litem &380
pos 4
dimension 100
uid 78,0
)
*540 (MRCItem
litem &381
pos 5
dimension 100
uid 79,0
)
*541 (MRCItem
litem &382
pos 6
dimension 92
uid 80,0
)
*542 (MRCItem
litem &383
pos 7
dimension 80
uid 81,0
)
]
)
fixedCol 4
fixedRow 2
name "Ports"
uid 68,0
vaOverrides [
]
)
]
)
uid 53,0
)
genericsCommonDM (CommonDM
ldm (LogicalDM
emptyRow *543 (LEmptyRow
)
uid 83,0
optionalChildren [
*544 (RefLabelRowHdr
)
*545 (TitleRowHdr
)
*546 (FilterRowHdr
)
*547 (RefLabelColHdr
tm "RefLabelColHdrMgr"
)
*548 (RowExpandColHdr
tm "RowExpandColHdrMgr"
)
*549 (GroupColHdr
tm "GroupColHdrMgr"
)
*550 (NameColHdr
tm "GenericNameColHdrMgr"
)
*551 (TypeColHdr
tm "GenericTypeColHdrMgr"
)
*552 (InitColHdr
tm "GenericValueColHdrMgr"
)
*553 (PragmaColHdr
tm "GenericPragmaColHdrMgr"
)
*554 (EolColHdr
tm "GenericEolColHdrMgr"
)
]
)
pdm (PhysicalDM
displayShortBounds 1
editShortBounds 1
uid 95,0
optionalChildren [
*555 (Sheet
sheetRow (SheetRow
headerVa (MVa
cellColor "49152,49152,49152"
fontColor "0,0,0"
font "Tahoma,10,0"
)
cellVa (MVa
cellColor "65535,65535,65535"
fontColor "0,0,0"
font "Tahoma,10,0"
)
groupVa (MVa
cellColor "39936,56832,65280"
fontColor "0,0,0"
font "Tahoma,10,0"
)
emptyMRCItem *556 (MRCItem
litem &543
pos 0
dimension 20
)
uid 97,0
optionalChildren [
*557 (MRCItem
litem &544
pos 0
dimension 20
uid 98,0
)
*558 (MRCItem
litem &545
pos 1
dimension 23
uid 99,0
)
*559 (MRCItem
litem &546
pos 2
hidden 1
dimension 20
uid 100,0
)
]
)
sheetCol (SheetCol
propVa (MVa
cellColor "0,49152,49152"
fontColor "0,0,0"
font "Tahoma,10,0"
textAngle 90
)
uid 101,0
optionalChildren [
*560 (MRCItem
litem &547
pos 0
dimension 20
uid 102,0
)
*561 (MRCItem
litem &549
pos 1
dimension 50
uid 103,0
)
*562 (MRCItem
litem &550
pos 2
dimension 100
uid 104,0
)
*563 (MRCItem
litem &551
pos 3
dimension 100
uid 105,0
)
*564 (MRCItem
litem &552
pos 4
dimension 50
uid 106,0
)
*565 (MRCItem
litem &553
pos 5
dimension 50
uid 107,0
)
*566 (MRCItem
litem &554
pos 6
dimension 80
uid 108,0
)
]
)
fixedCol 3
fixedRow 2
name "Ports"
uid 96,0
vaOverrides [
]
)
]
)
uid 82,0
type 1
)
activeModelName "BlockDiag"
)
