source: FPGA/FAD/stable/FACT_FAD/FACT_FAD_lib/hdl@ 3544

Name Size Rev Age Author Last Change
../
w5300_modul.vhd.bak 26.9 KB 260   14 years dneise possible to switch off SPI SCLK now. see new revision of simple_daq in ...
w5300_modul.vhd 27.2 KB 260   14 years dneise possible to switch off SPI SCLK now. see new revision of simple_daq in ...
trigger_shaper_beha.vhd 1.3 KB 246   14 years dneise initial check in of 1st stable version.
trigger_counter_beha.vhd 883 bytes 246   14 years dneise initial check in of 1st stable version.
spi_interface_struct.vhd 5.9 KB 246   14 years dneise initial check in of 1st stable version.
spi_distributor_beha.vhd 4.8 KB 246   14 years dneise initial check in of 1st stable version.
spi_controller_beha.vhd 3.7 KB 246   14 years dneise initial check in of 1st stable version.
spi_clock_gen_beha.vhd 1017 bytes 246   14 years dneise initial check in of 1st stable version.
memory_manager_beha.vhd.bak 10.7 KB 246   14 years dneise initial check in of 1st stable version.
memory_manager_beha.vhd 10.8 KB 246   14 years dneise initial check in of 1st stable version.
fad_main_struct.vhd 25.1 KB 260   14 years dneise possible to switch off SPI SCLK now. see new revision of simple_daq in ...
fad_definitions.vhd.bak 6.4 KB 260   14 years dneise possible to switch off SPI SCLK now. see new revision of simple_daq in ...
fad_definitions.vhd 6.4 KB 260   14 years dneise possible to switch off SPI SCLK now. see new revision of simple_daq in ...
fad_board_struct.vhd 9.1 KB 260   14 years dneise possible to switch off SPI SCLK now. see new revision of simple_daq in ...
fad_board.ucf 10.3 KB 252   14 years dneise DRS addresses may not be set via sa 44 0 .. 31
drs_pulser_dummy.vhd 2.7 KB 246   14 years dneise initial check in of 1st stable version.
drs_pulser.vhd 9.0 KB 246   14 years dneise initial check in of 1st stable version.
debouncer.vhd 2.7 KB 246   14 years dneise initial check in of 1st stable version.
dcm_ps_38ns_BEHAVIORAL.vhd 6.0 KB 246   14 years dneise initial check in of 1st stable version.
dcm_50_to_25_BEHAVIORAL.vhd 6.7 KB 246   14 years dneise initial check in of 1st stable version.
DCM_25MHz_noPS_BEHAVIORAL.vhd 6.7 KB 246   14 years dneise initial check in of 1st stable version.
DCM_25MHz_38nsPS_BEHAVIORAL.vhd 6.5 KB 246   14 years dneise initial check in of 1st stable version.
dataRM_64b_16b_width14_dataRM_64b_16b_width14_a.vhd 5.6 KB 246   14 years dneise initial check in of 1st stable version.
dataRAM_64b_16b_width15_dataRAM_64b_16b_width15_a.vhd 5.6 KB 246   14 years dneise initial check in of 1st stable version.
dataRAM_64b_16b_width14_5_dataRAM_64b_16b_width14_5_a.vhd 5.6 KB 246   14 years dneise initial check in of 1st stable version.
data_generator.vhd.bak 11.2 KB 246   14 years dneise initial check in of 1st stable version.
data_generator.vhd 11.2 KB 246   14 years dneise initial check in of 1st stable version.
controlRAM_16bit_x256_controlRAM_16bit_x256_a.vhd 5.1 KB 246   14 years dneise initial check in of 1st stable version.
control_unit_struct.vhd 5.0 KB 252   14 years dneise DRS addresses may not be set via sa 44 0 .. 31
control_manager_beha.vhd 5.7 KB 252   14 years dneise DRS addresses may not be set via sa 44 0 .. 31
clock_generator_struct.vhd 2.2 KB 246   14 years dneise initial check in of 1st stable version.
adc_buffer_beha.vhd 1.1 KB 246   14 years dneise initial check in of 1st stable version.
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