1 | --
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2 | -- VHDL Architecture FACT_FTM_lib.header_modul.beha
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3 | --
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4 | -- Created:
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5 | -- by - kai.UNKNOWN (E5PCXX)
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6 | -- at - 10:30:24 03.03.2011
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7 | --
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8 | -- using Mentor Graphics HDL Designer(TM) 2009.1 (Build 12)
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9 | --
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10 | LIBRARY ieee;
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11 | USE ieee.std_logic_1164.all;
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12 | USE ieee.std_logic_arith.all;
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13 | USE IEEE.STD_LOGIC_UNSIGNED.all;
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14 |
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15 | library ftm_definitions;
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16 | USE ftm_definitions.ftm_array_types.all;
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17 | USE ftm_definitions.ftm_constants.all;
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18 |
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19 | ENTITY header_modul IS
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20 | PORT(
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21 | clk : IN std_logic;
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22 | get_header : IN std_logic;
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23 | get_header_started : OUT std_logic := '0';
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24 | get_header_ready : OUT std_logic := '0';
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25 | board_id : IN std_logic_vector (63 DOWNTO 0);
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26 | trigger_counter_read : OUT std_logic := '0';
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27 | trigger_counter_valid : IN std_logic;
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28 | trigger_counter : IN std_logic_vector (31 DOWNTO 0) := (others => '0');
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29 | get_ts_counter : OUT std_logic := '0';
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30 | get_ts_counter_started : IN std_logic;
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31 | get_ts_counter_ready : IN std_logic;
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32 | timestamp_counter : IN std_logic_vector (47 DOWNTO 0);
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33 | header_board_id : OUT std_logic_vector (63 DOWNTO 0) := (others => '0');
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34 | header_firmware_id : OUT std_logic_vector (15 DOWNTO 0) := (others => '0');
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35 | header_trigger_counter : OUT std_logic_vector (31 DOWNTO 0) := (others => '0');
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36 | header_timestamp_counter : OUT std_logic_vector (47 DOWNTO 0) := (others => '0');
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37 | header_current_state : OUT std_logic_vector (15 DOWNTO 0) := (others => '0');
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38 | current_cc_state : IN std_logic_vector (15 DOWNTO 0)
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39 | );
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40 | END ENTITY header_modul;
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41 |
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42 | --
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43 | ARCHITECTURE beha OF header_modul IS
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44 |
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45 | type state_header_proc_type is (HP_INIT, HP_CONFIG, HP_IDLE, HP_START, HP_TRG_CNT,
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46 | HP_TS_CNT, HP_TS_CNT_END, HP_END);
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47 |
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48 | signal state_header_proc : state_header_proc_type := HP_INIT;
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49 |
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50 | BEGIN
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51 | header_proc : process (clk)
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52 | begin
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53 | if rising_edge (clk) then
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54 | case state_header_proc is
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55 |
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56 | when HP_INIT =>
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57 | state_header_proc <= HP_CONFIG;
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58 |
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59 | when HP_CONFIG =>
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60 | state_header_proc <= HP_IDLE;
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61 |
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62 | when HP_IDLE =>
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63 | if (get_header = '1') then
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64 | get_header_started <= '1';
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65 | get_header_ready <= '0';
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66 | state_header_proc <= HP_START;
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67 | end if;
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68 |
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69 | when HP_START =>
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70 | header_board_id <= board_id;
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71 | header_firmware_id <= X"00" & FIRMWARE_ID;
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72 | header_current_state <= current_cc_state;
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73 |
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74 | trigger_counter_read <= '1';
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75 | state_header_proc <= HP_TRG_CNT;
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76 |
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77 | when HP_TRG_CNT =>
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78 | trigger_counter_read <= '0';
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79 | if (trigger_counter_valid = '1') then
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80 | header_trigger_counter <= trigger_counter;
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81 | get_ts_counter <= '1';
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82 | state_header_proc <= HP_TS_CNT;
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83 | end if;
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84 |
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85 | when HP_TS_CNT =>
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86 | if (get_ts_counter_started = '1') then
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87 | get_ts_counter <= '0';
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88 | state_header_proc <= HP_TS_CNT_END;
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89 | end if;
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90 |
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91 | when HP_TS_CNT_END =>
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92 | if (get_ts_counter_ready = '1') then
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93 | header_timestamp_counter <= timestamp_counter;
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94 | state_header_proc <= HP_END;
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95 | end if;
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96 |
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97 | when HP_END =>
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98 | if (get_header <= '0') then
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99 | get_header_started <= '0';
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100 | get_header_ready <= '1';
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101 | state_header_proc <= HP_IDLE;
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102 | end if;
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103 |
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104 | end case;
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105 | end if;
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106 | end process header_proc;
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107 |
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108 | END ARCHITECTURE beha;
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109 |
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