| 1 | --
|
|---|
| 2 | -- VHDL Architecture FACT_FTM_lib.header_modul.beha
|
|---|
| 3 | --
|
|---|
| 4 | -- Created:
|
|---|
| 5 | -- by - kai.UNKNOWN (E5PCXX)
|
|---|
| 6 | -- at - 10:30:24 03.03.2011
|
|---|
| 7 | --
|
|---|
| 8 | -- using Mentor Graphics HDL Designer(TM) 2009.1 (Build 12)
|
|---|
| 9 | --
|
|---|
| 10 | LIBRARY ieee;
|
|---|
| 11 | USE ieee.std_logic_1164.all;
|
|---|
| 12 | USE ieee.std_logic_arith.all;
|
|---|
| 13 | USE IEEE.STD_LOGIC_UNSIGNED.all;
|
|---|
| 14 |
|
|---|
| 15 | library ftm_definitions;
|
|---|
| 16 | USE ftm_definitions.ftm_array_types.all;
|
|---|
| 17 | USE ftm_definitions.ftm_constants.all;
|
|---|
| 18 |
|
|---|
| 19 | ENTITY header_modul IS
|
|---|
| 20 | PORT(
|
|---|
| 21 | clk : IN std_logic;
|
|---|
| 22 | get_header : IN std_logic;
|
|---|
| 23 | get_header_started : OUT std_logic := '0';
|
|---|
| 24 | get_header_ready : OUT std_logic := '0';
|
|---|
| 25 | board_id : IN std_logic_vector (63 DOWNTO 0);
|
|---|
| 26 | trigger_counter_read : OUT std_logic := '0';
|
|---|
| 27 | trigger_counter_valid : IN std_logic;
|
|---|
| 28 | trigger_counter : IN std_logic_vector (31 DOWNTO 0) := (others => '0');
|
|---|
| 29 | get_ts_counter : OUT std_logic := '0';
|
|---|
| 30 | get_ts_counter_started : IN std_logic;
|
|---|
| 31 | get_ts_counter_ready : IN std_logic;
|
|---|
| 32 | timestamp_counter : IN std_logic_vector (47 DOWNTO 0);
|
|---|
| 33 | header_board_id : OUT std_logic_vector (63 DOWNTO 0) := (others => '0');
|
|---|
| 34 | header_firmware_id : OUT std_logic_vector (15 DOWNTO 0) := (others => '0');
|
|---|
| 35 | header_trigger_counter : OUT std_logic_vector (31 DOWNTO 0) := (others => '0');
|
|---|
| 36 | header_timestamp_counter : OUT std_logic_vector (47 DOWNTO 0) := (others => '0');
|
|---|
| 37 | header_current_state : OUT std_logic_vector (15 DOWNTO 0) := (others => '0');
|
|---|
| 38 | current_cc_state : IN std_logic_vector (15 DOWNTO 0)
|
|---|
| 39 | );
|
|---|
| 40 | END ENTITY header_modul;
|
|---|
| 41 |
|
|---|
| 42 | --
|
|---|
| 43 | ARCHITECTURE beha OF header_modul IS
|
|---|
| 44 |
|
|---|
| 45 | type state_header_proc_type is (HP_INIT, HP_CONFIG, HP_IDLE, HP_START, HP_TRG_CNT,
|
|---|
| 46 | HP_TS_CNT, HP_TS_CNT_END, HP_END);
|
|---|
| 47 |
|
|---|
| 48 | signal state_header_proc : state_header_proc_type := HP_INIT;
|
|---|
| 49 |
|
|---|
| 50 | BEGIN
|
|---|
| 51 | header_proc : process (clk)
|
|---|
| 52 | begin
|
|---|
| 53 | if rising_edge (clk) then
|
|---|
| 54 | case state_header_proc is
|
|---|
| 55 |
|
|---|
| 56 | when HP_INIT =>
|
|---|
| 57 | state_header_proc <= HP_CONFIG;
|
|---|
| 58 |
|
|---|
| 59 | when HP_CONFIG =>
|
|---|
| 60 | state_header_proc <= HP_IDLE;
|
|---|
| 61 |
|
|---|
| 62 | when HP_IDLE =>
|
|---|
| 63 | if (get_header = '1') then
|
|---|
| 64 | get_header_started <= '1';
|
|---|
| 65 | get_header_ready <= '0';
|
|---|
| 66 | state_header_proc <= HP_START;
|
|---|
| 67 | end if;
|
|---|
| 68 |
|
|---|
| 69 | when HP_START =>
|
|---|
| 70 | header_board_id <= board_id;
|
|---|
| 71 | header_firmware_id <= X"00" & FIRMWARE_ID;
|
|---|
| 72 | header_current_state <= current_cc_state;
|
|---|
| 73 |
|
|---|
| 74 | trigger_counter_read <= '1';
|
|---|
| 75 | state_header_proc <= HP_TRG_CNT;
|
|---|
| 76 |
|
|---|
| 77 | when HP_TRG_CNT =>
|
|---|
| 78 | trigger_counter_read <= '0';
|
|---|
| 79 | if (trigger_counter_valid = '1') then
|
|---|
| 80 | header_trigger_counter <= trigger_counter;
|
|---|
| 81 | get_ts_counter <= '1';
|
|---|
| 82 | state_header_proc <= HP_TS_CNT;
|
|---|
| 83 | end if;
|
|---|
| 84 |
|
|---|
| 85 | when HP_TS_CNT =>
|
|---|
| 86 | if (get_ts_counter_started = '1') then
|
|---|
| 87 | get_ts_counter <= '0';
|
|---|
| 88 | state_header_proc <= HP_TS_CNT_END;
|
|---|
| 89 | end if;
|
|---|
| 90 |
|
|---|
| 91 | when HP_TS_CNT_END =>
|
|---|
| 92 | if (get_ts_counter_ready = '1') then
|
|---|
| 93 | header_timestamp_counter <= timestamp_counter;
|
|---|
| 94 | state_header_proc <= HP_END;
|
|---|
| 95 | end if;
|
|---|
| 96 |
|
|---|
| 97 | when HP_END =>
|
|---|
| 98 | if (get_header <= '0') then
|
|---|
| 99 | get_header_started <= '0';
|
|---|
| 100 | get_header_ready <= '1';
|
|---|
| 101 | state_header_proc <= HP_IDLE;
|
|---|
| 102 | end if;
|
|---|
| 103 |
|
|---|
| 104 | end case;
|
|---|
| 105 | end if;
|
|---|
| 106 | end process header_proc;
|
|---|
| 107 |
|
|---|
| 108 | END ARCHITECTURE beha;
|
|---|
| 109 |
|
|---|