Changeset 10047

Timestamp:

10/29/10 13:43:30 (14 years ago)

Author:

weitzel

Message:

timeout implemented for FTU RS485 communication; new version of FTU docu

Location:

firmware/FTU

Files:

• doc/v2 (added)
• doc/v2/FTU_firmware_v2.pdf (added)
• doc/v2/FTU_firmware_v2.tex (added)
• ftu_definitions.vhd (modified) (1 diff)
• rs485/FTU_rs485_interpreter.vhd (modified) (1 diff)
• rs485/FTU_rs485_receiver.vhd (modified) (2 diffs)

firmware/FTU/ftu_definitions.vhd

@@ -78 +78 @@
   --communication with FTM
   constant RS485_BAUD_RATE   : integer := 250000;  -- bits / sec in our case
+  constant RS485_TIMEOUT     : integer := (INT_CLK_FREQUENCY * 2) / 1000;  -- 2ms @ 50MHz (100000 clk periods)
   constant RS485_BLOCK_WIDTH : integer := 224;     -- 28 byte protocol
   constant RS485_START_DELIM : std_logic_vector(7 downto 0) := "01000000";  -- start delimiter

firmware/FTU/rs485/FTU_rs485_interpreter.vhd

@@ -92 +92 @@
           int_new_prescaling  <= '0';
           int_read_rates      <= '0';
-          int_read_DACs       <= '0'; 
-          int_read_enables    <= '0';  
+          int_read_DACs       <= '0';
+          int_read_enables    <= '0';
           int_read_prescaling <= '0';
           int_ping_pong       <= '0';

firmware/FTU/rs485/FTU_rs485_receiver.vhd

@@ -10 +10 @@
 --
 -- modified for FTU design by Q. Weitzel, 13 September 2010
+-- timeout added, Q. Weitzel, 26 October 2010
 --
 
@@ -36 +37 @@
 ARCHITECTURE beha OF FTU_rs485_receiver IS
   
-  signal rxcnt : integer range 0 to RX_BYTES := 0;
-  signal rxsr : std_logic_vector(3 downto 0) := (others => '0');
+  signal rxcnt       : integer range 0 to RX_BYTES := 0;
+  signal rxsr        : std_logic_vector(3 downto 0) := (others => '0');
+  signal timeout_cnt : integer range 0 to RS485_TIMEOUT + 1 := 0;
   
 BEGIN
   
-  rx_data_proc: process (rec_clk)
+  rx_data_proc : process(rec_clk)
   begin
     if rising_edge(rec_clk) then
       rxsr <= rxsr(2 downto 0) & rec_den;
-      if (rxsr(3 downto 2) = "01") then -- identify rising edge
-        rec_dout((rxcnt*rec_din'length + rec_din'length - 1) downto (rxcnt*rec_din'length)) <= rec_din;
-        rxcnt <= rxcnt + 1;
-        if (rxcnt < RX_BYTES - 1) then
-          rec_valid <= '0';
-        else
-          rxcnt <= 0;
-          rec_valid <= '1';
+      if (timeout_cnt = RS485_TIMEOUT) then
+        rec_dout <= (others => '0');
+        rxcnt <= 0;
+        rec_valid <= '0';
+      else        
+        if (rxsr(3 downto 2) = "01") then -- identify rising edge
+          rec_dout((rxcnt*rec_din'length + rec_din'length - 1) downto (rxcnt*rec_din'length)) <= rec_din;
+          rxcnt <= rxcnt + 1;
+          if (rxcnt < RX_BYTES - 1) then
+            rec_valid <= '0';
+          else
+            rxcnt <= 0;
+            rec_valid <= '1';
+          end if;
         end if;
       end if;
+    end if;
+  end process rx_data_proc;
+
+  rx_timeout_proc : process(rec_clk)
+  begin
+    if rising_edge(rec_clk) then
+      if (rxcnt > 0) then
+        timeout_cnt <= timeout_cnt + 1;
+      else
+        timeout_cnt <= 0;
+      end if;
     end if;  
-  end process rx_data_proc;
-   
+  end process rx_timeout_proc;
+  
 END ARCHITECTURE beha;