Changeset 10236 for firmware/FSC/src
- Timestamp:
- 03/11/11 11:24:44 (14 years ago)
- Location:
- firmware/FSC/src
- Files:
-
- 2 deleted
- 7 edited
Legend:
- Unmodified
- Added
- Removed
-
firmware/FSC/src/FSC.c
r10110 r10236 14 14 //----------------------------------------------------------------------------- 15 15 // definition of some functions: 16 // these function are implemented below the main() 17 // here in FSC.c 18 // 16 // these function are implemented in this file, this is not doog coding style. 19 17 // sooner or later, they will be moved into more apropriate files. 20 18 U08 increase_adc (U08 channel); … … 28 26 void parse(); //doesn't do anything at the moment 29 27 void check_if_measured_all() ; 28 void print_ad7719_nicely(); 29 void print_adc_nicely(); 30 30 31 // end of function definition: 31 32 //----------------------------------------------------------------------------- … … 38 39 U08 usart_rx_buffer[USART_RX_BUFFER_SIZE]; 39 40 U08 usart_tx_buffer[USART_TX_BUFFER_SIZE]; 41 U08 usart_received_chars; 40 42 U08 usart_rx_buffer_index = 0; 41 43 U08 usart_tx_buffer_index = 0; … … 52 54 #define TEMP_CHANNELS 64 53 55 #define CHANNEL_BITMAP 8 54 #define AD7719_READINGS_UNTIL_SETTLED 1// bei3:480ms56 #define AD7719_READINGS_UNTIL_SETTLED 5 // bei3:480ms 55 57 U32 ad7719_values[TEMP_CHANNELS]; 56 58 U08 ad7719_enables[CHANNEL_BITMAP]; … … 69 71 #define H_BITMAP 1 70 72 #define ADC_READINGS_UNTIL_SETTLED 1 71 U 32adc_values[V_CHANNELS + I_CHANNELS + H_CHANNELS]; // stores measured voltage in steps of 16mV73 U08 adc_values[V_CHANNELS + I_CHANNELS + H_CHANNELS]; // stores measured voltage in steps of 16mV 72 74 U08 adc_enables[V_BITMAP + I_BITMAP + H_BITMAP]; 73 75 U08 adc_channels_ready[V_BITMAP + I_BITMAP + H_BITMAP]; … … 76 78 U08 adc_current_reading = 0; 77 79 bool adc_measured_all = false; 80 81 bool once_told_you = true; 82 bool debug_mode = false; 78 83 79 84 //----------------------------------------------------------------------------- … … 99 104 sei(); 100 105 106 PORTB &= ~(1<<PB2); 107 101 108 for ( U08 i=0; i<CHANNEL_BITMAP; ++i ) { 102 ad7719_enables[i]=0x FF;109 ad7719_enables[i]=0x00; 103 110 ad7719_channels_ready[i]=0; 104 111 } 105 for ( U08 i=0; i<V_BITMAP + I_BITMAP + H_BITMAP; ++i ) { 106 adc_enables[i]=0xFF; 112 ad7719_enables[0]=0x08; 113 for ( U08 i=0; i<V_BITMAP + I_BITMAP; ++i ) { 114 adc_enables[i]=0x00; 107 115 adc_channels_ready[i]=0; 108 116 } 109 static U08 welcome[]="\n\nwelcome to FACT FSC commandline interface v0.1\nready?"; 117 adc_enables[V_BITMAP + I_BITMAP + H_BITMAP -1] = 0x00; 118 adc_channels_ready[V_BITMAP + I_BITMAP + H_BITMAP -1]=0; 119 120 static U08 welcome[]="\n\nwelcome to FACT FSC commandline interface v0.2\nready?"; 110 121 usart_write_str(welcome); 111 122 … … 176 187 adc_readings_since_last_muxing=0; 177 188 // note that this channel is ready, now and 178 adc_output(adc_current_channel, adc_current_reading);189 //adc_output(adc_current_channel, adc_current_reading); 179 190 // proceed to the next enabled channel. 180 191 adc_channels_ready[adc_current_channel/8] |= (1<<(adc_current_channel%8)); 181 192 adc_current_channel = increase_adc (adc_current_channel); 182 193 Set_V_Muxer(adc_current_channel); 194 _delay_ms(10); 183 195 } else { // the ADC did not settle yet, we discard the reading 184 196 ++adc_readings_since_last_muxing; … … 190 202 //IF AD7719 ADC just finished a conversion -- every 60ms 191 203 192 if (AD7719_IS_READY() ) {204 if (AD7719_IS_READY() && !ad7719_measured_all) { 193 205 ad7719_current_reading = read_adc(); // --takes at 4MHz SCLK speed about 6us 194 206 // AD7719 is only read out if settled. saves time. … … 196 208 ad7719_values[ad7719_current_channel] = ad7719_current_reading; 197 209 ad7719_readings_since_last_muxing=0; 210 if (debug_mode) { 211 usart_write_U32_hex(ad7719_current_reading); 212 usart_write_char('\n'); 213 usart_write_char('\n'); 214 } 198 215 // now prepare the data to be send away via USART. 199 216 //ad7719_output(ad7719_current_channel, ad7719_current_reading); … … 205 222 } else { // the AD7719 did not settle yet, we discard the reading 206 223 ++ad7719_readings_since_last_muxing; 224 if (debug_mode) { 225 usart_write_U32_hex(ad7719_current_reading); 226 usart_write_char('\n'); 227 } 207 228 208 229 // current reading is not used for anything else … … 213 234 check_if_measured_all(); 214 235 215 if (ad7719_measured_all && adc_measured_all) 236 if (ad7719_measured_all && adc_measured_all && !once_told_you) 237 { 216 238 adc_output_all(); 217 239 once_told_you = true; 240 } 218 241 //---------------------------------------------------------------------------- 219 242 /* … … 677 700 // this function generates some output. 678 701 void ad7719_output(U08 channel, U32 data) { 702 float value = 0; 679 703 usart_write_str((pU08)"R:"); //R for resistance 680 704 usart_write_char('A'+channel/8); // Letters A,B,C,D,E,F,G,H 681 usart_write_char(' ');705 //usart_write_char(' '); 682 706 usart_write_U08(channel%8+1,1); // Numbers 1...8 683 707 usart_write_char(':'); 684 usart_write_U32_hex(data); //data 685 usart_write_char('\n'); 708 709 710 value = (6.25 * data) / ((U32)1 << 25); 711 usart_write_float(value, 3,6); 712 //usart_write_U32_hex(data); //data 713 714 686 715 } 687 716 688 717 void adc_output(U08 channel, U08 data) { 689 718 690 if (channel < 40) 691 usart_write_str((pU08)"V:"); //V for Vendetta 692 else if (channel < 80) 693 usart_write_str((pU08)"I:"); //I for Irregular verbs 694 else if (channel < 84) 695 usart_write_str((pU08)"H:"); //H for Huurrray!!! 696 697 switch (channel/16) { 698 case 0: 699 usart_write_char('A'); //V for Vendetta 700 case 1: 701 usart_write_char('B'); //V for Vendetta 702 case 2: 703 usart_write_char('D'); //V for Vendetta 704 case 3: 705 usart_write_char('C'); //V for Vendetta 706 case 4: 707 usart_write_char('EF'); //V for Vendetta 708 } 709 usart_write_char(' '); 710 usart_write_U08((channel/2)%8+1,1); // Numbers 1...8 719 // if (channel < 40) 720 // usart_write_str((pU08)"V:"); 721 // else if (channel < 80) 722 // usart_write_str((pU08)"I:"); 723 // else if (channel < 84) 724 // usart_write_str((pU08)"H:"); 725 726 if (channel <80) 727 { 728 switch ((channel%40)/4) { 729 case 0: 730 case 1: 731 usart_write_char('A'); 732 break; 733 case 2: 734 case 3: 735 usart_write_char('B'); 736 break; 737 case 4: 738 case 5: 739 usart_write_char('C'); 740 break; 741 case 6: 742 case 7: 743 usart_write_char('D'); 744 break; 745 case 8: 746 usart_write_char('E'); 747 break; 748 case 9: 749 usart_write_char('F'); 750 break; 751 default: 752 usart_write_char('?'); 753 break; 754 } 755 } 756 else // channel 80..83 757 { 758 usart_write_char('H'); 759 } 760 //usart_write_char(' '); 761 762 if ( (channel%40)/4 == 9) 763 usart_write_U08((channel)%4+1,1); // Numbers 1...4 764 else 765 usart_write_U08((channel)%8+1,1); // Numbers 1...8 766 767 768 //usart_write_U08(channel,2); // Numbers 1...8 711 769 usart_write_char(':'); 712 usart_write_U16((U16)data*16,5); //data 713 usart_write_char('\n'); 714 715 770 usart_write_U16((U16)data*16, 4); //data 716 771 } 717 772 718 773 719 774 void adc_output_all() { 720 // output all values, which are enabled 721 for (U08 i=0 ; i<40; ++i){ 722 if (i==0) usart_write_str((pU08)"voltages:(in units of 16mV)\n"); 723 if (i==40) usart_write_str((pU08)"currents:\n"); 724 if (i==80) usart_write_str((pU08)"humidities:\n"); 725 if (adc_enables[i/8] & i%8){ 726 usart_write_U08(adc_values[i],3); 727 usart_write_char('\t'); 728 } 729 if (i%8==7) usart_write_char('\n'); 730 if (i==83) usart_write_char('\n'); 731 } 775 print_adc_nicely(); 776 print_ad7719_nicely(); 732 777 } 733 778 … … 747 792 748 793 switch (command) { 749 case 'E': // AD7719 enable bitmaps may be set 750 for ( U08 i=0; i<CHANNEL_BITMAP; ++i ) { 751 ad7719_enables[i]=usart_rx_buffer[i+1]; 752 ad7719_channels_ready[i]=0; 753 } 754 break; 755 case 'e': // ATmega internal ADC enable bitmaps may be set 756 for ( U08 i=0; i<V_BITMAP + I_BITMAP + H_BITMAP; ++i ) { 757 adc_enables[i]=usart_rx_buffer[i+1]; 758 adc_channels_ready[i]=0; 794 case 'E': // AD7719 enable bitmaps may be set 795 usart_write_str((pU08)"\n set enable bits of AD7719 Port "); 796 if ((usart_rx_buffer_index>=5) && 797 (usart_rx_buffer[2] >= 'A' && usart_rx_buffer[2] <= 'H')) 798 { 799 usart_write_char(usart_rx_buffer[2]); 800 usart_write_str((pU08)" to "); 801 usart_write_U08_hex(usart_rx_buffer[4]); 802 usart_write_char('\n'); 803 ad7719_enables[usart_rx_buffer[2]-'A']=usart_rx_buffer[4]; 804 ad7719_channels_ready[usart_rx_buffer[2]-'A']=0x00; 805 } 806 else if ((usart_rx_buffer_index=3) && 807 (usart_rx_buffer[1] >= 'A' && usart_rx_buffer[1] <= 'H')) 808 { 809 usart_write_char(usart_rx_buffer[1]); 810 if (usart_rx_buffer[2]!='0') { 811 usart_write_str((pU08)" to 0xFF\n"); 812 ad7719_enables[usart_rx_buffer[1]-'A']=0xFF; 813 } else 814 { 815 usart_write_str((pU08)" to 0x00\n"); 816 ad7719_enables[usart_rx_buffer[1]-'A']=0x00; 817 } 818 ad7719_channels_ready[usart_rx_buffer[1]-'A']=0x00; 819 } 820 else 821 { 822 usart_write_str((pU08)"\n something wrong\n"); 823 usart_write_str((pU08)"usart_rx_buffer_index: "); 824 usart_write_U08(usart_rx_buffer_index, 3); 825 usart_write_str((pU08)"\n usart_rx_buffer[2]: "); 826 usart_write_char(usart_rx_buffer[2]); 827 usart_write_str((pU08)"\n usart_rx_buffer[4]: "); 828 usart_write_U08_hex(usart_rx_buffer[4]); 829 usart_write_char('\n'); 830 } 831 break; 832 case 'e': // ATmega internal ADC enable bitmaps may be set 833 if ((usart_received_chars>5) && 834 (usart_rx_buffer[3] >= 'A' && usart_rx_buffer[3] <= 'H')) 835 { 836 adc_enables[usart_rx_buffer[3]-'A']=usart_rx_buffer[5]; 837 adc_channels_ready[usart_rx_buffer[3]-'A']=0x00; 759 838 } 760 839 break; … … 770 849 break; 771 850 case 'G': // GET the Temperature channels, which are enabled 851 once_told_you = false; 772 852 for ( U08 i=0; i<CHANNEL_BITMAP; ++i ) { 773 853 ad7719_channels_ready[i]=0; … … 775 855 break; 776 856 case 'g': // GET the voltage/current/humidity channels, which are enabled 857 once_told_you = false; 777 858 for ( U08 i=0; i<V_BITMAP + I_BITMAP + H_BITMAP; ++i ) { 778 859 adc_channels_ready[i]=0; 779 860 } 780 861 break; 862 863 case 'Q': 864 for (U08 i=0; i< TEMP_CHANNELS;++i) { 865 if (i%8 == 0) usart_write_char('\n'); 866 usart_write_U32_hex(ad7719_values[i]); 867 usart_write_char('\t'); 868 } 869 usart_write_char('\n'); 870 break; 871 872 case 'q': 873 // output: U08 adc_values[V_CHANNELS + I_CHANNELS + H_CHANNELS]; 874 for (U08 i=0; i< V_CHANNELS + I_CHANNELS + H_CHANNELS;++i) { 875 if (i%8 == 0) usart_write_char('\n'); 876 usart_write_U16(adc_values[i]*16, 5); 877 usart_write_char('\t'); 878 } 879 usart_write_char('\n'); 880 break; 881 882 case 'P': 883 print_ad7719_nicely(); 884 break; 885 886 case 'p': 887 print_adc_nicely(); 888 break; 889 890 891 781 892 case 's': 893 894 usart_write_str((pU08)"adc status:\n"); 895 for (U08 i=0; i< V_BITMAP + I_BITMAP + H_BITMAP;++i) { 896 usart_write_U08_bin(adc_enables[i]); 897 } 782 898 usart_write_char('\n'); 899 for (U08 i=0; i< V_BITMAP + I_BITMAP + H_BITMAP;++i){ 900 usart_write_U08_bin(adc_channels_ready[i]); 901 } 902 usart_write_char('\n'); 903 904 usart_write_str((pU08)"ad7719 status:\n"); 783 905 for (U08 i=0; i< CHANNEL_BITMAP;++i) { 784 906 usart_write_U08_bin(ad7719_enables[i]); 785 usart_write_char('\t');907 //usart_write_char('\t'); 786 908 } 787 909 usart_write_char('\n'); 788 910 for (U08 i=0; i< CHANNEL_BITMAP;++i){ 789 911 usart_write_U08_bin(ad7719_channels_ready[i]); 790 usart_write_char('\t');912 //usart_write_char('\t'); 791 913 } 792 914 usart_write_char('\n'); 793 usart_write_U32_hex(local_ms); 794 break; 795 } 915 916 usart_write_str((pU08)"time:"); 917 usart_write_float((float)local_ms/1000 , 1,7); 918 usart_write_str((pU08)" sec.\n"); 919 920 usart_write_str((pU08)"adc measured all: "); 921 if (adc_measured_all) 922 usart_write_str((pU08)" true\n"); 923 else 924 usart_write_str((pU08)"false\n"); 925 926 usart_write_str((pU08)"ad7719 measured all: "); 927 if (ad7719_measured_all) 928 usart_write_str((pU08)" true\n"); 929 else 930 usart_write_str((pU08)"false\n"); 931 932 usart_write_str((pU08)"adc current channel:"); 933 usart_write_U08(adc_current_channel,2); 934 usart_write_char('\n'); 935 936 usart_write_str((pU08)"ad7719 current channel:"); 937 usart_write_U08(ad7719_current_channel,2); 938 usart_write_char('\n'); 939 break; 940 941 case 'd': 942 usart_write_str((pU08)"\ndebug mode "); 943 debug_mode = true; 944 if (usart_rx_buffer[1] == '0'){ 945 debug_mode = false; 946 usart_write_str((pU08)"off\n"); 947 } else { 948 usart_write_str((pU08)"on\n"); 949 } 950 break; 951 } 952 953 796 954 usart_write_str((pU08)"\nready?"); 797 955 for (U08 i=0; i<USART_RX_BUFFER_SIZE; ++i) … … 817 975 818 976 } 977 978 void print_ad7719_nicely() 979 { 980 float value; 981 982 usart_write_str((pU08)"\n printing measured resistance in kohms:\n"); 983 984 for (U08 i=0; i< TEMP_CHANNELS;++i) { 985 if (i%8 == 0) usart_write_char('\n'); 986 987 // print channel name: 988 usart_write_str((pU08)"R:"); //R for resistance 989 usart_write_char('A'+i/8); // Letters A,B,C,D,E,F,G,H 990 //usart_write_char(' '); 991 usart_write_U08(i%8+1,1); // Numbers 1...8 992 usart_write_char(':'); 993 994 // check if this channel is enabled in the bitmap 995 if (ad7719_enables[i/8] & (1<<i%8)) 996 { 997 value = (6.25 * ad7719_values[i]) / ((U32)1 << 25); 998 usart_write_float(value, 3,6); 999 //usart_write_U32_hex(data); //data 1000 usart_write_str((pU08)" "); 1001 } else { 1002 usart_write_str((pU08)" "); 1003 } 1004 //usart_write_char('\n'); 1005 } 1006 } 1007 1008 void print_adc_nicely() { 1009 usart_write_str((pU08)"\n printing voltages in mV:\n"); 1010 // output: U08 adc_values[V_CHANNELS + I_CHANNELS + H_CHANNELS]; 1011 for (U08 i=0; i< V_CHANNELS + I_CHANNELS + H_CHANNELS;++i) { 1012 if (i%8 == 0) usart_write_char('\n'); 1013 adc_output(i, adc_values[i]); 1014 usart_write_str((pU08)" "); 1015 } 1016 usart_write_char('\n'); 1017 } -
firmware/FSC/src/application.c
r10109 r10236 2 2 3 3 #include "application.h" 4 4 #include <avr/wdt.h> 5 5 6 6 … … 61 61 SPI_PRT |= (1 << SPI_MOSI); 62 62 SPI_PRT |= (1 << SPI_SCLK); 63 SPI_PRT |= (1 << SPI_MISO);63 //SPI_PRT |= (1 << SPI_MISO); 64 64 65 65 // ADC … … 70 70 DDRD &= ~(1<<PD2); // PD2 is ACC_READY input 71 71 72 //MAX6662 <--- not assembled anymore72 //MAX6662 <--- not assembled 73 73 // DDRB &= ~(1<<PB0); // PB0 is over temperature alert input 74 74 // DDRB &= ~(1<<PB1); // PB1 is general temperature altert input 75 76 77 75 } 78 76 -
firmware/FSC/src/spi_master.c
r10109 r10236 29 29 // 1.) Ethernet modul: 30 30 // supports spi mode=0 or mode=3 --> eighther cpol=cpha=0 or cpol=cpha=1 31 // THAT IS NOT TRUE!!!! 32 // only mode 0 !!!!!!!!!!!!!!!!!!!!!!!!!!!1 31 33 // MSB first 32 34 // SCLK time 70ns minimum --> 14.2MHz maximum … … 183 185 */ 184 186 U08 n; 185 187 // Transfer requested bytes 188 for (n = 0; n < bytes; n++) 189 { 186 190 // Check for active slave select level 187 191 if (SPI_DEVICE_ACTIVE_HIGH[device]) … … 202 206 } 203 207 204 // Transfer requested bytes 205 for (n = 0; n < bytes; n++) 206 { 208 207 209 spi_read_buffer[n] = spi_transfer_byte(spi_write_buffer[n]); 208 }210 209 211 210 212 // Check for inactive slave select level … … 224 226 PORTD |= (1 << SPI_DEVICE_SS[device]); // Set Slave Select high 225 227 } 228 } 229 226 230 } 227 231 } -
firmware/FSC/src/usart.c
r10109 r10236 45 45 void usart_write_char(U08 data) 46 46 { 47 //while (!(UCSRA & (1 << UDRE))) ; // Wait until tx register is empty48 //UDR = data;49 50 if ( usart_tx_buffer_index < USART_TX_BUFFER_SIZE-1){51 usart_tx_buffer[usart_tx_buffer_index] = data;52 ++usart_tx_buffer_index;53 } else {54 usart_tx_buffer_overflow = true;55 }47 while (!(UCSRA & (1 << UDRE))) ; // Wait until tx register is empty 48 UDR = data; 49 50 // if ( usart_tx_buffer_index < USART_TX_BUFFER_SIZE-1){ 51 // usart_tx_buffer[usart_tx_buffer_index] = data; 52 // ++usart_tx_buffer_index; 53 // } else { 54 // usart_tx_buffer_overflow = true; 55 // } 56 56 } 57 57 //----------------------------------------------------------------------------- -
firmware/FSC/src/usart.h
r10109 r10236 29 29 extern U08 usart_tx_buffer_index; 30 30 extern U08 usart_tx_buffer[USART_TX_BUFFER_SIZE]; 31 extern U08 usart_received_chars; 31 32 //----------------------------------------------------------------------------- 32 33 -
firmware/FSC/src/w5100_spi_interface.c
r10094 r10236 11 11 void w5100_write( U16 addr, U08 data) 12 12 { 13 14 13 spi_write_buffer[0]=0xF0; 15 spi_write_buffer[1]=(U08)(addr );16 spi_write_buffer[2]=(U08)(addr >>8);14 spi_write_buffer[1]=(U08)(addr>>8); 15 spi_write_buffer[2]=(U08)(addr); 17 16 spi_write_buffer[3]=data; 18 17 … … 23 22 U08 w5100_read( U16 addr) 24 23 { 25 26 24 spi_write_buffer[0]=0x0F; 27 spi_write_buffer[1]=(U08)(addr );28 spi_write_buffer[2]=(U08)(addr >>8);25 spi_write_buffer[1]=(U08)(addr>>8); 26 spi_write_buffer[2]=(U08)(addr); 29 27 spi_write_buffer[3]=0x00; 30 28 … … 303 301 return NumBytes; 304 302 } 305 306 307 308 -
firmware/FSC/src/w5100_spi_interface.h
r10094 r10236 143 143 // NETWORK SETTING: 144 144 // set GAR to FSC_GATEWAY_ADDRESS 145 #define FSC_GATEWAY_ADDRESS0 0xC0 // 192. 168.0.1146 #define FSC_GATEWAY_ADDRESS1 0x A8147 #define FSC_GATEWAY_ADDRESS2 0x 00145 #define FSC_GATEWAY_ADDRESS0 0xC0 // 192.33.96.1 146 #define FSC_GATEWAY_ADDRESS1 0x21 147 #define FSC_GATEWAY_ADDRESS2 0x60 148 148 #define FSC_GATEWAY_ADDRESS3 0x01 149 149 // set SHAR to FSC_MAC_ADDRESS 150 #define FSC_MAC_ADDRESS0 0x 1F //looks like: 1F.SC.1F.SC.1F.SC151 #define FSC_MAC_ADDRESS1 0x 5C152 #define FSC_MAC_ADDRESS2 0x 1F153 #define FSC_MAC_ADDRESS3 0x 5C154 #define FSC_MAC_ADDRESS4 0x 1F155 #define FSC_MAC_ADDRESS5 0x 5C150 #define FSC_MAC_ADDRESS0 0xFA //FA:C7:0F:AD:22:01 151 #define FSC_MAC_ADDRESS1 0xC7 152 #define FSC_MAC_ADDRESS2 0x0F 153 #define FSC_MAC_ADDRESS3 0xAD 154 #define FSC_MAC_ADDRESS4 0x22 155 #define FSC_MAC_ADDRESS5 0x01 156 156 // set SUBR to FSC_SUBNET_MASK 157 #define FSC_SUBNET_MASK0 0xFF //255.255.2 55.0157 #define FSC_SUBNET_MASK0 0xFF //255.255.248.0 158 158 #define FSC_SUBNET_MASK1 0xFF 159 #define FSC_SUBNET_MASK2 0xF F159 #define FSC_SUBNET_MASK2 0xF8 160 160 #define FSC_SUBNET_MASK3 0x00 161 161 // set SIPR to FSC_IP_ADDRESS 162 #define FSC_IP_ADDRESS0 0xC0 // 192. 168.0.17163 #define FSC_IP_ADDRESS1 0x A8164 #define FSC_IP_ADDRESS2 0x 00165 #define FSC_IP_ADDRESS3 0x 11162 #define FSC_IP_ADDRESS0 0xC0 // 192.33.99.247 163 #define FSC_IP_ADDRESS1 0x21 164 #define FSC_IP_ADDRESS2 0x63 165 #define FSC_IP_ADDRESS3 0xF7 166 166 //------------------------------------------------------------------------------ 167 167 // MEM SETTINGS:
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