- Timestamp:
- 03/23/11 08:15:11 (14 years ago)
- File:
-
- 1 edited
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firmware/FTM/Clock_cond_interface/Clock_cond_interface.vhd
r10231 r10250 19 19 -- 20 20 -- modifications: February 21 2011 by Patrick Vogler 21 -- March 23 2011 by Patrick Vogler 21 22 ---------------------------------------------------------------------------------- 22 23 … … 154 155 le_uwire => LE_Clk_Cond, 155 156 clk_cond_array => clk_cond_array_sig, 157 config_start => start_config, 156 158 157 config_start => start_config, 158 -- config_start => start_config_sig, 159 -- config_start <= start_config_sig, 159 -- config_start => start_config_sig, 160 -- config_start <= start_config_sig, 160 161 161 162 config_ready => config_ready_sig, … … 163 164 ); 164 165 165 166 config_done <= (config_ready_sig AND LD_Clk_Cond); -- indicates that the configuration 166 167 168 config_done <= config_ready_sig; -- indicates that the configuration 169 -- has been loaded 170 171 172 173 -- config_done <= (config_ready_sig AND LD_Clk_Cond); -- indicates that the configuration 167 174 -- has been loaded and 168 175 -- the PLL is locked again 176 177 169 178 170 179 TIM_Sel <= timemarker_select;
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