Changeset 10743


Ignore:
Timestamp:
May 18, 2011, 6:46:48 PM (8 years ago)
Author:
neise
Message:
 
File:
1 edited

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  • firmware/FAD/doc/memory_manager.tex

    r10181 r10743  
    226226\hline
    2272270x8000  & 0xFB01        & Start Flag - fix value: "FB01" \\
    228 0x8001  & 0xllll        & package length in 16bit words \\
    229 0x8002  & 0xvvvv        & version - deduced from SVN revision number \\
    230 0x8003  & 0xsssP        & 12 bits for status - TBD - 4 bit showing PLLLCK status \\ 
    231 \hdashline
    232 0x8004  & 0x00T6        & FTM trigger ID byte 6 : CRC \\
     2280x8001  & 0xllll        & package length in 16bit words  - unsigned short - network byte order\\
     2290x8002  & 0xvvvv        & version - high byte:version - low byte: subversion - network byte order \\
     2300x8003  & 0xsssP        & 12 bits for status - TBD - 4 bit showing PLLLCK status unsigned short - network byte order - see \ref{subsec_explain_regs} \\ 
     231\hdashline
     2320x8004  & 0x00T6        & FTM trigger ID byte 6 : CRC ----------see FTM specifications ... this is just a copy\\
    2332330x8005  & 0xT5T4        & ... bytes 5 and 4 : Type 2 and Type 1\\
    2342340x8006  & 0xT3T2        & ... bytes 3 and 2     : TRG number high word \\
     
    2422420x800C  & 0x0(cid)8(bid) & Board ID \\
    2432430x800D  & DCM-PS        & status of ADC clock phase shifter , value and locked-bit\\
    244 0x800E  & TRG-GEN-No& Number of Triggers to generare, when 'trigger continous' issued \\
     2440x800E  & TRG-GEN-No& Number of Triggers to generare, when 'trigger continous' issued -- not implemented\\
    2452450x800F  & TRG-GEN-DIV& continous trigger generator clock prescaler \\
    246246\hdashline
     
    2502500x8013  & DNA10         & LSB of DNA \\
    251251\hdashline
    252 0x8014  & timer32       & timer high word \\
     2520x8014  & timer32       & timer high word -- in units of ??? \\
    2532530x8015  & timer10       & timer low word \\
    2542540x8016  & more status1 & reserved for status info; high word \\
     
    280280All data may be treated as 64bit aligned. And the data readout process does not need jump over words during data sending.
    281281
     282\newpage
     283\subsection{meaning of registers ... shit title}
     284\label{subsec_explain_regs}
    282285
    283286\newpage
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