- Timestamp:
- 07/27/11 16:18:04 (13 years ago)
- Location:
- firmware/FTM
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
firmware/FTM/FTM_central_control.vhd
r11485 r11654 65 65 config_started_cc : in std_logic; 66 66 config_ready_cc : in std_logic; 67 cc_locked : in std_logic; 67 68 config_start_lp : out std_logic := '0'; 68 69 config_started_lp : in std_logic; … … 277 278 278 279 when CP_IDLE => 279 current_cc_state <= FTM_STATE_IDLE; 280 if (cc_locked = '1') then 281 current_cc_state <= FTM_STATE_IDLE; 282 else 283 current_cc_state <= FTM_STATE_IDLE_NOT_LOCKED; 284 end if; 280 285 reset_timer <= '0'; 281 286 cc_state_test <= X"0D"; … … 319 324 when CP_RUNNING => 320 325 reset_timer <= '0'; 321 current_cc_state <= FTM_STATE_RUN; 326 if (cc_locked = '1') then 327 current_cc_state <= FTM_STATE_RUN; 328 else 329 current_cc_state <= FTM_STATE_RUN_NOT_LOCKED; 330 end if; 322 331 cc_state_test <= X"0E"; 323 332 if (start_run = '0') then … … 328 337 329 338 when CP_RUNNING_01 => 330 current_cc_state <= FTM_STATE_RUN; 339 if (cc_locked = '1') then 340 current_cc_state <= FTM_STATE_RUN; 341 else 342 current_cc_state <= FTM_STATE_RUN_NOT_LOCKED; 343 end if; 331 344 cc_state_test <= X"0F"; 332 345 start_run_ack <= '1'; … … 367 380 368 381 when CP_RUNNING_02 => 369 current_cc_state <= FTM_STATE_RUN; 382 if (cc_locked = '1') then 383 current_cc_state <= FTM_STATE_RUN; 384 else 385 current_cc_state <= FTM_STATE_RUN_NOT_LOCKED; 386 end if; 370 387 cc_state_test <= X"10"; 371 388 if (stop_run = '0') then -
firmware/FTM/FTM_top.vhd
r11485 r11654 350 350 signal config_started_cc_sig : std_logic := '0'; 351 351 signal config_ready_cc_sig : std_logic := '0'; 352 signal cc_locked_sig : std_logic := '0'; 352 353 353 354 signal config_start_lp_sig : std_logic; -- initialized in central control … … 517 518 component Clock_cond_interface is 518 519 port( 519 clk : IN STD_LOGIC; 520 CLK_Clk_Cond : out STD_LOGIC; 521 LE_Clk_Cond : out STD_LOGIC; 522 DATA_Clk_Cond : out STD_LOGIC; 523 SYNC_Clk_Cond : out STD_LOGIC; 524 LD_Clk_Cond : in STD_LOGIC; 525 TIM_Sel : out STD_LOGIC; 526 cc_R0 : in std_logic_vector (31 downto 0) := (others => '0'); 527 cc_R1 : in std_logic_vector (31 downto 0) := (others => '0'); 528 cc_R8 : in std_logic_vector (31 downto 0) := (others => '0'); 529 cc_R9 : in std_logic_vector (31 downto 0) := (others => '0'); 530 cc_R11 : in std_logic_vector (31 downto 0) := (others => '0'); 531 cc_R13 : in std_logic_vector (31 downto 0) := (others => '0'); 532 cc_R14 : in std_logic_vector (31 downto 0) := (others => '0'); 533 cc_R15 : in std_logic_vector (31 downto 0) := (others => '0'); 534 start_config : in STD_LOGIC; 535 config_started : out STD_LOGIC; 536 config_done : out STD_LOGIC; 537 timemarker_select: in STD_LOGIC 520 clk : IN STD_LOGIC; 521 CLK_Clk_Cond : out STD_LOGIC; 522 LE_Clk_Cond : out STD_LOGIC; 523 DATA_Clk_Cond : out STD_LOGIC; 524 SYNC_Clk_Cond : out STD_LOGIC; 525 LD_Clk_Cond : in STD_LOGIC; 526 TIM_Sel : out STD_LOGIC; 527 cc_R0 : in std_logic_vector (31 downto 0) := (others => '0'); 528 cc_R1 : in std_logic_vector (31 downto 0) := (others => '0'); 529 cc_R8 : in std_logic_vector (31 downto 0) := (others => '0'); 530 cc_R9 : in std_logic_vector (31 downto 0) := (others => '0'); 531 cc_R11 : in std_logic_vector (31 downto 0) := (others => '0'); 532 cc_R13 : in std_logic_vector (31 downto 0) := (others => '0'); 533 cc_R14 : in std_logic_vector (31 downto 0) := (others => '0'); 534 cc_R15 : in std_logic_vector (31 downto 0) := (others => '0'); 535 start_config : in STD_LOGIC; 536 config_started : out STD_LOGIC; 537 config_done : out STD_LOGIC; 538 locked : out STD_LOGIC; 539 timemarker_select : in STD_LOGIC 538 540 ); 539 541 end component; … … 572 574 config_started_cc : in std_logic; 573 575 config_ready_cc : in std_logic; 576 cc_locked : in std_logic; 574 577 config_start_lp : out std_logic := '0'; 575 578 config_started_lp : in std_logic; … … 973 976 Inst_Clock_cond_interface : Clock_cond_interface 974 977 port map( 975 clk => clk_50M_sig,976 CLK_Clk_Cond => CLK_Clk_Cond,977 LE_Clk_Cond => LE_Clk_Cond,978 DATA_Clk_Cond => DATA_Clk_Cond,979 SYNC_Clk_Cond => SYNC_Clk_Cond,980 LD_Clk_Cond => LD_Clk_Cond,981 TIM_Sel => TIM_Sel,982 cc_R0 => cc_R0_sig,983 cc_R1 => cc_R1_sig,984 cc_R8 => cc_R8_sig,985 cc_R9 => cc_R9_sig,986 cc_R11 => cc_R11_sig,987 cc_R13 => cc_R13_sig,988 cc_R14 => cc_R14_sig,989 cc_R15 => cc_R15_sig,978 clk => clk_50M_sig, 979 CLK_Clk_Cond => CLK_Clk_Cond, 980 LE_Clk_Cond => LE_Clk_Cond, 981 DATA_Clk_Cond => DATA_Clk_Cond, 982 SYNC_Clk_Cond => SYNC_Clk_Cond, 983 LD_Clk_Cond => LD_Clk_Cond, 984 TIM_Sel => TIM_Sel, 985 cc_R0 => cc_R0_sig, 986 cc_R1 => cc_R1_sig, 987 cc_R8 => cc_R8_sig, 988 cc_R9 => cc_R9_sig, 989 cc_R11 => cc_R11_sig, 990 cc_R13 => cc_R13_sig, 991 cc_R14 => cc_R14_sig, 992 cc_R15 => cc_R15_sig, 990 993 start_config => config_start_cc_sig, 991 994 config_started => config_started_cc_sig, 992 995 config_done => config_ready_cc_sig, 996 locked => cc_locked_sig, 993 997 timemarker_select => general_settings_sig(0) 994 998 ); … … 1027 1031 config_started_cc => config_started_cc_sig, 1028 1032 config_ready_cc => config_ready_cc_sig, 1033 cc_locked => cc_locked_sig, 1029 1034 config_start_lp => config_start_lp_sig, 1030 1035 config_started_lp => config_started_lp_sig, -
firmware/FTM/ftm_definitions.vhd
r11652 r11654 64 64 -- changeover to firmware v3 65 65 -- 66 --67 68 66 -- pv 25.07.: new constants for lightpulser firmware 69 67 -- new clock conditioner interface: data only sent during configuration, … … 71 69 -- changeover to firmware v4 72 70 -- 73 -- 71 -- qw 27.07.: two new status states introduced to indicate the lock state of the 72 -- clock conditioner -> changeover to firmware v5 74 73 ---------------------------------------------------------------------------------- 75 74 … … 135 134 --FTM address and firmware ID 136 135 constant FTM_ADDRESS : std_logic_vector(7 downto 0) := "11000000"; -- 192 137 constant FIRMWARE_ID : std_logic_vector(7 downto 0) := "0000010 0"; -- firmware version136 constant FIRMWARE_ID : std_logic_vector(7 downto 0) := "00000101"; -- firmware version 138 137 139 138 --communication with FTUs … … 282 281 constant FTM_STATE_RUN : std_logic_vector := X"0003"; 283 282 --constant FTM_STATE_CALIB : std_logic_vector := X"0004"; 283 constant FTM_STATE_IDLE_NOT_LOCKED : std_logic_vector := X"2711"; 284 constant FTM_STATE_RUN_NOT_LOCKED : std_logic_vector := X"2713"; 284 285 285 286 -- header length of data packages
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