Changeset 234 for FPGA/FTU/FTU_top.vhd
- Timestamp:
- 07/01/10 10:31:43 (14 years ago)
- File:
-
- 1 edited
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FPGA/FTU/FTU_top.vhd
r207 r234 33 33 -- global control 34 34 ext_clk : IN STD_LOGIC; -- external clock from FTU board 35 brd_add : IN STD_LOGIC_VECTOR(5 downto 0); -- global board address 36 35 brd_add : IN STD_LOGIC_VECTOR(5 downto 0); -- geographic board/slot address 36 brd_id : in STD_LOGIC_VECTOR(7 downto 0); -- local solder-programmable board ID 37 37 38 -- rate counters LVDS inputs 38 39 -- use IBUFDS differential input buffer
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