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struct.bd.bak

Timestamp:

07/22/10 10:33:08 (14 years ago)

Author:

dneise

Message:

possible to switch off SPI SCLK now.
see new revision of simple_daq in tools/FAD/

File:

: 1 edited

FPGA/FAD/stable/FACT_FAD/FACT_FAD_lib/hds/@f@a@d_main/struct.bd.bak (modified) (399 diffs)

Legend:

: Unmodified
: Added
: Removed

FPGA/FAD/stable/FACT_FAD/FACT_FAD_lib/hds/@f@a@d_main/struct.bd.bak

-              r252
+              r260
 uid 8277,0
+)
+(Instance
+name "U_0"
+duLibraryName "moduleware"
+duName "mux"
+elements [
+]
+mwi 1
+uid 8562,0
+)
+]
 libraryRefs [
 …
 (vvPair
 variable "time"
 value "11:42:03"
+value "14:21:30"
+)
 (vvPair
 …
 font "Courier New,8,0"
+)
+xt "-85000,84200,-41500,85000"
+st "SIGNAL write_ea               : std_logic_vector(0 downto 0)                 := \"0\""
+xt "-85000,86600,-41500,87400"
+st "SIGNAL write_ea               : std_logic_vector(0 downto 0)                 := \"0\"
+"
+)
+)
 …
+)
 xt "-85000,47400,-45000,48200"
+st "SIGNAL addr_out               : std_logic_vector(RAMADDRWIDTH64b-1 DOWNTO 0)"
+st "SIGNAL addr_out               : std_logic_vector(RAMADDRWIDTH64b-1 DOWNTO 0)
+"
+)
+)
 …
+)
 xt "-85000,61800,-52500,62600"
+st "SIGNAL data_out               : std_logic_vector(63 DOWNTO 0)"
+st "SIGNAL data_out               : std_logic_vector(63 DOWNTO 0)
+"
+)
+)
 …
 font "Courier New,8,0"
+)
+xt "-85000,69000,-45000,69800"
+st "SIGNAL ram_addr               : std_logic_vector(RAMADDRWIDTH64b+1 DOWNTO 0)"
+xt "-85000,71400,-45000,72200"
+st "SIGNAL ram_addr               : std_logic_vector(RAMADDRWIDTH64b+1 DOWNTO 0)
+"
+)
+)
 …
 font "Courier New,8,0"
+)
+xt "-85000,69800,-52500,70600"
+st "SIGNAL ram_data               : std_logic_vector(15 downto 0)"
+xt "-85000,72200,-52500,73000"
+st "SIGNAL ram_data               : std_logic_vector(15 downto 0)
+"
+)
+)
 …
+)
 xt "-85000,39800,-45000,40600"
+st "wiz_reset              : std_logic                                    := '1'"
+st "wiz_reset              : std_logic                                    := '1'
+"
+)
+)
 …
+)
 xt "-85000,37400,-56500,38200"
+st "wiz_addr               : std_logic_vector(9 DOWNTO 0)"
+st "wiz_addr               : std_logic_vector(9 DOWNTO 0)
+"
+)
+)
 …
+)
 xt "-85000,42200,-56000,43000"
+st "wiz_data               : std_logic_vector(15 DOWNTO 0)"
+st "wiz_data               : std_logic_vector(15 DOWNTO 0)
+"
+)
+)
 …
+)
 xt "-85000,38200,-45000,39000"
+st "wiz_cs                 : std_logic                                    := '1'"
+st "wiz_cs                 : std_logic                                    := '1'
+"
+)
+)
 …
+)
 xt "-85000,40600,-45000,41400"
+st "wiz_wr                 : std_logic                                    := '1'"
+st "wiz_wr                 : std_logic                                    := '1'
+"
+)
+)
 …
+)
 xt "-85000,39000,-45000,39800"
+st "wiz_rd                 : std_logic                                    := '1'"
+st "wiz_rd                 : std_logic                                    := '1'
+"
+)
+)
 …
+)
 xt "-85000,26200,-66500,27000"
+st "wiz_int                : std_logic"
+st "wiz_int                : std_logic
+"
+)
+)
 …
+)
 xt "-85000,23800,-56500,24600"
+st "board_id               : std_logic_vector(3 downto 0)"
+st "board_id               : std_logic_vector(3 downto 0)
+"
+)
+)
 …
+)
 xt "-85000,25400,-66500,26200"
+st "trigger                : std_logic"
+st "trigger                : std_logic
+"
+)
+)
 …
+)
 xt "-85000,24600,-56500,25400"
+st "crate_id               : std_logic_vector(1 downto 0)"
+st "crate_id               : std_logic_vector(1 downto 0)
+"
+)
+)
 …
 font "Courier New,8,0"
+)
+xt "-85000,77000,-52500,77800"
+st "SIGNAL trigger_id             : std_logic_vector(47 downto 0)"
+xt "-85000,79400,-52500,80200"
+st "SIGNAL trigger_id             : std_logic_vector(47 downto 0)
+"
+)
+)
 …
 font "Courier New,8,0"
+)
+xt "-85000,70600,-45000,71400"
+st "SIGNAL ram_start_addr         : std_logic_vector(RAMADDRWIDTH64b-1 DOWNTO 0)"
+xt "-85000,73000,-45000,73800"
+st "SIGNAL ram_start_addr         : std_logic_vector(RAMADDRWIDTH64b-1 DOWNTO 0)
+"
+)
+)
 …
 font "Courier New,8,0"
+)
+xt "-85000,78600,-62500,79400"
+st "SIGNAL wiz_busy               : std_logic"
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+st "SIGNAL wiz_busy               : std_logic
+"
+)
+)
 …
 font "Courier New,8,0"
+)
+xt "-85000,81000,-41500,81800"
+st "SIGNAL wiz_write_ea           : std_logic                                    := '0'"
+xt "-85000,83400,-41500,84200"
+st "SIGNAL wiz_write_ea           : std_logic                                    := '0'
+"
+)
+)
 …
 font "Courier New,8,0"
+)
+xt "-85000,83400,-35500,84200"
+st "SIGNAL wiz_write_length       : std_logic_vector(16 downto 0)                := (others => '0')"
+xt "-85000,85800,-35500,86600"
+st "SIGNAL wiz_write_length       : std_logic_vector(16 downto 0)                := (others => '0')
+"
+)
+)
 …
 font "Courier New,8,0"
+)
+xt "-85000,80200,-35500,81000"
+st "SIGNAL wiz_ram_start_addr     : std_logic_vector(RAMADDRWIDTH64b+1 DOWNTO 0) := (others => '0')"
+xt "-85000,82600,-35500,83400"
+st "SIGNAL wiz_ram_start_addr     : std_logic_vector(RAMADDRWIDTH64b+1 DOWNTO 0) := (others => '0')
+"
+)
+)
 …
 font "Courier New,8,0"
+)
+xt "-85000,79400,-35500,80200"
+st "SIGNAL wiz_number_of_channels : std_logic_vector(3 downto 0)                 := (others => '0')"
+xt "-85000,81800,-35500,82600"
+st "SIGNAL wiz_number_of_channels : std_logic_vector(3 downto 0)                 := (others => '0')
+"
+)
+)
 …
 font "Courier New,8,0"
+)
+xt "-85000,81800,-41500,82600"
+st "SIGNAL wiz_write_end          : std_logic                                    := '0'"
+xt "-85000,84200,-41500,85000"
+st "SIGNAL wiz_write_end          : std_logic                                    := '0'
+"
+)
+)
 …
 font "Courier New,8,0"
+)
+xt "-85000,82600,-41500,83400"
+st "SIGNAL wiz_write_header       : std_logic                                    := '0'"
+xt "-85000,85000,-41500,85800"
+st "SIGNAL wiz_write_header       : std_logic                                    := '0'
+"
+)
+)
 …
 font "Courier New,8,0"
+)
+xt "-85000,71400,-62500,72200"
+st "SIGNAL ram_write_ea           : std_logic"
+xt "-85000,73800,-62500,74600"
+st "SIGNAL ram_write_ea           : std_logic
+"
+)
+)
 …
 font "Courier New,8,0"
+)
+xt "-85000,72200,-41500,73000"
+st "SIGNAL ram_write_ready        : std_logic                                    := '0'"
+xt "-85000,74600,-41500,75400"
+st "SIGNAL ram_write_ready        : std_logic                                    := '0'
+"
+)
+)
 …
+)
 xt "-85000,54600,-41500,55400"
+st "SIGNAL config_start           : std_logic                                    := '0'"
+st "SIGNAL config_start           : std_logic                                    := '0'
+"
+)
+)
 …
+)
 xt "-85000,52200,-62500,53000"
+st "SIGNAL config_ready           : std_logic"
+st "SIGNAL config_ready           : std_logic
+"
+)
+)
 …
 font "Courier New,8,0"
+)
+xt "-85000,73800,-61000,74600"
+st "SIGNAL roi_max                : roi_max_type"
+xt "-85000,76200,-61000,77000"
+st "SIGNAL roi_max                : roi_max_type
+"
+)
+)
 …
 font "Courier New,8,0"
+)
+xt "-85000,68200,-52500,69000"
+st "SIGNAL package_length         : std_logic_vector(15 downto 0)"
+xt "-85000,70600,-52500,71400"
+st "SIGNAL package_length         : std_logic_vector(15 downto 0)
+"
+)
+)
 …
+)
 xt "-85000,30200,-45000,31000"
+st "adc_oeb                : std_logic                                    := '1'"
+st "adc_oeb                : std_logic                                    := '1'
+"
+)
+)
 …
 font "Courier New,8,0"
+)
+xt "-85000,73000,-60000,73800"
+st "SIGNAL roi_array              : roi_array_type"
+xt "-85000,75400,-60000,76200"
+st "SIGNAL roi_array              : roi_array_type
+"
+)
+)
 …
+)
 xt "-85000,27000,-66500,27800"
+st "CLK_25_PS              : std_logic"
+st "CLK_25_PS              : std_logic
+"
+)
+)
 …
+)
 xt "-85000,27800,-66500,28600"
+st "CLK_50                 : std_logic"
+st "CLK_50                 : std_logic
+"
+)
+)
 …
+)
 xt "-85000,45000,-62500,45800"
+st "SIGNAL CLK_25                 : std_logic"
+st "SIGNAL CLK_25                 : std_logic
+"
+)
+)
 …
+)
 xt "-85000,18200,-66500,19000"
+st "CLK                    : std_logic"
+st "CLK                    : std_logic
+"
+)
+)
 …
+)
 xt "-85000,23000,-56500,23800"
+st "adc_otr_array          : std_logic_vector(3 DOWNTO 0)"
+st "adc_otr_array          : std_logic_vector(3 DOWNTO 0)
+"
+)
+)
 …
+)
 xt "-85000,22200,-61000,23000"
+st "adc_data_array         : adc_data_array_type"
+st "adc_data_array         : adc_data_array_type
+"
+)
+)
 …
 font "Courier New,8,0"
+)
+xt "-85000,62600,-41500,63400"
+st "SIGNAL drs_clk_en             : std_logic                                    := '0'"
+xt "-85000,65000,-41500,65800"
+st "SIGNAL drs_clk_en             : std_logic                                    := '0'
+"
+)
+)
 …
 font "Courier New,8,0"
+)
+xt "-85000,65000,-56500,65800"
+st "SIGNAL drs_s_cell_array       : drs_s_cell_array_type"
+xt "-85000,67400,-56500,68200"
+st "SIGNAL drs_s_cell_array       : drs_s_cell_array_type
+"
+)
+)
 …
 font "Courier New,8,0"
+)
+xt "-85000,63400,-41500,64200"
+st "SIGNAL drs_read_s_cell        : std_logic                                    := '0'"
+xt "-85000,65800,-41500,66600"
+st "SIGNAL drs_read_s_cell        : std_logic                                    := '0'
+"
+)
+)
 …
+)
 xt "-85000,32600,-39000,33400"
+st "drs_channel_id         : std_logic_vector(3 downto 0)                 := (others => '0')"
+st "drs_channel_id         : std_logic_vector(3 downto 0)                 := (others => '0')
+"
+)
+)
 …
+)
 xt "-85000,33400,-45000,34200"
+st "drs_dwrite             : std_logic                                    := '1'"
+st "drs_dwrite             : std_logic                                    := '1'
+"
+)
+)
 …
 sl 0
 ro 90
 xt "-28000,56625,-26500,57375"
+xt "-39000,99625,-37500,100375"
+)
 (Line
 …
 sl 0
 ro 90
 xt "-26500,57000,-26000,57000"
+xt "-37500,100000,-37000,100000"
 pts [
 "-26000,57000"
 "-26500,57000"
+"-37000,100000"
+"-37500,100000"
+]
+)
 …
 va (VaSet
+)
 xt "-34900,56500,-29000,57500"
+xt "-45900,99500,-40000,100500"
 st "drs_channel_id"
 ju 2
 blo "-29000,57300"
+blo "-40000,100300"
 tm "WireNameMgr"
+)
 …
+)
 xt "-85000,19000,-66500,19800"
+st "SROUT_in_0             : std_logic"
+st "SROUT_in_0             : std_logic
+"
+)
+)
 …
+)
 xt "-85000,19800,-66500,20600"
+st "SROUT_in_1             : std_logic"
+st "SROUT_in_1             : std_logic
+"
+)
+)
 …
+)
 xt "-85000,20600,-66500,21400"
+st "SROUT_in_2             : std_logic"
+st "SROUT_in_2             : std_logic
+"
+)
+)
 …
+)
 xt "-85000,21400,-66500,22200"
+st "SROUT_in_3             : std_logic"
+st "SROUT_in_3             : std_logic
+"
+)
+)
 …
 font "Courier New,8,0"
+)
+xt "-85000,64200,-62500,65000"
+st "SIGNAL drs_read_s_cell_ready  : std_logic"
+xt "-85000,66600,-62500,67400"
+st "SIGNAL drs_read_s_cell_ready  : std_logic
+"
+)
+)
 …
+)
 xt "-85000,28600,-45000,29400"
+st "RSRLOAD                : std_logic                                    := '0'"
+st "RSRLOAD                : std_logic                                    := '0'
+"
+)
+)
 …
+)
 xt "-85000,29400,-45000,30200"
+st "SRCLK                  : std_logic                                    := '0'"
+st "SRCLK                  : std_logic                                    := '0'
+"
+)
+)
 …
 t "std_logic_vector"
 b "(15 DOWNTO 0)"
 o 12
+o 14
 suid 5,0
+)
 …
 n "roi_array"
 t "roi_array_type"
 o 11
+o 13
 suid 6,0
+)
 …
+)
+)
+*227 (CptPort
+uid 8500,0
+ps "OnEdgeStrategy"
+shape (Triangle
+uid 8501,0
+ro 90
+va (VaSet
+vasetType 1
+fg "0,65535,0"
+)
+xt "92000,109625,92750,110375"
+)
+tg (CPTG
+uid 8502,0
+ps "CptPortTextPlaceStrategy"
+stg "RightVerticalLayoutStrategy"
+f (Text
+uid 8503,0
+va (VaSet
+)
+xt "83800,109500,91000,110500"
+st "drs_address : (3:0)"
+ju 2
+blo "91000,110300"
+)
+)
+thePort (LogicalPort
+m 1
+decl (Decl
+n "drs_address"
+t "std_logic_vector"
+b "(3 DOWNTO 0)"
+o 11
+suid 13,0
+)
+)
+)
+*228 (CptPort
+uid 8504,0
+ps "OnEdgeStrategy"
+shape (Triangle
+uid 8505,0
+ro 90
+va (VaSet
+vasetType 1
+fg "0,65535,0"
+)
+xt "92000,110625,92750,111375"
+)
+tg (CPTG
+uid 8506,0
+ps "CptPortTextPlaceStrategy"
+stg "RightVerticalLayoutStrategy"
+f (Text
+uid 8507,0
+va (VaSet
+)
+xt "83800,110500,91000,111500"
+st "drs_address_mode"
+ju 2
+blo "91000,111300"
+)
+)
+thePort (LogicalPort
+m 1
+decl (Decl
+n "drs_address_mode"
+t "std_logic"
+o 12
+suid 14,0
+)
+)
+)
+]
 shape (Rectangle
 …
 stg "VerticalLayoutStrategy"
 textVec [
 *227 (Text
+*229 (Text
 uid 5075,0
 va (VaSet
 …
 tm "BdLibraryNameMgr"
+)
 *228 (Text
+*230 (Text
 uid 5076,0
 va (VaSet
 …
 tm "CptNameMgr"
+)
 *229 (Text
+*231 (Text
 uid 5077,0
 va (VaSet
 …
 archFileType "UNKNOWN"
+)
 *230 (Net
+*232 (Net
 uid 5088,0
 decl (Decl
 …
+)
 xt "-85000,48200,-53000,49000"
+st "SIGNAL config_addr            : std_logic_vector(7 DOWNTO 0)"
+)
+)
+*231 (Net
+st "SIGNAL config_addr            : std_logic_vector(7 DOWNTO 0)
+"
+)
+)
+*233 (Net
 uid 5096,0
 decl (Decl
 …
+)
 xt "-85000,50600,-62500,51400"
+st "SIGNAL config_data_valid      : std_logic"
+)
+)
+*232 (Net
+st "SIGNAL config_data_valid      : std_logic
+"
+)
+)
+*234 (Net
 uid 5104,0
 decl (Decl
 …
+)
 xt "-85000,49000,-62500,49800"
+st "SIGNAL config_busy            : std_logic"
+)
+)
+*233 (Net
+st "SIGNAL config_busy            : std_logic
+"
+)
+)
+*235 (Net
 uid 5112,0
 decl (Decl
 …
+)
 xt "-85000,49800,-52500,50600"
+st "SIGNAL config_data            : std_logic_vector(15 DOWNTO 0)"
+)
+)
+*234 (Net
+st "SIGNAL config_data            : std_logic_vector(15 DOWNTO 0)
+"
+)
+)
+*236 (Net
 uid 5120,0
 decl (Decl
 …
+)
 xt "-85000,60200,-62500,61000"
+st "SIGNAL config_wr_en           : std_logic"
+)
+)
+*235 (Net
+st "SIGNAL config_wr_en           : std_logic
+"
+)
+)
+*237 (Net
 uid 5128,0
 decl (Decl
 …
+)
 xt "-85000,51400,-62500,52200"
+st "SIGNAL config_rd_en           : std_logic"
+)
+)
+*236 (Net
+st "SIGNAL config_rd_en           : std_logic
+"
+)
+)
+*238 (Net
 uid 5144,0
 decl (Decl
 …
+)
 xt "-85000,61000,-60000,61800"
+st "SIGNAL dac_array              : dac_array_type"
+)
+)
+*237 (Net
+st "SIGNAL dac_array              : dac_array_type
+"
+)
+)
+*239 (Net
 uid 5194,0
 decl (Decl
 …
+)
 xt "-85000,55400,-62500,56200"
+st "SIGNAL config_start_cm        : std_logic"
+)
+)
+*238 (Net
+st "SIGNAL config_start_cm        : std_logic
+"
+)
+)
+*240 (Net
 uid 5196,0
 decl (Decl
 …
+)
 xt "-85000,53000,-62500,53800"
+st "SIGNAL config_ready_cm        : std_logic"
+)
+)
+*239 (Net
+st "SIGNAL config_ready_cm        : std_logic
+"
+)
+)
+*241 (Net
 uid 5220,0
 decl (Decl
 …
+)
 xt "-85000,34200,-39000,35000"
+st "led                    : std_logic_vector(7 DOWNTO 0)                 := (OTHERS => '0')"
+)
+)
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+st "drs_channel_internal : (3:0)"
+blo "8000,56800"
+tm "WireNameMgr"
+)
+)
+on &346
+)
+*451 (Wire
+uid 8587,0
+shape (OrthoPolyLine
+uid 8588,0
+va (VaSet
+vasetType 3
+lineWidth 2
+)
+xt "-29000,101000,-20000,101000"
+pts [
+"-20000,101000"
+"-29000,101000"
+]
+)
+end &326
+sat 16
+eat 32
+sty 1
+stc 0
+st 0
+sf 1
+si 0
+tg (WTG
+uid 8591,0
+ps "ConnStartEndStrategy"
+stg "STSignalDisplayStrategy"
+f (Text
+uid 8592,0
+va (VaSet
+)
+xt "-29000,100000,-20800,101000"
+st "drs_channel_internal"
+blo "-29000,100800"
+tm "WireNameMgr"
+)
+)
+on &346
+)
+*452 (Wire
+uid 8595,0
+shape (OrthoPolyLine
+uid 8596,0
+va (VaSet
+vasetType 3
+lineWidth 2
+)
+xt "-29000,99000,-20000,99000"
+pts [
+"-20000,99000"
+"-29000,99000"
+]
+)
+end &331
+sat 16
+eat 32
+sty 1
+stc 0
+st 0
+sf 1
+si 0
+tg (WTG
+uid 8599,0
+ps "ConnStartEndStrategy"
+stg "VerticalLayoutStrategy"
+f (Text
+uid 8600,0
+va (VaSet
+)
+xt "-29000,98000,-24000,99000"
+st "drs_address"
+blo "-29000,98800"
+tm "WireNameMgr"
+)
+)
+on &323
+)
+*453 (Wire
+uid 8603,0
+shape (OrthoPolyLine
+uid 8604,0
+va (VaSet
+vasetType 3
+)
+xt "-31000,103000,-20000,107000"
+pts [
+"-20000,107000"
+"-31000,107000"
+"-31000,103000"
+]
+)
+end &333
+sat 16
+eat 32
+stc 0
+st 0
+sf 1
+si 0
+tg (WTG
+uid 8607,0
+ps "ConnStartEndStrategy"
+stg "VerticalLayoutStrategy"
+f (Text
+uid 8608,0
+va (VaSet
+)
+xt "-29000,106000,-21800,107000"
+st "drs_address_mode"
+blo "-29000,106800"
+tm "WireNameMgr"
+)
+)
+on &324
+)
+]
 …
 color "26368,26368,26368"
+)
 packageList *422 (PackageList
+packageList *454 (PackageList
 uid 41,0
 stg "VerticalLayoutStrategy"
 textVec [
 *423 (Text
+*455 (Text
 uid 42,0
 va (VaSet
 …
 blo "-87000,1800"
+)
 *424 (MLText
+*456 (MLText
 uid 43,0
 va (VaSet
 …
 stg "VerticalLayoutStrategy"
 textVec [
 *425 (Text
+*457 (Text
 uid 45,0
 va (VaSet
 …
 blo "20000,800"
+)
 *426 (Text
+*458 (Text
 uid 46,0
 va (VaSet
 …
 blo "20000,1800"
+)
 *427 (MLText
+*459 (MLText
 uid 47,0
 va (VaSet
 …
 tm "BdCompilerDirectivesTextMgr"
+)
 *428 (Text
+*460 (Text
 uid 48,0
 va (VaSet
 …
 blo "20000,4800"
+)
 *429 (MLText
+*461 (MLText
 uid 49,0
 va (VaSet
 …
 tm "BdCompilerDirectivesTextMgr"
+)
 *430 (Text
+*462 (Text
 uid 50,0
 va (VaSet
 …
 blo "20000,5800"
+)
 *431 (MLText
+*463 (MLText
 uid 51,0
 va (VaSet
 …
+)
 windowSize "0,0,1281,1024"
 viewArea "-62364,34906,23843,105999"
 cachedDiagramExtent "-87000,0,162300,301700"
+viewArea "-73966,37109,33461,125703"
+cachedDiagramExtent "-100999,0,162300,301700"
 pageSetupInfo (PageSetupInfo
 ptrCmd "eDocPrintPro,winspool,"
 …
 hasePageBreakOrigin 1
 pageBreakOrigin "-73000,0"
 lastUid 8460,0
+lastUid 8614,0
 defaultCommentText (CommentText
 shape (Rectangle
 …
 stg "VerticalLayoutStrategy"
 textVec [
 *432 (Text
+*464 (Text
 va (VaSet
 font "Arial,8,1"
 …
 tm "BdLibraryNameMgr"
+)
 *433 (Text
+*465 (Text
 va (VaSet
 font "Arial,8,1"
 …
 tm "BlkNameMgr"
+)
 *434 (Text
+*466 (Text
 va (VaSet
 font "Arial,8,1"
 …
 stg "VerticalLayoutStrategy"
 textVec [
 *435 (Text
+*467 (Text
 va (VaSet
 font "Arial,8,1"
 …
 blo "550,4300"
+)
 *436 (Text
+*468 (Text
 va (VaSet
 font "Arial,8,1"
 …
 blo "550,5300"
+)
 *437 (Text
+*469 (Text
 va (VaSet
 font "Arial,8,1"
 …
 stg "VerticalLayoutStrategy"
 textVec [
 *438 (Text
+*470 (Text
 va (VaSet
 font "Arial,8,1"
 …
 tm "BdLibraryNameMgr"
+)
 *439 (Text
+*471 (Text
 va (VaSet
 font "Arial,8,1"
 …
 tm "CptNameMgr"
+)
 *440 (Text
+*472 (Text
 va (VaSet
 font "Arial,8,1"
 …
 stg "VerticalLayoutStrategy"
 textVec [
 *441 (Text
+*473 (Text
 va (VaSet
 font "Arial,8,1"
 …
 blo "500,4300"
+)
 *442 (Text
+*474 (Text
 va (VaSet
 font "Arial,8,1"
 …
 blo "500,5300"
+)
 *443 (Text
+*475 (Text
 va (VaSet
 font "Arial,8,1"
 …
 stg "VerticalLayoutStrategy"
 textVec [
 *444 (Text
+*476 (Text
 va (VaSet
 font "Arial,8,1"
 …
 blo "50,4300"
+)
 *445 (Text
+*477 (Text
 va (VaSet
 font "Arial,8,1"
 …
 blo "50,5300"
+)
 *446 (Text
+*478 (Text
 va (VaSet
 font "Arial,8,1"
 …
 stg "VerticalLayoutStrategy"
 textVec [
 *447 (Text
+*479 (Text
 va (VaSet
 font "Arial,8,1"
 …
 tm "HdlTextNameMgr"
+)
 *448 (Text
+*480 (Text
 va (VaSet
 font "Arial,8,1"
 …
 stg "VerticalLayoutStrategy"
 textVec [
 *449 (Text
+*481 (Text
 va (VaSet
 font "Arial,8,1"
 …
 blo "14100,20800"
+)
 *450 (MLText
+*482 (MLText
 va (VaSet
+)
 …
 stg "VerticalLayoutStrategy"
 textVec [
 *451 (Text
+*483 (Text
 va (VaSet
 font "Arial,8,1"
 …
 blo "14100,20800"
+)
 *452 (MLText
+*484 (MLText
 va (VaSet
+)
 …
 font "Arial,8,1"
+)
 xt "-87000,85000,-82300,86000"
+xt "-87000,87400,-82300,88400"
 st "Post User:"
 blo "-87000,85800"
+blo "-87000,88200"
+)
 postUserText (MLText
 …
 commonDM (CommonDM
 ldm (LogicalDM
 suid 183,0
+suid 190,0
 usingSuid 1
 emptyRow *453 (LEmptyRow
+emptyRow *485 (LEmptyRow
+)
 uid 54,0
 optionalChildren [
 *454 (RefLabelRowHdr
+)
 *455 (TitleRowHdr
+)
 *456 (FilterRowHdr
+)
 *457 (RefLabelColHdr
+*486 (RefLabelRowHdr
+)
+*487 (TitleRowHdr
+)
+*488 (FilterRowHdr
+)
+*489 (RefLabelColHdr
 tm "RefLabelColHdrMgr"
+)
 *458 (RowExpandColHdr
+*490 (RowExpandColHdr
 tm "RowExpandColHdrMgr"
+)
 *459 (GroupColHdr
+*491 (GroupColHdr
 tm "GroupColHdrMgr"
+)
 *460 (NameColHdr
+*492 (NameColHdr
 tm "BlockDiagramNameColHdrMgr"
+)
 *461 (ModeColHdr
+*493 (ModeColHdr
 tm "BlockDiagramModeColHdrMgr"
+)
 *462 (TypeColHdr
+*494 (TypeColHdr
 tm "BlockDiagramTypeColHdrMgr"
+)
 *463 (BoundsColHdr
+*495 (BoundsColHdr
 tm "BlockDiagramBoundsColHdrMgr"
+)
 *464 (InitColHdr
+*496 (InitColHdr
 tm "BlockDiagramInitColHdrMgr"
+)
 *465 (EolColHdr
+*497 (EolColHdr
 tm "BlockDiagramEolColHdrMgr"
+)
 *466 (LeafLogPort
+*498 (LeafLogPort
 port (LogicalPort
 m 4
 …
 uid 516,0
+)
 *467 (LeafLogPort
+*499 (LeafLogPort
 port (LogicalPort
 m 4
 …
 uid 518,0
+)
 *468 (LeafLogPort
+*500 (LeafLogPort
 port (LogicalPort
 m 4
 …
 uid 520,0
+)
 *469 (LeafLogPort
+*501 (LeafLogPort
 port (LogicalPort
 m 4
 …
 uid 530,0
+)
 *470 (LeafLogPort
+*502 (LeafLogPort
 port (LogicalPort
 m 4
 …
 uid 532,0
+)
 *471 (LeafLogPort
+*503 (LeafLogPort
 port (LogicalPort
 m 1
 …
 uid 534,0
+)
 *472 (LeafLogPort
+*504 (LeafLogPort
 port (LogicalPort
 m 1
 …
 uid 536,0
+)
 *473 (LeafLogPort
+*505 (LeafLogPort
 port (LogicalPort
 m 2
 …
 uid 538,0
+)
 *474 (LeafLogPort
+*506 (LeafLogPort
 port (LogicalPort
 m 1
 …
 uid 540,0
+)
 *475 (LeafLogPort
+*507 (LeafLogPort
 port (LogicalPort
 m 1
 …
 uid 542,0
+)
 *476 (LeafLogPort
+*508 (LeafLogPort
 port (LogicalPort
 m 1
 …
 uid 546,0
+)
 *477 (LeafLogPort
+*509 (LeafLogPort
 port (LogicalPort
 decl (Decl
 …
 uid 548,0
+)
 *478 (LeafLogPort
+*510 (LeafLogPort
 port (LogicalPort
 decl (Decl
 …
 uid 1455,0
+)
 *479 (LeafLogPort
+*511 (LeafLogPort
 port (LogicalPort
 decl (Decl
 …
 uid 1457,0
+)
 *480 (LeafLogPort
+*512 (LeafLogPort
 port (LogicalPort
 decl (Decl
 …
 uid 1694,0
+)
 *481 (LeafLogPort
+*513 (LeafLogPort
 port (LogicalPort
 lang 2
 …
 uid 1993,0
+)
 *482 (LeafLogPort
+*514 (LeafLogPort
 port (LogicalPort
 m 4
 …
 uid 2305,0
+)
 *483 (LeafLogPort
+*515 (LeafLogPort
 port (LogicalPort
 lang 2
 …
 uid 2510,0
+)
 *484 (LeafLogPort
+*516 (LeafLogPort
 port (LogicalPort
 lang 2
 …
 uid 2512,0
+)
 *485 (LeafLogPort
+*517 (LeafLogPort
 port (LogicalPort
 lang 2
 …
 uid 2514,0
+)
 *486 (LeafLogPort
+*518 (LeafLogPort
 port (LogicalPort
 lang 2
 …
 uid 2516,0
+)
 *487 (LeafLogPort
+*519 (LeafLogPort
 port (LogicalPort
 lang 2
 …
 uid 2518,0
+)
 *488 (LeafLogPort
+*520 (LeafLogPort
 port (LogicalPort
 lang 2
 …
 uid 2520,0
+)
 *489 (LeafLogPort
+*521 (LeafLogPort
 port (LogicalPort
 lang 2
 …
 uid 2522,0
+)
 *490 (LeafLogPort
+*522 (LeafLogPort
 port (LogicalPort
 m 4
 …
 uid 2604,0
+)
 *491 (LeafLogPort
+*523 (LeafLogPort
 port (LogicalPort
 m 4
 …
 uid 2606,0
+)
 *492 (LeafLogPort
+*524 (LeafLogPort
 port (LogicalPort
 m 4
 …
 uid 2608,0
+)
 *493 (LeafLogPort
+*525 (LeafLogPort
 port (LogicalPort
 m 4
 …
 uid 2610,0
+)
 *494 (LeafLogPort
+*526 (LeafLogPort
 port (LogicalPort
 m 4
 …
 uid 2612,0
+)
 *495 (LeafLogPort
+*527 (LeafLogPort
 port (LogicalPort
 m 4
 …
 uid 2646,0
+)
 *496 (LeafLogPort
+*528 (LeafLogPort
 port (LogicalPort
 m 1
 …
 uid 2812,0
+)
 *497 (LeafLogPort
+*529 (LeafLogPort
 port (LogicalPort
 m 4
 …
 uid 2962,0
+)
 *498 (LeafLogPort
+*530 (LeafLogPort
 port (LogicalPort
 m 1
 …
 uid 3902,0
+)
 *499 (LeafLogPort
+*531 (LeafLogPort
 port (LogicalPort
 m 1
 …
 uid 4070,0
+)
 *500 (LeafLogPort
+*532 (LeafLogPort
 port (LogicalPort
 m 4
 …
 uid 4212,0
+)
 *501 (LeafLogPort
+*533 (LeafLogPort
 port (LogicalPort
 decl (Decl
 …
 uid 4234,0
+)
 *502 (LeafLogPort
+*534 (LeafLogPort
 port (LogicalPort
 decl (Decl
 …
 uid 4262,0
+)
 *503 (LeafLogPort
+*535 (LeafLogPort
 port (LogicalPort
 decl (Decl
 …
 uid 4276,0
+)
 *504 (LeafLogPort
+*536 (LeafLogPort
 port (LogicalPort
 m 4
 …
 uid 4563,0
+)
 *505 (LeafLogPort
+*537 (LeafLogPort
 port (LogicalPort
 m 4
 …
 uid 4565,0
+)
 *506 (LeafLogPort
+*538 (LeafLogPort
 port (LogicalPort
 m 4
 …
 uid 4569,0
+)
 *507 (LeafLogPort
+*539 (LeafLogPort
 port (LogicalPort
 m 1
 …
 uid 4585,0
+)
 *508 (LeafLogPort
+*540 (LeafLogPort
 port (LogicalPort
 m 1
 …
 uid 4587,0
+)
 *509 (LeafLogPort
+*541 (LeafLogPort
 port (LogicalPort
 decl (Decl
 …
 uid 4733,0
+)
 *510 (LeafLogPort
+*542 (LeafLogPort
 port (LogicalPort
 decl (Decl
 …
 uid 4735,0
+)
 *511 (LeafLogPort
+*543 (LeafLogPort
 port (LogicalPort
 decl (Decl
 …
 uid 4737,0
+)
 *512 (LeafLogPort
+*544 (LeafLogPort
 port (LogicalPort
 decl (Decl
 …
 uid 4739,0
+)
 *513 (LeafLogPort
+*545 (LeafLogPort
 port (LogicalPort
 m 4
 …
 uid 4749,0
+)
 *514 (LeafLogPort
+*546 (LeafLogPort
 port (LogicalPort
 m 1
 …
 uid 4974,0
+)
 *515 (LeafLogPort
+*547 (LeafLogPort
 port (LogicalPort
 m 1
 …
 uid 4976,0
+)
 *516 (LeafLogPort
+*548 (LeafLogPort
 port (LogicalPort
 m 4
 …
 uid 5198,0
+)
 *517 (LeafLogPort
+*549 (LeafLogPort
 port (LogicalPort
 m 4
 …
 uid 5200,0
+)
 *518 (LeafLogPort
+*550 (LeafLogPort
 port (LogicalPort
 m 4
 …
 uid 5202,0
+)
 *519 (LeafLogPort
+*551 (LeafLogPort
 port (LogicalPort
 m 4
 …
 uid 5204,0
+)
 *520 (LeafLogPort
+*552 (LeafLogPort
 port (LogicalPort
 m 4
 …
 uid 5206,0
+)
 *521 (LeafLogPort
+*553 (LeafLogPort
 port (LogicalPort
 m 4
 …
 uid 5208,0
+)
 *522 (LeafLogPort
+*554 (LeafLogPort
 port (LogicalPort
 m 4
 …
 uid 5210,0
+)
 *523 (LeafLogPort
+*555 (LeafLogPort
 port (LogicalPort
 m 4
 …
 uid 5212,0
+)
 *524 (LeafLogPort
+*556 (LeafLogPort
 port (LogicalPort
 m 4
 …
 uid 5214,0
+)
 *525 (LeafLogPort
+*557 (LeafLogPort
 port (LogicalPort
 m 1
 …
 uid 5226,0
+)
 *526 (LeafLogPort
+*558 (LeafLogPort
 port (LogicalPort
 m 4
 …
 uid 5285,0
+)
 *527 (LeafLogPort
+*559 (LeafLogPort
 port (LogicalPort
 m 4
 …
 uid 5502,0
+)
 *528 (LeafLogPort
+*560 (LeafLogPort
 port (LogicalPort
 m 4
 …
 uid 5504,0
+)
 *529 (LeafLogPort
+*561 (LeafLogPort
 port (LogicalPort
 m 4
 …
 uid 5600,0
+)
 *530 (LeafLogPort
+*562 (LeafLogPort
 port (LogicalPort
 lang 10
 …
 uid 5642,0
+)
 *531 (LeafLogPort
+*563 (LeafLogPort
 port (LogicalPort
 m 4
 …
 uid 5644,0
+)
 *532 (LeafLogPort
+*564 (LeafLogPort
 port (LogicalPort
 m 4
 …
 uid 5751,0
+)
 *533 (LeafLogPort
+*565 (LeafLogPort
 port (LogicalPort
 m 1
 …
 uid 5867,0
+)
 *534 (LeafLogPort
+*566 (LeafLogPort
 port (LogicalPort
 m 2
 …
 uid 5869,0
+)
 *535 (LeafLogPort
+*567 (LeafLogPort
 port (LogicalPort
 m 1
 …
 uid 5871,0
+)
 *536 (LeafLogPort
+*568 (LeafLogPort
 port (LogicalPort
 m 1
 …
 uid 5873,0
+)
 *537 (LeafLogPort
+*569 (LeafLogPort
 port (LogicalPort
 m 4
 …
 uid 5966,0
+)
 *538 (LeafLogPort
+*570 (LeafLogPort
 port (LogicalPort
 m 4
 …
 uid 5968,0
+)
 *539 (LeafLogPort
+*571 (LeafLogPort
 port (LogicalPort
 m 4
 …
 uid 6022,0
+)
 *540 (LeafLogPort
+*572 (LeafLogPort
 port (LogicalPort
 m 4
 …
 uid 6024,0
+)
 *541 (LeafLogPort
+*573 (LeafLogPort
 port (LogicalPort
 m 4
 …
 uid 6026,0
+)
 *542 (LeafLogPort
+*574 (LeafLogPort
 port (LogicalPort
 m 1
 …
 uid 6172,0
+)
 *543 (LeafLogPort
+*575 (LeafLogPort
 port (LogicalPort
 m 1
 …
 uid 6374,0
+)
 *544 (LeafLogPort
+*576 (LeafLogPort
 port (LogicalPort
 m 4
 …
 uid 6464,0
+)
 *545 (LeafLogPort
+*577 (LeafLogPort
 port (LogicalPort
 m 4
 …
 uid 6554,0
+)
 *546 (LeafLogPort
+*578 (LeafLogPort
 port (LogicalPort
 lang 2
 …
+)
 uid 8420,0
+)
+*579 (LeafLogPort
+port (LogicalPort
+m 4
+decl (Decl
+n "drs_address"
+t "std_logic_vector"
+b "(3 DOWNTO 0)"
+o 82
+suid 184,0
+i "(others => '0')"
+)
+)
+uid 8609,0
+)
+*580 (LeafLogPort
+port (LogicalPort
+m 4
+decl (Decl
+n "drs_address_mode"
+t "std_logic"
+o 83
+suid 185,0
+)
+)
+uid 8611,0
+)
+*581 (LeafLogPort
+port (LogicalPort
+m 4
+decl (Decl
+n "drs_channel_internal"
+t "std_logic_vector"
+b "(3 DOWNTO 0)"
+o 84
+suid 187,0
+i "(others => '0')"
+)
+)
+uid 8613,0
+)
+]
 …
 uid 67,0
 optionalChildren [
 *547 (Sheet
+*582 (Sheet
 sheetRow (SheetRow
 headerVa (MVa
 …
 font "Tahoma,10,0"
+)
 emptyMRCItem *548 (MRCItem
 litem &453
 pos 81
+emptyMRCItem *583 (MRCItem
+litem &485
+pos 84
 dimension 20
+)
 uid 69,0
 optionalChildren [
 *549 (MRCItem
 litem &454
+*584 (MRCItem
+litem &486
 pos 0
 dimension 20
 uid 70,0
+)
 *550 (MRCItem
 litem &455
+*585 (MRCItem
+litem &487
 pos 1
 dimension 23
 uid 71,0
+)
 *551 (MRCItem
 litem &456
+*586 (MRCItem
+litem &488
 pos 2
 hidden 1
 …
 uid 72,0
+)
 *552 (MRCItem
 litem &466
+*587 (MRCItem
+litem &498
 pos 31
 dimension 20
 uid 517,0
+)
 *553 (MRCItem
 litem &467
+*588 (MRCItem
+litem &499
 pos 32
 dimension 20
 uid 519,0
+)
 *554 (MRCItem
 litem &468
+*589 (MRCItem
+litem &500
 pos 33
 dimension 20
 uid 521,0
+)
 *555 (MRCItem
 litem &469
+*590 (MRCItem
+litem &501
 pos 34
 dimension 20
 uid 531,0
+)
 *556 (MRCItem
 litem &470
+*591 (MRCItem
+litem &502
 pos 35
 dimension 20
 uid 533,0
+)
 *557 (MRCItem
 litem &471
+*592 (MRCItem
+litem &503
 pos 0
 dimension 20
 uid 535,0
+)
 *558 (MRCItem
 litem &472
+*593 (MRCItem
+litem &504
 pos 1
 dimension 20
 uid 537,0
+)
 *559 (MRCItem
 litem &473
+*594 (MRCItem
+litem &505
 pos 2
 dimension 20
 uid 539,0
+)
 *560 (MRCItem
 litem &474
+*595 (MRCItem
+litem &506
 pos 3
 dimension 20
 uid 541,0
+)
 *561 (MRCItem
 litem &475
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+litem &507
 pos 4
 dimension 20
 uid 543,0
+)
 *562 (MRCItem
 litem &476
+*597 (MRCItem
+litem &508
 pos 5
 dimension 20
 uid 547,0
+)
 *563 (MRCItem
 litem &477
+*598 (MRCItem
+litem &509
 pos 6
 dimension 20
 uid 549,0
+)
 *564 (MRCItem
 litem &478
+*599 (MRCItem
+litem &510
 pos 8
 dimension 20
 uid 1456,0
+)
 *565 (MRCItem
 litem &479
+*600 (MRCItem
+litem &511
 pos 7
 dimension 20
 uid 1458,0
+)
 *566 (MRCItem
 litem &480
+*601 (MRCItem
+litem &512
 pos 9
 dimension 20
 uid 1695,0
+)
 *567 (MRCItem
 litem &481
+*602 (MRCItem
+litem &513
 pos 36
 dimension 20
 uid 1994,0
+)
 *568 (MRCItem
 litem &482
+*603 (MRCItem
+litem &514
 pos 37
 dimension 20
 uid 2306,0
+)
 *569 (MRCItem
 litem &483
+*604 (MRCItem
+litem &515
 pos 38
 dimension 20
 uid 2511,0
+)
 *570 (MRCItem
 litem &484
+*605 (MRCItem
+litem &516
 pos 39
 dimension 20
 uid 2513,0
+)
 *571 (MRCItem
 litem &485
+*606 (MRCItem
+litem &517
 pos 40
 dimension 20
 uid 2515,0
+)
 *572 (MRCItem
 litem &486
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+litem &518
 pos 41
 dimension 20
 uid 2517,0
+)
 *573 (MRCItem
 litem &487
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+litem &519
 pos 42
 dimension 20
 uid 2519,0
+)
 *574 (MRCItem
 litem &488
+*609 (MRCItem
+litem &520
 pos 43
 dimension 20
 uid 2521,0
+)
 *575 (MRCItem
 litem &489
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