Changeset 10138 for firmware/FAD/FACT_FAD_20MHz_VAR_PS

Timestamp:

02/08/11 11:54:22 (14 years ago)

Author:

neise

Message:

 

Location:

firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib

Files:

• hdl/data_generator.vhd (modified) (1 diff)
• hdl/drs_pulser_dummy.vhd (modified) (1 diff)
• hdl/fad_definitions.vhd (modified) (1 diff)
• hdl/w5300_modul.vhd (modified) (7 diffs)
• hds/@f@a@d_main/struct.bd (modified) (645 diffs)
• hds/@f@a@d_main/struct.bd.bak (modified) (653 diffs)
• hds/@f@a@d_main/symbol.sb (modified) (3 diffs)
• hds/w5300_modul/symbol.sb (modified) (69 diffs)

firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib/hdl/data_generator.vhd

@@ -172 +172 @@
           when CONFIG7 =>
             if (drs_srin_write_ready = '1') then
+              drs_channel_id <= DRS_ADDR_IDLE; -- to make sure not to write accidentally into DRS shift registers
               roi_max_int <= roi_max;
               state_generate <= WRITE_DATA_IDLE;

firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib/hdl/drs_pulser_dummy.vhd

@@ -85 +85 @@
         when SRIN_WRITE_END =>
           SRCLK_EN <= '0';
-          srin_out <= '1';
+          srin_out <= '0';
           srin_write_ready <= '1';
           srin_write_ack <= '0';

firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib/hdl/fad_definitions.vhd

@@ -163 +163 @@
 
 -- DRS Registers
+  constant DRS_ADDR_IDLE : std_logic_vector := "1001";
   constant DRS_CONFIG_REG : std_logic_vector := "1100";  
   constant DRS_WRITE_SHIFT_REG : std_logic_vector := "1101";  

firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib/hdl/w5300_modul.vhd

@@ -144 +144 @@
 signal local_fifo_channels : std_logic_vector (3 downto 0);
 
-signal data_valid_int : std_logic := '0';
+
 
 
@@ -162 +162 @@
         -- signals for synching in asynchronous input signals
         ------------------------------------------------------------------------------
-        signal w5300_interrupt_sr : std_logic_vector(1 downto 0); 
+        signal w5300_interrupt_sr : std_logic_vector(1 downto 0) := "11";
+         --?? not sure if this init value is good
+         -- but should be no problem, because interrupt_ignore is not true during the first 2 clock cycles.
+         -- I hope!
+        signal data_valid_sr : std_logic_vector(1 downto 0) := "00"; 
         ------------------------------------------------------------------------------
 
@@ -187 +191 @@
                 -- synch asynchronous input in:
                 w5300_interrupt_sr <= w5300_interrupt_sr(1) & int;
+                data_valid_sr <= data_valid_sr(1) & data_valid;
                 
                         -- interrupt is handled synchronously
                         -- W5300 pulls low its interrpt line in case of:
-                        --      ??? I don't know ... connection loss ???
+                        --      When Sockets time out and 
+                        -- When sockets receive disconnection request.
                         
                         if (w5300_interrupt_sr = "01") and (interrupt_ignore = '0') then
@@ -560 +566 @@
                                             state_init <= MAIN;
                                           end if;
-                                        
-          -- main "loop"
+                                        -----------------------------------------
+          -- MAIN "loop" --------------------------
+          -----------------------------------------
+          
                                         when MAIN =>
                                           socks_waiting <= '0';
@@ -573 +581 @@
             data_valid_ack <= '0';
             state_init <= MAIN1;
-            data_valid_int <= data_valid;
+            --data_valid_int <= data_valid;
                                         when MAIN1 =>
             if (chk_recv_cntr = 1000) then
@@ -586 +594 @@
           when MAIN2 =>
             busy <= '0';
-                                          if (data_valid = '1') then
-                                            data_valid_int <= '0';
+                                          --if (data_valid = '1') then
+                                          if (data_valid_sr = "01" or data_valid_sr = "11") then
+                                            --data_valid_int <= '0';
                                             busy <= '1';
               local_write_length <= write_length;
@@ -607 +616 @@
             next_state <= MAIN;
             state_init <= WRITE_DATA;
+
+            -----------------------------------------
+            -- END OF MAIN         ------------------
+            -----------------------------------------
+
                                           
 

firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib/hds/@f@a@d_main/struct.bd

@@ -333 +333 @@
 (vvPair
 variable "date"
-value "04.02.2011"
+value "08.02.2011"
 )
 (vvPair
 variable "day"
-value "Fr"
+value "Di"
 )
 (vvPair
 variable "day_long"
-value "Freitag"
+value "Dienstag"
 )
 (vvPair
 variable "dd"
-value "04"
+value "08"
 )
 (vvPair
@@ -485 +485 @@
 (vvPair
 variable "time"
-value "12:56:44"
+value "11:06:22"
 )
 (vvPair
@@ -577 +577 @@
 )
 xt "-172000,106800,-128500,107600"
-st "SIGNAL write_ea               : std_logic_vector(0 downto 0)                 := \"0\""
+st "SIGNAL write_ea               : std_logic_vector(0 downto 0)                 := \"0\"
+"
 )
 )
@@ -595 +596 @@
 )
 xt "-172000,42800,-132000,43600"
-st "SIGNAL addr_out               : std_logic_vector(RAMADDRWIDTH64b-1 DOWNTO 0)"
+st "SIGNAL addr_out               : std_logic_vector(RAMADDRWIDTH64b-1 DOWNTO 0)
+"
 )
 )
@@ -613 +615 @@
 )
 xt "-172000,62000,-139500,62800"
-st "SIGNAL data_out               : std_logic_vector(63 DOWNTO 0)"
+st "SIGNAL data_out               : std_logic_vector(63 DOWNTO 0)
+"
 )
 )
@@ -631 +634 @@
 )
 xt "-172000,80400,-132000,81200"
-st "SIGNAL ram_addr               : std_logic_vector(RAMADDRWIDTH64b+1 DOWNTO 0)"
+st "SIGNAL ram_addr               : std_logic_vector(RAMADDRWIDTH64b+1 DOWNTO 0)
+"
 )
 )
@@ -649 +653 @@
 )
 xt "-172000,81200,-139500,82000"
-st "SIGNAL ram_data               : std_logic_vector(15 downto 0)"
+st "SIGNAL ram_data               : std_logic_vector(15 downto 0)
+"
 )
 )
@@ -667 +672 @@
 )
 xt "-172000,34400,-132000,35200"
-st "wiz_reset              : std_logic                                    := '1'"
+st "wiz_reset              : std_logic                                    := '1'
+"
 )
 )
@@ -685 +691 @@
 )
 xt "-172000,32000,-143500,32800"
-st "wiz_addr               : std_logic_vector(9 DOWNTO 0)"
+st "wiz_addr               : std_logic_vector(9 DOWNTO 0)
+"
 )
 )
@@ -703 +710 @@
 )
 xt "-172000,36800,-143000,37600"
-st "wiz_data               : std_logic_vector(15 DOWNTO 0)"
+st "wiz_data               : std_logic_vector(15 DOWNTO 0)
+"
 )
 )
@@ -721 +729 @@
 )
 xt "-172000,32800,-132000,33600"
-st "wiz_cs                 : std_logic                                    := '1'"
+st "wiz_cs                 : std_logic                                    := '1'
+"
 )
 )
@@ -739 +748 @@
 )
 xt "-172000,35200,-132000,36000"
-st "wiz_wr                 : std_logic                                    := '1'"
+st "wiz_wr                 : std_logic                                    := '1'
+"
 )
 )
@@ -757 +767 @@
 )
 xt "-172000,33600,-132000,34400"
-st "wiz_rd                 : std_logic                                    := '1'"
+st "wiz_rd                 : std_logic                                    := '1'
+"
 )
 )
@@ -774 +785 @@
 )
 xt "-172000,13600,-153500,14400"
-st "wiz_int                : std_logic"
+st "wiz_int                : std_logic
+"
 )
 )
@@ -1291 +1303 @@
 fg "0,65535,0"
 )
-xt "0,65625,750,66375"
+xt "0,70625,750,71375"
 )
 tg (CPTG
@@ -1301 +1313 @@
 va (VaSet
 )
-xt "-17300,65500,-1000,66500"
+xt "-17300,70500,-1000,71500"
 st "ram_start_addr : (RAM_ADDR_WIDTH-1:0)"
 ju 2
-blo "-1000,66300"
+blo "-1000,71300"
 )
 )
@@ -1366 +1378 @@
 fg "0,65535,0"
 )
-xt "-21750,70625,-21000,71375"
+xt "-21750,69625,-21000,70375"
 )
 tg (CPTG
@@ -1376 +1388 @@
 va (VaSet
 )
-xt "-20000,70500,-13200,71500"
+xt "-20000,69500,-13200,70500"
 st "trigger_id : (47:0)"
-blo "-20000,71300"
+blo "-20000,70300"
 )
 )
@@ -1474 +1486 @@
 fg "0,65535,0"
 )
-xt "0,66625,750,67375"
+xt "0,71625,750,72375"
 )
 tg (CPTG
@@ -1484 +1496 @@
 va (VaSet
 )
-xt "-6300,66500,-1000,67500"
+xt "-6300,71500,-1000,72500"
 st "ram_write_ea"
 ju 2
-blo "-1000,67300"
+blo "-1000,72300"
 )
 )
@@ -1509 +1521 @@
 fg "0,65535,0"
 )
-xt "0,67625,750,68375"
+xt "0,72625,750,73375"
 )
 tg (CPTG
@@ -1519 +1531 @@
 va (VaSet
 )
-xt "-7300,67500,-1000,68500"
+xt "-7300,72500,-1000,73500"
 st "ram_write_ready"
 ju 2
-blo "-1000,68300"
+blo "-1000,73300"
 )
 )
@@ -1547 +1559 @@
 fg "0,65535,0"
 )
-xt "0,76625,750,77375"
+xt "0,78625,750,79375"
 )
 tg (CPTG
@@ -1557 +1569 @@
 va (VaSet
 )
-xt "-4000,76500,-1000,77500"
+xt "-4000,78500,-1000,79500"
 st "roi_max"
 ju 2
-blo "-1000,77300"
+blo "-1000,79300"
 )
 )
@@ -1617 +1629 @@
 fg "0,65535,0"
 )
-xt "0,77625,750,78375"
+xt "0,79625,750,80375"
 )
 tg (CPTG
@@ -1627 +1639 @@
 va (VaSet
 )
-xt "-10100,77500,-1000,78500"
+xt "-10100,79500,-1000,80500"
 st "package_length : (15:0)"
 ju 2
-blo "-1000,78300"
+blo "-1000,80300"
 )
 )
@@ -2016 +2028 @@
 fg "0,65535,0"
 )
-xt "0,74625,750,75375"
+xt "0,77625,750,78375"
 )
 tg (CPTG
@@ -2026 +2038 @@
 va (VaSet
 )
-xt "-7700,74500,-1000,75500"
+xt "-7700,77500,-1000,78500"
 st "config_ready_mm"
 ju 2
-blo "-1000,75300"
+blo "-1000,78300"
 )
 )
@@ -2156 +2168 @@
 fg "0,65535,0"
 )
-xt "0,72625,750,73375"
+xt "0,75625,750,76375"
 )
 tg (CPTG
@@ -2166 +2178 @@
 va (VaSet
 )
-xt "-7400,72500,-1000,73500"
+xt "-7400,75500,-1000,76500"
 st "config_start_mm"
 ju 2
-blo "-1000,73300"
+blo "-1000,76300"
 )
 )
@@ -2344 +2356 @@
 fg "0,65535,0"
 )
-xt "0,73625,750,74375"
+xt "0,76625,750,77375"
 )
 tg (CPTG
@@ -2354 +2366 @@
 va (VaSet
 )
-xt "-8200,73500,-1000,74500"
+xt "-8200,76500,-1000,77500"
 st "config_started_mm"
 ju 2
-blo "-1000,74300"
+blo "-1000,77300"
 )
 )
@@ -2626 +2638 @@
 fg "0,65535,0"
 )
-xt "0,68625,750,69375"
+xt "0,73625,750,74375"
 )
 tg (CPTG
@@ -2636 +2648 @@
 va (VaSet
 )
-xt "-8800,68500,-1000,69500"
+xt "-8800,73500,-1000,74500"
 st "ram_write_ready_ack"
 ju 2
-blo "-1000,69300"
+blo "-1000,74300"
 )
 )
@@ -2870 +2882 @@
 )
 xt "-172000,9600,-143500,10400"
-st "board_id               : std_logic_vector(3 DOWNTO 0)"
+st "board_id               : std_logic_vector(3 DOWNTO 0)
+"
 )
 )
@@ -2889 +2902 @@
 )
 xt "-172000,12800,-153500,13600"
-st "trigger                : std_logic"
+st "trigger                : std_logic
+"
 )
 )
@@ -3257 +3271 @@
 fg "0,65535,0"
 )
-xt "87250,71625,88000,72375"
+xt "87250,72625,88000,73375"
 )
 tg (CPTG
@@ -3267 +3281 @@
 va (VaSet
 )
-xt "89000,71500,96900,72500"
+xt "89000,72500,96900,73500"
 st "write_length : (16:0)"
-blo "89000,72300"
+blo "89000,73300"
 )
 )
@@ -3294 +3308 @@
 fg "0,65535,0"
 )
-xt "87250,72625,88000,73375"
+xt "87250,73625,88000,74375"
 )
 tg (CPTG
@@ -3304 +3318 @@
 va (VaSet
 )
-xt "89000,72500,105300,73500"
+xt "89000,73500,105300,74500"
 st "ram_start_addr : (RAM_ADDR_WIDTH-1:0)"
-blo "89000,73300"
+blo "89000,74300"
 )
 )
@@ -3406 +3420 @@
 fg "0,65535,0"
 )
-xt "87250,70625,88000,71375"
+xt "87250,71625,88000,72375"
 )
 tg (CPTG
@@ -3416 +3430 @@
 va (VaSet
 )
-xt "89000,70500,93100,71500"
+xt "89000,71500,93100,72500"
 st "data_valid"
-blo "89000,71300"
+blo "89000,72300"
 )
 )
@@ -3442 +3456 @@
 fg "0,65535,0"
 )
-xt "87250,69625,88000,70375"
+xt "87250,70625,88000,71375"
 )
 tg (CPTG
@@ -3452 +3466 @@
 va (VaSet
 )
-xt "89000,69500,90900,70500"
+xt "89000,70500,90900,71500"
 st "busy"
-blo "89000,70300"
+blo "89000,71300"
 )
 )
@@ -3480 +3494 @@
 fg "0,65535,0"
 )
-xt "87250,73625,88000,74375"
+xt "87250,74625,88000,75375"
 )
 tg (CPTG
@@ -3490 +3504 @@
 va (VaSet
 )
-xt "89000,73500,96800,74500"
+xt "89000,74500,96800,75500"
 st "fifo_channels : (3:0)"
-blo "89000,74300"
+blo "89000,75300"
 )
 )
@@ -3516 +3530 @@
 fg "0,65535,0"
 )
-xt "87250,74625,88000,75375"
+xt "87250,75625,88000,76375"
 )
 tg (CPTG
@@ -3526 +3540 @@
 va (VaSet
 )
-xt "89000,74500,94700,75500"
+xt "89000,75500,94700,76500"
 st "write_end_flag"
-blo "89000,75300"
+blo "89000,76300"
 )
 )
@@ -3550 +3564 @@
 fg "0,65535,0"
 )
-xt "87250,75625,88000,76375"
+xt "87250,76625,88000,77375"
 )
 tg (CPTG
@@ -3560 +3574 @@
 va (VaSet
 )
-xt "89000,75500,95800,76500"
+xt "89000,76500,95800,77500"
 st "write_header_flag"
-blo "89000,76300"
+blo "89000,77300"
 )
 )
@@ -3994 +4008 @@
 fg "0,65535,0"
 )
-xt "87250,76625,88000,77375"
+xt "87250,77625,88000,78375"
 )
 tg (CPTG
@@ -4004 +4018 @@
 va (VaSet
 )
-xt "89000,76500,94600,77500"
+xt "89000,77500,94600,78500"
 st "data_valid_ack"
-blo "89000,77300"
+blo "89000,78300"
 )
 )
@@ -4687 +4701 @@
 )
 xt "-172000,10400,-143500,11200"
-st "crate_id               : std_logic_vector(1 DOWNTO 0)"
+st "crate_id               : std_logic_vector(1 DOWNTO 0)
+"
 )
 )
@@ -4703 +4718 @@
 fg "0,65535,0"
 )
-xt "-41000,67625,-40250,68375"
+xt "-41000,68625,-40250,69375"
 )
 tg (CPTG
@@ -4713 +4728 @@
 va (VaSet
 )
-xt "-48800,67500,-42000,68500"
+xt "-48800,68500,-42000,69500"
 st "trigger_id : (47:0)"
 ju 2
-blo "-42000,68300"
+blo "-42000,69300"
 )
 )
@@ -4743 +4758 @@
 fg "0,65535,0"
 )
-xt "-52750,67625,-52000,68375"
+xt "-52750,68625,-52000,69375"
 )
 tg (CPTG
@@ -4753 +4768 @@
 va (VaSet
 )
-xt "-51000,67500,-48200,68500"
+xt "-51000,68500,-48200,69500"
 st "trigger"
-blo "-51000,68300"
+blo "-51000,69300"
 )
 )
@@ -4780 +4795 @@
 fg "0,65535,0"
 )
-xt "-52750,66625,-52000,67375"
+xt "-52750,67625,-52000,68375"
 )
 tg (CPTG
@@ -4790 +4805 @@
 va (VaSet
 )
-xt "-51000,66500,-49700,67500"
+xt "-51000,67500,-49700,68500"
 st "clk"
-blo "-51000,67300"
+blo "-51000,68300"
 )
 )
@@ -4814 +4829 @@
 lineWidth 2
 )
-xt "-52000,66000,-41000,70000"
+xt "-52000,67000,-41000,71000"
 )
 oxt "32000,2000,43000,12000"
@@ -4828 +4843 @@
 font "Arial,8,1"
 )
-xt "-50300,70000,-43700,71000"
+xt "-50300,71000,-43700,72000"
 st "FACT_FAD_LIB"
-blo "-50300,70800"
+blo "-50300,71800"
 tm "BdLibraryNameMgr"
 )
@@ -4839 +4854 @@
 font "Arial,8,1"
 )
-xt "-50300,71000,-43700,72000"
+xt "-50300,72000,-43700,73000"
 st "trigger_counter"
-blo "-50300,71800"
+blo "-50300,72800"
 tm "CptNameMgr"
 )
@@ -4850 +4865 @@
 font "Arial,8,1"
 )
-xt "-50300,71000,-42700,72000"
+xt "-50300,72000,-42700,73000"
 st "I_main_ext_trigger"
-blo "-50300,71800"
+blo "-50300,72800"
 tm "InstanceNameMgr"
 )
@@ -4867 +4882 @@
 font "Courier New,8,0"
 )
-xt "-52000,65000,-52000,65000"
+xt "-52000,66000,-52000,66000"
 )
 header ""
@@ -4881 +4896 @@
 fg "49152,49152,49152"
 )
-xt "-51750,68250,-50250,69750"
+xt "-51750,69250,-50250,70750"
 iconName "VhdlFileViewIcon.png"
 iconMaskName "VhdlFileViewIcon.msk"
@@ -4911 +4926 @@
 )
 xt "-172000,98800,-139500,99600"
-st "SIGNAL trigger_id             : std_logic_vector(47 downto 0)"
+st "SIGNAL trigger_id             : std_logic_vector(47 downto 0)
+"
 )
 )
@@ -4931 +4947 @@
 )
 xt "-172000,82000,-132000,82800"
-st "SIGNAL ram_start_addr         : std_logic_vector(RAMADDRWIDTH64b-1 DOWNTO 0)"
+st "SIGNAL ram_start_addr         : std_logic_vector(RAMADDRWIDTH64b-1 DOWNTO 0)
+"
 )
 )
@@ -4947 +4964 @@
 fg "0,65535,0"
 )
-xt "31250,72625,32000,73375"
+xt "27250,70625,28000,71375"
 )
 tg (CPTG
@@ -4958 +4975 @@
 font "arial,8,0"
 )
-xt "33000,72500,51400,73500"
+xt "29000,70500,47400,71500"
 st "ram_start_addr : (RAM_ADDR_WIDTH_64B-1:0)"
-blo "33000,73300"
+blo "29000,71300"
 )
 )
@@ -4983 +5000 @@
 shape (Triangle
 uid 2352,0
-ro 90
+ro 180
 va (VaSet
 vasetType 1
 fg "0,65535,0"
 )
-xt "31250,70625,32000,71375"
+xt "28625,67250,29375,68000"
 )
 tg (CPTG
 uid 2353,0
 ps "CptPortTextPlaceStrategy"
-stg "VerticalLayoutStrategy"
+stg "RightVerticalLayoutStrategy"
 f (Text
 uid 2354,0
+ro 270
 va (VaSet
 font "arial,8,0"
 )
-xt "33000,70500,34300,71500"
+xt "28500,69000,29500,70300"
 st "clk"
-blo "33000,71300"
+ju 2
+blo "29300,69000"
 )
 )
@@ -5024 +5043 @@
 fg "0,65535,0"
 )
-xt "31250,79625,32000,80375"
+xt "27250,77625,28000,78375"
 )
 tg (CPTG
@@ -5035 +5054 @@
 font "arial,8,0"
 )
-xt "33000,79500,38100,80500"
+xt "29000,77500,34100,78500"
 st "config_ready"
-blo "33000,80300"
+blo "29000,78300"
 )
 )
@@ -5062 +5081 @@
 fg "0,65535,0"
 )
-xt "31250,77625,32000,78375"
+xt "27250,75625,28000,76375"
 )
 tg (CPTG
@@ -5073 +5092 @@
 font "arial,8,0"
 )
-xt "33000,77500,37800,78500"
+xt "29000,75500,33800,76500"
 st "config_start"
-blo "33000,78300"
+blo "29000,76300"
 )
 )
@@ -5098 +5117 @@
 fg "0,65535,0"
 )
-xt "31250,73625,32000,74375"
+xt "27250,71625,28000,72375"
 )
 tg (CPTG
@@ -5109 +5128 @@
 font "arial,8,0"
 )
-xt "33000,73500,38300,74500"
+xt "29000,71500,34300,72500"
 st "ram_write_ea"
-blo "33000,74300"
+blo "29000,72300"
 )
 )
@@ -5136 +5155 @@
 fg "0,65535,0"
 )
-xt "31250,74625,32000,75375"
+xt "27250,72625,28000,73375"
 )
 tg (CPTG
@@ -5147 +5166 @@
 font "arial,8,0"
 )
-xt "33000,74500,39300,75500"
+xt "29000,72500,35300,73500"
 st "ram_write_ready"
-blo "33000,75300"
+blo "29000,73300"
 )
 )
@@ -5173 +5192 @@
 fg "0,65535,0"
 )
-xt "31250,80625,32000,81375"
+xt "27250,78625,28000,79375"
 )
 tg (CPTG
@@ -5184 +5203 @@
 font "arial,8,0"
 )
-xt "33000,80500,36000,81500"
+xt "29000,78500,32000,79500"
 st "roi_max"
-blo "33000,81300"
+blo "29000,79300"
 )
 )
@@ -5212 +5231 @@
 fg "0,65535,0"
 )
-xt "63000,70625,63750,71375"
+xt "59000,70625,59750,71375"
 )
 tg (CPTG
@@ -5223 +5242 @@
 font "arial,8,0"
 )
-xt "58600,70500,62000,71500"
+xt "54600,70500,58000,71500"
 st "wiz_busy"
 ju 2
-blo "62000,71300"
+blo "58000,71300"
 )
 )
@@ -5249 +5268 @@
 fg "0,65535,0"
 )
-xt "63000,74625,63750,75375"
+xt "59000,74625,59750,75375"
 )
 tg (CPTG
@@ -5260 +5279 @@
 font "arial,8,0"
 )
-xt "50200,74500,62000,75500"
+xt "46200,74500,58000,75500"
 st "wiz_number_of_channels : (3:0)"
 ju 2
-blo "62000,75300"
+blo "58000,75300"
 )
 )
@@ -5289 +5308 @@
 fg "0,65535,0"
 )
-xt "63000,73625,63750,74375"
+xt "59000,73625,59750,74375"
 )
 tg (CPTG
@@ -5300 +5319 @@
 font "arial,8,0"
 )
-xt "42100,73500,62000,74500"
+xt "38100,73500,58000,74500"
 st "wiz_ram_start_addr : (RAM_ADDR_WIDTH_16B-1:0)"
 ju 2
-blo "62000,74300"
+blo "58000,74300"
 )
 )
@@ -5330 +5349 @@
 fg "0,65535,0"
 )
-xt "63000,71625,63750,72375"
+xt "59000,71625,59750,72375"
 )
 tg (CPTG
@@ -5341 +5360 @@
 font "arial,8,0"
 )
-xt "56900,71500,62000,72500"
+xt "52900,71500,58000,72500"
 st "wiz_write_ea"
 ju 2
-blo "62000,72300"
+blo "58000,72300"
 )
 )
@@ -5369 +5388 @@
 fg "0,65535,0"
 )
-xt "63000,75625,63750,76375"
+xt "59000,75625,59750,76375"
 )
 tg (CPTG
@@ -5380 +5399 @@
 font "arial,8,0"
 )
-xt "56500,75500,62000,76500"
+xt "52500,75500,58000,76500"
 st "wiz_write_end"
 ju 2
-blo "62000,76300"
+blo "58000,76300"
 )
 )
@@ -5408 +5427 @@
 fg "0,65535,0"
 )
-xt "63000,76625,63750,77375"
+xt "59000,76625,59750,77375"
 )
 tg (CPTG
@@ -5419 +5438 @@
 font "arial,8,0"
 )
-xt "55400,76500,62000,77500"
+xt "51400,76500,58000,77500"
 st "wiz_write_header"
 ju 2
-blo "62000,77300"
+blo "58000,77300"
 )
 )
@@ -5447 +5466 @@
 fg "0,65535,0"
 )
-xt "63000,72625,63750,73375"
+xt "59000,72625,59750,73375"
 )
 tg (CPTG
@@ -5458 +5477 @@
 font "arial,8,0"
 )
-xt "52600,72500,62000,73500"
+xt "48600,72500,58000,73500"
 st "wiz_write_length : (16:0)"
 ju 2
-blo "62000,73300"
+blo "58000,73300"
 )
 )
@@ -5487 +5506 @@
 fg "0,65535,0"
 )
-xt "31250,87625,32000,88375"
+xt "27250,85625,28000,86375"
 )
 tg (CPTG
@@ -5498 +5517 @@
 font "arial,8,0"
 )
-xt "33000,87500,36400,88500"
+xt "29000,85500,32400,86500"
 st "roi_array"
-blo "33000,88300"
+blo "29000,86300"
 )
 )
@@ -5525 +5544 @@
 fg "0,65535,0"
 )
-xt "31250,81625,32000,82375"
+xt "27250,79625,28000,80375"
 )
 tg (CPTG
@@ -5536 +5555 @@
 font "arial,8,0"
 )
-xt "33000,81500,42100,82500"
+xt "29000,79500,38100,80500"
 st "package_length : (15:0)"
-blo "33000,82300"
+blo "29000,80300"
 )
 )
@@ -5564 +5583 @@
 fg "0,65535,0"
 )
-xt "31250,78625,32000,79375"
+xt "27250,76625,28000,77375"
 )
 tg (CPTG
@@ -5575 +5594 @@
 font "arial,8,0"
 )
-xt "33000,78500,38600,79500"
+xt "29000,76500,34600,77500"
 st "config_started"
-blo "33000,79300"
+blo "29000,77300"
 )
 )
@@ -5602 +5621 @@
 fg "0,65535,0"
 )
-xt "63000,77625,63750,78375"
+xt "59000,77625,59750,78375"
 )
 tg (CPTG
@@ -5613 +5632 @@
 font "arial,8,0"
 )
-xt "59000,77500,62000,78500"
+xt "55000,77500,58000,78500"
 st "wiz_ack"
 ju 2
-blo "62000,78300"
+blo "58000,78300"
 )
 )
@@ -5639 +5658 @@
 fg "0,65535,0"
 )
-xt "31250,75625,32000,76375"
+xt "27250,73625,28000,74375"
 )
 tg (CPTG
@@ -5650 +5669 @@
 font "arial,8,0"
 )
-xt "33000,75500,40800,76500"
+xt "29000,73500,36800,74500"
 st "ram_write_ready_ack"
-blo "33000,76300"
+blo "29000,74300"
 )
 )
@@ -5679 +5698 @@
 lineWidth 2
 )
-xt "32000,70000,63000,90000"
+xt "28000,68000,59000,88000"
 )
 oxt "15000,6000,23000,16000"
@@ -5692 +5711 @@
 font "arial,8,1"
 )
-xt "32350,90000,38550,91000"
+xt "28350,88000,34550,89000"
 st "FACT_FAD_lib"
-blo "32350,90800"
+blo "28350,88800"
 tm "BdLibraryNameMgr"
 )
@@ -5702 +5721 @@
 font "arial,8,1"
 )
-xt "32350,91000,39650,92000"
+xt "28350,89000,35650,90000"
 st "memory_manager"
-blo "32350,91800"
+blo "28350,89800"
 tm "CptNameMgr"
 )
@@ -5712 +5731 @@
 font "arial,8,1"
 )
-xt "32350,92000,42850,93000"
+xt "28350,90000,38850,91000"
 st "I_main_memory_manager"
-blo "32350,92800"
+blo "28350,90800"
 tm "InstanceNameMgr"
 )
@@ -5729 +5748 @@
 font "Courier New,8,0"
 )
-xt "32000,68400,61500,70000"
+xt "31000,66400,60500,68000"
 st "RAM_ADDR_WIDTH_64B = RAMADDRWIDTH64b      ( integer )  
 RAM_ADDR_WIDTH_16B = RAMADDRWIDTH64b+2    ( integer )  "
@@ -5755 +5774 @@
 fg "49152,49152,49152"
 )
-xt "32250,88250,33750,89750"
+xt "28250,86250,29750,87750"
 iconName "VhdlFileViewIcon.png"
 iconMaskName "VhdlFileViewIcon.msk"
@@ -5781 +5800 @@
 )
 xt "-172000,101200,-149500,102000"
-st "SIGNAL wiz_busy               : std_logic"
+st "SIGNAL wiz_busy               : std_logic
+"
 )
 )
@@ -5800 +5820 @@
 )
 xt "-172000,103600,-128500,104400"
-st "SIGNAL wiz_write_ea           : std_logic                                    := '0'"
+st "SIGNAL wiz_write_ea           : std_logic                                    := '0'
+"
 )
 )
@@ -5820 +5841 @@
 )
 xt "-172000,106000,-122500,106800"
-st "SIGNAL wiz_write_length       : std_logic_vector(16 downto 0)                := (others => '0')"
+st "SIGNAL wiz_write_length       : std_logic_vector(16 downto 0)                := (others => '0')
+"
 )
 )
@@ -5841 +5863 @@
 )
 xt "-172000,102800,-122500,103600"
-st "SIGNAL wiz_ram_start_addr     : std_logic_vector(RAMADDRWIDTH64b+1 DOWNTO 0) := (others => '0')"
+st "SIGNAL wiz_ram_start_addr     : std_logic_vector(RAMADDRWIDTH64b+1 DOWNTO 0) := (others => '0')
+"
 )
 )
@@ -5861 +5884 @@
 )
 xt "-172000,102000,-122500,102800"
-st "SIGNAL wiz_number_of_channels : std_logic_vector(3 downto 0)                 := (others => '0')"
+st "SIGNAL wiz_number_of_channels : std_logic_vector(3 downto 0)                 := (others => '0')
+"
 )
 )
@@ -5880 +5904 @@
 )
 xt "-172000,104400,-128500,105200"
-st "SIGNAL wiz_write_end          : std_logic                                    := '0'"
+st "SIGNAL wiz_write_end          : std_logic                                    := '0'
+"
 )
 )
@@ -5899 +5924 @@
 )
 xt "-172000,105200,-128500,106000"
-st "SIGNAL wiz_write_header       : std_logic                                    := '0'"
+st "SIGNAL wiz_write_header       : std_logic                                    := '0'
+"
 )
 )
@@ -5916 +5942 @@
 )
 xt "-172000,82800,-149500,83600"
-st "SIGNAL ram_write_ea           : std_logic"
+st "SIGNAL ram_write_ea           : std_logic
+"
 )
 )
@@ -5934 +5961 @@
 )
 xt "-172000,83600,-128500,84400"
-st "SIGNAL ram_write_ready        : std_logic                                    := '0'"
+st "SIGNAL ram_write_ready        : std_logic                                    := '0'
+"
 )
 )
@@ -5952 +5980 @@
 )
 xt "-172000,54800,-128500,55600"
-st "SIGNAL config_start           : std_logic                                    := '0'"
+st "SIGNAL config_start           : std_logic                                    := '0'
+"
 )
 )
@@ -5969 +5998 @@
 )
 xt "-172000,49200,-149500,50000"
-st "SIGNAL config_ready           : std_logic"
+st "SIGNAL config_ready           : std_logic
+"
 )
 )
@@ -5986 +6016 @@
 )
 xt "-172000,86800,-148000,87600"
-st "SIGNAL roi_max                : roi_max_type"
+st "SIGNAL roi_max                : roi_max_type
+"
 )
 )
@@ -6004 +6035 @@
 )
 xt "-172000,77200,-139500,78000"
-st "SIGNAL package_length         : std_logic_vector(15 downto 0)"
+st "SIGNAL package_length         : std_logic_vector(15 downto 0)
+"
 )
 )
@@ -6022 +6054 @@
 )
 xt "-172000,19200,-132000,20000"
-st "adc_oeb                : std_logic                                    := '1'"
+st "adc_oeb                : std_logic                                    := '1'
+"
 )
 )
@@ -6129 +6162 @@
 )
 xt "-172000,86000,-147000,86800"
-st "SIGNAL roi_array              : roi_array_type"
+st "SIGNAL roi_array              : roi_array_type
+"
 )
 )
@@ -6562 +6596 @@
 )
 xt "-172000,14400,-153500,15200"
-st "CLK_25_PS              : std_logic"
+st "CLK_25_PS              : std_logic
+"
 )
 )
@@ -6624 +6659 @@
 )
 xt "-172000,15200,-153500,16000"
-st "CLK_50                 : std_logic"
+st "CLK_50                 : std_logic
+"
 )
 )
@@ -6641 +6677 @@
 )
 xt "-172000,39600,-149500,40400"
-st "SIGNAL CLK_25                 : std_logic"
+st "SIGNAL CLK_25                 : std_logic
+"
 )
 )
@@ -6703 +6740 @@
 )
 xt "-172000,3200,-153500,4000"
-st "CLK                    : std_logic"
+st "CLK                    : std_logic
+"
 )
 )
@@ -6721 +6759 @@
 )
 xt "-172000,8800,-143500,9600"
-st "adc_otr_array          : std_logic_vector(3 DOWNTO 0)"
+st "adc_otr_array          : std_logic_vector(3 DOWNTO 0)
+"
 )
 )
@@ -6738 +6777 @@
 )
 xt "-172000,8000,-148000,8800"
-st "adc_data_array         : adc_data_array_type"
+st "adc_data_array         : adc_data_array_type
+"
 )
 )
@@ -6801 +6841 @@
 )
 xt "-172000,66800,-128500,67600"
-st "SIGNAL drs_clk_en             : std_logic                                    := '0'"
+st "SIGNAL drs_clk_en             : std_logic                                    := '0'
+"
 )
 )
@@ -6818 +6859 @@
 )
 xt "-172000,73200,-143500,74000"
-st "SIGNAL drs_s_cell_array       : drs_s_cell_array_type"
+st "SIGNAL drs_s_cell_array       : drs_s_cell_array_type
+"
 )
 )
@@ -6836 +6878 @@
 )
 xt "-172000,67600,-128500,68400"
-st "SIGNAL drs_read_s_cell        : std_logic                                    := '0'"
+st "SIGNAL drs_read_s_cell        : std_logic                                    := '0'
+"
 )
 )
@@ -6855 +6898 @@
 )
 xt "-172000,25600,-126000,26400"
-st "drs_channel_id         : std_logic_vector(3 downto 0)                 := (others => '0')"
+st "drs_channel_id         : std_logic_vector(3 downto 0)                 := (others => '0')
+"
 )
 )
@@ -6873 +6917 @@
 )
 xt "-172000,26400,-132000,27200"
-st "drs_dwrite             : std_logic                                    := '1'"
+st "drs_dwrite             : std_logic                                    := '1'
+"
 )
 )
@@ -6980 +7025 @@
 )
 xt "-172000,4800,-153500,5600"
-st "SROUT_in_0             : std_logic"
+st "SROUT_in_0             : std_logic
+"
 )
 )
@@ -6997 +7043 @@
 )
 xt "-172000,5600,-153500,6400"
-st "SROUT_in_1             : std_logic"
+st "SROUT_in_1             : std_logic
+"
 )
 )
@@ -7014 +7061 @@
 )
 xt "-172000,6400,-153500,7200"
-st "SROUT_in_2             : std_logic"
+st "SROUT_in_2             : std_logic
+"
 )
 )
@@ -7031 +7079 @@
 )
 xt "-172000,7200,-153500,8000"
-st "SROUT_in_3             : std_logic"
+st "SROUT_in_3             : std_logic
+"
 )
 )
@@ -7228 +7277 @@
 )
 xt "-172000,68400,-149500,69200"
-st "SIGNAL drs_read_s_cell_ready  : std_logic"
+st "SIGNAL drs_read_s_cell_ready  : std_logic
+"
 )
 )
@@ -7883 +7933 @@
 )
 xt "-172000,16000,-132000,16800"
-st "RSRLOAD                : std_logic                                    := '0'"
+st "RSRLOAD                : std_logic                                    := '0'
+"
 )
 )
@@ -7946 +7997 @@
 )
 xt "-172000,16800,-132000,17600"
-st "SRCLK                  : std_logic                                    := '0'"
+st "SRCLK                  : std_logic                                    := '0'
+"
 )
 )
@@ -8599 +8651 @@
 )
 xt "-172000,45200,-140000,46000"
-st "SIGNAL config_addr            : std_logic_vector(7 DOWNTO 0)"
+st "SIGNAL config_addr            : std_logic_vector(7 DOWNTO 0)
+"
 )
 )
@@ -8616 +8669 @@
 )
 xt "-172000,47600,-149500,48400"
-st "SIGNAL config_data_valid      : std_logic"
+st "SIGNAL config_data_valid      : std_logic
+"
 )
 )
@@ -8633 +8687 @@
 )
 xt "-172000,46000,-149500,46800"
-st "SIGNAL config_busy            : std_logic"
+st "SIGNAL config_busy            : std_logic
+"
 )
 )
@@ -8651 +8706 @@
 )
 xt "-172000,46800,-139500,47600"
-st "SIGNAL config_data            : std_logic_vector(15 DOWNTO 0)"
+st "SIGNAL config_data            : std_logic_vector(15 DOWNTO 0)
+"
 )
 )
@@ -8668 +8724 @@
 )
 xt "-172000,60400,-149500,61200"
-st "SIGNAL config_wr_en           : std_logic"
+st "SIGNAL config_wr_en           : std_logic
+"
 )
 )
@@ -8685 +8742 @@
 )
 xt "-172000,48400,-149500,49200"
-st "SIGNAL config_rd_en           : std_logic"
+st "SIGNAL config_rd_en           : std_logic
+"
 )
 )
@@ -8702 +8760 @@
 )
 xt "-172000,61200,-147000,62000"
-st "SIGNAL dac_array              : dac_array_type"
+st "SIGNAL dac_array              : dac_array_type
+"
 )
 )
@@ -8719 +8778 @@
 )
 xt "-172000,55600,-149500,56400"
-st "SIGNAL config_start_cm        : std_logic"
+st "SIGNAL config_start_cm        : std_logic
+"
 )
 )
@@ -8736 +8796 @@
 )
 xt "-172000,50000,-149500,50800"
-st "SIGNAL config_ready_cm        : std_logic"
+st "SIGNAL config_ready_cm        : std_logic
+"
 )
 )
@@ -8756 +8817 @@
 )
 xt "-172000,28000,-126000,28800"
-st "led                    : std_logic_vector(7 DOWNTO 0)                 := (OTHERS => '0')"
+st "led                    : std_logic_vector(7 DOWNTO 0)                 := (OTHERS => '0')
+"
 )
 )
@@ -8773 +8835 @@
 )
 xt "-172000,91600,-149500,92400"
-st "SIGNAL sensor_ready           : std_logic"
+st "SIGNAL sensor_ready           : std_logic
+"
 )
 )
@@ -8790 +8853 @@
 )
 xt "-172000,90800,-145500,91600"
-st "SIGNAL sensor_array           : sensor_array_type"
+st "SIGNAL sensor_array           : sensor_array_type
+"
 )
 )
@@ -8807 +8871 @@
 )
 xt "-172000,50800,-149500,51600"
-st "SIGNAL config_ready_spi       : std_logic"
+st "SIGNAL config_ready_spi       : std_logic
+"
 )
 )
@@ -8826 +8891 @@
 )
 xt "-172000,42000,-140000,42800"
-st "SIGNAL adc_otr                : std_logic_vector(3 DOWNTO 0)"
+st "SIGNAL adc_otr                : std_logic_vector(3 DOWNTO 0)
+"
 )
 )
@@ -8843 +8909 @@
 )
 xt "-172000,41200,-144500,42000"
-st "SIGNAL adc_data_array_int     : adc_data_array_type"
+st "SIGNAL adc_data_array_int     : adc_data_array_type
+"
 )
 )
@@ -9133 +9200 @@
 )
 xt "-172000,56400,-128500,57200"
-st "SIGNAL config_start_spi       : std_logic                                    := '0'"
+st "SIGNAL config_start_spi       : std_logic                                    := '0'
+"
 )
 )
@@ -9666 +9734 @@
 )
 xt "-172000,30400,-153500,31200"
-st "sclk                   : std_logic"
+st "sclk                   : std_logic
+"
 )
 )
@@ -9685 +9754 @@
 )
 xt "-172000,36000,-153500,36800"
-st "sio                    : std_logic"
+st "sio                    : std_logic
+"
 )
 )
@@ -9702 +9772 @@
 )
 xt "-172000,24000,-153500,24800"
-st "dac_cs                 : std_logic"
+st "dac_cs                 : std_logic
+"
 )
 )
@@ -9720 +9791 @@
 )
 xt "-172000,31200,-143500,32000"
-st "sensor_cs              : std_logic_vector(3 DOWNTO 0)"
+st "sensor_cs              : std_logic_vector(3 DOWNTO 0)
+"
 )
 )
@@ -9918 +9990 @@
 )
 xt "-172000,76400,-128500,77200"
-st "SIGNAL new_config             : std_logic                                    := '0'"
+st "SIGNAL new_config             : std_logic                                    := '0'
+"
 )
 )
@@ -9935 +10008 @@
 )
 xt "-172000,57200,-149500,58000"
-st "SIGNAL config_started         : std_logic"
+st "SIGNAL config_started         : std_logic
+"
 )
 )
@@ -9953 +10027 @@
 )
 xt "-172000,59600,-128500,60400"
-st "SIGNAL config_started_spi     : std_logic                                    := '0'"
+st "SIGNAL config_started_spi     : std_logic                                    := '0'
+"
 )
 )
@@ -9971 +10046 @@
 )
 xt "-172000,58000,-128500,58800"
-st "SIGNAL config_started_cu      : std_logic                                    := '0'"
+st "SIGNAL config_started_cu      : std_logic                                    := '0'
+"
 )
 )
@@ -9988 +10064 @@
 )
 xt "-172000,58800,-149500,59600"
-st "SIGNAL config_started_mm      : std_logic"
+st "SIGNAL config_started_mm      : std_logic
+"
 )
 )
@@ -10006 +10083 @@
 )
 xt "-172000,28800,-132000,29600"
-st "mosi                   : std_logic                                    := '0'"
+st "mosi                   : std_logic                                    := '0'
+"
 )
 )
@@ -10071 +10149 @@
 )
 xt "-172000,24800,-118500,25600"
-st "denable                : std_logic                                    := '0' -- default domino wave off"
+st "denable                : std_logic                                    := '0' -- default domino wave off
+"
 )
 )
@@ -10133 +10212 @@
 )
 xt "-172000,75600,-128500,76400"
-st "SIGNAL dwrite_enable          : std_logic                                    := '1'"
+st "SIGNAL dwrite_enable          : std_logic                                    := '1'
+"
 )
 )
@@ -10520 +10600 @@
 )
 xt "-172000,74800,-128500,75600"
-st "SIGNAL dwrite                 : std_logic                                    := '1'"
+st "SIGNAL dwrite                 : std_logic                                    := '1'
+"
 )
 )
@@ -10894 +10975 @@
 )
 xt "-172000,100400,-149500,101200"
-st "SIGNAL wiz_ack                : std_logic"
+st "SIGNAL wiz_ack                : std_logic
+"
 )
 )
@@ -11277 +11359 @@
 )
 xt "-172000,89200,-149500,90000"
-st "SIGNAL sclk1                  : std_logic"
+st "SIGNAL sclk1                  : std_logic
+"
 )
 )
@@ -11294 +11377 @@
 )
 xt "-172000,90000,-149500,90800"
-st "SIGNAL sclk_enable            : std_logic"
+st "SIGNAL sclk_enable            : std_logic
+"
 )
 )
@@ -11312 +11396 @@
 )
 xt "-172000,18400,-132000,19200"
-st "adc_clk_en             : std_logic                                    := '0'"
+st "adc_clk_en             : std_logic                                    := '0'
+"
 )
 )
@@ -11766 +11851 @@
 )
 xt "-172000,78000,-113000,78800"
-st "SIGNAL ps_direction           : std_logic                                    := '1' -- default phase shift upwards"
+st "SIGNAL ps_direction           : std_logic                                    := '1' -- default phase shift upwards
+"
 )
 )
@@ -11787 +11873 @@
 )
 xt "-172000,78800,-112000,79600"
-st "SIGNAL ps_do_phase_shift      : std_logic                                    := '0' --pulse this to phase shift once"
+st "SIGNAL ps_do_phase_shift      : std_logic                                    := '0' --pulse this to phase shift once
+"
 )
 )
@@ -11807 +11894 @@
 )
 xt "-172000,79600,-104500,80400"
-st "SIGNAL ps_reset               : std_logic                                    := '0' -- pulse this to reset the variable phase shift"
+st "SIGNAL ps_reset               : std_logic                                    := '0' -- pulse this to reset the variable phase shift
+"
 )
 )
@@ -11825 +11913 @@
 )
 xt "-172000,94000,-128500,94800"
-st "SIGNAL srclk_enable           : std_logic                                    := '0'"
+st "SIGNAL srclk_enable           : std_logic                                    := '0'
+"
 )
 )
@@ -12209 +12298 @@
 )
 xt "-172000,40400,-128500,41200"
-st "SIGNAL SRCLK1                 : std_logic                                    := '0'"
+st "SIGNAL SRCLK1                 : std_logic                                    := '0'
+"
 )
 )
@@ -12231 +12321 @@
 xt "-172000,51600,-128500,53200"
 st "-- --
-SIGNAL config_rw_ack          : std_logic                                    := '0'"
+SIGNAL config_rw_ack          : std_logic                                    := '0'
+"
 )
 )
@@ -12253 +12344 @@
 xt "-172000,53200,-128500,54800"
 st "-- --
-SIGNAL config_rw_ready        : std_logic                                    := '0'"
+SIGNAL config_rw_ready        : std_logic                                    := '0'
+"
 )
 )
@@ -12270 +12362 @@
 )
 xt "-172000,87600,-149500,88400"
-st "SIGNAL s_trigger              : std_logic"
+st "SIGNAL s_trigger              : std_logic
+"
 )
 )
@@ -12287 +12380 @@
 )
 xt "-172000,96400,-149500,97200"
-st "SIGNAL start_srin_write_8b    : std_logic"
+st "SIGNAL start_srin_write_8b    : std_logic
+"
 )
 )
@@ -12305 +12399 @@
 )
 xt "-172000,94800,-128500,95600"
-st "SIGNAL srin_write_ack         : std_logic                                    := '0'"
+st "SIGNAL srin_write_ack         : std_logic                                    := '0'
+"
 )
 )
@@ -12323 +12418 @@
 )
 xt "-172000,95600,-128500,96400"
-st "SIGNAL srin_write_ready       : std_logic                                    := '0'"
+st "SIGNAL srin_write_ready       : std_logic                                    := '0'
+"
 )
 )
@@ -12342 +12438 @@
 )
 xt "-172000,74000,-122500,74800"
-st "SIGNAL drs_srin_data          : std_logic_vector(7 downto 0)                 := (others => '0')"
+st "SIGNAL drs_srin_data          : std_logic_vector(7 downto 0)                 := (others => '0')
+"
 )
 )
@@ -12360 +12457 @@
 )
 xt "-172000,17600,-132000,18400"
-st "SRIN_out               : std_logic                                    := '0'"
+st "SRIN_out               : std_logic                                    := '0'
+"
 )
 )
@@ -12863 +12961 @@
 )
 *431 (Net
-uid 10449,0
-decl (Decl
-n "trigger_out"
-t "std_logic"
-preAdd 0
-posAdd 0
-o 120
-suid 240,0
-)
-declText (MLText
-uid 10450,0
-va (VaSet
-font "Courier New,8,0"
-)
-xt "-172000,99600,-149500,100400"
-st "SIGNAL trigger_out            : std_logic"
-)
-)
-*432 (Net
 uid 10465,0
 lang 2
@@ -12901 +12980 @@
 xt "-172000,84400,-128500,86000"
 st "-- --
-SIGNAL ram_write_ready_ack    : std_logic                                    := '0'"
-)
-)
-*433 (Net
+SIGNAL ram_write_ready_ack    : std_logic                                    := '0'
+"
+)
+)
+*432 (Net
 uid 10627,0
 decl (Decl
@@ -12918 +12998 @@
 )
 xt "-172000,92400,-149500,93200"
-st "SIGNAL socks_connected        : std_logic"
-)
-)
-*434 (Net
+st "SIGNAL socks_connected        : std_logic
+"
+)
+)
+*433 (Net
 uid 10635,0
 decl (Decl
@@ -12935 +13016 @@
 )
 xt "-172000,93200,-149500,94000"
-st "SIGNAL socks_waiting          : std_logic"
-)
-)
-*435 (Net
+st "SIGNAL socks_waiting          : std_logic
+"
+)
+)
+*434 (Net
 uid 10721,0
 decl (Decl
@@ -12952 +13034 @@
 )
 xt "-172000,27200,-153500,28000"
-st "green                  : std_logic"
-)
-)
-*436 (PortIoOut
+st "green                  : std_logic
+"
+)
+)
+*435 (PortIoOut
 uid 10729,0
 shape (CompositeShape
@@ -12999 +13082 @@
 )
 )
-*437 (Net
+*436 (Net
 uid 10735,0
 decl (Decl
@@ -13013 +13096 @@
 )
 xt "-172000,22400,-153500,23200"
-st "amber                  : std_logic"
-)
-)
-*438 (PortIoOut
+st "amber                  : std_logic
+"
+)
+)
+*437 (PortIoOut
 uid 10743,0
 shape (CompositeShape
@@ -13060 +13144 @@
 )
 )
-*439 (Net
+*438 (Net
 uid 10749,0
 decl (Decl
@@ -13074 +13158 @@
 )
 xt "-172000,29600,-153500,30400"
-st "red                    : std_logic"
-)
-)
-*440 (PortIoOut
+st "red                    : std_logic
+"
+)
+)
+*439 (PortIoOut
 uid 10757,0
 shape (CompositeShape
@@ -13121 +13206 @@
 )
 )
-*441 (SaComponent
+*440 (SaComponent
 uid 11209,0
 optionalChildren [
-*442 (CptPort
+*441 (CptPort
 uid 11181,0
 ps "OnEdgeStrategy"
@@ -13157 +13242 @@
 )
 )
-*443 (CptPort
+*442 (CptPort
 uid 11185,0
 ps "OnEdgeStrategy"
@@ -13192 +13277 @@
 )
 )
-*444 (CptPort
+*443 (CptPort
 uid 11189,0
 ps "OnEdgeStrategy"
@@ -13227 +13312 @@
 )
 )
-*445 (CptPort
+*444 (CptPort
 uid 11193,0
 ps "OnEdgeStrategy"
@@ -13262 +13347 @@
 )
 )
-*446 (CptPort
+*445 (CptPort
 uid 11197,0
 ps "OnEdgeStrategy"
@@ -13295 +13380 @@
 )
 )
-*447 (CptPort
+*446 (CptPort
 uid 11201,0
 ps "OnEdgeStrategy"
@@ -13328 +13413 @@
 )
 )
-*448 (CptPort
+*447 (CptPort
 uid 11205,0
 ps "OnEdgeStrategy"
@@ -13361 +13446 @@
 )
 )
-*449 (CptPort
+*448 (CptPort
 uid 12693,0
 ps "OnEdgeStrategy"
@@ -13413 +13498 @@
 stg "VerticalLayoutStrategy"
 textVec [
-*450 (Text
+*449 (Text
 uid 11212,0
 va (VaSet
@@ -13423 +13508 @@
 tm "BdLibraryNameMgr"
 )
-*451 (Text
+*450 (Text
 uid 11213,0
 va (VaSet
@@ -13433 +13518 @@
 tm "CptNameMgr"
 )
-*452 (Text
+*451 (Text
 uid 11214,0
 va (VaSet
@@ -13500 +13585 @@
 archFileType "UNKNOWN"
 )
-*453 (Net
+*452 (Net
 uid 11403,0
 decl (Decl
@@ -13514 +13599 @@
 )
 xt "-172000,72400,-149500,73200"
-st "SIGNAL drs_readout_started    : std_logic"
-)
-)
-*454 (Net
+st "SIGNAL drs_readout_started    : std_logic
+"
+)
+)
+*453 (Net
 uid 11856,0
 decl (Decl
@@ -13531 +13617 @@
 )
 xt "-172000,98000,-149500,98800"
-st "SIGNAL trigger_enable         : std_logic"
-)
-)
-*455 (MWC
+st "SIGNAL trigger_enable         : std_logic
+"
+)
+)
+*454 (MWC
 uid 12295,0
 optionalChildren [
-*456 (CptPort
+*455 (CptPort
 uid 12267,0
 optionalChildren [
-*457 (Line
+*456 (Line
 uid 12271,0
 layer 5
@@ -13553 +13640 @@
 ]
 )
-*458 (Property
+*457 (Property
 uid 12272,0
 pclass "_MW_GEOM_"
@@ -13600 +13687 @@
 )
 )
-*459 (CptPort
+*458 (CptPort
 uid 12273,0
 optionalChildren [
-*460 (Line
+*459 (Line
 uid 12277,0
 layer 5
@@ -13655 +13742 @@
 )
 )
-*461 (CptPort
+*460 (CptPort
 uid 12278,0
 optionalChildren [
-*462 (Line
+*461 (Line
 uid 12282,0
 layer 5
@@ -13708 +13795 @@
 )
 )
-*463 (CommentGraphic
+*462 (CommentGraphic
 uid 12283,0
 optionalChildren [
-*464 (Property
+*463 (Property
 uid 12285,0
 pclass "_MW_GEOM_"
@@ -13735 +13822 @@
 oxt "7000,10000,7000,10000"
 )
-*465 (CommentGraphic
+*464 (CommentGraphic
 uid 12286,0
 optionalChildren [
-*466 (Property
+*465 (Property
 uid 12288,0
 pclass "_MW_GEOM_"
@@ -13762 +13849 @@
 oxt "7000,6000,7000,6000"
 )
-*467 (Grouping
+*466 (Grouping
 uid 12289,0
 optionalChildren [
-*468 (CommentGraphic
+*467 (CommentGraphic
 uid 12291,0
 shape (PolyLine2D
@@ -13786 +13873 @@
 oxt "7000,6000,9000,10000"
 )
-*469 (CommentGraphic
+*468 (CommentGraphic
 uid 12293,0
 shape (Arc2D
@@ -13839 +13926 @@
 stg "VerticalLayoutStrategy"
 textVec [
-*470 (Text
+*469 (Text
 uid 12298,0
 va (VaSet
@@ -13849 +13936 @@
 blo "-80500,73300"
 )
-*471 (Text
+*470 (Text
 uid 12299,0
 va (VaSet
@@ -13858 +13945 @@
 blo "-80500,74300"
 )
-*472 (Text
+*471 (Text
 uid 12300,0
 va (VaSet
@@ -13903 +13990 @@
 )
 )
-*473 (Net
+*472 (Net
 uid 12304,0
 decl (Decl
@@ -13919 +14006 @@
 )
 xt "-172000,65200,-149500,66000"
-st "SIGNAL dout                   : std_logic"
-)
-)
-*474 (SaComponent
+st "SIGNAL dout                   : std_logic
+"
+)
+)
+*473 (SaComponent
 uid 12625,0
 optionalChildren [
-*475 (CptPort
+*474 (CptPort
 uid 12605,0
 ps "OnEdgeStrategy"
@@ -13958 +14046 @@
 )
 )
-*476 (CptPort
+*475 (CptPort
 uid 12609,0
 ps "OnEdgeStrategy"
@@ -13994 +14082 @@
 )
 )
-*477 (CptPort
+*476 (CptPort
 uid 12613,0
 ps "OnEdgeStrategy"
@@ -14029 +14117 @@
 )
 )
-*478 (CptPort
+*477 (CptPort
 uid 12617,0
 ps "OnEdgeStrategy"
@@ -14063 +14151 @@
 )
 )
-*479 (CptPort
+*478 (CptPort
 uid 12621,0
 ps "OnEdgeStrategy"
@@ -14099 +14187 @@
 )
 )
-*480 (CptPort
+*479 (CptPort
 uid 12673,0
 ps "OnEdgeStrategy"
@@ -14149 +14237 @@
 stg "VerticalLayoutStrategy"
 textVec [
-*481 (Text
+*480 (Text
 uid 12628,0
 va (VaSet
@@ -14159 +14247 @@
 tm "BdLibraryNameMgr"
 )
-*482 (Text
+*481 (Text
 uid 12629,0
 va (VaSet
@@ -14169 +14257 @@
 tm "CptNameMgr"
 )
-*483 (Text
+*482 (Text
 uid 12630,0
 va (VaSet
@@ -14216 +14304 @@
 archFileType "UNKNOWN"
 )
-*484 (Net
+*483 (Net
 uid 12641,0
 decl (Decl
@@ -14232 +14320 @@
 )
 xt "-172000,66000,-149500,66800"
-st "SIGNAL dout1                  : std_logic"
-)
-)
-*485 (Net
+st "SIGNAL dout1                  : std_logic
+"
+)
+)
+*484 (Net
 uid 12647,0
 decl (Decl
@@ -14256 +14345 @@
 st "-- --
 --      drs_dwrite : out std_logic := '1';
-SIGNAL drs_readout_ready      : std_logic                                    := '0'"
-)
-)
-*486 (Net
+SIGNAL drs_readout_ready      : std_logic                                    := '0'
+"
+)
+)
+*485 (Net
 uid 12653,0
 decl (Decl
@@ -14273 +14363 @@
 )
 xt "-172000,71600,-149500,72400"
-st "SIGNAL drs_readout_ready_ack  : std_logic"
-)
-)
-*487 (Net
+st "SIGNAL drs_readout_ready_ack  : std_logic
+"
+)
+)
+*486 (Net
 uid 12705,0
 decl (Decl
@@ -14290 +14381 @@
 )
 xt "-172000,20000,-153500,20800"
-st "additional_flasher_out : std_logic"
-)
-)
-*488 (PortIoOut
+st "additional_flasher_out : std_logic
+"
+)
+)
+*487 (PortIoOut
 uid 12713,0
 shape (CompositeShape
@@ -14337 +14429 @@
 )
 )
-*489 (SaComponent
+*488 (SaComponent
 uid 13117,0
 optionalChildren [
-*490 (CptPort
+*489 (CptPort
 uid 13101,0
 ps "OnEdgeStrategy"
@@ -14350 +14442 @@
 fg "0,65535,0"
 )
-xt "63000,61625,63750,62375"
+xt "72000,61625,72750,62375"
 )
 tg (CPTG
@@ -14360 +14452 @@
 va (VaSet
 )
-xt "60100,61500,62000,62500"
+xt "69100,61500,71000,62500"
 st "CLK"
 ju 2
-blo "62000,62300"
+blo "71000,62300"
 )
 )
@@ -14374 +14466 @@
 )
 )
-*491 (CptPort
+*490 (CptPort
 uid 13105,0
 ps "OnEdgeStrategy"
@@ -14384 +14476 @@
 fg "0,65535,0"
 )
-xt "63000,62625,63750,63375"
+xt "72000,62625,72750,63375"
 )
 tg (CPTG
@@ -14394 +14486 @@
 va (VaSet
 )
-xt "59400,62500,62000,63500"
+xt "68400,62500,71000,63500"
 st "enable"
 ju 2
-blo "62000,63300"
+blo "71000,63300"
 )
 )
@@ -14408 +14500 @@
 )
 )
-*492 (CptPort
+*491 (CptPort
 uid 13109,0
 ps "OnEdgeStrategy"
@@ -14418 +14510 @@
 fg "0,65535,0"
 )
-xt "63000,63625,63750,64375"
+xt "72000,63625,72750,64375"
 )
 tg (CPTG
@@ -14428 +14520 @@
 va (VaSet
 )
-xt "55900,63500,62000,64500"
+xt "64900,63500,71000,64500"
 st "multiplier : (7:0)"
 ju 2
-blo "62000,64300"
+blo "71000,64300"
 )
 )
@@ -14443 +14535 @@
 )
 )
-*493 (CptPort
+*492 (CptPort
 uid 13113,0
 ps "OnEdgeStrategy"
@@ -14453 +14545 @@
 fg "0,65535,0"
 )
-xt "50250,61625,51000,62375"
+xt "59250,61625,60000,62375"
 )
 tg (CPTG
@@ -14463 +14555 @@
 va (VaSet
 )
-xt "52000,61500,54800,62500"
+xt "61000,61500,63800,62500"
 st "trigger"
-blo "52000,62300"
+blo "61000,62300"
 )
 )
@@ -14486 +14578 @@
 lineWidth 2
 )
-xt "51000,61000,63000,65000"
+xt "60000,61000,72000,65000"
 )
 oxt "0,0,8000,10000"
@@ -14494 +14586 @@
 stg "VerticalLayoutStrategy"
 textVec [
+*493 (Text
+uid 13120,0
+va (VaSet
+font "Arial,8,1"
+)
+xt "62350,65000,68550,66000"
+st "FACT_FAD_lib"
+blo "62350,65800"
+tm "BdLibraryNameMgr"
+)
 *494 (Text
-uid 13120,0
+uid 13121,0
 va (VaSet
 font "Arial,8,1"
 )
-xt "53350,65000,59550,66000"
-st "FACT_FAD_lib"
-blo "53350,65800"
-tm "BdLibraryNameMgr"
+xt "62350,66000,69650,67000"
+st "continous_pulser"
+blo "62350,66800"
+tm "CptNameMgr"
 )
 *495 (Text
-uid 13121,0
+uid 13122,0
 va (VaSet
 font "Arial,8,1"
 )
-xt "53350,66000,60650,67000"
-st "continous_pulser"
-blo "53350,66800"
-tm "CptNameMgr"
-)
-*496 (Text
-uid 13122,0
-va (VaSet
-font "Arial,8,1"
-)
-xt "53350,67000,55150,68000"
+xt "62350,67000,64150,68000"
 st "U_3"
-blo "53350,67800"
+blo "62350,67800"
 tm "InstanceNameMgr"
 )
@@ -14536 +14628 @@
 font "Courier New,8,0"
 )
-xt "44000,60200,71500,61000"
+xt "53000,60200,80500,61000"
 st "MINIMAL_TRIGGER_WAIT_TIME = 250000    ( integer )  "
 )
@@ -14556 +14648 @@
 fg "49152,49152,49152"
 )
-xt "51250,63250,52750,64750"
+xt "60250,63250,61750,64750"
 iconName "VhdlFileViewIcon.png"
 iconMaskName "VhdlFileViewIcon.msk"
@@ -14567 +14659 @@
 archFileType "UNKNOWN"
 )
-*497 (Net
+*496 (Net
 uid 13157,0
 decl (Decl
@@ -14582 +14674 @@
 )
 xt "-172000,43600,-128500,44400"
-st "SIGNAL c_trigger_enable       : std_logic                                    := '0'"
-)
-)
-*498 (Net
+st "SIGNAL c_trigger_enable       : std_logic                                    := '0'
+"
+)
+)
+*497 (Net
 uid 13163,0
 decl (Decl
@@ -14603 +14696 @@
 )
 xt "-172000,44400,-112000,45200"
-st "SIGNAL c_trigger_mult         : std_logic_vector(7 DOWNTO 0)                 := (OTHERS => '1') --subject to changes"
-)
-)
-*499 (Net
+st "SIGNAL c_trigger_mult         : std_logic_vector(7 DOWNTO 0)                 := (OTHERS => '1') --subject to changes
+"
+)
+)
+*498 (Net
 uid 13206,0
 decl (Decl
@@ -14620 +14714 @@
 )
 xt "-172000,88400,-149500,89200"
-st "SIGNAL s_trigger_0            : std_logic"
-)
-)
-*500 (Net
+st "SIGNAL s_trigger_0            : std_logic
+"
+)
+)
+*499 (Net
 uid 13208,0
 decl (Decl
@@ -14637 +14732 @@
 )
 xt "-172000,97200,-149500,98000"
-st "SIGNAL trigger1               : std_logic"
-)
-)
-*501 (MWC
+st "SIGNAL trigger1               : std_logic
+"
+)
+)
+*500 (MWC
 uid 13266,0
 optionalChildren [
-*502 (CptPort
+*501 (CptPort
 uid 13230,0
 optionalChildren [
-*503 (Line
+*502 (Line
 uid 13234,0
 layer 5
@@ -14653 +14749 @@
 vasetType 3
 )
-xt "40408,62000,42000,62000"
-pts [
-"42000,62000"
-"40408,62000"
+xt "52408,62000,54000,62000"
+pts [
+"54000,62000"
+"52408,62000"
 ]
 )
@@ -14669 +14765 @@
 fg "0,65535,65535"
 )
-xt "42000,61625,42750,62375"
+xt "54000,61625,54750,62375"
 )
 tg (CPTG
@@ -14682 +14778 @@
 font "arial,8,0"
 )
-xt "205750,61700,207550,62700"
+xt "217750,61700,219550,62700"
 st "din1"
 ju 2
-blo "207550,62500"
+blo "219550,62500"
 )
 )
@@ -14697 +14793 @@
 )
 )
-*504 (CptPort
+*503 (CptPort
 uid 13235,0
 optionalChildren [
-*505 (Property
+*504 (Property
 uid 13239,0
 pclass "_MW_GEOM_"
@@ -14706 +14802 @@
 ptn "String"
 )
-*506 (Line
+*505 (Line
 uid 13240,0
 layer 5
@@ -14713 +14809 @@
 vasetType 3
 )
-xt "36000,61000,37000,61000"
-pts [
-"36000,61000"
-"37000,61000"
+xt "48000,61000,49000,61000"
+pts [
+"48000,61000"
+"49000,61000"
 ]
 )
@@ -14729 +14825 @@
 fg "0,65535,65535"
 )
-xt "35250,60625,36000,61375"
+xt "47250,60625,48000,61375"
 )
 tg (CPTG
@@ -14742 +14838 @@
 font "arial,8,0"
 )
-xt "202500,60532,204300,61532"
+xt "214500,60532,216300,61532"
 st "dout"
-blo "202500,61332"
+blo "214500,61332"
 )
 )
@@ -14757 +14853 @@
 )
 )
-*507 (CptPort
+*506 (CptPort
 uid 13241,0
 optionalChildren [
-*508 (Line
+*507 (Line
 uid 13245,0
 layer 5
@@ -14767 +14863 @@
 vasetType 3
 )
-xt "40408,60000,42000,60000"
-pts [
-"42000,60000"
-"40408,60000"
+xt "52408,60000,54000,60000"
+pts [
+"54000,60000"
+"52408,60000"
 ]
 )
@@ -14783 +14879 @@
 fg "0,65535,65535"
 )
-xt "42000,59625,42750,60375"
+xt "54000,59625,54750,60375"
 )
 tg (CPTG
@@ -14796 +14892 @@
 font "arial,8,0"
 )
-xt "205635,59294,207435,60294"
+xt "217635,59294,219435,60294"
 st "din0"
 ju 2
-blo "207435,60094"
+blo "219435,60094"
 )
 )
@@ -14811 +14907 @@
 )
 )
-*509 (CommentGraphic
+*508 (CommentGraphic
 uid 13246,0
 shape (Arc2D
 pts [
-"37000,61000"
-"38737,59521"
-"41000,59004"
+"49000,61000"
+"50737,59521"
+"53000,59004"
 ]
 uid 13247,0
@@ -14828 +14924 @@
 lineColor "26368,26368,26368"
 )
-xt "37000,59003,41000,61000"
+xt "49000,59003,53000,61000"
 )
 oxt "7000,6003,11000,8000"
 )
-*510 (CommentGraphic
+*509 (CommentGraphic
 uid 13248,0
 shape (Arc2D
 pts [
-"41004,62998"
-"38551,62394"
-"37000,61005"
+"53004,62998"
+"50551,62394"
+"49000,61005"
 ]
 uid 13249,0
@@ -14849 +14945 @@
 lineColor "26368,26368,26368"
 )
-xt "37000,61005,41004,62999"
+xt "49000,61005,53004,62999"
 )
 oxt "7000,8005,11004,10000"
 )
-*511 (Grouping
+*510 (Grouping
 uid 13250,0
 optionalChildren [
-*512 (CommentGraphic
+*511 (CommentGraphic
 uid 13252,0
 optionalChildren [
-*513 (Property
+*512 (Property
 uid 13254,0
 pclass "_MW_GEOM_"
@@ -14868 +14964 @@
 shape (CustomPolygon
 pts [
-"41000,62998"
-"38952,62132"
-"37000,61000"
-"38048,60156"
-"39817,59211"
-"41000,59000"
-"41000,62998"
+"53000,62998"
+"50952,62132"
+"49000,61000"
+"50048,60156"
+"51817,59211"
+"53000,59000"
+"53000,62998"
 ]
 uid 13253,0
@@ -14886 +14982 @@
 fillStyle 1
 )
-xt "37000,59000,41000,62998"
+xt "49000,59000,53000,62998"
 )
 oxt "7000,6000,11000,9998"
 )
-*514 (CommentGraphic
+*513 (CommentGraphic
 uid 13255,0
 optionalChildren [
-*515 (Property
+*514 (Property
 uid 13257,0
 pclass "_MW_GEOM_"
@@ -14902 +14998 @@
 shape (Arc2D
 pts [
-"41000,63000"
-"40237,61001"
-"41000,59000"
+"53000,63000"
+"52237,61001"
+"53000,59000"
 ]
 uid 13256,0
@@ -14917 +15013 @@
 fillStyle 1
 )
-xt "40236,59000,41000,63000"
+xt "52236,59000,53000,63000"
 )
 oxt "10238,6000,11000,10000"
@@ -14931 +15027 @@
 lineWidth 2
 )
-xt "37000,59000,41000,63000"
+xt "49000,59000,53000,63000"
 )
 oxt "7000,6000,11000,10000"
 )
-*516 (CommentGraphic
+*515 (CommentGraphic
 uid 13258,0
 shape (PolyLine2D
 pts [
-"37000,61000"
-"37000,61000"
+"49000,61000"
+"49000,61000"
 ]
 uid 13259,0
@@ -14950 +15046 @@
 fg "49152,49152,49152"
 )
-xt "37000,61000,37000,61000"
+xt "49000,61000,49000,61000"
 )
 oxt "7000,8000,7000,8000"
 )
-*517 (CommentGraphic
+*516 (CommentGraphic
 uid 13260,0
 optionalChildren [
-*518 (Property
+*517 (Property
 uid 13262,0
 pclass "_MW_GEOM_"
@@ -14966 +15062 @@
 shape (PolyLine2D
 pts [
-"41000,59000"
-"41000,59000"
+"53000,59000"
+"53000,59000"
 ]
 uid 13261,0
@@ -14977 +15073 @@
 fg "49152,49152,49152"
 )
-xt "41000,59000,41000,59000"
+xt "53000,59000,53000,59000"
 )
 oxt "11000,6000,11000,6000"
 )
-*519 (CommentGraphic
+*518 (CommentGraphic
 uid 13263,0
 optionalChildren [
-*520 (Property
+*519 (Property
 uid 13265,0
 pclass "_MW_GEOM_"
@@ -14993 +15089 @@
 shape (PolyLine2D
 pts [
-"41000,63000"
-"41000,63000"
+"53000,63000"
+"53000,63000"
 ]
 uid 13264,0
@@ -15004 +15100 @@
 fg "49152,49152,49152"
 )
-xt "41000,63000,41000,63000"
+xt "53000,63000,53000,63000"
 )
 oxt "11000,10000,11000,10000"
@@ -15017 +15113 @@
 lineWidth -1
 )
-xt "36000,59000,42000,63000"
+xt "48000,59000,54000,63000"
 fos 1
 )
@@ -15027 +15123 @@
 stg "VerticalLayoutStrategy"
 textVec [
-*521 (Text
+*520 (Text
 uid 13269,0
 va (VaSet
@@ -15033 +15129 @@
 font "arial,8,0"
 )
-xt "37500,61500,42300,62500"
+xt "49500,61500,54300,62500"
 st "moduleware"
-blo "37500,62300"
+blo "49500,62300"
+)
+*521 (Text
+uid 13270,0
+va (VaSet
+font "arial,8,0"
+)
+xt "49500,62500,50600,63500"
+st "or"
+blo "49500,63300"
 )
 *522 (Text
-uid 13270,0
+uid 13271,0
 va (VaSet
 font "arial,8,0"
 )
-xt "37500,62500,38600,63500"
-st "or"
-blo "37500,63300"
-)
-*523 (Text
-uid 13271,0
-va (VaSet
-font "arial,8,0"
-)
-xt "37500,63500,39700,64500"
+xt "49500,63500,51700,64500"
 st "U_13"
-blo "37500,64300"
+blo "49500,64300"
 tm "InstanceNameMgr"
 )
@@ -15068 +15164 @@
 font "arial,8,0"
 )
-xt "21000,50000,21000,50000"
+xt "33000,50000,33000,50000"
 )
 header ""
@@ -15091 +15187 @@
 )
 )
-*524 (PortIoIn
+*523 (PortIoIn
 uid 13689,0
 shape (CompositeShape
@@ -15136 +15232 @@
 )
 )
-*525 (Net
+*524 (Net
 uid 13701,0
 decl (Decl
@@ -15151 +15247 @@
 )
 xt "-172000,4000,-143500,4800"
-st "D_T_in                 : std_logic_vector(1 DOWNTO 0)"
-)
-)
-*526 (PortIoIn
+st "D_T_in                 : std_logic_vector(1 DOWNTO 0)
+"
+)
+)
+*525 (PortIoIn
 uid 14042,0
 shape (CompositeShape
@@ -15199 +15296 @@
 )
 )
-*527 (Net
+*526 (Net
 uid 14054,0
 decl (Decl
@@ -15214 +15311 @@
 )
 xt "-172000,11200,-121500,12000"
-st "drs_refclk_in          : std_logic -- used to check if DRS REFCLK exsists, if not DENABLE inhibit"
-)
-)
-*528 (PortIoIn
+st "drs_refclk_in          : std_logic -- used to check if DRS REFCLK exsists, if not DENABLE inhibit
+"
+)
+)
+*527 (PortIoIn
 uid 14165,0
 shape (CompositeShape
@@ -15262 +15360 @@
 )
 )
-*529 (Net
+*528 (Net
 uid 14177,0
 decl (Decl
@@ -15278 +15376 @@
 )
 xt "-172000,12000,-114000,12800"
-st "plllock_in             : std_logic_vector(3 DOWNTO 0) -- high level, if dominowave is running and DRS PLL locked"
-)
-)
-*530 (SaComponent
+st "plllock_in             : std_logic_vector(3 DOWNTO 0) -- high level, if dominowave is running and DRS PLL locked
+"
+)
+)
+*529 (SaComponent
 uid 14417,0
 optionalChildren [
-*531 (CptPort
+*530 (CptPort
 uid 14397,0
 ps "OnEdgeStrategy"
@@ -15317 +15416 @@
 )
 )
-*532 (CptPort
+*531 (CptPort
 uid 14401,0
 ps "OnEdgeStrategy"
@@ -15350 +15449 @@
 )
 )
-*533 (CptPort
+*532 (CptPort
 uid 14405,0
 ps "OnEdgeStrategy"
@@ -15387 +15486 @@
 )
 )
-*534 (CptPort
+*533 (CptPort
 uid 14409,0
 ps "OnEdgeStrategy"
@@ -15423 +15522 @@
 )
 )
-*535 (CptPort
+*534 (CptPort
 uid 14413,0
 ps "OnEdgeStrategy"
@@ -15476 +15575 @@
 stg "VerticalLayoutStrategy"
 textVec [
-*536 (Text
+*535 (Text
 uid 14420,0
 va (VaSet
@@ -15486 +15585 @@
 tm "BdLibraryNameMgr"
 )
-*537 (Text
+*536 (Text
 uid 14421,0
 va (VaSet
@@ -15496 +15595 @@
 tm "CptNameMgr"
 )
-*538 (Text
+*537 (Text
 uid 14422,0
 va (VaSet
@@ -15544 +15643 @@
 archFileType "UNKNOWN"
 )
-*539 (Net
+*538 (Net
 uid 14477,0
 decl (Decl
@@ -15561 +15660 @@
 )
 xt "-172000,20800,-118500,21600"
-st "alarm_refclk_too_high  : std_logic                                    := '0' -- default domino wave off"
-)
-)
-*540 (PortIoOut
+st "alarm_refclk_too_high  : std_logic                                    := '0' -- default domino wave off
+"
+)
+)
+*539 (PortIoOut
 uid 14485,0
 shape (CompositeShape
@@ -15608 +15708 @@
 )
 )
-*541 (Net
+*540 (Net
 uid 14491,0
 decl (Decl
@@ -15625 +15725 @@
 )
 xt "-172000,21600,-118500,22400"
-st "alarm_refclk_too_low   : std_logic                                    := '0' -- default domino wave off"
-)
-)
-*542 (PortIoOut
+st "alarm_refclk_too_low   : std_logic                                    := '0' -- default domino wave off
+"
+)
+)
+*541 (PortIoOut
 uid 14499,0
 shape (CompositeShape
@@ -15672 +15773 @@
 )
 )
-*543 (Net
+*542 (Net
 uid 14620,0
 decl (Decl
@@ -15688 +15789 @@
 )
 xt "-172000,23200,-126000,24000"
-st "counter_result         : std_logic_vector(11 downto 0)                := (others => '0')"
-)
-)
-*544 (PortIoOut
+st "counter_result         : std_logic_vector(11 downto 0)                := (others => '0')
+"
+)
+)
+*543 (PortIoOut
 uid 14628,0
 shape (CompositeShape
@@ -15735 +15837 @@
 )
 )
-*545 (MWC
+*544 (MWC
 uid 14991,0
 optionalChildren [
-*546 (CptPort
+*545 (CptPort
 uid 14963,0
 optionalChildren [
-*547 (Line
+*546 (Line
 uid 14967,0
 layer 5
@@ -15754 +15856 @@
 ]
 )
-*548 (Property
+*547 (Property
 uid 14968,0
 pclass "_MW_GEOM_"
@@ -15802 +15904 @@
 )
 )
-*549 (CptPort
+*548 (CptPort
 uid 14969,0
 optionalChildren [
-*550 (Line
+*549 (Line
 uid 14973,0
 layer 5
@@ -15858 +15960 @@
 )
 )
-*551 (CptPort
+*550 (CptPort
 uid 14974,0
 optionalChildren [
-*552 (Line
+*551 (Line
 uid 14978,0
 layer 5
@@ -15914 +16016 @@
 )
 )
-*553 (CommentGraphic
+*552 (CommentGraphic
 uid 14979,0
 optionalChildren [
-*554 (Property
+*553 (Property
 uid 14981,0
 pclass "_MW_GEOM_"
@@ -15941 +16043 @@
 oxt "7000,10000,7000,10000"
 )
-*555 (CommentGraphic
+*554 (CommentGraphic
 uid 14982,0
 optionalChildren [
-*556 (Property
+*555 (Property
 uid 14984,0
 pclass "_MW_GEOM_"
@@ -15968 +16070 @@
 oxt "7000,6000,7000,6000"
 )
-*557 (Grouping
+*556 (Grouping
 uid 14985,0
 optionalChildren [
-*558 (CommentGraphic
+*557 (CommentGraphic
 uid 14987,0
 shape (PolyLine2D
@@ -15992 +16094 @@
 oxt "7000,6000,9000,10000"
 )
-*559 (CommentGraphic
+*558 (CommentGraphic
 uid 14989,0
 shape (Arc2D
@@ -16045 +16147 @@
 stg "VerticalLayoutStrategy"
 textVec [
-*560 (Text
+*559 (Text
 uid 14994,0
 va (VaSet
@@ -16055 +16157 @@
 blo "162500,76300"
 )
-*561 (Text
+*560 (Text
 uid 14995,0
 va (VaSet
@@ -16064 +16166 @@
 blo "162500,77300"
 )
-*562 (Text
+*561 (Text
 uid 14996,0
 va (VaSet
@@ -16109 +16211 @@
 )
 )
-*563 (MWC
+*562 (MWC
 uid 15036,0
 optionalChildren [
-*564 (CptPort
+*563 (CptPort
 uid 15005,0
 optionalChildren [
-*565 (Property
+*564 (Property
 uid 15009,0
 pclass "_MW_GEOM_"
@@ -16121 +16223 @@
 ptn "String"
 )
-*566 (Line
+*565 (Line
 uid 15010,0
 layer 5
@@ -16176 +16278 @@
 )
 )
-*567 (CommentGraphic
+*566 (CommentGraphic
 uid 15016,0
 shape (Arc2D
@@ -16198 +16300 @@
 oxt "110003,265000,112000,269000"
 )
-*568 (CommentGraphic
+*567 (CommentGraphic
 uid 15018,0
 shape (Arc2D
@@ -16220 +16322 @@
 oxt "112005,265000,114000,269004"
 )
-*569 (Grouping
+*568 (Grouping
 uid 15020,0
 optionalChildren [
-*570 (CommentGraphic
+*569 (CommentGraphic
 uid 15022,0
 optionalChildren [
-*571 (Property
+*570 (Property
 uid 15024,0
 pclass "_MW_GEOM_"
@@ -16258 +16360 @@
 oxt "110000,265000,113998,269000"
 )
-*572 (CommentGraphic
+*571 (CommentGraphic
 uid 15025,0
 optionalChildren [
-*573 (Property
+*572 (Property
 uid 15027,0
 pclass "_MW_GEOM_"
@@ -16305 +16407 @@
 oxt "110000,265000,114000,269000"
 )
-*574 (CommentGraphic
+*573 (CommentGraphic
 uid 15028,0
 shape (PolyLine2D
@@ -16325 +16427 @@
 oxt "112000,265000,112000,265000"
 )
-*575 (CommentGraphic
+*574 (CommentGraphic
 uid 15030,0
 optionalChildren [
-*576 (Property
+*575 (Property
 uid 15032,0
 pclass "_MW_GEOM_"
@@ -16353 +16455 @@
 oxt "110000,269000,110000,269000"
 )
-*577 (CommentGraphic
+*576 (CommentGraphic
 uid 15033,0
 optionalChildren [
-*578 (Property
+*577 (Property
 uid 15035,0
 pclass "_MW_GEOM_"
@@ -16381 +16483 @@
 oxt "114000,269000,114000,269000"
 )
-*579 (CptPort
+*578 (CptPort
 uid 15160,0
 optionalChildren [
-*580 (Line
+*579 (Line
 uid 15164,0
 sl 0
@@ -16436 +16538 @@
 )
 )
-*581 (CptPort
+*580 (CptPort
 uid 15165,0
 optionalChildren [
-*582 (Line
+*581 (Line
 uid 15169,0
 sl 0
@@ -16511 +16613 @@
 stg "VerticalLayoutStrategy"
 textVec [
-*583 (Text
+*582 (Text
 uid 15039,0
 va (VaSet
@@ -16521 +16623 @@
 blo "148500,89300"
 )
-*584 (Text
+*583 (Text
 uid 15040,0
 va (VaSet
@@ -16530 +16632 @@
 blo "148500,90300"
 )
-*585 (Text
+*584 (Text
 uid 15041,0
 va (VaSet
@@ -16575 +16677 @@
 )
 )
-*586 (MWC
+*585 (MWC
 uid 15058,0
 optionalChildren [
-*587 (CptPort
+*586 (CptPort
 uid 15045,0
 optionalChildren [
-*588 (Line
+*587 (Line
 uid 15049,0
 layer 5
@@ -16643 +16745 @@
 )
 )
-*589 (CptPort
+*588 (CptPort
 uid 15050,0
 optionalChildren [
-*590 (Line
+*589 (Line
 uid 15054,0
 layer 5
@@ -16659 +16761 @@
 ]
 )
-*591 (Circle
+*590 (Circle
 uid 15055,0
 va (VaSet
@@ -16721 +16823 @@
 )
 )
-*592 (CommentGraphic
+*591 (CommentGraphic
 uid 15056,0
 shape (CustomPolygon
@@ -16763 +16865 @@
 stg "VerticalLayoutStrategy"
 textVec [
-*593 (Text
+*592 (Text
 uid 15061,0
 va (VaSet
@@ -16773 +16875 @@
 blo "155350,77900"
 )
-*594 (Text
+*593 (Text
 uid 15062,0
 va (VaSet
@@ -16782 +16884 @@
 blo "155350,78900"
 )
-*595 (Text
+*594 (Text
 uid 15063,0
 va (VaSet
@@ -16827 +16929 @@
 )
 )
-*596 (Net
+*595 (Net
 uid 15077,0
 decl (Decl
@@ -16844 +16946 @@
 )
 xt "-172000,63600,-115000,64400"
-st "SIGNAL denable_prim           : std_logic                                    := '0' -- default domino wave off"
-)
-)
-*597 (Net
+st "SIGNAL denable_prim           : std_logic                                    := '0' -- default domino wave off
+"
+)
+)
+*596 (Net
 uid 15079,0
 decl (Decl
@@ -16864 +16967 @@
 )
 xt "-172000,64400,-115000,65200"
-st "SIGNAL din1                   : std_logic                                    := '0' -- default domino wave off"
-)
-)
-*598 (Net
+st "SIGNAL din1                   : std_logic                                    := '0' -- default domino wave off
+"
+)
+)
+*597 (Net
 uid 15126,0
 decl (Decl
@@ -16884 +16988 @@
 )
 xt "-172000,62800,-115000,63600"
-st "SIGNAL denable_inhibit        : std_logic                                    := '0' -- default domino wave off"
+st "SIGNAL denable_inhibit        : std_logic                                    := '0' -- default domino wave off
+"
+)
+)
+*598 (Net
+uid 15492,0
+decl (Decl
+n "trigger_out"
+t "std_logic"
+o 123
+suid 301,0
+i "'0'"
+)
+declText (MLText
+uid 15493,0
+va (VaSet
+font "Courier New,8,0"
+)
+xt "-172000,99600,-128500,100400"
+st "SIGNAL trigger_out            : std_logic                                    := '0'
+"
 )
 )
@@ -17479 +17603 @@
 lineWidth 2
 )
-xt "-40250,68000,-21750,71000"
-pts [
-"-40250,68000"
-"-36000,68000"
-"-36000,71000"
-"-21750,71000"
+xt "-40250,69000,-21750,70000"
+pts [
+"-40250,69000"
+"-36000,69000"
+"-36000,70000"
+"-21750,70000"
 ]
 )
@@ -17518 +17642 @@
 lineWidth 2
 )
-xt "750,66000,31250,73000"
-pts [
-"31250,73000"
-"27000,73000"
-"27000,66000"
-"750,66000"
+xt "750,71000,27250,71000"
+pts [
+"27250,71000"
+"750,71000"
 ]
 )
@@ -17542 +17664 @@
 va (VaSet
 )
-xt "2000,65000,18700,66000"
+xt "1000,70000,17700,71000"
 st "ram_start_addr : (RAMADDRWIDTH64b-1:0)"
-blo "2000,65800"
+blo "1000,70800"
 tm "WireNameMgr"
 )
@@ -17557 +17679 @@
 vasetType 3
 )
-xt "63750,70000,87250,71000"
-pts [
-"63750,71000"
-"78000,71000"
-"78000,70000"
-"87250,70000"
+xt "59750,71000,87250,71000"
+pts [
+"59750,71000"
+"87250,71000"
 ]
 )
@@ -17580 +17700 @@
 va (VaSet
 )
-xt "64000,70000,67400,71000"
+xt "60000,70000,63400,71000"
 st "wiz_busy"
-blo "64000,70800"
+blo "60000,70800"
 tm "WireNameMgr"
 )
@@ -17595 +17715 @@
 vasetType 3
 )
-xt "63750,71000,87250,72000"
-pts [
-"63750,72000"
-"84000,72000"
-"84000,71000"
-"87250,71000"
+xt "59750,72000,87250,72000"
+pts [
+"59750,72000"
+"87250,72000"
 ]
 )
@@ -17618 +17736 @@
 va (VaSet
 )
-xt "64000,71000,69100,72000"
+xt "60000,71000,65100,72000"
 st "wiz_write_ea"
-blo "64000,71800"
+blo "60000,71800"
 tm "WireNameMgr"
 )
@@ -17634 +17752 @@
 lineWidth 2
 )
-xt "63750,72000,87250,79000"
-pts [
-"63750,73000"
-"67000,73000"
-"67000,79000"
-"85000,79000"
-"85000,72000"
-"87250,72000"
+xt "59750,73000,87250,73000"
+pts [
+"59750,73000"
+"87250,73000"
 ]
 )
@@ -17660 +17774 @@
 va (VaSet
 )
-xt "64000,72000,73400,73000"
+xt "60000,72000,69400,73000"
 st "wiz_write_length : (16:0)"
-blo "64000,72800"
+blo "60000,72800"
 tm "WireNameMgr"
 )
@@ -17676 +17790 @@
 lineWidth 2
 )
-xt "63750,73000,87250,74000"
-pts [
-"63750,74000"
-"84000,74000"
-"84000,73000"
-"87250,73000"
+xt "59750,74000,87250,74000"
+pts [
+"59750,74000"
+"87250,74000"
 ]
 )
@@ -17700 +17812 @@
 va (VaSet
 )
-xt "64000,73000,82800,74000"
+xt "60000,73000,78800,74000"
 st "wiz_ram_start_addr : (RAMADDRWIDTH64b+1:0)"
-blo "64000,73800"
+blo "60000,73800"
 tm "WireNameMgr"
 )
@@ -17716 +17828 @@
 lineWidth 2
 )
-xt "63750,74000,87250,80000"
-pts [
-"63750,75000"
-"66000,75000"
-"66000,80000"
-"86000,80000"
-"86000,74000"
-"87250,74000"
+xt "59750,75000,87250,75000"
+pts [
+"59750,75000"
+"87250,75000"
 ]
 )
@@ -17742 +17850 @@
 va (VaSet
 )
-xt "64000,74000,75800,75000"
+xt "60000,74000,71800,75000"
 st "wiz_number_of_channels : (3:0)"
-blo "64000,74800"
+blo "60000,74800"
 tm "WireNameMgr"
 )
@@ -17757 +17865 @@
 vasetType 3
 )
-xt "63750,75000,87250,76000"
-pts [
-"63750,76000"
-"84000,76000"
-"84000,75000"
-"87250,75000"
+xt "59750,76000,87250,76000"
+pts [
+"59750,76000"
+"87250,76000"
 ]
 )
@@ -17780 +17886 @@
 va (VaSet
 )
-xt "64000,75000,69500,76000"
+xt "60000,75000,65500,76000"
 st "wiz_write_end"
-blo "64000,75800"
+blo "60000,75800"
 tm "WireNameMgr"
 )
@@ -17795 +17901 @@
 vasetType 3
 )
-xt "63750,76000,87250,77000"
-pts [
-"63750,77000"
-"71000,77000"
-"71000,76000"
-"87250,76000"
+xt "59750,77000,87250,77000"
+pts [
+"59750,77000"
+"87250,77000"
 ]
 )
@@ -17818 +17922 @@
 va (VaSet
 )
-xt "64000,76000,70600,77000"
+xt "60000,76000,66600,77000"
 st "wiz_write_header"
-blo "64000,76800"
+blo "60000,76800"
 tm "WireNameMgr"
 )
@@ -17833 +17937 @@
 vasetType 3
 )
-xt "750,67000,31250,74000"
-pts [
-"750,67000"
-"26000,67000"
-"26000,74000"
-"31250,74000"
+xt "750,72000,27250,72000"
+pts [
+"750,72000"
+"27250,72000"
 ]
 )
@@ -17856 +17958 @@
 va (VaSet
 )
-xt "2000,66000,7300,67000"
+xt "1000,71000,6300,72000"
 st "ram_write_ea"
-blo "2000,66800"
+blo "1000,71800"
 tm "WireNameMgr"
 )
@@ -17871 +17973 @@
 vasetType 3
 )
-xt "750,68000,31250,75000"
-pts [
-"750,68000"
-"25000,68000"
-"25000,75000"
-"31250,75000"
+xt "750,73000,27250,73000"
+pts [
+"750,73000"
+"27250,73000"
 ]
 )
@@ -17894 +17994 @@
 va (VaSet
 )
-xt "2000,67000,8300,68000"
+xt "1000,72000,7300,73000"
 st "ram_write_ready"
-blo "2000,67800"
+blo "1000,72800"
 tm "WireNameMgr"
 )
@@ -17909 +18009 @@
 vasetType 3
 )
-xt "750,73000,31250,78000"
-pts [
-"750,73000"
-"23000,73000"
-"23000,78000"
-"31250,78000"
+xt "750,76000,27250,76000"
+pts [
+"750,76000"
+"27250,76000"
 ]
 )
@@ -17933 +18031 @@
 va (VaSet
 )
-xt "1000,72000,5800,73000"
+xt "1000,75000,5800,76000"
 st "config_start"
-blo "1000,72800"
+blo "1000,75800"
 tm "WireNameMgr"
 )
@@ -17948 +18046 @@
 vasetType 3
 )
-xt "750,75000,31250,80000"
-pts [
-"750,75000"
-"21000,75000"
-"21000,80000"
-"31250,80000"
+xt "750,78000,27250,78000"
+pts [
+"750,78000"
+"27250,78000"
 ]
 )
@@ -17971 +18067 @@
 va (VaSet
 )
-xt "1000,74000,6100,75000"
+xt "1000,77000,6100,78000"
 st "config_ready"
-blo "1000,74800"
+blo "1000,77800"
 tm "WireNameMgr"
 )
@@ -17986 +18082 @@
 vasetType 3
 )
-xt "750,77000,31250,81000"
-pts [
-"750,77000"
-"20000,77000"
-"20000,81000"
-"31250,81000"
+xt "750,79000,27250,79000"
+pts [
+"750,79000"
+"27250,79000"
 ]
 )
@@ -18009 +18103 @@
 va (VaSet
 )
-xt "1000,76000,4000,77000"
+xt "1000,78000,4000,79000"
 st "roi_max"
-blo "1000,76800"
+blo "1000,78800"
 tm "WireNameMgr"
 )
@@ -18025 +18119 @@
 lineWidth 2
 )
-xt "750,78000,31250,82000"
-pts [
-"750,78000"
-"19000,78000"
-"19000,82000"
-"31250,82000"
+xt "750,80000,27250,80000"
+pts [
+"750,80000"
+"27250,80000"
 ]
 )
@@ -18049 +18141 @@
 va (VaSet
 )
-xt "1000,77000,10100,78000"
+xt "1000,79000,10100,80000"
 st "package_length : (15:0)"
-blo "1000,77800"
+blo "1000,79800"
 tm "WireNameMgr"
 )
@@ -19238 +19330 @@
 vasetType 3
 )
-xt "18000,88000,31250,88000"
+xt "18000,86000,27250,88000"
 pts [
 "18000,88000"
-"31250,88000"
+"24000,88000"
+"24000,86000"
+"27250,86000"
 ]
 )
@@ -19259 +19353 @@
 va (VaSet
 )
-xt "28000,87000,31400,88000"
+xt "24000,85000,27400,86000"
 st "roi_array"
-blo "28000,87800"
+blo "24000,85800"
 tm "WireNameMgr"
 )
@@ -19531 +19625 @@
 optionalChildren [
 &651
-*672 (BdJunction
-uid 6086,0
-ps "OnConnectorStrategy"
-shape (Circle
-uid 6087,0
-va (VaSet
-vasetType 1
-)
-xt "27600,46600,28400,47400"
-radius 400
-)
-)
 ]
 shape (OrthoPolyLine
@@ -19584 +19666 @@
 on &188
 )
-*673 (Wire
+*672 (Wire
 uid 5626,0
 shape (OrthoPolyLine
@@ -19620 +19702 @@
 on &266
 )
-*674 (Wire
+*673 (Wire
 uid 5634,0
 shape (OrthoPolyLine
@@ -19658 +19740 @@
 on &265
 )
-*675 (Wire
+*674 (Wire
 uid 5646,0
 shape (OrthoPolyLine
@@ -19694 +19776 @@
 on &185
 )
-*676 (Wire
+*675 (Wire
 uid 5745,0
 shape (OrthoPolyLine
@@ -19732 +19814 @@
 on &276
 )
-*677 (Wire
+*676 (Wire
 uid 5805,0
 shape (OrthoPolyLine
@@ -19766 +19848 @@
 on &187
 )
-*678 (Wire
+*677 (Wire
 uid 5813,0
 shape (OrthoPolyLine
@@ -19804 +19886 @@
 on &293
 )
-*679 (Wire
+*678 (Wire
 uid 5821,0
 shape (OrthoPolyLine
@@ -19842 +19924 @@
 on &294
 )
-*680 (Wire
+*679 (Wire
 uid 5829,0
 shape (OrthoPolyLine
@@ -19880 +19962 @@
 on &295
 )
-*681 (Wire
+*680 (Wire
 uid 5837,0
 shape (OrthoPolyLine
@@ -19920 +20002 @@
 on &296
 )
-*682 (Wire
+*681 (Wire
 uid 5950,0
 shape (OrthoPolyLine
@@ -19958 +20040 @@
 on &301
 )
-*683 (Wire
+*682 (Wire
 uid 5962,0
 shape (OrthoPolyLine
@@ -19996 +20078 @@
 on &302
 )
-*684 (Wire
+*683 (Wire
 uid 6002,0
 shape (OrthoPolyLine
@@ -20034 +20116 @@
 on &304
 )
-*685 (Wire
+*684 (Wire
 uid 6008,0
 shape (OrthoPolyLine
@@ -20072 +20154 @@
 on &303
 )
-*686 (Wire
+*685 (Wire
 uid 6018,0
 shape (OrthoPolyLine
@@ -20079 +20161 @@
 vasetType 3
 )
-xt "750,74000,31250,79000"
-pts [
-"750,74000"
-"22000,74000"
-"22000,79000"
-"31250,79000"
+xt "750,77000,27250,77000"
+pts [
+"750,77000"
+"27250,77000"
 ]
 )
@@ -20102 +20182 @@
 va (VaSet
 )
-xt "1000,73000,8200,74000"
+xt "1000,76000,8200,77000"
 st "config_started_mm"
-blo "1000,73800"
+blo "1000,76800"
 tm "WireNameMgr"
 )
@@ -20110 +20190 @@
 on &305
 )
-*687 (Wire
+*686 (Wire
 uid 6064,0
 shape (OrthoPolyLine
@@ -20145 +20225 @@
 on &258
 )
-*688 (Wire
+*687 (Wire
 uid 6072,0
 shape (OrthoPolyLine
@@ -20184 +20264 @@
 on &188
 )
-*689 (Wire
-uid 6082,0
-shape (OrthoPolyLine
-uid 6083,0
-va (VaSet
-vasetType 3
-lineColor "0,32896,0"
-)
-xt "28000,47000,31250,71000"
-pts [
-"31250,71000"
-"28000,71000"
-"28000,47000"
-]
-)
-start &134
-end &672
-sat 32
-eat 32
-stc 0
-st 0
-sf 1
-si 0
-tg (WTG
-uid 6084,0
-ps "ConnStartEndStrategy"
-stg "STSignalDisplayStrategy"
-f (Text
-uid 6085,0
-va (VaSet
-)
-xt "28000,70000,31100,71000"
-st "CLK_25"
-blo "28000,70800"
-tm "WireNameMgr"
-)
-)
-on &188
-)
-*690 (Wire
+*688 (Wire
 uid 6160,0
 shape (OrthoPolyLine
@@ -20261 +20302 @@
 on &306
 )
-*691 (Wire
+*689 (Wire
 uid 6276,0
 shape (OrthoPolyLine
@@ -20268 +20309 @@
 vasetType 3
 )
-xt "-61000,67000,-52750,67000"
-pts [
-"-61000,67000"
-"-52750,67000"
+xt "-61000,68000,-52750,68000"
+pts [
+"-61000,68000"
+"-52750,68000"
 ]
 )
@@ -20287 +20328 @@
 va (VaSet
 )
-xt "-58000,66000,-53500,67000"
+xt "-58000,67000,-53500,68000"
 st "CLK_25_PS"
-blo "-58000,66800"
+blo "-58000,67800"
 tm "WireNameMgr"
 )
@@ -20295 +20336 @@
 on &185
 )
-*692 (Wire
+*690 (Wire
 uid 6362,0
 shape (OrthoPolyLine
@@ -20308 +20349 @@
 ]
 )
-start &546
+start &545
 end &309
 ss 0
@@ -20334 +20375 @@
 on &308
 )
-*693 (Wire
+*691 (Wire
 uid 6452,0
 shape (OrthoPolyLine
@@ -20370 +20411 @@
 on &310
 )
-*694 (Wire
+*692 (Wire
 uid 6540,0
 shape (OrthoPolyLine
@@ -20384 +20425 @@
 )
 start &315
-end &477
+end &476
 sat 32
 eat 32
@@ -20407 +20448 @@
 on &329
 )
-*695 (Wire
+*693 (Wire
 uid 6548,0
 shape (OrthoPolyLine
@@ -20444 +20485 @@
 on &310
 )
-*696 (Wire
+*694 (Wire
 uid 8416,0
 shape (OrthoPolyLine
@@ -20451 +20492 @@
 vasetType 3
 )
-xt "63750,77000,87250,78000"
-pts [
-"63750,78000"
-"84000,78000"
-"84000,77000"
-"87250,77000"
+xt "59750,78000,87250,78000"
+pts [
+"59750,78000"
+"87250,78000"
 ]
 )
@@ -20474 +20513 @@
 va (VaSet
 )
-xt "64000,77000,67000,78000"
+xt "60000,77000,63000,78000"
 st "wiz_ack"
-blo "64000,77800"
+blo "60000,77800"
 tm "WireNameMgr"
 )
@@ -20482 +20521 @@
 on &341
 )
-*697 (Wire
+*695 (Wire
 uid 8732,0
 shape (OrthoPolyLine
@@ -20520 +20559 @@
 on &360
 )
-*698 (Wire
+*696 (Wire
 uid 8738,0
 shape (OrthoPolyLine
@@ -20556 +20595 @@
 on &361
 )
-*699 (Wire
+*697 (Wire
 uid 8752,0
 shape (OrthoPolyLine
@@ -20591 +20630 @@
 on &361
 )
-*700 (Wire
+*698 (Wire
 uid 9006,0
 shape (OrthoPolyLine
@@ -20629 +20668 @@
 on &362
 )
-*701 (Wire
+*699 (Wire
 uid 9233,0
 shape (OrthoPolyLine
@@ -20664 +20703 @@
 on &376
 )
-*702 (Wire
+*700 (Wire
 uid 9241,0
 shape (OrthoPolyLine
@@ -20699 +20738 @@
 on &377
 )
-*703 (Wire
+*701 (Wire
 uid 9253,0
 shape (OrthoPolyLine
@@ -20733 +20772 @@
 on &376
 )
-*704 (Wire
+*702 (Wire
 uid 9261,0
 shape (OrthoPolyLine
@@ -20767 +20806 @@
 on &377
 )
-*705 (Wire
+*703 (Wire
 uid 9943,0
 shape (OrthoPolyLine
@@ -20802 +20841 @@
 on &378
 )
-*706 (Wire
+*704 (Wire
 uid 9951,0
 shape (OrthoPolyLine
@@ -20837 +20876 @@
 on &379
 )
-*707 (Wire
+*705 (Wire
 uid 10010,0
 shape (OrthoPolyLine
@@ -20875 +20914 @@
 on &398
 )
-*708 (Wire
+*706 (Wire
 uid 10018,0
 shape (OrthoPolyLine
@@ -20911 +20950 @@
 on &379
 )
-*709 (Wire
+*707 (Wire
 uid 10036,0
 shape (OrthoPolyLine
@@ -20945 +20984 @@
 on &378
 )
-*710 (Wire
+*708 (Wire
 uid 10194,0
 shape (OrthoPolyLine
@@ -20985 +21024 @@
 on &399
 )
-*711 (Wire
+*709 (Wire
 uid 10202,0
 shape (OrthoPolyLine
@@ -21023 +21062 @@
 on &400
 )
-*712 (Wire
+*710 (Wire
 uid 10266,0
 shape (OrthoPolyLine
@@ -21056 +21095 @@
 )
 )
-on &499
-)
-*713 (Wire
+on &498
+)
+*711 (Wire
 uid 10298,0
 shape (OrthoPolyLine
@@ -21094 +21133 @@
 on &402
 )
-*714 (Wire
+*712 (Wire
 uid 10304,0
 shape (OrthoPolyLine
@@ -21130 +21169 @@
 on &403
 )
-*715 (Wire
+*713 (Wire
 uid 10310,0
 shape (OrthoPolyLine
@@ -21166 +21205 @@
 on &404
 )
-*716 (Wire
+*714 (Wire
 uid 10316,0
 shape (OrthoPolyLine
@@ -21204 +21243 @@
 on &405
 )
-*717 (Wire
+*715 (Wire
 uid 10322,0
 shape (OrthoPolyLine
@@ -21242 +21281 @@
 on &406
 )
-*718 (Wire
+*716 (Wire
 uid 10431,0
 shape (OrthoPolyLine
@@ -21279 +21318 @@
 on &401
 )
-*719 (Wire
-uid 10439,0
-optionalChildren [
-*720 (BdJunction
-uid 12639,0
-ps "OnConnectorStrategy"
-shape (Circle
-uid 12640,0
-va (VaSet
-vasetType 1
-)
-xt "-54400,71600,-53600,72400"
-radius 400
-)
-)
-]
-shape (OrthoPolyLine
-uid 10440,0
-va (VaSet
-vasetType 3
-)
-xt "-54000,68000,-21750,72000"
-pts [
-"-21750,72000"
-"-54000,72000"
-"-54000,68000"
-"-52750,68000"
-]
-)
-start &30
-end &125
-sat 32
-eat 32
-st 0
-sf 1
-si 0
-tg (WTG
-uid 10441,0
-ps "ConnStartEndStrategy"
-stg "STSignalDisplayStrategy"
-f (Text
-uid 10442,0
-va (VaSet
-)
-xt "-25750,71000,-21150,72000"
-st "trigger_out"
-blo "-25750,71800"
-tm "WireNameMgr"
-)
-)
-on &431
-)
-*721 (Wire
+*717 (Wire
 uid 10467,0
 shape (OrthoPolyLine
@@ -21338 +21325 @@
 vasetType 3
 )
-xt "750,69000,31250,76000"
-pts [
-"31250,76000"
-"24000,76000"
-"24000,69000"
-"750,69000"
+xt "750,74000,27250,74000"
+pts [
+"27250,74000"
+"750,74000"
 ]
 )
@@ -21362 +21347 @@
 va (VaSet
 )
-xt "2000,68000,9800,69000"
+xt "1000,73000,8800,74000"
 st "ram_write_ready_ack"
-blo "2000,68800"
+blo "1000,73800"
 tm "WireNameMgr"
 )
 )
-on &432
-)
-*722 (Wire
+on &431
+)
+*718 (Wire
 uid 10629,0
 shape (OrthoPolyLine
@@ -21403 +21388 @@
 )
 )
-on &433
-)
-*723 (Wire
+on &432
+)
+*719 (Wire
 uid 10637,0
 shape (OrthoPolyLine
@@ -21438 +21423 @@
 )
 )
-on &434
-)
-*724 (Wire
+on &433
+)
+*720 (Wire
 uid 10685,0
 shape (OrthoPolyLine
@@ -21453 +21438 @@
 ]
 )
-end &447
+end &446
 sat 16
 eat 32
@@ -21473 +21458 @@
 )
 )
-on &434
-)
-*725 (Wire
+on &433
+)
+*721 (Wire
 uid 10691,0
 shape (OrthoPolyLine
@@ -21488 +21473 @@
 ]
 )
-end &448
+end &447
 sat 16
 eat 32
@@ -21508 +21493 @@
 )
 )
-on &433
-)
-*726 (Wire
+on &432
+)
+*722 (Wire
 uid 10699,0
 shape (OrthoPolyLine
@@ -21524 +21509 @@
 ]
 )
-end &442
+end &441
 sat 16
 eat 32
@@ -21546 +21531 @@
 on &187
 )
-*727 (Wire
+*723 (Wire
 uid 10707,0
 shape (OrthoPolyLine
@@ -21559 +21544 @@
 ]
 )
-end &446
+end &445
 sat 16
 eat 32
@@ -21579 +21564 @@
 )
 )
-on &453
-)
-*728 (Wire
+on &452
+)
+*724 (Wire
 uid 10723,0
 shape (OrthoPolyLine
@@ -21594 +21579 @@
 ]
 )
-start &443
-end &436
+start &442
+end &435
 sat 32
 eat 32
@@ -21617 +21602 @@
 )
 )
-on &435
-)
-*729 (Wire
+on &434
+)
+*725 (Wire
 uid 10737,0
 shape (OrthoPolyLine
@@ -21632 +21617 @@
 ]
 )
-start &444
-end &438
+start &443
+end &437
 sat 32
 eat 32
@@ -21655 +21640 @@
 )
 )
-on &437
-)
-*730 (Wire
+on &436
+)
+*726 (Wire
 uid 10751,0
 shape (OrthoPolyLine
@@ -21670 +21655 @@
 ]
 )
-start &445
-end &440
+start &444
+end &439
 sat 32
 eat 32
@@ -21693 +21678 @@
 )
 )
-on &439
-)
-*731 (Wire
+on &438
+)
+*727 (Wire
 uid 11405,0
 shape (OrthoPolyLine
@@ -21729 +21714 @@
 )
 )
-on &453
-)
-*732 (Wire
+on &452
+)
+*728 (Wire
 uid 11858,0
 shape (OrthoPolyLine
@@ -21764 +21749 @@
 )
 )
-on &454
-)
-*733 (Wire
+on &453
+)
+*729 (Wire
 uid 11952,0
 shape (OrthoPolyLine
@@ -21779 +21764 @@
 ]
 )
-end &461
+end &460
 sat 16
 eat 32
@@ -21800 +21785 @@
 )
 )
-on &454
-)
-*734 (Wire
+on &453
+)
+*730 (Wire
 uid 12306,0
 shape (OrthoPolyLine
@@ -21816 +21801 @@
 )
 start &411
-end &459
+end &458
 sat 32
 eat 32
@@ -21838 +21823 @@
 )
 )
-on &473
-)
-*735 (Wire
-uid 12635,0
-shape (OrthoPolyLine
-uid 12636,0
-va (VaSet
-vasetType 3
-)
-xt "-55250,72000,-54000,72000"
-pts [
-"-54000,72000"
-"-55250,72000"
-]
-)
-start &720
-end &476
-sat 32
-eat 32
-stc 0
-st 0
-sf 1
-si 0
-tg (WTG
-uid 12637,0
-ps "ConnStartEndStrategy"
-stg "STSignalDisplayStrategy"
-f (Text
-uid 12638,0
-va (VaSet
-)
-xt "-54000,71000,-49400,72000"
-st "trigger_out"
-blo "-54000,71800"
-tm "WireNameMgr"
-)
-)
-on &431
-)
-*736 (Wire
+on &472
+)
+*731 (Wire
 uid 12643,0
 shape (OrthoPolyLine
@@ -21892 +21840 @@
 ]
 )
-start &456
-end &475
+start &455
+end &474
 sat 32
 eat 32
@@ -21915 +21863 @@
 )
 )
-on &484
-)
-*737 (Wire
+on &483
+)
+*732 (Wire
 uid 12649,0
 shape (OrthoPolyLine
@@ -21927 +21875 @@
 pts [
 "-21750,74000"
-"-38000,74000"
 "-55250,74000"
 ]
 )
 start &66
-end &478
+end &477
 sat 32
 eat 32
@@ -21952 +21899 @@
 )
 )
-on &485
-)
-*738 (Wire
+on &484
+)
+*733 (Wire
 uid 12655,0
 shape (OrthoPolyLine
@@ -21969 +21916 @@
 )
 start &67
-end &479
+end &478
 sat 32
 eat 32
@@ -21989 +21936 @@
 )
 )
-on &486
-)
-*739 (Wire
+on &485
+)
+*734 (Wire
 uid 12687,0
 shape (OrthoPolyLine
@@ -22007 +21954 @@
 ]
 )
-end &480
+end &479
 sat 16
 eat 32
@@ -22029 +21976 @@
 on &188
 )
-*740 (Wire
+*735 (Wire
 uid 12707,0
 shape (OrthoPolyLine
@@ -22042 +21989 @@
 ]
 )
-start &449
-end &488
+start &448
+end &487
 sat 32
 eat 32
@@ -22065 +22012 @@
 )
 )
-on &487
-)
-*741 (Wire
+on &486
+)
+*736 (Wire
 uid 13143,0
 shape (OrthoPolyLine
@@ -22074 +22021 @@
 vasetType 3
 )
-xt "63750,62000,69000,62000"
-pts [
-"69000,62000"
-"63750,62000"
-]
-)
-end &490
+xt "72750,62000,78000,62000"
+pts [
+"78000,62000"
+"72750,62000"
+]
+)
+end &489
 sat 16
 eat 32
@@ -22094 +22041 @@
 va (VaSet
 )
-xt "65000,61000,68100,62000"
+xt "74000,61000,77100,62000"
 st "CLK_25"
-blo "65000,61800"
+blo "74000,61800"
 tm "WireNameMgr"
 )
@@ -22102 +22049 @@
 on &188
 )
-*742 (Wire
+*737 (Wire
 uid 13159,0
 shape (OrthoPolyLine
@@ -22109 +22056 @@
 vasetType 3
 )
-xt "63750,63000,87250,67000"
+xt "72750,63000,87250,67000"
 pts [
 "87250,67000"
-"79000,67000"
-"79000,63000"
-"63750,63000"
+"77000,67000"
+"77000,63000"
+"72750,63000"
 ]
 )
 start &114
-end &491
+end &490
 sat 32
 eat 32
@@ -22138 +22085 @@
 )
 )
-on &497
-)
-*743 (Wire
+on &496
+)
+*738 (Wire
 uid 13165,0
 shape (OrthoPolyLine
@@ -22148 +22095 @@
 lineWidth 2
 )
-xt "63750,64000,87250,68000"
+xt "72750,64000,87250,68000"
 pts [
 "87250,68000"
-"78000,68000"
-"78000,64000"
-"63750,64000"
+"76000,68000"
+"76000,64000"
+"72750,64000"
 ]
 )
 start &115
-end &492
+end &491
 sat 32
 eat 32
@@ -22178 +22125 @@
 )
 )
-on &498
-)
-*744 (Wire
+on &497
+)
+*739 (Wire
 uid 13210,0
 shape (OrthoPolyLine
@@ -22187 +22134 @@
 vasetType 3
 )
-xt "42000,62000,50250,62000"
-pts [
-"50250,62000"
-"42000,62000"
-]
-)
-start &493
-end &502
+xt "54000,62000,59250,62000"
+pts [
+"59250,62000"
+"54000,62000"
+]
+)
+start &492
+end &501
 sat 32
 eat 32
@@ -22208 +22155 @@
 va (VaSet
 )
-xt "46250,61000,49450,62000"
+xt "53250,61000,56450,62000"
 st "trigger1"
-blo "46250,61800"
+blo "53250,61800"
 tm "WireNameMgr"
 )
 )
-on &500
-)
-*745 (Wire
+on &499
+)
+*740 (Wire
 uid 13216,0
 shape (OrthoPolyLine
@@ -22223 +22170 @@
 vasetType 3
 )
-xt "42000,60000,45000,60000"
-pts [
-"45000,60000"
-"42000,60000"
-]
-)
-end &507
+xt "54000,60000,59000,60000"
+pts [
+"59000,60000"
+"54000,60000"
+]
+)
+end &506
 sat 16
 eat 32
@@ -22243 +22190 @@
 uid 13221,0
 va (VaSet
-isHidden 1
-)
-xt "43000,59000,47800,60000"
+)
+xt "54000,59000,58800,60000"
 st "s_trigger_0"
-blo "43000,59800"
+blo "54000,59800"
 tm "WireNameMgr"
 )
 )
-on &499
-)
-*746 (Wire
+on &498
+)
+*741 (Wire
 uid 13224,0
 shape (OrthoPolyLine
@@ -22260 +22206 @@
 vasetType 3
 )
-xt "33000,61000,36000,61000"
-pts [
-"36000,61000"
-"33000,61000"
-]
-)
-start &504
+xt "45000,61000,48000,61000"
+pts [
+"48000,61000"
+"45000,61000"
+]
+)
+start &503
 sat 32
 eat 16
@@ -22280 +22226 @@
 uid 13229,0
 va (VaSet
-isHidden 1
-)
-xt "34000,60000,37600,61000"
+)
+xt "45000,60000,48600,61000"
 st "s_trigger"
-blo "34000,60800"
+blo "45000,60800"
 tm "WireNameMgr"
 )
@@ -22290 +22235 @@
 on &401
 )
-*747 (Wire
+*742 (Wire
 uid 13695,0
 shape (OrthoPolyLine
@@ -22304 +22249 @@
 ]
 )
-start &524
+start &523
 end &116
 sat 32
@@ -22327 +22272 @@
 )
 )
-on &525
-)
-*748 (Wire
+on &524
+)
+*743 (Wire
 uid 13921,0
 shape (OrthoPolyLine
@@ -22366 +22311 @@
 on &71
 )
-*749 (Wire
+*744 (Wire
 uid 13929,0
 shape (OrthoPolyLine
@@ -22403 +22348 @@
 on &122
 )
-*750 (Wire
+*745 (Wire
 uid 14048,0
 shape (OrthoPolyLine
@@ -22416 +22361 @@
 ]
 )
-start &526
-end &532
+start &525
+end &531
 sat 32
 eat 32
@@ -22438 +22383 @@
 )
 )
-on &527
-)
-*751 (Wire
+on &526
+)
+*746 (Wire
 uid 14171,0
 shape (OrthoPolyLine
@@ -22454 +22399 @@
 ]
 )
-start &528
+start &527
 sat 32
 eat 16
@@ -22476 +22421 @@
 )
 )
-on &529
-)
-*752 (Wire
+on &528
+)
+*747 (Wire
 uid 14427,0
 shape (OrthoPolyLine
@@ -22491 +22436 @@
 ]
 )
-end &531
+end &530
 sat 16
 eat 32
@@ -22513 +22458 @@
 on &187
 )
-*753 (Wire
+*748 (Wire
 uid 14479,0
 shape (OrthoPolyLine
@@ -22526 +22471 @@
 ]
 )
-start &534
-end &540
+start &533
+end &539
 sat 32
 eat 32
@@ -22549 +22494 @@
 )
 )
-on &539
-)
-*754 (Wire
+on &538
+)
+*749 (Wire
 uid 14493,0
 shape (OrthoPolyLine
@@ -22564 +22509 @@
 ]
 )
-start &535
-end &542
+start &534
+end &541
 sat 32
 eat 32
@@ -22587 +22532 @@
 )
 )
-on &541
-)
-*755 (Wire
+on &540
+)
+*750 (Wire
 uid 14622,0
 shape (OrthoPolyLine
@@ -22603 +22548 @@
 ]
 )
-start &533
-end &544
+start &532
+end &543
 sat 32
 eat 32
@@ -22627 +22572 @@
 )
 )
-on &543
-)
-*756 (Wire
+on &542
+)
+*751 (Wire
 uid 15071,0
 shape (OrthoPolyLine
@@ -22643 +22588 @@
 )
 start &101
-end &549
+end &548
 sat 32
 eat 32
@@ -22663 +22608 @@
 )
 )
-on &596
-)
-*757 (Wire
+on &595
+)
+*752 (Wire
 uid 15081,0
 shape (OrthoPolyLine
@@ -22678 +22623 @@
 ]
 )
-start &551
-end &589
+start &550
+end &588
 sat 32
 eat 32
@@ -22701 +22646 @@
 )
 )
-on &597
-)
-*758 (Wire
+on &596
+)
+*753 (Wire
 uid 15122,0
 shape (OrthoPolyLine
@@ -22717 +22662 @@
 ]
 )
-start &587
-end &564
+start &586
+end &563
 sat 32
 eat 32
@@ -22739 +22684 @@
 )
 )
-on &598
-)
-*759 (Wire
+on &597
+)
+*754 (Wire
 uid 15130,0
 shape (OrthoPolyLine
@@ -22754 +22699 @@
 ]
 )
-end &579
+end &578
 es 0
 sat 16
@@ -22777 +22722 @@
 )
 )
-on &541
-)
-*760 (Wire
+on &540
+)
+*755 (Wire
 uid 15138,0
 shape (OrthoPolyLine
@@ -22792 +22737 @@
 ]
 )
-end &581
+end &580
 es 0
 sat 16
@@ -22815 +22760 @@
 )
 )
-on &539
+on &538
+)
+*756 (Wire
+uid 15379,0
+shape (OrthoPolyLine
+uid 15380,0
+va (VaSet
+vasetType 3
+)
+xt "29000,64000,29000,67250"
+pts [
+"29000,64000"
+"29000,67250"
+]
+)
+end &134
+sat 16
+eat 32
+st 0
+sf 1
+si 0
+tg (WTG
+uid 15383,0
+ps "ConnStartEndStrategy"
+stg "STSignalDisplayStrategy"
+f (Text
+uid 15384,0
+va (VaSet
+)
+xt "29000,64000,32100,65000"
+st "CLK_25"
+blo "29000,64800"
+tm "WireNameMgr"
+)
+)
+on &188
+)
+*757 (Wire
+uid 15494,0
+optionalChildren [
+*758 (BdJunction
+uid 15502,0
+ps "OnConnectorStrategy"
+shape (Circle
+uid 15503,0
+va (VaSet
+vasetType 1
+)
+xt "-54400,71600,-53600,72400"
+radius 400
+)
+)
+]
+shape (OrthoPolyLine
+uid 15495,0
+va (VaSet
+vasetType 3
+)
+xt "-55250,72000,-21750,72000"
+pts [
+"-55250,72000"
+"-21750,72000"
+]
+)
+start &475
+end &30
+sat 32
+eat 32
+st 0
+sf 1
+si 0
+tg (WTG
+uid 15496,0
+ps "ConnStartEndStrategy"
+stg "STSignalDisplayStrategy"
+f (Text
+uid 15497,0
+va (VaSet
+)
+xt "-53250,71000,-48650,72000"
+st "trigger_out"
+blo "-53250,71800"
+tm "WireNameMgr"
+)
+)
+on &598
+)
+*759 (Wire
+uid 15498,0
+shape (OrthoPolyLine
+uid 15499,0
+va (VaSet
+vasetType 3
+)
+xt "-54000,69000,-52750,72000"
+pts [
+"-52750,69000"
+"-54000,69000"
+"-54000,72000"
+]
+)
+start &125
+end &758
+sat 32
+eat 32
+stc 0
+st 0
+sf 1
+si 0
+tg (WTG
+uid 15500,0
+ps "ConnStartEndStrategy"
+stg "STSignalDisplayStrategy"
+f (Text
+uid 15501,0
+va (VaSet
+)
+xt "-58000,69000,-53400,70000"
+st "trigger_out"
+blo "-58000,69800"
+tm "WireNameMgr"
+)
+)
+on &598
 )
 ]
@@ -22829 +22897 @@
 color "26368,26368,26368"
 )
-packageList *761 (PackageList
+packageList *760 (PackageList
 uid 41,0
 stg "VerticalLayoutStrategy"
 textVec [
-*762 (Text
+*761 (Text
 uid 42,0
 va (VaSet
@@ -22842 +22910 @@
 blo "-163000,-15200"
 )
-*763 (MLText
+*762 (MLText
 uid 43,0
 va (VaSet
@@ -22867 +22935 @@
 stg "VerticalLayoutStrategy"
 textVec [
-*764 (Text
+*763 (Text
 uid 45,0
 va (VaSet
@@ -22877 +22945 @@
 blo "20000,800"
 )
-*765 (Text
+*764 (Text
 uid 46,0
 va (VaSet
@@ -22887 +22955 @@
 blo "20000,1800"
 )
-*766 (MLText
+*765 (MLText
 uid 47,0
 va (VaSet
@@ -22897 +22965 @@
 tm "BdCompilerDirectivesTextMgr"
 )
-*767 (Text
+*766 (Text
 uid 48,0
 va (VaSet
@@ -22907 +22975 @@
 blo "20000,4800"
 )
-*768 (MLText
+*767 (MLText
 uid 49,0
 va (VaSet
@@ -22915 +22983 @@
 tm "BdCompilerDirectivesTextMgr"
 )
-*769 (Text
+*768 (Text
 uid 50,0
 va (VaSet
@@ -22925 +22993 @@
 blo "20000,5800"
 )
-*770 (MLText
+*769 (MLText
 uid 51,0
 va (VaSet
@@ -22937 +23005 @@
 )
 windowSize "0,0,1281,1024"
-viewArea "-25598,42048,41245,97173"
+viewArea "-65700,47500,1143,102625"
 cachedDiagramExtent "-174000,-25425,428157,346294"
 pageSetupInfo (PageSetupInfo
@@ -22963 +23031 @@
 hasePageBreakOrigin 1
 pageBreakOrigin "-73000,0"
-lastUid 15275,0
+lastUid 15505,0
 defaultCommentText (CommentText
 shape (Rectangle
@@ -23025 +23093 @@
 stg "VerticalLayoutStrategy"
 textVec [
-*771 (Text
+*770 (Text
 va (VaSet
 font "Arial,8,1"
@@ -23034 +23102 @@
 tm "BdLibraryNameMgr"
 )
-*772 (Text
+*771 (Text
 va (VaSet
 font "Arial,8,1"
@@ -23043 +23111 @@
 tm "BlkNameMgr"
 )
-*773 (Text
+*772 (Text
 va (VaSet
 font "Arial,8,1"
@@ -23094 +23162 @@
 stg "VerticalLayoutStrategy"
 textVec [
-*774 (Text
+*773 (Text
 va (VaSet
 font "Arial,8,1"
@@ -23102 +23170 @@
 blo "550,4300"
 )
-*775 (Text
+*774 (Text
 va (VaSet
 font "Arial,8,1"
@@ -23110 +23178 @@
 blo "550,5300"
 )
-*776 (Text
+*775 (Text
 va (VaSet
 font "Arial,8,1"
@@ -23159 +23227 @@
 stg "VerticalLayoutStrategy"
 textVec [
-*777 (Text
+*776 (Text
 va (VaSet
 font "Arial,8,1"
@@ -23168 +23236 @@
 tm "BdLibraryNameMgr"
 )
-*778 (Text
+*777 (Text
 va (VaSet
 font "Arial,8,1"
@@ -23177 +23245 @@
 tm "CptNameMgr"
 )
-*779 (Text
+*778 (Text
 va (VaSet
 font "Arial,8,1"
@@ -23231 +23299 @@
 stg "VerticalLayoutStrategy"
 textVec [
-*780 (Text
+*779 (Text
 va (VaSet
 font "Arial,8,1"
@@ -23239 +23307 @@
 blo "500,4300"
 )
-*781 (Text
+*780 (Text
 va (VaSet
 font "Arial,8,1"
@@ -23247 +23315 @@
 blo "500,5300"
 )
-*782 (Text
+*781 (Text
 va (VaSet
 font "Arial,8,1"
@@ -23292 +23360 @@
 stg "VerticalLayoutStrategy"
 textVec [
-*783 (Text
+*782 (Text
 va (VaSet
 font "Arial,8,1"
@@ -23300 +23368 @@
 blo "50,4300"
 )
-*784 (Text
+*783 (Text
 va (VaSet
 font "Arial,8,1"
@@ -23308 +23376 @@
 blo "50,5300"
 )
-*785 (Text
+*784 (Text
 va (VaSet
 font "Arial,8,1"
@@ -23349 +23417 @@
 stg "VerticalLayoutStrategy"
 textVec [
-*786 (Text
+*785 (Text
 va (VaSet
 font "Arial,8,1"
@@ -23358 +23426 @@
 tm "HdlTextNameMgr"
 )
-*787 (Text
+*786 (Text
 va (VaSet
 font "Arial,8,1"
@@ -23761 +23829 @@
 stg "VerticalLayoutStrategy"
 textVec [
-*788 (Text
+*787 (Text
 va (VaSet
 font "Arial,8,1"
@@ -23769 +23837 @@
 blo "14100,20800"
 )
-*789 (MLText
+*788 (MLText
 va (VaSet
 )
@@ -23821 +23889 @@
 stg "VerticalLayoutStrategy"
 textVec [
-*790 (Text
+*789 (Text
 va (VaSet
 font "Arial,8,1"
@@ -23829 +23897 @@
 blo "14100,20800"
 )
-*791 (MLText
+*790 (MLText
 va (VaSet
 )
@@ -23969 +24037 @@
 commonDM (CommonDM
 ldm (LogicalDM
-suid 299,0
+suid 301,0
 usingSuid 1
-emptyRow *792 (LEmptyRow
+emptyRow *791 (LEmptyRow
 )
 uid 54,0
 optionalChildren [
-*793 (RefLabelRowHdr
-)
-*794 (TitleRowHdr
-)
-*795 (FilterRowHdr
-)
-*796 (RefLabelColHdr
+*792 (RefLabelRowHdr
+)
+*793 (TitleRowHdr
+)
+*794 (FilterRowHdr
+)
+*795 (RefLabelColHdr
 tm "RefLabelColHdrMgr"
 )
-*797 (RowExpandColHdr
+*796 (RowExpandColHdr
 tm "RowExpandColHdrMgr"
 )
-*798 (GroupColHdr
+*797 (GroupColHdr
 tm "GroupColHdrMgr"
 )
-*799 (NameColHdr
+*798 (NameColHdr
 tm "BlockDiagramNameColHdrMgr"
 )
-*800 (ModeColHdr
+*799 (ModeColHdr
 tm "BlockDiagramModeColHdrMgr"
 )
-*801 (TypeColHdr
+*800 (TypeColHdr
 tm "BlockDiagramTypeColHdrMgr"
 )
-*802 (BoundsColHdr
+*801 (BoundsColHdr
 tm "BlockDiagramBoundsColHdrMgr"
 )
-*803 (InitColHdr
+*802 (InitColHdr
 tm "BlockDiagramInitColHdrMgr"
 )
-*804 (EolColHdr
+*803 (EolColHdr
 tm "BlockDiagramEolColHdrMgr"
 )
-*805 (LeafLogPort
+*804 (LeafLogPort
 port (LogicalPort
 m 4
@@ -24022 +24090 @@
 uid 516,0
 )
-*806 (LeafLogPort
+*805 (LeafLogPort
 port (LogicalPort
 m 4
@@ -24035 +24103 @@
 uid 518,0
 )
-*807 (LeafLogPort
+*806 (LeafLogPort
 port (LogicalPort
 m 4
@@ -24048 +24116 @@
 uid 520,0
 )
-*808 (LeafLogPort
+*807 (LeafLogPort
 port (LogicalPort
 m 4
@@ -24061 +24129 @@
 uid 530,0
 )
-*809 (LeafLogPort
+*808 (LeafLogPort
 port (LogicalPort
 m 4
@@ -24074 +24142 @@
 uid 532,0
 )
-*810 (LeafLogPort
+*809 (LeafLogPort
 port (LogicalPort
 m 1
@@ -24087 +24155 @@
 uid 534,0
 )
-*811 (LeafLogPort
+*810 (LeafLogPort
 port (LogicalPort
 m 1
@@ -24100 +24168 @@
 uid 536,0
 )
-*812 (LeafLogPort
+*811 (LeafLogPort
 port (LogicalPort
 m 2
@@ -24113 +24181 @@
 uid 538,0
 )
+*812 (LeafLogPort
+port (LogicalPort
+m 1
+decl (Decl
+n "wiz_cs"
+t "std_logic"
+o 44
+suid 14,0
+i "'1'"
+)
+)
+uid 540,0
+)
 *813 (LeafLogPort
 port (LogicalPort
 m 1
 decl (Decl
-n "wiz_cs"
-t "std_logic"
-o 44
-suid 14,0
+n "wiz_wr"
+t "std_logic"
+o 47
+suid 15,0
 i "'1'"
 )
 )
-uid 540,0
+uid 542,0
 )
 *814 (LeafLogPort
@@ -24130 +24211 @@
 m 1
 decl (Decl
-n "wiz_wr"
-t "std_logic"
-o 47
-suid 15,0
-i "'1'"
-)
-)
-uid 542,0
-)
-*815 (LeafLogPort
-port (LogicalPort
-m 1
-decl (Decl
 n "wiz_rd"
 t "std_logic"
@@ -24152 +24220 @@
 uid 546,0
 )
-*816 (LeafLogPort
+*815 (LeafLogPort
 port (LogicalPort
 decl (Decl
@@ -24163 +24231 @@
 uid 548,0
 )
-*817 (LeafLogPort
+*816 (LeafLogPort
 port (LogicalPort
 decl (Decl
@@ -24175 +24243 @@
 uid 1455,0
 )
-*818 (LeafLogPort
+*817 (LeafLogPort
 port (LogicalPort
 decl (Decl
@@ -24188 +24256 @@
 uid 1457,0
 )
-*819 (LeafLogPort
+*818 (LeafLogPort
 port (LogicalPort
 decl (Decl
@@ -24200 +24268 @@
 uid 1694,0
 )
-*820 (LeafLogPort
+*819 (LeafLogPort
 port (LogicalPort
 lang 2
@@ -24216 +24284 @@
 uid 1993,0
 )
-*821 (LeafLogPort
+*820 (LeafLogPort
 port (LogicalPort
 m 4
@@ -24231 +24299 @@
 uid 2305,0
 )
+*821 (LeafLogPort
+port (LogicalPort
+lang 2
+m 4
+decl (Decl
+n "wiz_busy"
+t "std_logic"
+o 122
+suid 38,0
+)
+)
+uid 2510,0
+)
 *822 (LeafLogPort
 port (LogicalPort
@@ -24236 +24317 @@
 m 4
 decl (Decl
-n "wiz_busy"
-t "std_logic"
-o 122
-suid 38,0
-)
-)
-uid 2510,0
-)
-*823 (LeafLogPort
-port (LogicalPort
-lang 2
-m 4
-decl (Decl
 n "wiz_write_ea"
 t "std_logic"
@@ -24258 +24326 @@
 uid 2512,0
 )
-*824 (LeafLogPort
+*823 (LeafLogPort
 port (LogicalPort
 lang 2
@@ -24273 +24341 @@
 uid 2514,0
 )
-*825 (LeafLogPort
+*824 (LeafLogPort
 port (LogicalPort
 lang 2
@@ -24289 +24357 @@
 uid 2516,0
 )
-*826 (LeafLogPort
+*825 (LeafLogPort
 port (LogicalPort
 lang 2
@@ -24304 +24372 @@
 uid 2518,0
 )
+*826 (LeafLogPort
+port (LogicalPort
+lang 2
+m 4
+decl (Decl
+n "wiz_write_end"
+t "std_logic"
+o 126
+suid 43,0
+i "'0'"
+)
+)
+uid 2520,0
+)
 *827 (LeafLogPort
 port (LogicalPort
@@ -24309 +24391 @@
 m 4
 decl (Decl
-n "wiz_write_end"
-t "std_logic"
-o 126
-suid 43,0
-i "'0'"
-)
-)
-uid 2520,0
-)
-*828 (LeafLogPort
-port (LogicalPort
-lang 2
-m 4
-decl (Decl
 n "wiz_write_header"
 t "std_logic"
@@ -24332 +24400 @@
 uid 2522,0
 )
+*828 (LeafLogPort
+port (LogicalPort
+m 4
+decl (Decl
+n "ram_write_ea"
+t "std_logic"
+o 100
+suid 48,0
+)
+)
+uid 2604,0
+)
 *829 (LeafLogPort
 port (LogicalPort
 m 4
 decl (Decl
-n "ram_write_ea"
-t "std_logic"
-o 100
-suid 48,0
-)
-)
-uid 2604,0
+n "ram_write_ready"
+t "std_logic"
+o 101
+suid 49,0
+i "'0'"
+)
+)
+uid 2606,0
 )
 *830 (LeafLogPort
@@ -24348 +24429 @@
 m 4
 decl (Decl
-n "ram_write_ready"
-t "std_logic"
-o 101
-suid 49,0
+n "config_start"
+t "std_logic"
+o 67
+suid 50,0
 i "'0'"
 )
 )
-uid 2606,0
+uid 2608,0
 )
 *831 (LeafLogPort
@@ -24361 +24442 @@
 m 4
 decl (Decl
-n "config_start"
-t "std_logic"
-o 67
-suid 50,0
-i "'0'"
-)
-)
-uid 2608,0
-)
-*832 (LeafLogPort
-port (LogicalPort
-m 4
-decl (Decl
 n "config_ready"
 t "std_logic"
@@ -24382 +24450 @@
 uid 2610,0
 )
-*833 (LeafLogPort
+*832 (LeafLogPort
 port (LogicalPort
 m 4
@@ -24394 +24462 @@
 uid 2612,0
 )
-*834 (LeafLogPort
+*833 (LeafLogPort
 port (LogicalPort
 m 4
@@ -24407 +24475 @@
 uid 2646,0
 )
-*835 (LeafLogPort
+*834 (LeafLogPort
 port (LogicalPort
 m 1
@@ -24420 +24488 @@
 uid 2812,0
 )
-*836 (LeafLogPort
+*835 (LeafLogPort
 port (LogicalPort
 m 4
@@ -24432 +24500 @@
 uid 2962,0
 )
+*836 (LeafLogPort
+port (LogicalPort
+m 1
+decl (Decl
+n "CLK_25_PS"
+t "std_logic"
+o 15
+suid 81,0
+)
+)
+uid 3902,0
+)
 *837 (LeafLogPort
 port (LogicalPort
 m 1
 decl (Decl
-n "CLK_25_PS"
-t "std_logic"
-o 15
-suid 81,0
-)
-)
-uid 3902,0
+n "CLK_50"
+t "std_logic"
+o 16
+suid 90,0
+)
+)
+uid 4070,0
 )
 *838 (LeafLogPort
 port (LogicalPort
-m 1
-decl (Decl
-n "CLK_50"
-t "std_logic"
-o 16
-suid 90,0
-)
-)
-uid 4070,0
+m 4
+decl (Decl
+n "CLK_25"
+t "std_logic"
+o 50
+suid 91,0
+)
+)
+uid 4212,0
 )
 *839 (LeafLogPort
 port (LogicalPort
-m 4
-decl (Decl
-n "CLK_25"
-t "std_logic"
-o 50
-suid 91,0
-)
-)
-uid 4212,0
-)
-*840 (LeafLogPort
-port (LogicalPort
 decl (Decl
 n "CLK"
@@ -24479 +24547 @@
 uid 4234,0
 )
-*841 (LeafLogPort
+*840 (LeafLogPort
 port (LogicalPort
 decl (Decl
@@ -24491 +24559 @@
 uid 4262,0
 )
-*842 (LeafLogPort
+*841 (LeafLogPort
 port (LogicalPort
 decl (Decl
@@ -24502 +24570 @@
 uid 4276,0
 )
-*843 (LeafLogPort
+*842 (LeafLogPort
 port (LogicalPort
 m 4
@@ -24515 +24583 @@
 uid 4563,0
 )
-*844 (LeafLogPort
+*843 (LeafLogPort
 port (LogicalPort
 m 4
@@ -24527 +24595 @@
 uid 4565,0
 )
-*845 (LeafLogPort
+*844 (LeafLogPort
 port (LogicalPort
 m 4
@@ -24540 +24608 @@
 uid 4569,0
 )
-*846 (LeafLogPort
+*845 (LeafLogPort
 port (LogicalPort
 m 1
@@ -24554 +24622 @@
 uid 4585,0
 )
-*847 (LeafLogPort
+*846 (LeafLogPort
 port (LogicalPort
 m 1
@@ -24567 +24635 @@
 uid 4587,0
 )
+*847 (LeafLogPort
+port (LogicalPort
+decl (Decl
+n "SROUT_in_0"
+t "std_logic"
+o 2
+suid 112,0
+)
+)
+uid 4733,0
+)
 *848 (LeafLogPort
 port (LogicalPort
 decl (Decl
-n "SROUT_in_0"
-t "std_logic"
-o 2
-suid 112,0
-)
-)
-uid 4733,0
+n "SROUT_in_1"
+t "std_logic"
+o 3
+suid 113,0
+)
+)
+uid 4735,0
 )
 *849 (LeafLogPort
 port (LogicalPort
 decl (Decl
-n "SROUT_in_1"
-t "std_logic"
-o 3
-suid 113,0
-)
-)
-uid 4735,0
+n "SROUT_in_2"
+t "std_logic"
+o 4
+suid 114,0
+)
+)
+uid 4737,0
 )
 *850 (LeafLogPort
 port (LogicalPort
 decl (Decl
-n "SROUT_in_2"
-t "std_logic"
-o 4
-suid 114,0
-)
-)
-uid 4737,0
+n "SROUT_in_3"
+t "std_logic"
+o 5
+suid 115,0
+)
+)
+uid 4739,0
 )
 *851 (LeafLogPort
 port (LogicalPort
-decl (Decl
-n "SROUT_in_3"
-t "std_logic"
-o 5
-suid 115,0
-)
-)
-uid 4739,0
+m 4
+decl (Decl
+n "drs_read_s_cell_ready"
+t "std_logic"
+o 84
+suid 116,0
+)
+)
+uid 4749,0
 )
 *852 (LeafLogPort
 port (LogicalPort
-m 4
-decl (Decl
-n "drs_read_s_cell_ready"
-t "std_logic"
-o 84
-suid 116,0
-)
-)
-uid 4749,0
+m 1
+decl (Decl
+n "RSRLOAD"
+t "std_logic"
+o 23
+suid 117,0
+i "'0'"
+)
+)
+uid 4974,0
 )
 *853 (LeafLogPort
@@ -24627 +24708 @@
 m 1
 decl (Decl
-n "RSRLOAD"
-t "std_logic"
-o 23
-suid 117,0
-i "'0'"
-)
-)
-uid 4974,0
-)
-*854 (LeafLogPort
-port (LogicalPort
-m 1
-decl (Decl
 n "SRCLK"
 t "std_logic"
@@ -24649 +24717 @@
 uid 4976,0
 )
-*855 (LeafLogPort
+*854 (LeafLogPort
 port (LogicalPort
 m 4
@@ -24662 +24730 @@
 uid 5198,0
 )
+*855 (LeafLogPort
+port (LogicalPort
+m 4
+decl (Decl
+n "config_data_valid"
+t "std_logic"
+o 60
+suid 120,0
+)
+)
+uid 5200,0
+)
 *856 (LeafLogPort
 port (LogicalPort
 m 4
 decl (Decl
-n "config_data_valid"
-t "std_logic"
-o 60
-suid 120,0
-)
-)
-uid 5200,0
-)
-*857 (LeafLogPort
-port (LogicalPort
-m 4
-decl (Decl
 n "config_busy"
 t "std_logic"
@@ -24686 +24754 @@
 uid 5202,0
 )
-*858 (LeafLogPort
+*857 (LeafLogPort
 port (LogicalPort
 m 4
@@ -24699 +24767 @@
 uid 5204,0
 )
+*858 (LeafLogPort
+port (LogicalPort
+m 4
+decl (Decl
+n "config_wr_en"
+t "std_logic"
+o 74
+suid 123,0
+)
+)
+uid 5206,0
+)
 *859 (LeafLogPort
 port (LogicalPort
 m 4
 decl (Decl
-n "config_wr_en"
-t "std_logic"
-o 74
-suid 123,0
-)
-)
-uid 5206,0
-)
-*860 (LeafLogPort
-port (LogicalPort
-m 4
-decl (Decl
 n "config_rd_en"
 t "std_logic"
@@ -24723 +24791 @@
 uid 5208,0
 )
-*861 (LeafLogPort
+*860 (LeafLogPort
 port (LogicalPort
 m 4
@@ -24735 +24803 @@
 uid 5210,0
 )
+*861 (LeafLogPort
+port (LogicalPort
+m 4
+decl (Decl
+n "config_start_cm"
+t "std_logic"
+o 68
+suid 131,0
+)
+)
+uid 5212,0
+)
 *862 (LeafLogPort
 port (LogicalPort
 m 4
 decl (Decl
-n "config_start_cm"
-t "std_logic"
-o 68
-suid 131,0
-)
-)
-uid 5212,0
-)
-*863 (LeafLogPort
-port (LogicalPort
-m 4
-decl (Decl
 n "config_ready_cm"
 t "std_logic"
@@ -24759 +24827 @@
 uid 5214,0
 )
-*864 (LeafLogPort
+*863 (LeafLogPort
 port (LogicalPort
 m 1
@@ -24774 +24842 @@
 uid 5226,0
 )
-*865 (LeafLogPort
+*864 (LeafLogPort
 port (LogicalPort
 m 4
@@ -24786 +24854 @@
 uid 5502,0
 )
-*866 (LeafLogPort
+*865 (LeafLogPort
 port (LogicalPort
 m 4
@@ -24798 +24866 @@
 uid 5504,0
 )
-*867 (LeafLogPort
+*866 (LeafLogPort
 port (LogicalPort
 m 4
@@ -24810 +24878 @@
 uid 5600,0
 )
-*868 (LeafLogPort
+*867 (LeafLogPort
 port (LogicalPort
 lang 10
@@ -24824 +24892 @@
 uid 5642,0
 )
-*869 (LeafLogPort
+*868 (LeafLogPort
 port (LogicalPort
 m 4
@@ -24836 +24904 @@
 uid 5644,0
 )
-*870 (LeafLogPort
+*869 (LeafLogPort
 port (LogicalPort
 m 4
@@ -24849 +24917 @@
 uid 5751,0
 )
-*871 (LeafLogPort
+*870 (LeafLogPort
 port (LogicalPort
 m 1
@@ -24861 +24929 @@
 uid 5867,0
 )
-*872 (LeafLogPort
+*871 (LeafLogPort
 port (LogicalPort
 m 2
@@ -24875 +24943 @@
 uid 5869,0
 )
-*873 (LeafLogPort
+*872 (LeafLogPort
 port (LogicalPort
 m 1
@@ -24887 +24955 @@
 uid 5871,0
 )
-*874 (LeafLogPort
+*873 (LeafLogPort
 port (LogicalPort
 m 1
@@ -24900 +24968 @@
 uid 5873,0
 )
+*874 (LeafLogPort
+port (LogicalPort
+m 4
+decl (Decl
+n "new_config"
+t "std_logic"
+o 92
+suid 155,0
+i "'0'"
+)
+)
+uid 5966,0
+)
 *875 (LeafLogPort
 port (LogicalPort
 m 4
 decl (Decl
-n "new_config"
-t "std_logic"
-o 92
-suid 155,0
-i "'0'"
-)
-)
-uid 5966,0
+n "config_started"
+t "std_logic"
+o 70
+suid 156,0
+)
+)
+uid 5968,0
 )
 *876 (LeafLogPort
@@ -24917 +24997 @@
 m 4
 decl (Decl
-n "config_started"
-t "std_logic"
-o 70
-suid 156,0
-)
-)
-uid 5968,0
+n "config_started_spi"
+t "std_logic"
+o 73
+suid 159,0
+i "'0'"
+)
+)
+uid 6022,0
 )
 *877 (LeafLogPort
@@ -24929 +25010 @@
 m 4
 decl (Decl
-n "config_started_spi"
-t "std_logic"
-o 73
-suid 159,0
+n "config_started_cu"
+t "std_logic"
+o 71
+suid 160,0
 i "'0'"
 )
 )
-uid 6022,0
+uid 6024,0
 )
 *878 (LeafLogPort
@@ -24942 +25023 @@
 m 4
 decl (Decl
-n "config_started_cu"
-t "std_logic"
-o 71
-suid 160,0
-i "'0'"
-)
-)
-uid 6024,0
-)
-*879 (LeafLogPort
-port (LogicalPort
-m 4
-decl (Decl
 n "config_started_mm"
 t "std_logic"
@@ -24963 +25031 @@
 uid 6026,0
 )
-*880 (LeafLogPort
+*879 (LeafLogPort
 port (LogicalPort
 m 1
@@ -24976 +25044 @@
 uid 6172,0
 )
-*881 (LeafLogPort
+*880 (LeafLogPort
 port (LogicalPort
 m 1
@@ -24991 +25059 @@
 uid 6374,0
 )
+*881 (LeafLogPort
+port (LogicalPort
+m 4
+decl (Decl
+n "dwrite_enable"
+t "std_logic"
+o 91
+suid 167,0
+i "'1'"
+)
+)
+uid 6464,0
+)
 *882 (LeafLogPort
 port (LogicalPort
 m 4
 decl (Decl
-n "dwrite_enable"
-t "std_logic"
-o 91
-suid 167,0
-i "'1'"
-)
-)
-uid 6464,0
-)
-*883 (LeafLogPort
-port (LogicalPort
-m 4
-decl (Decl
 n "dwrite"
 t "std_logic"
@@ -25017 +25085 @@
 uid 6554,0
 )
-*884 (LeafLogPort
+*883 (LeafLogPort
 port (LogicalPort
 lang 2
@@ -25030 +25098 @@
 uid 8420,0
 )
+*884 (LeafLogPort
+port (LogicalPort
+m 4
+decl (Decl
+n "sclk1"
+t "std_logic"
+o 107
+suid 191,0
+)
+)
+uid 8758,0
+)
 *885 (LeafLogPort
 port (LogicalPort
 m 4
 decl (Decl
-n "sclk1"
-t "std_logic"
-o 107
-suid 191,0
-)
-)
-uid 8758,0
-)
-*886 (LeafLogPort
-port (LogicalPort
-m 4
-decl (Decl
 n "sclk_enable"
 t "std_logic"
@@ -25054 +25122 @@
 uid 8760,0
 )
-*887 (LeafLogPort
+*886 (LeafLogPort
 port (LogicalPort
 m 1
@@ -25067 +25135 @@
 uid 9018,0
 )
-*888 (LeafLogPort
+*887 (LeafLogPort
 port (LogicalPort
 m 4
@@ -25082 +25150 @@
 uid 9247,0
 )
-*889 (LeafLogPort
+*888 (LeafLogPort
 port (LogicalPort
 m 4
@@ -25098 +25166 @@
 uid 9249,0
 )
-*890 (LeafLogPort
+*889 (LeafLogPort
 port (LogicalPort
 m 4
@@ -25113 +25181 @@
 uid 10024,0
 )
+*890 (LeafLogPort
+port (LogicalPort
+m 4
+decl (Decl
+n "srclk_enable"
+t "std_logic"
+o 113
+suid 222,0
+i "'0'"
+)
+)
+uid 10026,0
+)
 *891 (LeafLogPort
 port (LogicalPort
 m 4
 decl (Decl
-n "srclk_enable"
-t "std_logic"
-o 113
-suid 222,0
-i "'0'"
-)
-)
-uid 10026,0
-)
-*892 (LeafLogPort
-port (LogicalPort
-m 4
-decl (Decl
 n "SRCLK1"
 t "std_logic"
@@ -25139 +25207 @@
 uid 10028,0
 )
-*893 (LeafLogPort
+*892 (LeafLogPort
 port (LogicalPort
 m 4
@@ -25155 +25223 @@
 uid 10208,0
 )
-*894 (LeafLogPort
+*893 (LeafLogPort
 port (LogicalPort
 m 4
@@ -25171 +25239 @@
 uid 10210,0
 )
+*894 (LeafLogPort
+port (LogicalPort
+m 4
+decl (Decl
+n "s_trigger"
+t "std_logic"
+o 105
+suid 230,0
+)
+)
+uid 10294,0
+)
 *895 (LeafLogPort
 port (LogicalPort
 m 4
 decl (Decl
-n "s_trigger"
-t "std_logic"
-o 105
-suid 230,0
-)
-)
-uid 10294,0
+n "start_srin_write_8b"
+t "std_logic"
+o 116
+suid 231,0
+)
+)
+uid 10334,0
 )
 *896 (LeafLogPort
@@ -25187 +25267 @@
 m 4
 decl (Decl
-n "start_srin_write_8b"
-t "std_logic"
-o 116
-suid 231,0
-)
-)
-uid 10334,0
+n "srin_write_ack"
+t "std_logic"
+o 114
+suid 232,0
+i "'0'"
+)
+)
+uid 10336,0
 )
 *897 (LeafLogPort
@@ -25199 +25280 @@
 m 4
 decl (Decl
-n "srin_write_ack"
-t "std_logic"
-o 114
-suid 232,0
-i "'0'"
-)
-)
-uid 10336,0
-)
-*898 (LeafLogPort
-port (LogicalPort
-m 4
-decl (Decl
 n "srin_write_ready"
 t "std_logic"
@@ -25221 +25289 @@
 uid 10338,0
 )
-*899 (LeafLogPort
+*898 (LeafLogPort
 port (LogicalPort
 m 4
@@ -25235 +25303 @@
 uid 10340,0
 )
-*900 (LeafLogPort
+*899 (LeafLogPort
 port (LogicalPort
 m 1
@@ -25248 +25316 @@
 uid 10342,0
 )
-*901 (LeafLogPort
-port (LogicalPort
-m 4
-decl (Decl
-n "trigger_out"
-t "std_logic"
-preAdd 0
-posAdd 0
-o 120
-suid 240,0
-)
-)
-uid 10473,0
-)
-*902 (LeafLogPort
+*900 (LeafLogPort
 port (LogicalPort
 lang 2
@@ -25279 +25333 @@
 uid 10475,0
 )
+*901 (LeafLogPort
+port (LogicalPort
+m 4
+decl (Decl
+n "socks_connected"
+t "std_logic"
+o 111
+suid 243,0
+)
+)
+uid 10763,0
+)
+*902 (LeafLogPort
+port (LogicalPort
+m 4
+decl (Decl
+n "socks_waiting"
+t "std_logic"
+o 112
+suid 244,0
+)
+)
+uid 10765,0
+)
 *903 (LeafLogPort
 port (LogicalPort
-m 4
-decl (Decl
-n "socks_connected"
-t "std_logic"
-o 111
-suid 243,0
-)
-)
-uid 10763,0
+m 1
+decl (Decl
+n "green"
+t "std_logic"
+o 34
+suid 248,0
+)
+)
+uid 10767,0
 )
 *904 (LeafLogPort
 port (LogicalPort
-m 4
-decl (Decl
-n "socks_waiting"
-t "std_logic"
-o 112
-suid 244,0
-)
-)
-uid 10765,0
+m 1
+decl (Decl
+n "amber"
+t "std_logic"
+o 29
+suid 249,0
+)
+)
+uid 10769,0
 )
 *905 (LeafLogPort
@@ -25307 +25385 @@
 m 1
 decl (Decl
-n "green"
-t "std_logic"
-o 34
-suid 248,0
-)
-)
-uid 10767,0
+n "red"
+t "std_logic"
+o 39
+suid 250,0
+)
+)
+uid 10771,0
 )
 *906 (LeafLogPort
 port (LogicalPort
-m 1
-decl (Decl
-n "amber"
-t "std_logic"
-o 29
-suid 249,0
-)
-)
-uid 10769,0
+m 4
+decl (Decl
+n "drs_readout_started"
+t "std_logic"
+o 87
+suid 252,0
+)
+)
+uid 11411,0
 )
 *907 (LeafLogPort
 port (LogicalPort
-m 1
-decl (Decl
-n "red"
-t "std_logic"
-o 39
-suid 250,0
-)
-)
-uid 10771,0
-)
-*908 (LeafLogPort
-port (LogicalPort
-m 4
-decl (Decl
-n "drs_readout_started"
-t "std_logic"
-o 87
-suid 252,0
-)
-)
-uid 11411,0
-)
-*909 (LeafLogPort
-port (LogicalPort
 m 4
 decl (Decl
@@ -25363 +25417 @@
 uid 11966,0
 )
-*910 (LeafLogPort
+*908 (LeafLogPort
 port (LogicalPort
 m 4
@@ -25377 +25431 @@
 uid 12310,0
 )
-*911 (LeafLogPort
+*909 (LeafLogPort
 port (LogicalPort
 m 4
@@ -25391 +25445 @@
 uid 12659,0
 )
-*912 (LeafLogPort
+*910 (LeafLogPort
 port (LogicalPort
 m 4
@@ -25408 +25462 @@
 uid 12661,0
 )
+*911 (LeafLogPort
+port (LogicalPort
+m 4
+decl (Decl
+n "drs_readout_ready_ack"
+t "std_logic"
+o 86
+suid 267,0
+)
+)
+uid 12663,0
+)
+*912 (LeafLogPort
+port (LogicalPort
+m 1
+decl (Decl
+n "additional_flasher_out"
+t "std_logic"
+o 28
+suid 272,0
+)
+)
+uid 12719,0
+)
 *913 (LeafLogPort
 port (LogicalPort
 m 4
 decl (Decl
-n "drs_readout_ready_ack"
-t "std_logic"
-o 86
-suid 267,0
-)
-)
-uid 12663,0
-)
-*914 (LeafLogPort
-port (LogicalPort
-m 1
-decl (Decl
-n "additional_flasher_out"
-t "std_logic"
-o 28
-suid 272,0
-)
-)
-uid 12719,0
-)
-*915 (LeafLogPort
-port (LogicalPort
-m 4
-decl (Decl
 n "c_trigger_enable"
 t "std_logic"
@@ -25445 +25499 @@
 uid 13275,0
 )
-*916 (LeafLogPort
+*914 (LeafLogPort
 port (LogicalPort
 m 4
@@ -25461 +25515 @@
 uid 13277,0
 )
-*917 (LeafLogPort
+*915 (LeafLogPort
 port (LogicalPort
 m 4
@@ -25473 +25527 @@
 uid 13279,0
 )
-*918 (LeafLogPort
+*916 (LeafLogPort
 port (LogicalPort
 m 4
@@ -25485 +25539 @@
 uid 13281,0
 )
-*919 (LeafLogPort
+*917 (LeafLogPort
 port (LogicalPort
 decl (Decl
@@ -25498 +25552 @@
 scheme 0
 )
-*920 (LeafLogPort
+*918 (LeafLogPort
 port (LogicalPort
 decl (Decl
@@ -25511 +25565 @@
 scheme 0
 )
-*921 (LeafLogPort
+*919 (LeafLogPort
 port (LogicalPort
 decl (Decl
@@ -25525 +25579 @@
 scheme 0
 )
-*922 (LeafLogPort
+*920 (LeafLogPort
 port (LogicalPort
 m 1
@@ -25540 +25594 @@
 uid 14507,0
 )
-*923 (LeafLogPort
+*921 (LeafLogPort
 port (LogicalPort
 m 1
@@ -25555 +25609 @@
 uid 14509,0
 )
-*924 (LeafLogPort
+*922 (LeafLogPort
 port (LogicalPort
 m 1
@@ -25569 +25623 @@
 uid 14634,0
 )
-*925 (LeafLogPort
+*923 (LeafLogPort
 port (LogicalPort
 m 4
@@ -25584 +25638 @@
 uid 15144,0
 )
-*926 (LeafLogPort
+*924 (LeafLogPort
 port (LogicalPort
 m 4
@@ -25599 +25653 @@
 uid 15146,0
 )
-*927 (LeafLogPort
+*925 (LeafLogPort
 port (LogicalPort
 m 4
@@ -25614 +25668 @@
 uid 15148,0
 )
+*926 (LeafLogPort
+port (LogicalPort
+m 4
+decl (Decl
+n "trigger_out"
+t "std_logic"
+o 123
+suid 301,0
+i "'0'"
+)
+)
+uid 15504,0
+)
 ]
 )
@@ -25621 +25688 @@
 uid 67,0
 optionalChildren [
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+*927 (Sheet
 sheetRow (SheetRow
 headerVa (MVa
@@ -25638 +25705 @@
 font "Tahoma,10,0"
 )
-emptyMRCItem *929 (MRCItem
-litem &792
+emptyMRCItem *928 (MRCItem
+litem &791
 pos 123
 dimension 20
@@ -25645 +25712 @@
 uid 69,0
 optionalChildren [
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-litem &793
+*929 (MRCItem
+litem &792
 pos 0
 dimension 20
 uid 70,0
 )
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-litem &794
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 pos 1
 dimension 23
 uid 71,0
 )
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-litem &795
+*931 (MRCItem
+litem &794
 pos 2
 hidden 1
@@ -25664 +25731 @@
 uid 72,0
 )
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-litem &805
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 pos 37
 dimension 20
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-litem &806
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 pos 38
 dimension 20
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-litem &807
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 pos 39
 dimension 20
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 pos 40
 dimension 20
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 )
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-litem &809
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 pos 41
 dimension 20
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-litem &810
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 pos 0
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-litem &811
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 pos 1
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 uid 537,0
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-litem &812
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 pos 2
 dimension 20
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-litem &813
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 pos 3
 dimension 20
 uid 541,0
 )
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-litem &814
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 pos 4
 dimension 20
 uid 543,0
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-litem &815
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 pos 5
 dimension 20
 uid 547,0
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-litem &816
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 pos 6
 dimension 20
 uid 549,0
 )
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-litem &817
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 pos 8
 dimension 20
 uid 1456,0
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-litem &818
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 pos 7
 dimension 20
 uid 1458,0
 )
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-litem &819
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 pos 9
 dimension 20
 uid 1695,0
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-litem &820
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 pos 42
 dimension 20
 uid 1994,0
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-litem &821
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 pos 43
 dimension 20
 uid 2306,0
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-litem &822
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 pos 44
 dimension 20
 uid 2511,0
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-litem &823
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 pos 45
 dimension 20
 uid 2513,0
 )
-*952 (MRCItem
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 pos 46
 dimension 20
 uid 2515,0
 )
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 pos 47
 dimension 20
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 )
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 pos 48
 dimension 20
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 )
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 pos 49
 dimension 20
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 )
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 pos 50
 dimension 20
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 )
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 pos 51
 dimension 20
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 )
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 pos 52
 dimension 20
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 )
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 pos 53
 dimension 20
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 )
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 pos 54
 dimension 20
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 )
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 pos 55
 dimension 20
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 )
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 pos 56
 dimension 20
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 )
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 pos 10
 dimension 20
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 )
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 pos 57
 dimension 20
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 )
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 pos 11
 dimension 20
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 )
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 pos 12
 dimension 20
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 )
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 pos 58
 dimension 20
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 )
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 pos 13
 dimension 20
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 )
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 pos 14
 dimension 20
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 )
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 pos 15
 dimension 20
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 )
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 pos 59
 dimension 20
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 )
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 pos 60
 dimension 20
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 )
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 pos 61
 dimension 20
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 )
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 pos 16
 dimension 20
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 )
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 pos 17
 dimension 20
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 )
-*976 (MRCItem
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 pos 18
 dimension 20
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 )
-*977 (MRCItem
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 pos 19
 dimension 20
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 )
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-litem &850
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 pos 20
 dimension 20
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 )
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-litem &851
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 pos 21
 dimension 20
 uid 4740,0
 )
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-litem &852
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 pos 62
 dimension 20
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 )
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 pos 22
 dimension 20
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 )
-*982 (MRCItem
-litem &854
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 pos 23
 dimension 20
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 )
-*983 (MRCItem
-litem &855
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 pos 63
 dimension 20
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 )
-*984 (MRCItem
-litem &856
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 pos 64
 dimension 20
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 )
-*985 (MRCItem
-litem &857
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 pos 65
 dimension 20
 uid 5203,0
 )
-*986 (MRCItem
-litem &858
+*985 (MRCItem
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 pos 66
 dimension 20
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 )
-*987 (MRCItem
-litem &859
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 pos 67
 dimension 20
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 )
-*988 (MRCItem
-litem &860
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 pos 68
 dimension 20
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 )
-*989 (MRCItem
-litem &861
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 pos 69
 dimension 20
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 )
-*990 (MRCItem
-litem &862
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 pos 70
 dimension 20
 uid 5213,0
 )
-*991 (MRCItem
-litem &863
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 pos 71
 dimension 20
 uid 5215,0
 )
-*992 (MRCItem
-litem &864
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 pos 24
 dimension 20
 uid 5227,0
 )
-*993 (MRCItem
-litem &865
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 pos 72
 dimension 20
 uid 5503,0
 )
-*994 (MRCItem
-litem &866
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 pos 73
 dimension 20
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 )
-*995 (MRCItem
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 pos 74
 dimension 20
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 )
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 pos 75
 dimension 20
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 )
-*997 (MRCItem
-litem &869
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 pos 76
 dimension 20
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 )
-*998 (MRCItem
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 pos 77
 dimension 20
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 )
-*999 (MRCItem
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 pos 25
 dimension 20
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 )
-*1000 (MRCItem
-litem &872
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 pos 26
 dimension 20
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 )
-*1001 (MRCItem
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 pos 27
 dimension 20
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 )
-*1002 (MRCItem
-litem &874
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 pos 28
 dimension 20
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 )
-*1003 (MRCItem
-litem &875
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 pos 78
 dimension 20
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 )
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-litem &876
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 pos 79
 dimension 20
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 )
-*1005 (MRCItem
-litem &877
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 pos 80
 dimension 20
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 )
-*1006 (MRCItem
-litem &878
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 pos 81
 dimension 20
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 )
-*1007 (MRCItem
-litem &879
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 pos 82
 dimension 20
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 )
-*1008 (MRCItem
-litem &880
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 pos 29
 dimension 20
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 )
-*1009 (MRCItem
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 pos 30
 dimension 20
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 )
-*1010 (MRCItem
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 pos 83
 dimension 20
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-*1011 (MRCItem
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 pos 84
 dimension 20
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-*1012 (MRCItem
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 pos 85
 dimension 20
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 pos 86
 dimension 20
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-*1014 (MRCItem
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 pos 87
 dimension 20
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 )
-*1015 (MRCItem
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 pos 31
 dimension 20
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 )
-*1016 (MRCItem
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 pos 88
 dimension 20
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 )
-*1017 (MRCItem
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 pos 89
 dimension 20
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 )
-*1018 (MRCItem
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 pos 90
 dimension 20
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 pos 91
 dimension 20
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 )
-*1020 (MRCItem
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 pos 92
 dimension 20
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 pos 93
 dimension 20
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 pos 94
 dimension 20
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 pos 95
 dimension 20
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 )
-*1024 (MRCItem
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 pos 96
 dimension 20
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 )
-*1025 (MRCItem
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 pos 97
 dimension 20
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 )
-*1026 (MRCItem
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 pos 98
 dimension 20
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 )
-*1027 (MRCItem
-litem &899
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 pos 99
 dimension 20
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 )
-*1028 (MRCItem
-litem &900
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 pos 32
 dimension 20
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 )
+*1028 (MRCItem
+litem &900
+pos 100
+dimension 20
+uid 10476,0
+)
 *1029 (MRCItem
 litem &901
-pos 100
+pos 101
 dimension 20
-uid 10474,0
+uid 10764,0
 )
 *1030 (MRCItem
 litem &902
-pos 101
+pos 102
 dimension 20
-uid 10476,0
+uid 10766,0
 )
 *1031 (MRCItem
 litem &903
-pos 102
-dimension 20
-uid 10764,0
-)
-*1032 (MRCItem
-litem &904
-pos 103
-dimension 20
-uid 10766,0
-)
-*1033 (MRCItem
-litem &905
 pos 33
 dimension 20
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 )
-*1034 (MRCItem
-litem &906
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 pos 34
 dimension 20
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 )
-*1035 (MRCItem
-litem &907
+*1033 (MRCItem
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 pos 35
 dimension 20
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 )
+*1034 (MRCItem
+litem &906
+pos 103
+dimension 20
+uid 11412,0
+)
+*1035 (MRCItem
+litem &907
+pos 104
+dimension 20
+uid 11967,0
+)
 *1036 (MRCItem
 litem &908
-pos 104
+pos 105
 dimension 20
-uid 11412,0
+uid 12311,0
 )
 *1037 (MRCItem
 litem &909
-pos 105
+pos 106
 dimension 20
-uid 11967,0
+uid 12660,0
 )
 *1038 (MRCItem
 litem &910
-pos 106
+pos 107
 dimension 20
-uid 12311,0
+uid 12662,0
 )
 *1039 (MRCItem
 litem &911
-pos 107
+pos 108
 dimension 20
-uid 12660,0
+uid 12664,0
 )
 *1040 (MRCItem
 litem &912
-pos 108
+pos 36
 dimension 20
-uid 12662,0
+uid 12720,0
 )
 *1041 (MRCItem
@@ -26316 +26389 @@
 pos 109
 dimension 20
-uid 12664,0
+uid 13276,0
 )
 *1042 (MRCItem
 litem &914
-pos 36
+pos 110
 dimension 20
-uid 12720,0
+uid 13278,0
 )
 *1043 (MRCItem
 litem &915
-pos 110
+pos 111
 dimension 20
-uid 13276,0
+uid 13280,0
 )
 *1044 (MRCItem
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-pos 111
+pos 112
 dimension 20
-uid 13278,0
+uid 13282,0
 )
 *1045 (MRCItem
 litem &917
-pos 112
+pos 113
 dimension 20
-uid 13280,0
+uid 13688,0
 )
 *1046 (MRCItem
 litem &918
-pos 113
+pos 114
 dimension 20
-uid 13282,0
+uid 14041,0
 )
 *1047 (MRCItem
 litem &919
-pos 114
+pos 115
 dimension 20
-uid 13688,0
+uid 14164,0
 )
 *1048 (MRCItem
 litem &920
-pos 115
+pos 116
 dimension 20
-uid 14041,0
+uid 14508,0
 )
 *1049 (MRCItem
 litem &921
-pos 116
+pos 117
 dimension 20
-uid 14164,0
+uid 14510,0
 )
 *1050 (MRCItem
 litem &922
-pos 117
+pos 118
 dimension 20
-uid 14508,0
+uid 14635,0
 )
 *1051 (MRCItem
 litem &923
-pos 118
+pos 119
 dimension 20
-uid 14510,0
+uid 15145,0
 )
 *1052 (MRCItem
 litem &924
-pos 119
+pos 120
 dimension 20
-uid 14635,0
+uid 15147,0
 )
 *1053 (MRCItem
 litem &925
-pos 120
+pos 121
 dimension 20
-uid 15145,0
+uid 15149,0
 )
 *1054 (MRCItem
 litem &926
-pos 121
-dimension 20
-uid 15147,0
-)
-*1055 (MRCItem
-litem &927
 pos 122
 dimension 20
-uid 15149,0
+uid 15505,0
 )
 ]
@@ -26413 +26480 @@
 uid 73,0
 optionalChildren [
-*1056 (MRCItem
-litem &796
+*1055 (MRCItem
+litem &795
 pos 0
 dimension 20
 uid 74,0
 )
-*1057 (MRCItem
-litem &798
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 pos 1
 dimension 50
 uid 75,0
 )
-*1058 (MRCItem
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 pos 2
 dimension 100
 uid 76,0
 )
-*1059 (MRCItem
-litem &800
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 pos 3
 dimension 50
 uid 77,0
 )
-*1060 (MRCItem
-litem &801
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 pos 4
 dimension 100
 uid 78,0
 )
-*1061 (MRCItem
-litem &802
+*1060 (MRCItem
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 pos 5
 dimension 100
 uid 79,0
 )
-*1062 (MRCItem
-litem &803
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 pos 6
 dimension 50
 uid 80,0
 )
-*1063 (MRCItem
-litem &804
+*1062 (MRCItem
+litem &803
 pos 7
 dimension 290
@@ -26476 +26543 @@
 genericsCommonDM (CommonDM
 ldm (LogicalDM
-emptyRow *1064 (LEmptyRow
+emptyRow *1063 (LEmptyRow
 )
 uid 83,0
 optionalChildren [
-*1065 (RefLabelRowHdr
-)
-*1066 (TitleRowHdr
-)
-*1067 (FilterRowHdr
-)
-*1068 (RefLabelColHdr
+*1064 (RefLabelRowHdr
+)
+*1065 (TitleRowHdr
+)
+*1066 (FilterRowHdr
+)
+*1067 (RefLabelColHdr
 tm "RefLabelColHdrMgr"
 )
-*1069 (RowExpandColHdr
+*1068 (RowExpandColHdr
 tm "RowExpandColHdrMgr"
 )
-*1070 (GroupColHdr
+*1069 (GroupColHdr
 tm "GroupColHdrMgr"
 )
-*1071 (NameColHdr
+*1070 (NameColHdr
 tm "GenericNameColHdrMgr"
 )
-*1072 (TypeColHdr
+*1071 (TypeColHdr
 tm "GenericTypeColHdrMgr"
 )
-*1073 (InitColHdr
+*1072 (InitColHdr
 tm "GenericValueColHdrMgr"
 )
-*1074 (PragmaColHdr
+*1073 (PragmaColHdr
 tm "GenericPragmaColHdrMgr"
 )
-*1075 (EolColHdr
+*1074 (EolColHdr
 tm "GenericEolColHdrMgr"
 )
-*1076 (LogGeneric
+*1075 (LogGeneric
 generic (GiElement
 name "RAMADDRWIDTH64b"
@@ -26525 +26592 @@
 uid 95,0
 optionalChildren [
-*1077 (Sheet
+*1076 (Sheet
 sheetRow (SheetRow
 headerVa (MVa
@@ -26542 +26609 @@
 font "Tahoma,10,0"
 )
-emptyMRCItem *1078 (MRCItem
-litem &1064
+emptyMRCItem *1077 (MRCItem
+litem &1063
 pos 1
 dimension 20
@@ -26549 +26616 @@
 uid 97,0
 optionalChildren [
-*1079 (MRCItem
-litem &1065
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 pos 0
 dimension 20
 uid 98,0
 )
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-litem &1066
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 pos 1
 dimension 23
 uid 99,0
 )
-*1081 (MRCItem
-litem &1067
+*1080 (MRCItem
+litem &1066
 pos 2
 hidden 1
@@ -26568 +26635 @@
 uid 100,0
 )
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-litem &1076
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 pos 0
 dimension 20
@@ -26585 +26652 @@
 uid 101,0
 optionalChildren [
-*1083 (MRCItem
-litem &1068
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 pos 0
 dimension 20
 uid 102,0
 )
-*1084 (MRCItem
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 pos 1
 dimension 50
 uid 103,0
 )
-*1085 (MRCItem
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 pos 2
 dimension 186
 uid 104,0
 )
-*1086 (MRCItem
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 pos 3
 dimension 96
 uid 105,0
 )
-*1087 (MRCItem
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 pos 4
 dimension 50
 uid 106,0
 )
-*1088 (MRCItem
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 pos 5
 dimension 50
 uid 107,0
 )
-*1089 (MRCItem
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+*1088 (MRCItem
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 pos 6
 dimension 80

firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib/hds/@f@a@d_main/struct.bd.bak

@@ -333 +333 @@
 (vvPair
 variable "date"
-value "04.02.2011"
+value "08.02.2011"
 )
 (vvPair
 variable "day"
-value "Fr"
+value "Di"
 )
 (vvPair
 variable "day_long"
-value "Freitag"
+value "Dienstag"
 )
 (vvPair
 variable "dd"
-value "04"
+value "08"
 )
 (vvPair
@@ -485 +485 @@
 (vvPair
 variable "time"
-value "11:32:44"
+value "11:05:26"
 )
 (vvPair
@@ -576 +576 @@
 font "Courier New,8,0"
 )
-xt "-172000,106800,-128500,107600"
+xt "-172000,106000,-128500,106800"
 st "SIGNAL write_ea               : std_logic_vector(0 downto 0)                 := \"0\"
 "
@@ -1303 +1303 @@
 fg "0,65535,0"
 )
-xt "0,65625,750,66375"
+xt "0,70625,750,71375"
 )
 tg (CPTG
@@ -1313 +1313 @@
 va (VaSet
 )
-xt "-17300,65500,-1000,66500"
+xt "-17300,70500,-1000,71500"
 st "ram_start_addr : (RAM_ADDR_WIDTH-1:0)"
 ju 2
-blo "-1000,66300"
+blo "-1000,71300"
 )
 )
@@ -1378 +1378 @@
 fg "0,65535,0"
 )
-xt "-21750,70625,-21000,71375"
+xt "-21750,69625,-21000,70375"
 )
 tg (CPTG
@@ -1388 +1388 @@
 va (VaSet
 )
-xt "-20000,70500,-13200,71500"
+xt "-20000,69500,-13200,70500"
 st "trigger_id : (47:0)"
-blo "-20000,71300"
+blo "-20000,70300"
 )
 )
@@ -1486 +1486 @@
 fg "0,65535,0"
 )
-xt "0,66625,750,67375"
+xt "0,71625,750,72375"
 )
 tg (CPTG
@@ -1496 +1496 @@
 va (VaSet
 )
-xt "-6300,66500,-1000,67500"
+xt "-6300,71500,-1000,72500"
 st "ram_write_ea"
 ju 2
-blo "-1000,67300"
+blo "-1000,72300"
 )
 )
@@ -1521 +1521 @@
 fg "0,65535,0"
 )
-xt "0,67625,750,68375"
+xt "0,72625,750,73375"
 )
 tg (CPTG
@@ -1531 +1531 @@
 va (VaSet
 )
-xt "-7300,67500,-1000,68500"
+xt "-7300,72500,-1000,73500"
 st "ram_write_ready"
 ju 2
-blo "-1000,68300"
+blo "-1000,73300"
 )
 )
@@ -1559 +1559 @@
 fg "0,65535,0"
 )
-xt "0,76625,750,77375"
+xt "0,78625,750,79375"
 )
 tg (CPTG
@@ -1569 +1569 @@
 va (VaSet
 )
-xt "-4000,76500,-1000,77500"
+xt "-4000,78500,-1000,79500"
 st "roi_max"
 ju 2
-blo "-1000,77300"
+blo "-1000,79300"
 )
 )
@@ -1629 +1629 @@
 fg "0,65535,0"
 )
-xt "0,77625,750,78375"
+xt "0,79625,750,80375"
 )
 tg (CPTG
@@ -1639 +1639 @@
 va (VaSet
 )
-xt "-10100,77500,-1000,78500"
+xt "-10100,79500,-1000,80500"
 st "package_length : (15:0)"
 ju 2
-blo "-1000,78300"
+blo "-1000,80300"
 )
 )
@@ -2028 +2028 @@
 fg "0,65535,0"
 )
-xt "0,74625,750,75375"
+xt "0,77625,750,78375"
 )
 tg (CPTG
@@ -2038 +2038 @@
 va (VaSet
 )
-xt "-7700,74500,-1000,75500"
+xt "-7700,77500,-1000,78500"
 st "config_ready_mm"
 ju 2
-blo "-1000,75300"
+blo "-1000,78300"
 )
 )
@@ -2168 +2168 @@
 fg "0,65535,0"
 )
-xt "0,72625,750,73375"
+xt "0,75625,750,76375"
 )
 tg (CPTG
@@ -2178 +2178 @@
 va (VaSet
 )
-xt "-7400,72500,-1000,73500"
+xt "-7400,75500,-1000,76500"
 st "config_start_mm"
 ju 2
-blo "-1000,73300"
+blo "-1000,76300"
 )
 )
@@ -2356 +2356 @@
 fg "0,65535,0"
 )
-xt "0,73625,750,74375"
+xt "0,76625,750,77375"
 )
 tg (CPTG
@@ -2366 +2366 @@
 va (VaSet
 )
-xt "-8200,73500,-1000,74500"
+xt "-8200,76500,-1000,77500"
 st "config_started_mm"
 ju 2
-blo "-1000,74300"
+blo "-1000,77300"
 )
 )
@@ -2638 +2638 @@
 fg "0,65535,0"
 )
-xt "0,68625,750,69375"
+xt "0,73625,750,74375"
 )
 tg (CPTG
@@ -2648 +2648 @@
 va (VaSet
 )
-xt "-8800,68500,-1000,69500"
+xt "-8800,73500,-1000,74500"
 st "ram_write_ready_ack"
 ju 2
-blo "-1000,69300"
+blo "-1000,74300"
 )
 )
@@ -2799 +2799 @@
 font "Arial,8,1"
 )
-xt "-20700,97000,-14500,98000"
+xt "-20700,98000,-14500,99000"
 st "FACT_FAD_lib"
-blo "-20700,97800"
+blo "-20700,98800"
 tm "BdLibraryNameMgr"
 )
@@ -2809 +2809 @@
 font "Arial,8,1"
 )
-xt "-20700,98000,-14300,99000"
+xt "-20700,99000,-14300,100000"
 st "data_generator"
-blo "-20700,98800"
+blo "-20700,99800"
 tm "CptNameMgr"
 )
@@ -2819 +2819 @@
 font "Arial,8,1"
 )
-xt "-20700,99000,-11100,100000"
+xt "-20700,100000,-11100,101000"
 st "I_main_data_generator"
-blo "-20700,99800"
+blo "-20700,100800"
 tm "InstanceNameMgr"
 )
@@ -3271 +3271 @@
 fg "0,65535,0"
 )
-xt "87250,71625,88000,72375"
+xt "87250,72625,88000,73375"
 )
 tg (CPTG
@@ -3281 +3281 @@
 va (VaSet
 )
-xt "89000,71500,96900,72500"
+xt "89000,72500,96900,73500"
 st "write_length : (16:0)"
-blo "89000,72300"
+blo "89000,73300"
 )
 )
@@ -3308 +3308 @@
 fg "0,65535,0"
 )
-xt "87250,72625,88000,73375"
+xt "87250,73625,88000,74375"
 )
 tg (CPTG
@@ -3318 +3318 @@
 va (VaSet
 )
-xt "89000,72500,105300,73500"
+xt "89000,73500,105300,74500"
 st "ram_start_addr : (RAM_ADDR_WIDTH-1:0)"
-blo "89000,73300"
+blo "89000,74300"
 )
 )
@@ -3420 +3420 @@
 fg "0,65535,0"
 )
-xt "87250,70625,88000,71375"
+xt "87250,71625,88000,72375"
 )
 tg (CPTG
@@ -3430 +3430 @@
 va (VaSet
 )
-xt "89000,70500,93100,71500"
+xt "89000,71500,93100,72500"
 st "data_valid"
-blo "89000,71300"
+blo "89000,72300"
 )
 )
@@ -3456 +3456 @@
 fg "0,65535,0"
 )
-xt "87250,69625,88000,70375"
+xt "87250,70625,88000,71375"
 )
 tg (CPTG
@@ -3466 +3466 @@
 va (VaSet
 )
-xt "89000,69500,90900,70500"
+xt "89000,70500,90900,71500"
 st "busy"
-blo "89000,70300"
+blo "89000,71300"
 )
 )
@@ -3494 +3494 @@
 fg "0,65535,0"
 )
-xt "87250,73625,88000,74375"
+xt "87250,74625,88000,75375"
 )
 tg (CPTG
@@ -3504 +3504 @@
 va (VaSet
 )
-xt "89000,73500,96800,74500"
+xt "89000,74500,96800,75500"
 st "fifo_channels : (3:0)"
-blo "89000,74300"
+blo "89000,75300"
 )
 )
@@ -3530 +3530 @@
 fg "0,65535,0"
 )
-xt "87250,74625,88000,75375"
+xt "87250,75625,88000,76375"
 )
 tg (CPTG
@@ -3540 +3540 @@
 va (VaSet
 )
-xt "89000,74500,94700,75500"
+xt "89000,75500,94700,76500"
 st "write_end_flag"
-blo "89000,75300"
+blo "89000,76300"
 )
 )
@@ -3564 +3564 @@
 fg "0,65535,0"
 )
-xt "87250,75625,88000,76375"
+xt "87250,76625,88000,77375"
 )
 tg (CPTG
@@ -3574 +3574 @@
 va (VaSet
 )
-xt "89000,75500,95800,76500"
+xt "89000,76500,95800,77500"
 st "write_header_flag"
-blo "89000,76300"
+blo "89000,77300"
 )
 )
@@ -4008 +4008 @@
 fg "0,65535,0"
 )
-xt "87250,76625,88000,77375"
+xt "87250,77625,88000,78375"
 )
 tg (CPTG
@@ -4018 +4018 @@
 va (VaSet
 )
-xt "89000,76500,94600,77500"
+xt "89000,77500,94600,78500"
 st "data_valid_ack"
-blo "89000,77300"
+blo "89000,78300"
 )
 )
@@ -4718 +4718 @@
 fg "0,65535,0"
 )
-xt "-41000,67625,-40250,68375"
+xt "-41000,68625,-40250,69375"
 )
 tg (CPTG
@@ -4728 +4728 @@
 va (VaSet
 )
-xt "-48800,67500,-42000,68500"
+xt "-48800,68500,-42000,69500"
 st "trigger_id : (47:0)"
 ju 2
-blo "-42000,68300"
+blo "-42000,69300"
 )
 )
@@ -4758 +4758 @@
 fg "0,65535,0"
 )
-xt "-52750,67625,-52000,68375"
+xt "-52750,68625,-52000,69375"
 )
 tg (CPTG
@@ -4768 +4768 @@
 va (VaSet
 )
-xt "-51000,67500,-48200,68500"
+xt "-51000,68500,-48200,69500"
 st "trigger"
-blo "-51000,68300"
+blo "-51000,69300"
 )
 )
@@ -4795 +4795 @@
 fg "0,65535,0"
 )
-xt "-52750,66625,-52000,67375"
+xt "-52750,67625,-52000,68375"
 )
 tg (CPTG
@@ -4805 +4805 @@
 va (VaSet
 )
-xt "-51000,66500,-49700,67500"
+xt "-51000,67500,-49700,68500"
 st "clk"
-blo "-51000,67300"
+blo "-51000,68300"
 )
 )
@@ -4829 +4829 @@
 lineWidth 2
 )
-xt "-52000,66000,-41000,70000"
+xt "-52000,67000,-41000,71000"
 )
 oxt "32000,2000,43000,12000"
@@ -4843 +4843 @@
 font "Arial,8,1"
 )
-xt "-50300,70000,-43700,71000"
+xt "-50300,71000,-43700,72000"
 st "FACT_FAD_LIB"
-blo "-50300,70800"
+blo "-50300,71800"
 tm "BdLibraryNameMgr"
 )
@@ -4854 +4854 @@
 font "Arial,8,1"
 )
-xt "-50300,71000,-43700,72000"
+xt "-50300,72000,-43700,73000"
 st "trigger_counter"
-blo "-50300,71800"
+blo "-50300,72800"
 tm "CptNameMgr"
 )
@@ -4865 +4865 @@
 font "Arial,8,1"
 )
-xt "-50300,71000,-42700,72000"
+xt "-50300,72000,-42700,73000"
 st "I_main_ext_trigger"
-blo "-50300,71800"
+blo "-50300,72800"
 tm "InstanceNameMgr"
 )
@@ -4882 +4882 @@
 font "Courier New,8,0"
 )
-xt "-52000,65000,-52000,65000"
+xt "-52000,66000,-52000,66000"
 )
 header ""
@@ -4896 +4896 @@
 fg "49152,49152,49152"
 )
-xt "-51750,68250,-50250,69750"
+xt "-51750,69250,-50250,70750"
 iconName "VhdlFileViewIcon.png"
 iconMaskName "VhdlFileViewIcon.msk"
@@ -4964 +4964 @@
 fg "0,65535,0"
 )
-xt "31250,72625,32000,73375"
+xt "27250,70625,28000,71375"
 )
 tg (CPTG
@@ -4975 +4975 @@
 font "arial,8,0"
 )
-xt "33000,72500,51400,73500"
+xt "29000,70500,47400,71500"
 st "ram_start_addr : (RAM_ADDR_WIDTH_64B-1:0)"
-blo "33000,73300"
+blo "29000,71300"
 )
 )
@@ -5000 +5000 @@
 shape (Triangle
 uid 2352,0
-ro 90
+ro 180
 va (VaSet
 vasetType 1
 fg "0,65535,0"
 )
-xt "31250,70625,32000,71375"
+xt "28625,67250,29375,68000"
 )
 tg (CPTG
 uid 2353,0
 ps "CptPortTextPlaceStrategy"
-stg "VerticalLayoutStrategy"
+stg "RightVerticalLayoutStrategy"
 f (Text
 uid 2354,0
+ro 270
 va (VaSet
 font "arial,8,0"
 )
-xt "33000,70500,34300,71500"
+xt "28500,69000,29500,70300"
 st "clk"
-blo "33000,71300"
+ju 2
+blo "29300,69000"
 )
 )
@@ -5041 +5043 @@
 fg "0,65535,0"
 )
-xt "31250,79625,32000,80375"
+xt "27250,77625,28000,78375"
 )
 tg (CPTG
@@ -5052 +5054 @@
 font "arial,8,0"
 )
-xt "33000,79500,38100,80500"
+xt "29000,77500,34100,78500"
 st "config_ready"
-blo "33000,80300"
+blo "29000,78300"
 )
 )
@@ -5079 +5081 @@
 fg "0,65535,0"
 )
-xt "31250,77625,32000,78375"
+xt "27250,75625,28000,76375"
 )
 tg (CPTG
@@ -5090 +5092 @@
 font "arial,8,0"
 )
-xt "33000,77500,37800,78500"
+xt "29000,75500,33800,76500"
 st "config_start"
-blo "33000,78300"
+blo "29000,76300"
 )
 )
@@ -5115 +5117 @@
 fg "0,65535,0"
 )
-xt "31250,73625,32000,74375"
+xt "27250,71625,28000,72375"
 )
 tg (CPTG
@@ -5126 +5128 @@
 font "arial,8,0"
 )
-xt "33000,73500,38300,74500"
+xt "29000,71500,34300,72500"
 st "ram_write_ea"
-blo "33000,74300"
+blo "29000,72300"
 )
 )
@@ -5153 +5155 @@
 fg "0,65535,0"
 )
-xt "31250,74625,32000,75375"
+xt "27250,72625,28000,73375"
 )
 tg (CPTG
@@ -5164 +5166 @@
 font "arial,8,0"
 )
-xt "33000,74500,39300,75500"
+xt "29000,72500,35300,73500"
 st "ram_write_ready"
-blo "33000,75300"
+blo "29000,73300"
 )
 )
@@ -5190 +5192 @@
 fg "0,65535,0"
 )
-xt "31250,80625,32000,81375"
+xt "27250,78625,28000,79375"
 )
 tg (CPTG
@@ -5201 +5203 @@
 font "arial,8,0"
 )
-xt "33000,80500,36000,81500"
+xt "29000,78500,32000,79500"
 st "roi_max"
-blo "33000,81300"
+blo "29000,79300"
 )
 )
@@ -5229 +5231 @@
 fg "0,65535,0"
 )
-xt "63000,70625,63750,71375"
+xt "59000,70625,59750,71375"
 )
 tg (CPTG
@@ -5240 +5242 @@
 font "arial,8,0"
 )
-xt "58600,70500,62000,71500"
+xt "54600,70500,58000,71500"
 st "wiz_busy"
 ju 2
-blo "62000,71300"
+blo "58000,71300"
 )
 )
@@ -5266 +5268 @@
 fg "0,65535,0"
 )
-xt "63000,74625,63750,75375"
+xt "59000,74625,59750,75375"
 )
 tg (CPTG
@@ -5277 +5279 @@
 font "arial,8,0"
 )
-xt "50200,74500,62000,75500"
+xt "46200,74500,58000,75500"
 st "wiz_number_of_channels : (3:0)"
 ju 2
-blo "62000,75300"
+blo "58000,75300"
 )
 )
@@ -5306 +5308 @@
 fg "0,65535,0"
 )
-xt "63000,73625,63750,74375"
+xt "59000,73625,59750,74375"
 )
 tg (CPTG
@@ -5317 +5319 @@
 font "arial,8,0"
 )
-xt "42100,73500,62000,74500"
+xt "38100,73500,58000,74500"
 st "wiz_ram_start_addr : (RAM_ADDR_WIDTH_16B-1:0)"
 ju 2
-blo "62000,74300"
+blo "58000,74300"
 )
 )
@@ -5347 +5349 @@
 fg "0,65535,0"
 )
-xt "63000,71625,63750,72375"
+xt "59000,71625,59750,72375"
 )
 tg (CPTG
@@ -5358 +5360 @@
 font "arial,8,0"
 )
-xt "56900,71500,62000,72500"
+xt "52900,71500,58000,72500"
 st "wiz_write_ea"
 ju 2
-blo "62000,72300"
+blo "58000,72300"
 )
 )
@@ -5386 +5388 @@
 fg "0,65535,0"
 )
-xt "63000,75625,63750,76375"
+xt "59000,75625,59750,76375"
 )
 tg (CPTG
@@ -5397 +5399 @@
 font "arial,8,0"
 )
-xt "56500,75500,62000,76500"
+xt "52500,75500,58000,76500"
 st "wiz_write_end"
 ju 2
-blo "62000,76300"
+blo "58000,76300"
 )
 )
@@ -5425 +5427 @@
 fg "0,65535,0"
 )
-xt "63000,76625,63750,77375"
+xt "59000,76625,59750,77375"
 )
 tg (CPTG
@@ -5436 +5438 @@
 font "arial,8,0"
 )
-xt "55400,76500,62000,77500"
+xt "51400,76500,58000,77500"
 st "wiz_write_header"
 ju 2
-blo "62000,77300"
+blo "58000,77300"
 )
 )
@@ -5464 +5466 @@
 fg "0,65535,0"
 )
-xt "63000,72625,63750,73375"
+xt "59000,72625,59750,73375"
 )
 tg (CPTG
@@ -5475 +5477 @@
 font "arial,8,0"
 )
-xt "52600,72500,62000,73500"
+xt "48600,72500,58000,73500"
 st "wiz_write_length : (16:0)"
 ju 2
-blo "62000,73300"
+blo "58000,73300"
 )
 )
@@ -5504 +5506 @@
 fg "0,65535,0"
 )
-xt "31250,87625,32000,88375"
+xt "27250,85625,28000,86375"
 )
 tg (CPTG
@@ -5515 +5517 @@
 font "arial,8,0"
 )
-xt "33000,87500,36400,88500"
+xt "29000,85500,32400,86500"
 st "roi_array"
-blo "33000,88300"
+blo "29000,86300"
 )
 )
@@ -5542 +5544 @@
 fg "0,65535,0"
 )
-xt "31250,81625,32000,82375"
+xt "27250,79625,28000,80375"
 )
 tg (CPTG
@@ -5553 +5555 @@
 font "arial,8,0"
 )
-xt "33000,81500,42100,82500"
+xt "29000,79500,38100,80500"
 st "package_length : (15:0)"
-blo "33000,82300"
+blo "29000,80300"
 )
 )
@@ -5581 +5583 @@
 fg "0,65535,0"
 )
-xt "31250,78625,32000,79375"
+xt "27250,76625,28000,77375"
 )
 tg (CPTG
@@ -5592 +5594 @@
 font "arial,8,0"
 )
-xt "33000,78500,38600,79500"
+xt "29000,76500,34600,77500"
 st "config_started"
-blo "33000,79300"
+blo "29000,77300"
 )
 )
@@ -5619 +5621 @@
 fg "0,65535,0"
 )
-xt "63000,77625,63750,78375"
+xt "59000,77625,59750,78375"
 )
 tg (CPTG
@@ -5630 +5632 @@
 font "arial,8,0"
 )
-xt "59000,77500,62000,78500"
+xt "55000,77500,58000,78500"
 st "wiz_ack"
 ju 2
-blo "62000,78300"
+blo "58000,78300"
 )
 )
@@ -5656 +5658 @@
 fg "0,65535,0"
 )
-xt "31250,75625,32000,76375"
+xt "27250,73625,28000,74375"
 )
 tg (CPTG
@@ -5667 +5669 @@
 font "arial,8,0"
 )
-xt "33000,75500,40800,76500"
+xt "29000,73500,36800,74500"
 st "ram_write_ready_ack"
-blo "33000,76300"
+blo "29000,74300"
 )
 )
@@ -5696 +5698 @@
 lineWidth 2
 )
-xt "32000,70000,63000,90000"
+xt "28000,68000,59000,88000"
 )
 oxt "15000,6000,23000,16000"
@@ -5709 +5711 @@
 font "arial,8,1"
 )
-xt "32350,90000,38550,91000"
+xt "28350,88000,34550,89000"
 st "FACT_FAD_lib"
-blo "32350,90800"
+blo "28350,88800"
 tm "BdLibraryNameMgr"
 )
@@ -5719 +5721 @@
 font "arial,8,1"
 )
-xt "32350,91000,39650,92000"
+xt "28350,89000,35650,90000"
 st "memory_manager"
-blo "32350,91800"
+blo "28350,89800"
 tm "CptNameMgr"
 )
@@ -5729 +5731 @@
 font "arial,8,1"
 )
-xt "32350,92000,42850,93000"
+xt "28350,90000,38850,91000"
 st "I_main_memory_manager"
-blo "32350,92800"
+blo "28350,90800"
 tm "InstanceNameMgr"
 )
@@ -5746 +5748 @@
 font "Courier New,8,0"
 )
-xt "32000,68400,61500,70000"
+xt "31000,66400,60500,68000"
 st "RAM_ADDR_WIDTH_64B = RAMADDRWIDTH64b      ( integer )  
 RAM_ADDR_WIDTH_16B = RAMADDRWIDTH64b+2    ( integer )  "
@@ -5772 +5774 @@
 fg "49152,49152,49152"
 )
-xt "32250,88250,33750,89750"
+xt "28250,86250,29750,87750"
 iconName "VhdlFileViewIcon.png"
 iconMaskName "VhdlFileViewIcon.msk"
@@ -5797 +5799 @@
 font "Courier New,8,0"
 )
-xt "-172000,101200,-149500,102000"
+xt "-172000,100400,-149500,101200"
 st "SIGNAL wiz_busy               : std_logic
 "
@@ -5817 +5819 @@
 font "Courier New,8,0"
 )
-xt "-172000,103600,-128500,104400"
+xt "-172000,102800,-128500,103600"
 st "SIGNAL wiz_write_ea           : std_logic                                    := '0'
 "
@@ -5838 +5840 @@
 font "Courier New,8,0"
 )
-xt "-172000,106000,-122500,106800"
+xt "-172000,105200,-122500,106000"
 st "SIGNAL wiz_write_length       : std_logic_vector(16 downto 0)                := (others => '0')
 "
@@ -5860 +5862 @@
 font "Courier New,8,0"
 )
-xt "-172000,102800,-122500,103600"
+xt "-172000,102000,-122500,102800"
 st "SIGNAL wiz_ram_start_addr     : std_logic_vector(RAMADDRWIDTH64b+1 DOWNTO 0) := (others => '0')
 "
@@ -5881 +5883 @@
 font "Courier New,8,0"
 )
-xt "-172000,102000,-122500,102800"
+xt "-172000,101200,-122500,102000"
 st "SIGNAL wiz_number_of_channels : std_logic_vector(3 downto 0)                 := (others => '0')
 "
@@ -5901 +5903 @@
 font "Courier New,8,0"
 )
-xt "-172000,104400,-128500,105200"
+xt "-172000,103600,-128500,104400"
 st "SIGNAL wiz_write_end          : std_logic                                    := '0'
 "
@@ -5921 +5923 @@
 font "Courier New,8,0"
 )
-xt "-172000,105200,-128500,106000"
+xt "-172000,104400,-128500,105200"
 st "SIGNAL wiz_write_header       : std_logic                                    := '0'
 "
@@ -6932 +6934 @@
 sl 0
 ro 90
-xt "-29000,65625,-27500,66375"
+xt "-28000,66625,-26500,67375"
 )
 (Line
@@ -6938 +6940 @@
 sl 0
 ro 90
-xt "-27500,66000,-27000,66000"
-pts [
-"-27000,66000"
-"-27500,66000"
+xt "-26500,67000,-26000,67000"
+pts [
+"-26000,67000"
+"-26500,67000"
 ]
 )
@@ -6956 +6958 @@
 va (VaSet
 )
-xt "-35900,65500,-30000,66500"
+xt "-34900,66500,-29000,67500"
 st "drs_channel_id"
 ju 2
-blo "-30000,66300"
+blo "-29000,67300"
 tm "WireNameMgr"
 )
@@ -10972 +10974 @@
 font "Courier New,8,0"
 )
-xt "-172000,100400,-149500,101200"
+xt "-172000,99600,-149500,100400"
 st "SIGNAL wiz_ack                : std_logic
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@@ -12959 +12961 @@
 )
 *431 (Net
-uid 10449,0
-decl (Decl
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-t "std_logic"
-preAdd 0
-posAdd 0
-o 120
-suid 240,0
-)
-declText (MLText
-uid 10450,0
-va (VaSet
-font "Courier New,8,0"
-)
-xt "-172000,99600,-149500,100400"
-st "SIGNAL trigger_out            : std_logic
-"
-)
-)
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 lang 2
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@@ -13464 +13446 @@
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 ps "OnEdgeStrategy"
@@ -13516 +13498 @@
 stg "VerticalLayoutStrategy"
 textVec [
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 va (VaSet
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 tm "BdLibraryNameMgr"
 )
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 va (VaSet
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 tm "CptNameMgr"
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 va (VaSet
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 decl (Decl
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 oxt "7000,6000,7000,6000"
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 optionalChildren [
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 shape (PolyLine2D
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 oxt "7000,6000,9000,10000"
 )
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 shape (Arc2D
@@ -13944 +13926 @@
 stg "VerticalLayoutStrategy"
 textVec [
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 va (VaSet
@@ -13954 +13936 @@
 blo "-80500,73300"
 )
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 uid 12299,0
 va (VaSet
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 blo "-80500,74300"
 )
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 va (VaSet
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 )
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 decl (Decl
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 ps "OnEdgeStrategy"
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 ps "OnEdgeStrategy"
@@ -14100 +14082 @@
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 ps "OnEdgeStrategy"
@@ -14255 +14237 @@
 stg "VerticalLayoutStrategy"
 textVec [
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 uid 12628,0
 va (VaSet
@@ -14265 +14247 @@
 tm "BdLibraryNameMgr"
 )
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 uid 12629,0
 va (VaSet
@@ -14275 +14257 @@
 tm "CptNameMgr"
 )
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 uid 12630,0
 va (VaSet
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 archFileType "UNKNOWN"
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+*483 (Net
 uid 12641,0
 decl (Decl
@@ -14342 +14324 @@
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 decl (Decl
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 )
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 uid 12653,0
 decl (Decl
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 )
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 uid 12705,0
 decl (Decl
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 shape (CompositeShape
@@ -14447 +14429 @@
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+*488 (SaComponent
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 ps "OnEdgeStrategy"
@@ -14460 +14442 @@
 fg "0,65535,0"
 )
-xt "63000,61625,63750,62375"
+xt "72000,61625,72750,62375"
 )
 tg (CPTG
@@ -14470 +14452 @@
 va (VaSet
 )
-xt "60100,61500,62000,62500"
+xt "69100,61500,71000,62500"
 st "CLK"
 ju 2
-blo "62000,62300"
+blo "71000,62300"
 )
 )
@@ -14484 +14466 @@
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 )
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 ps "OnEdgeStrategy"
@@ -14494 +14476 @@
 fg "0,65535,0"
 )
-xt "63000,62625,63750,63375"
+xt "72000,62625,72750,63375"
 )
 tg (CPTG
@@ -14504 +14486 @@
 va (VaSet
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-xt "59400,62500,62000,63500"
+xt "68400,62500,71000,63500"
 st "enable"
 ju 2
-blo "62000,63300"
+blo "71000,63300"
 )
 )
@@ -14518 +14500 @@
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 )
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 ps "OnEdgeStrategy"
@@ -14528 +14510 @@
 fg "0,65535,0"
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-xt "63000,63625,63750,64375"
+xt "72000,63625,72750,64375"
 )
 tg (CPTG
@@ -14538 +14520 @@
 va (VaSet
 )
-xt "55900,63500,62000,64500"
+xt "64900,63500,71000,64500"
 st "multiplier : (7:0)"
 ju 2
-blo "62000,64300"
+blo "71000,64300"
 )
 )
@@ -14553 +14535 @@
 )
 )
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 uid 13113,0
 ps "OnEdgeStrategy"
@@ -14563 +14545 @@
 fg "0,65535,0"
 )
-xt "50250,61625,51000,62375"
+xt "59250,61625,60000,62375"
 )
 tg (CPTG
@@ -14573 +14555 @@
 va (VaSet
 )
-xt "52000,61500,54800,62500"
+xt "61000,61500,63800,62500"
 st "trigger"
-blo "52000,62300"
+blo "61000,62300"
 )
 )
@@ -14596 +14578 @@
 lineWidth 2
 )
-xt "51000,61000,63000,65000"
+xt "60000,61000,72000,65000"
 )
 oxt "0,0,8000,10000"
@@ -14604 +14586 @@
 stg "VerticalLayoutStrategy"
 textVec [
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+uid 13120,0
+va (VaSet
+font "Arial,8,1"
+)
+xt "62350,65000,68550,66000"
+st "FACT_FAD_lib"
+blo "62350,65800"
+tm "BdLibraryNameMgr"
+)
 *494 (Text
-uid 13120,0
+uid 13121,0
 va (VaSet
 font "Arial,8,1"
 )
-xt "53350,65000,59550,66000"
-st "FACT_FAD_lib"
-blo "53350,65800"
-tm "BdLibraryNameMgr"
+xt "62350,66000,69650,67000"
+st "continous_pulser"
+blo "62350,66800"
+tm "CptNameMgr"
 )
 *495 (Text
-uid 13121,0
+uid 13122,0
 va (VaSet
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 )
-xt "53350,66000,60650,67000"
-st "continous_pulser"
-blo "53350,66800"
-tm "CptNameMgr"
-)
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-uid 13122,0
-va (VaSet
-font "Arial,8,1"
-)
-xt "53350,67000,55150,68000"
+xt "62350,67000,64150,68000"
 st "U_3"
-blo "53350,67800"
+blo "62350,67800"
 tm "InstanceNameMgr"
 )
@@ -14646 +14628 @@
 font "Courier New,8,0"
 )
-xt "44000,60200,71500,61000"
+xt "53000,60200,80500,61000"
 st "MINIMAL_TRIGGER_WAIT_TIME = 250000    ( integer )  "
 )
@@ -14666 +14648 @@
 fg "49152,49152,49152"
 )
-xt "51250,63250,52750,64750"
+xt "60250,63250,61750,64750"
 iconName "VhdlFileViewIcon.png"
 iconMaskName "VhdlFileViewIcon.msk"
@@ -14677 +14659 @@
 archFileType "UNKNOWN"
 )
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 decl (Decl
@@ -14696 +14678 @@
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 decl (Decl
@@ -14718 +14700 @@
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 decl (Decl
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 )
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 decl (Decl
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-"40408,62000"
+xt "52408,62000,54000,62000"
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 )
@@ -14783 +14765 @@
 fg "0,65535,65535"
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-xt "42000,61625,42750,62375"
+xt "54000,61625,54750,62375"
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 tg (CPTG
@@ -14796 +14778 @@
 font "arial,8,0"
 )
-xt "205750,61700,207550,62700"
+xt "217750,61700,219550,62700"
 st "din1"
 ju 2
-blo "207550,62500"
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 )
 )
@@ -14811 +14793 @@
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 )
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 layer 5
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 vasetType 3
 )
-xt "36000,61000,37000,61000"
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-"37000,61000"
+xt "48000,61000,49000,61000"
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+"49000,61000"
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 )
@@ -14843 +14825 @@
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 )
-xt "35250,60625,36000,61375"
+xt "47250,60625,48000,61375"
 )
 tg (CPTG
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 font "arial,8,0"
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-xt "202500,60532,204300,61532"
+xt "214500,60532,216300,61532"
 st "dout"
-blo "202500,61332"
+blo "214500,61332"
 )
 )
@@ -14871 +14853 @@
 )
 )
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 )
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-"40408,60000"
+xt "52408,60000,54000,60000"
+pts [
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+"52408,60000"
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 )
@@ -14897 +14879 @@
 fg "0,65535,65535"
 )
-xt "42000,59625,42750,60375"
+xt "54000,59625,54750,60375"
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 tg (CPTG
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 font "arial,8,0"
 )
-xt "205635,59294,207435,60294"
+xt "217635,59294,219435,60294"
 st "din0"
 ju 2
-blo "207435,60094"
+blo "219435,60094"
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 )
@@ -14925 +14907 @@
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 )
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 ]
 uid 13247,0
@@ -14942 +14924 @@
 lineColor "26368,26368,26368"
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-xt "37000,59003,41000,61000"
+xt "49000,59003,53000,61000"
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 oxt "7000,6003,11000,8000"
 )
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 shape (Arc2D
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-"38551,62394"
-"37000,61005"
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 ]
 uid 13249,0
@@ -14963 +14945 @@
 lineColor "26368,26368,26368"
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-xt "37000,61005,41004,62999"
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 oxt "7000,8005,11004,10000"
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 optionalChildren [
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+*512 (Property
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 pclass "_MW_GEOM_"
@@ -14982 +14964 @@
 shape (CustomPolygon
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-"38952,62132"
-"37000,61000"
-"38048,60156"
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-"41000,62998"
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 uid 13253,0
@@ -15000 +14982 @@
 fillStyle 1
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-xt "37000,59000,41000,62998"
+xt "49000,59000,53000,62998"
 )
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 )
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 optionalChildren [
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 pclass "_MW_GEOM_"
@@ -15016 +14998 @@
 shape (Arc2D
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-"41000,63000"
-"40237,61001"
-"41000,59000"
+"53000,63000"
+"52237,61001"
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 ]
 uid 13256,0
@@ -15031 +15013 @@
 fillStyle 1
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-xt "40236,59000,41000,63000"
+xt "52236,59000,53000,63000"
 )
 oxt "10238,6000,11000,10000"
@@ -15045 +15027 @@
 lineWidth 2
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-xt "37000,59000,41000,63000"
+xt "49000,59000,53000,63000"
 )
 oxt "7000,6000,11000,10000"
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 shape (PolyLine2D
 pts [
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-"37000,61000"
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+"49000,61000"
 ]
 uid 13259,0
@@ -15064 +15046 @@
 fg "49152,49152,49152"
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-xt "37000,61000,37000,61000"
+xt "49000,61000,49000,61000"
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 oxt "7000,8000,7000,8000"
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 optionalChildren [
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 pclass "_MW_GEOM_"
@@ -15080 +15062 @@
 shape (PolyLine2D
 pts [
-"41000,59000"
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 ]
 uid 13261,0
@@ -15091 +15073 @@
 fg "49152,49152,49152"
 )
-xt "41000,59000,41000,59000"
+xt "53000,59000,53000,59000"
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 oxt "11000,6000,11000,6000"
 )
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@@ -15107 +15089 @@
 shape (PolyLine2D
 pts [
-"41000,63000"
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+"53000,63000"
 ]
 uid 13264,0
@@ -15118 +15100 @@
 fg "49152,49152,49152"
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-xt "41000,63000,41000,63000"
+xt "53000,63000,53000,63000"
 )
 oxt "11000,10000,11000,10000"
@@ -15131 +15113 @@
 lineWidth -1
 )
-xt "36000,59000,42000,63000"
+xt "48000,59000,54000,63000"
 fos 1
 )
@@ -15141 +15123 @@
 stg "VerticalLayoutStrategy"
 textVec [
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 va (VaSet
@@ -15147 +15129 @@
 font "arial,8,0"
 )
-xt "37500,61500,42300,62500"
+xt "49500,61500,54300,62500"
 st "moduleware"
-blo "37500,62300"
+blo "49500,62300"
+)
+*521 (Text
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+va (VaSet
+font "arial,8,0"
+)
+xt "49500,62500,50600,63500"
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 )
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-uid 13270,0
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 va (VaSet
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-xt "37500,62500,38600,63500"
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-blo "37500,63300"
-)
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-uid 13271,0
-va (VaSet
-font "arial,8,0"
-)
-xt "37500,63500,39700,64500"
+xt "49500,63500,51700,64500"
 st "U_13"
-blo "37500,64300"
+blo "49500,64300"
 tm "InstanceNameMgr"
 )
@@ -15182 +15164 @@
 font "arial,8,0"
 )
-xt "21000,50000,21000,50000"
+xt "33000,50000,33000,50000"
 )
 header ""
@@ -15205 +15187 @@
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 decl (Decl
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+*534 (CptPort
 uid 14413,0
 ps "OnEdgeStrategy"
@@ -15593 +15575 @@
 stg "VerticalLayoutStrategy"
 textVec [
-*536 (Text
+*535 (Text
 uid 14420,0
 va (VaSet
@@ -15603 +15585 @@
 tm "BdLibraryNameMgr"
 )
-*537 (Text
+*536 (Text
 uid 14421,0
 va (VaSet
@@ -15613 +15595 @@
 tm "CptNameMgr"
 )
-*538 (Text
+*537 (Text
 uid 14422,0
 va (VaSet
@@ -15661 +15643 @@
 archFileType "UNKNOWN"
 )
-*539 (Net
+*538 (Net
 uid 14477,0
 decl (Decl
@@ -15682 +15664 @@
 )
 )
-*540 (PortIoOut
+*539 (PortIoOut
 uid 14485,0
 shape (CompositeShape
@@ -15726 +15708 @@
 )
 )
-*541 (Net
+*540 (Net
 uid 14491,0
 decl (Decl
@@ -15747 +15729 @@
 )
 )
-*542 (PortIoOut
+*541 (PortIoOut
 uid 14499,0
 shape (CompositeShape
@@ -15791 +15773 @@
 )
 )
-*543 (Net
+*542 (Net
 uid 14620,0
 decl (Decl
@@ -15811 +15793 @@
 )
 )
-*544 (PortIoOut
+*543 (PortIoOut
 uid 14628,0
 shape (CompositeShape
@@ -15855 +15837 @@
 )
 )
-*545 (MWC
+*544 (MWC
 uid 14991,0
 optionalChildren [
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+*545 (CptPort
 uid 14963,0
 optionalChildren [
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+*546 (Line
 uid 14967,0
 layer 5
@@ -15874 +15856 @@
 ]
 )
-*548 (Property
+*547 (Property
 uid 14968,0
 pclass "_MW_GEOM_"
@@ -15922 +15904 @@
 )
 )
-*549 (CptPort
+*548 (CptPort
 uid 14969,0
 optionalChildren [
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+*549 (Line
 uid 14973,0
 layer 5
@@ -15978 +15960 @@
 )
 )
-*551 (CptPort
+*550 (CptPort
 uid 14974,0
 optionalChildren [
-*552 (Line
+*551 (Line
 uid 14978,0
 layer 5
@@ -16034 +16016 @@
 )
 )
-*553 (CommentGraphic
+*552 (CommentGraphic
 uid 14979,0
 optionalChildren [
-*554 (Property
+*553 (Property
 uid 14981,0
 pclass "_MW_GEOM_"
@@ -16061 +16043 @@
 oxt "7000,10000,7000,10000"
 )
-*555 (CommentGraphic
+*554 (CommentGraphic
 uid 14982,0
 optionalChildren [
-*556 (Property
+*555 (Property
 uid 14984,0
 pclass "_MW_GEOM_"
@@ -16088 +16070 @@
 oxt "7000,6000,7000,6000"
 )
-*557 (Grouping
+*556 (Grouping
 uid 14985,0
 optionalChildren [
-*558 (CommentGraphic
+*557 (CommentGraphic
 uid 14987,0
 shape (PolyLine2D
@@ -16112 +16094 @@
 oxt "7000,6000,9000,10000"
 )
-*559 (CommentGraphic
+*558 (CommentGraphic
 uid 14989,0
 shape (Arc2D
@@ -16165 +16147 @@
 stg "VerticalLayoutStrategy"
 textVec [
-*560 (Text
+*559 (Text
 uid 14994,0
 va (VaSet
@@ -16175 +16157 @@
 blo "162500,76300"
 )
-*561 (Text
+*560 (Text
 uid 14995,0
 va (VaSet
@@ -16184 +16166 @@
 blo "162500,77300"
 )
-*562 (Text
+*561 (Text
 uid 14996,0
 va (VaSet
@@ -16229 +16211 @@
 )
 )
-*563 (MWC
+*562 (MWC
 uid 15036,0
 optionalChildren [
-*564 (CptPort
+*563 (CptPort
 uid 15005,0
 optionalChildren [
-*565 (Property
+*564 (Property
 uid 15009,0
 pclass "_MW_GEOM_"
@@ -16241 +16223 @@
 ptn "String"
 )
-*566 (Line
+*565 (Line
 uid 15010,0
 layer 5
@@ -16296 +16278 @@
 )
 )
-*567 (CommentGraphic
+*566 (CommentGraphic
 uid 15016,0
 shape (Arc2D
@@ -16318 +16300 @@
 oxt "110003,265000,112000,269000"
 )
-*568 (CommentGraphic
+*567 (CommentGraphic
 uid 15018,0
 shape (Arc2D
@@ -16340 +16322 @@
 oxt "112005,265000,114000,269004"
 )
-*569 (Grouping
+*568 (Grouping
 uid 15020,0
 optionalChildren [
-*570 (CommentGraphic
+*569 (CommentGraphic
 uid 15022,0
 optionalChildren [
-*571 (Property
+*570 (Property
 uid 15024,0
 pclass "_MW_GEOM_"
@@ -16378 +16360 @@
 oxt "110000,265000,113998,269000"
 )
-*572 (CommentGraphic
+*571 (CommentGraphic
 uid 15025,0
 optionalChildren [
-*573 (Property
+*572 (Property
 uid 15027,0
 pclass "_MW_GEOM_"
@@ -16425 +16407 @@
 oxt "110000,265000,114000,269000"
 )
-*574 (CommentGraphic
+*573 (CommentGraphic
 uid 15028,0
 shape (PolyLine2D
@@ -16445 +16427 @@
 oxt "112000,265000,112000,265000"
 )
-*575 (CommentGraphic
+*574 (CommentGraphic
 uid 15030,0
 optionalChildren [
-*576 (Property
+*575 (Property
 uid 15032,0
 pclass "_MW_GEOM_"
@@ -16473 +16455 @@
 oxt "110000,269000,110000,269000"
 )
-*577 (CommentGraphic
+*576 (CommentGraphic
 uid 15033,0
 optionalChildren [
-*578 (Property
+*577 (Property
 uid 15035,0
 pclass "_MW_GEOM_"
@@ -16501 +16483 @@
 oxt "114000,269000,114000,269000"
 )
-*579 (CptPort
+*578 (CptPort
 uid 15160,0
 optionalChildren [
-*580 (Line
+*579 (Line
 uid 15164,0
 sl 0
@@ -16556 +16538 @@
 )
 )
-*581 (CptPort
+*580 (CptPort
 uid 15165,0
 optionalChildren [
-*582 (Line
+*581 (Line
 uid 15169,0
 sl 0
@@ -16631 +16613 @@
 stg "VerticalLayoutStrategy"
 textVec [
-*583 (Text
+*582 (Text
 uid 15039,0
 va (VaSet
@@ -16641 +16623 @@
 blo "148500,89300"
 )
-*584 (Text
+*583 (Text
 uid 15040,0
 va (VaSet
@@ -16650 +16632 @@
 blo "148500,90300"
 )
-*585 (Text
+*584 (Text
 uid 15041,0
 va (VaSet
@@ -16695 +16677 @@
 )
 )
-*586 (MWC
+*585 (MWC
 uid 15058,0
 optionalChildren [
-*587 (CptPort
+*586 (CptPort
 uid 15045,0
 optionalChildren [
-*588 (Line
+*587 (Line
 uid 15049,0
 layer 5
@@ -16763 +16745 @@
 )
 )
-*589 (CptPort
+*588 (CptPort
 uid 15050,0
 optionalChildren [
-*590 (Line
+*589 (Line
 uid 15054,0
 layer 5
@@ -16779 +16761 @@
 ]
 )
-*591 (Circle
+*590 (Circle
 uid 15055,0
 va (VaSet
@@ -16841 +16823 @@
 )
 )
-*592 (CommentGraphic
+*591 (CommentGraphic
 uid 15056,0
 shape (CustomPolygon
@@ -16883 +16865 @@
 stg "VerticalLayoutStrategy"
 textVec [
-*593 (Text
+*592 (Text
 uid 15061,0
 va (VaSet
@@ -16893 +16875 @@
 blo "155350,77900"
 )
-*594 (Text
+*593 (Text
 uid 15062,0
 va (VaSet
@@ -16902 +16884 @@
 blo "155350,78900"
 )
-*595 (Text
+*594 (Text
 uid 15063,0
 va (VaSet
@@ -16947 +16929 @@
 )
 )
-*596 (Net
+*595 (Net
 uid 15077,0
 decl (Decl
@@ -16968 +16950 @@
 )
 )
-*597 (Net
+*596 (Net
 uid 15079,0
 decl (Decl
@@ -16989 +16971 @@
 )
 )
-*598 (Net
+*597 (Net
 uid 15126,0
 decl (Decl
@@ -17010 +16992 @@
 )
 )
-*599 (Wire
+*598 (Wire
 uid 322,0
 shape (OrthoPolyLine
@@ -17049 +17031 @@
 on &2
 )
-*600 (Wire
+*599 (Wire
 uid 328,0
 shape (OrthoPolyLine
@@ -17088 +17070 @@
 on &3
 )
-*601 (Wire
+*600 (Wire
 uid 334,0
 shape (OrthoPolyLine
@@ -17127 +17109 @@
 on &4
 )
-*602 (Wire
+*601 (Wire
 uid 364,0
 shape (OrthoPolyLine
@@ -17167 +17149 @@
 on &5
 )
-*603 (Wire
+*602 (Wire
 uid 370,0
 shape (OrthoPolyLine
@@ -17207 +17189 @@
 on &6
 )
-*604 (Wire
+*603 (Wire
 uid 376,0
 shape (OrthoPolyLine
@@ -17245 +17227 @@
 on &7
 )
-*605 (Wire
+*604 (Wire
 uid 384,0
 shape (OrthoPolyLine
@@ -17285 +17267 @@
 on &8
 )
-*606 (Wire
+*605 (Wire
 uid 392,0
 shape (OrthoPolyLine
@@ -17325 +17307 @@
 on &9
 )
-*607 (Wire
+*606 (Wire
 uid 400,0
 shape (OrthoPolyLine
@@ -17363 +17345 @@
 on &10
 )
-*608 (Wire
+*607 (Wire
 uid 408,0
 shape (OrthoPolyLine
@@ -17401 +17383 @@
 on &11
 )
-*609 (Wire
+*608 (Wire
 uid 424,0
 shape (OrthoPolyLine
@@ -17439 +17421 @@
 on &12
 )
-*610 (Wire
+*609 (Wire
 uid 432,0
 shape (OrthoPolyLine
@@ -17477 +17459 @@
 on &13
 )
-*611 (Wire
+*610 (Wire
 uid 1411,0
 shape (OrthoPolyLine
@@ -17516 +17498 @@
 on &71
 )
-*612 (Wire
+*611 (Wire
 uid 1425,0
 shape (OrthoPolyLine
@@ -17555 +17537 @@
 on &72
 )
-*613 (Wire
+*612 (Wire
 uid 1682,0
 shape (OrthoPolyLine
@@ -17594 +17576 @@
 on &122
 )
-*614 (Wire
+*613 (Wire
 uid 1983,0
 shape (OrthoPolyLine
@@ -17602 +17584 @@
 lineWidth 2
 )
-xt "-40250,68000,-21750,71000"
-pts [
-"-40250,68000"
-"-36000,68000"
-"-36000,71000"
-"-21750,71000"
+xt "-40250,69000,-21750,70000"
+pts [
+"-40250,69000"
+"-36000,69000"
+"-36000,70000"
+"-21750,70000"
 ]
 )
@@ -17633 +17615 @@
 on &130
 )
-*615 (Wire
+*614 (Wire
 uid 2299,0
 shape (OrthoPolyLine
@@ -17641 +17623 @@
 lineWidth 2
 )
-xt "750,66000,31250,73000"
-pts [
-"31250,73000"
-"27000,73000"
-"27000,66000"
-"750,66000"
+xt "750,71000,27250,71000"
+pts [
+"27250,71000"
+"750,71000"
 ]
 )
@@ -17665 +17645 @@
 va (VaSet
 )
-xt "2000,65000,18700,66000"
+xt "1000,70000,17700,71000"
 st "ram_start_addr : (RAMADDRWIDTH64b-1:0)"
-blo "2000,65800"
+blo "1000,70800"
 tm "WireNameMgr"
 )
@@ -17673 +17653 @@
 on &131
 )
-*616 (Wire
+*615 (Wire
 uid 2470,0
 shape (OrthoPolyLine
@@ -17680 +17660 @@
 vasetType 3
 )
-xt "63750,70000,87250,71000"
-pts [
-"63750,71000"
-"78000,71000"
-"78000,70000"
-"87250,70000"
+xt "59750,71000,87250,71000"
+pts [
+"59750,71000"
+"87250,71000"
 ]
 )
@@ -17703 +17681 @@
 va (VaSet
 )
-xt "64000,70000,67400,71000"
+xt "60000,70000,63400,71000"
 st "wiz_busy"
-blo "64000,70800"
+blo "60000,70800"
 tm "WireNameMgr"
 )
@@ -17711 +17689 @@
 on &155
 )
-*617 (Wire
+*616 (Wire
 uid 2476,0
 shape (OrthoPolyLine
@@ -17718 +17696 @@
 vasetType 3
 )
-xt "63750,71000,87250,72000"
-pts [
-"63750,72000"
-"84000,72000"
-"84000,71000"
-"87250,71000"
+xt "59750,72000,87250,72000"
+pts [
+"59750,72000"
+"87250,72000"
 ]
 )
@@ -17741 +17717 @@
 va (VaSet
 )
-xt "64000,71000,69100,72000"
+xt "60000,71000,65100,72000"
 st "wiz_write_ea"
-blo "64000,71800"
+blo "60000,71800"
 tm "WireNameMgr"
 )
@@ -17749 +17725 @@
 on &156
 )
-*618 (Wire
+*617 (Wire
 uid 2482,0
 shape (OrthoPolyLine
@@ -17757 +17733 @@
 lineWidth 2
 )
-xt "63750,72000,87250,79000"
-pts [
-"63750,73000"
-"67000,73000"
-"67000,79000"
-"85000,79000"
-"85000,72000"
-"87250,72000"
+xt "59750,73000,87250,73000"
+pts [
+"59750,73000"
+"87250,73000"
 ]
 )
@@ -17783 +17755 @@
 va (VaSet
 )
-xt "64000,72000,73400,73000"
+xt "60000,72000,69400,73000"
 st "wiz_write_length : (16:0)"
-blo "64000,72800"
+blo "60000,72800"
 tm "WireNameMgr"
 )
@@ -17791 +17763 @@
 on &157
 )
-*619 (Wire
+*618 (Wire
 uid 2488,0
 shape (OrthoPolyLine
@@ -17799 +17771 @@
 lineWidth 2
 )
-xt "63750,73000,87250,74000"
-pts [
-"63750,74000"
-"84000,74000"
-"84000,73000"
-"87250,73000"
+xt "59750,74000,87250,74000"
+pts [
+"59750,74000"
+"87250,74000"
 ]
 )
@@ -17823 +17793 @@
 va (VaSet
 )
-xt "64000,73000,82800,74000"
+xt "60000,73000,78800,74000"
 st "wiz_ram_start_addr : (RAMADDRWIDTH64b+1:0)"
-blo "64000,73800"
+blo "60000,73800"
 tm "WireNameMgr"
 )
@@ -17831 +17801 @@
 on &158
 )
-*620 (Wire
+*619 (Wire
 uid 2494,0
 shape (OrthoPolyLine
@@ -17839 +17809 @@
 lineWidth 2
 )
-xt "63750,74000,87250,80000"
-pts [
-"63750,75000"
-"66000,75000"
-"66000,80000"
-"86000,80000"
-"86000,74000"
-"87250,74000"
+xt "59750,75000,87250,75000"
+pts [
+"59750,75000"
+"87250,75000"
 ]
 )
@@ -17865 +17831 @@
 va (VaSet
 )
-xt "64000,74000,75800,75000"
+xt "60000,74000,71800,75000"
 st "wiz_number_of_channels : (3:0)"
-blo "64000,74800"
+blo "60000,74800"
 tm "WireNameMgr"
 )
@@ -17873 +17839 @@
 on &159
 )
-*621 (Wire
+*620 (Wire
 uid 2500,0
 shape (OrthoPolyLine
@@ -17880 +17846 @@
 vasetType 3
 )
-xt "63750,75000,87250,76000"
-pts [
-"63750,76000"
-"84000,76000"
-"84000,75000"
-"87250,75000"
+xt "59750,76000,87250,76000"
+pts [
+"59750,76000"
+"87250,76000"
 ]
 )
@@ -17903 +17867 @@
 va (VaSet
 )
-xt "64000,75000,69500,76000"
+xt "60000,75000,65500,76000"
 st "wiz_write_end"
-blo "64000,75800"
+blo "60000,75800"
 tm "WireNameMgr"
 )
@@ -17911 +17875 @@
 on &160
 )
-*622 (Wire
+*621 (Wire
 uid 2506,0
 shape (OrthoPolyLine
@@ -17918 +17882 @@
 vasetType 3
 )
-xt "63750,76000,87250,77000"
-pts [
-"63750,77000"
-"71000,77000"
-"71000,76000"
-"87250,76000"
+xt "59750,77000,87250,77000"
+pts [
+"59750,77000"
+"87250,77000"
 ]
 )
@@ -17941 +17903 @@
 va (VaSet
 )
-xt "64000,76000,70600,77000"
+xt "60000,76000,66600,77000"
 st "wiz_write_header"
-blo "64000,76800"
+blo "60000,76800"
 tm "WireNameMgr"
 )
@@ -17949 +17911 @@
 on &161
 )
-*623 (Wire
+*622 (Wire
 uid 2576,0
 shape (OrthoPolyLine
@@ -17956 +17918 @@
 vasetType 3
 )
-xt "750,67000,31250,74000"
-pts [
-"750,67000"
-"26000,67000"
-"26000,74000"
-"31250,74000"
+xt "750,72000,27250,72000"
+pts [
+"750,72000"
+"27250,72000"
 ]
 )
@@ -17979 +17939 @@
 va (VaSet
 )
-xt "2000,66000,7300,67000"
+xt "1000,71000,6300,72000"
 st "ram_write_ea"
-blo "2000,66800"
+blo "1000,71800"
 tm "WireNameMgr"
 )
@@ -17987 +17947 @@
 on &162
 )
-*624 (Wire
+*623 (Wire
 uid 2582,0
 shape (OrthoPolyLine
@@ -17994 +17954 @@
 vasetType 3
 )
-xt "750,68000,31250,75000"
-pts [
-"750,68000"
-"25000,68000"
-"25000,75000"
-"31250,75000"
+xt "750,73000,27250,73000"
+pts [
+"750,73000"
+"27250,73000"
 ]
 )
@@ -18017 +17975 @@
 va (VaSet
 )
-xt "2000,67000,8300,68000"
+xt "1000,72000,7300,73000"
 st "ram_write_ready"
-blo "2000,67800"
+blo "1000,72800"
 tm "WireNameMgr"
 )
@@ -18025 +17983 @@
 on &163
 )
-*625 (Wire
+*624 (Wire
 uid 2588,0
 shape (OrthoPolyLine
@@ -18032 +17990 @@
 vasetType 3
 )
-xt "750,73000,31250,78000"
-pts [
-"750,73000"
-"23000,73000"
-"23000,78000"
-"31250,78000"
+xt "750,76000,27250,76000"
+pts [
+"750,76000"
+"27250,76000"
 ]
 )
@@ -18056 +18012 @@
 va (VaSet
 )
-xt "1000,72000,5800,73000"
+xt "1000,75000,5800,76000"
 st "config_start"
-blo "1000,72800"
+blo "1000,75800"
 tm "WireNameMgr"
 )
@@ -18064 +18020 @@
 on &164
 )
-*626 (Wire
+*625 (Wire
 uid 2594,0
 shape (OrthoPolyLine
@@ -18071 +18027 @@
 vasetType 3
 )
-xt "750,75000,31250,80000"
-pts [
-"750,75000"
-"21000,75000"
-"21000,80000"
-"31250,80000"
+xt "750,78000,27250,78000"
+pts [
+"750,78000"
+"27250,78000"
 ]
 )
@@ -18094 +18048 @@
 va (VaSet
 )
-xt "1000,74000,6100,75000"
+xt "1000,77000,6100,78000"
 st "config_ready"
-blo "1000,74800"
+blo "1000,77800"
 tm "WireNameMgr"
 )
@@ -18102 +18056 @@
 on &165
 )
-*627 (Wire
+*626 (Wire
 uid 2600,0
 shape (OrthoPolyLine
@@ -18109 +18063 @@
 vasetType 3
 )
-xt "750,77000,31250,81000"
-pts [
-"750,77000"
-"20000,77000"
-"20000,81000"
-"31250,81000"
+xt "750,79000,27250,79000"
+pts [
+"750,79000"
+"27250,79000"
 ]
 )
@@ -18132 +18084 @@
 va (VaSet
 )
-xt "1000,76000,4000,77000"
+xt "1000,78000,4000,79000"
 st "roi_max"
-blo "1000,76800"
+blo "1000,78800"
 tm "WireNameMgr"
 )
@@ -18140 +18092 @@
 on &166
 )
-*628 (Wire
+*627 (Wire
 uid 2642,0
 shape (OrthoPolyLine
@@ -18148 +18100 @@
 lineWidth 2
 )
-xt "750,78000,31250,82000"
-pts [
-"750,78000"
-"19000,78000"
-"19000,82000"
-"31250,82000"
+xt "750,80000,27250,80000"
+pts [
+"750,80000"
+"27250,80000"
 ]
 )
@@ -18172 +18122 @@
 va (VaSet
 )
-xt "1000,77000,10100,78000"
+xt "1000,79000,10100,80000"
 st "package_length : (15:0)"
-blo "1000,77800"
+blo "1000,79800"
 tm "WireNameMgr"
 )
@@ -18180 +18130 @@
 on &167
 )
-*629 (Wire
+*628 (Wire
 uid 2778,0
 shape (OrthoPolyLine
@@ -18218 +18168 @@
 on &168
 )
-*630 (Wire
+*629 (Wire
 uid 2786,0
 shape (OrthoPolyLine
@@ -18258 +18208 @@
 on &191
 )
-*631 (Wire
+*630 (Wire
 uid 3888,0
 optionalChildren [
-*632 (BdJunction
+*631 (BdJunction
 uid 4230,0
 ps "OnConnectorStrategy"
@@ -18273 +18223 @@
 )
 )
-*633 (BdJunction
+*632 (BdJunction
 uid 4244,0
 ps "OnConnectorStrategy"
@@ -18324 +18274 @@
 on &187
 )
-*634 (Wire
+*633 (Wire
 uid 3984,0
 shape (OrthoPolyLine
@@ -18365 +18315 @@
 on &185
 )
-*635 (Wire
+*634 (Wire
 uid 4042,0
 shape (OrthoPolyLine
@@ -18403 +18353 @@
 on &190
 )
-*636 (Wire
+*635 (Wire
 uid 4226,0
 shape (OrthoPolyLine
@@ -18419 +18369 @@
 )
 start &189
-end &632
+end &631
 sat 32
 eat 32
@@ -18443 +18393 @@
 on &187
 )
-*637 (Wire
+*636 (Wire
 uid 4240,0
 shape (OrthoPolyLine
@@ -18459 +18409 @@
 )
 start &335
-end &633
+end &632
 sat 32
 eat 32
@@ -18482 +18432 @@
 on &187
 )
-*638 (Wire
+*637 (Wire
 uid 4272,0
 shape (OrthoPolyLine
@@ -18520 +18470 @@
 on &192
 )
-*639 (Wire
+*638 (Wire
 uid 4401,0
 shape (OrthoPolyLine
@@ -18558 +18508 @@
 on &194
 )
-*640 (Wire
+*639 (Wire
 uid 4407,0
 shape (OrthoPolyLine
@@ -18596 +18546 @@
 on &195
 )
-*641 (Wire
+*640 (Wire
 uid 4419,0
 shape (OrthoPolyLine
@@ -18634 +18584 @@
 on &196
 )
-*642 (Wire
+*641 (Wire
 uid 4537,0
 shape (OrthoPolyLine
@@ -18642 +18592 @@
 lineWidth 2
 )
-xt "-27000,66000,-21750,67000"
+xt "-26000,67000,-21750,67000"
 pts [
 "-21750,67000"
-"-25000,67000"
-"-25000,66000"
-"-27000,66000"
+"-26000,67000"
 ]
 )
@@ -18676 +18624 @@
 on &197
 )
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 shape (OrthoPolyLine
@@ -18713 +18661 @@
 on &198
 )
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 shape (OrthoPolyLine
@@ -18751 +18699 @@
 on &201
 )
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 shape (OrthoPolyLine
@@ -18789 +18737 @@
 on &202
 )
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 shape (OrthoPolyLine
@@ -18827 +18775 @@
 on &203
 )
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 shape (OrthoPolyLine
@@ -18865 +18813 @@
 on &204
 )
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 shape (OrthoPolyLine
@@ -18903 +18851 @@
 on &209
 )
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 optionalChildren [
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 ps "OnConnectorStrategy"
@@ -18934 +18882 @@
 )
 start &211
-end *651 (BdJunction
+end *650 (BdJunction
 uid 6080,0
 ps "OnConnectorStrategy"
@@ -18968 +18916 @@
 on &188
 )
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 shape (OrthoPolyLine
@@ -19006 +18954 @@
 on &230
 )
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 uid 4962,0
 shape (OrthoPolyLine
@@ -19044 +18992 @@
 on &232
 )
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 shape (OrthoPolyLine
@@ -19083 +19031 @@
 on &252
 )
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 shape (OrthoPolyLine
@@ -19117 +19065 @@
 on &253
 )
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 shape (OrthoPolyLine
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 on &254
 )
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 shape (OrthoPolyLine
@@ -19193 +19141 @@
 on &255
 )
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 uid 5122,0
 shape (OrthoPolyLine
@@ -19230 +19178 @@
 on &256
 )
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 shape (OrthoPolyLine
@@ -19267 +19215 @@
 on &257
 )
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 optionalChildren [
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 ps "OnConnectorStrategy"
@@ -19320 +19268 @@
 on &171
 )
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 shape (OrthoPolyLine
@@ -19356 +19304 @@
 on &258
 )
-*663 (Wire
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 shape (OrthoPolyLine
@@ -19363 +19311 @@
 vasetType 3
 )
-xt "18000,88000,31250,88000"
+xt "18000,86000,27250,88000"
 pts [
 "18000,88000"
-"31250,88000"
-]
-)
-start &661
+"24000,88000"
+"24000,86000"
+"27250,86000"
+]
+)
+start &660
 end &147
 sat 32
@@ -19384 +19334 @@
 va (VaSet
 )
-xt "28000,87000,31400,88000"
+xt "24000,85000,27400,86000"
 st "roi_array"
-blo "28000,87800"
+blo "24000,85800"
 tm "WireNameMgr"
 )
@@ -19392 +19342 @@
 on &171
 )
-*664 (Wire
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 shape (OrthoPolyLine
@@ -19429 +19379 @@
 on &259
 )
-*665 (Wire
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 uid 5190,0
 shape (OrthoPolyLine
@@ -19466 +19416 @@
 on &260
 )
-*666 (Wire
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 shape (OrthoPolyLine
@@ -19506 +19456 @@
 on &261
 )
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 shape (OrthoPolyLine
@@ -19543 +19493 @@
 on &264
 )
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 uid 5474,0
 shape (OrthoPolyLine
@@ -19580 +19530 @@
 on &262
 )
-*669 (Wire
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 uid 5480,0
 shape (OrthoPolyLine
@@ -19617 +19567 @@
 on &263
 )
-*670 (Wire
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 shape (OrthoPolyLine
@@ -19652 +19602 @@
 on &187
 )
-*671 (Wire
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 optionalChildren [
-&651
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-uid 6086,0
-ps "OnConnectorStrategy"
-shape (Circle
-uid 6087,0
-va (VaSet
-vasetType 1
-)
-xt "27600,46600,28400,47400"
-radius 400
-)
-)
+&650
 ]
 shape (OrthoPolyLine
@@ -19709 +19647 @@
 on &188
 )
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 shape (OrthoPolyLine
@@ -19745 +19683 @@
 on &266
 )
-*674 (Wire
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 shape (OrthoPolyLine
@@ -19783 +19721 @@
 on &265
 )
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 uid 5646,0
 shape (OrthoPolyLine
@@ -19819 +19757 @@
 on &185
 )
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 uid 5745,0
 shape (OrthoPolyLine
@@ -19857 +19795 @@
 on &276
 )
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 shape (OrthoPolyLine
@@ -19891 +19829 @@
 on &187
 )
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 shape (OrthoPolyLine
@@ -19929 +19867 @@
 on &293
 )
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 shape (OrthoPolyLine
@@ -19967 +19905 @@
 on &294
 )
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 shape (OrthoPolyLine
@@ -20005 +19943 @@
 on &295
 )
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 shape (OrthoPolyLine
@@ -20045 +19983 @@
 on &296
 )
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 shape (OrthoPolyLine
@@ -20083 +20021 @@
 on &301
 )
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 shape (OrthoPolyLine
@@ -20121 +20059 @@
 on &302
 )
-*684 (Wire
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 shape (OrthoPolyLine
@@ -20159 +20097 @@
 on &304
 )
-*685 (Wire
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 uid 6008,0
 shape (OrthoPolyLine
@@ -20197 +20135 @@
 on &303
 )
-*686 (Wire
+*684 (Wire
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 shape (OrthoPolyLine
@@ -20204 +20142 @@
 vasetType 3
 )
-xt "750,74000,31250,79000"
-pts [
-"750,74000"
-"22000,74000"
-"22000,79000"
-"31250,79000"
+xt "750,77000,27250,77000"
+pts [
+"750,77000"
+"27250,77000"
 ]
 )
@@ -20227 +20163 @@
 va (VaSet
 )
-xt "1000,73000,8200,74000"
+xt "1000,76000,8200,77000"
 st "config_started_mm"
-blo "1000,73800"
+blo "1000,76800"
 tm "WireNameMgr"
 )
@@ -20235 +20171 @@
 on &305
 )
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+*685 (Wire
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 shape (OrthoPolyLine
@@ -20270 +20206 @@
 on &258
 )
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 shape (OrthoPolyLine
@@ -20286 +20222 @@
 )
 start &366
-end &650
+end &649
 sat 32
 eat 32
@@ -20309 +20245 @@
 on &188
 )
-*689 (Wire
-uid 6082,0
-shape (OrthoPolyLine
-uid 6083,0
-va (VaSet
-vasetType 3
-lineColor "0,32896,0"
-)
-xt "28000,47000,31250,71000"
-pts [
-"31250,71000"
-"28000,71000"
-"28000,47000"
-]
-)
-start &134
-end &672
-sat 32
-eat 32
-stc 0
-st 0
-sf 1
-si 0
-tg (WTG
-uid 6084,0
-ps "ConnStartEndStrategy"
-stg "STSignalDisplayStrategy"
-f (Text
-uid 6085,0
-va (VaSet
-)
-xt "28000,70000,31100,71000"
-st "CLK_25"
-blo "28000,70800"
-tm "WireNameMgr"
-)
-)
-on &188
-)
-*690 (Wire
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@@ -20386 +20283 @@
 on &306
 )
-*691 (Wire
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 shape (OrthoPolyLine
@@ -20393 +20290 @@
 vasetType 3
 )
-xt "-61000,67000,-52750,67000"
-pts [
-"-61000,67000"
-"-52750,67000"
+xt "-61000,68000,-52750,68000"
+pts [
+"-61000,68000"
+"-52750,68000"
 ]
 )
@@ -20412 +20309 @@
 va (VaSet
 )
-xt "-58000,66000,-53500,67000"
+xt "-58000,67000,-53500,68000"
 st "CLK_25_PS"
-blo "-58000,66800"
+blo "-58000,67800"
 tm "WireNameMgr"
 )
@@ -20420 +20317 @@
 on &185
 )
-*692 (Wire
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 shape (OrthoPolyLine
@@ -20433 +20330 @@
 ]
 )
-start &546
+start &545
 end &309
 ss 0
@@ -20459 +20356 @@
 on &308
 )
-*693 (Wire
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 shape (OrthoPolyLine
@@ -20495 +20392 @@
 on &310
 )
-*694 (Wire
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 shape (OrthoPolyLine
@@ -20509 +20406 @@
 )
 start &315
-end &477
+end &476
 sat 32
 eat 32
@@ -20532 +20429 @@
 on &329
 )
-*695 (Wire
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 shape (OrthoPolyLine
@@ -20569 +20466 @@
 on &310
 )
-*696 (Wire
+*693 (Wire
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 shape (OrthoPolyLine
@@ -20576 +20473 @@
 vasetType 3
 )
-xt "63750,77000,87250,78000"
-pts [
-"63750,78000"
-"84000,78000"
-"84000,77000"
-"87250,77000"
+xt "59750,78000,87250,78000"
+pts [
+"59750,78000"
+"87250,78000"
 ]
 )
@@ -20599 +20494 @@
 va (VaSet
 )
-xt "64000,77000,67000,78000"
+xt "60000,77000,63000,78000"
 st "wiz_ack"
-blo "64000,77800"
+blo "60000,77800"
 tm "WireNameMgr"
 )
@@ -20607 +20502 @@
 on &341
 )
-*697 (Wire
+*694 (Wire
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 shape (OrthoPolyLine
@@ -20645 +20540 @@
 on &360
 )
-*698 (Wire
+*695 (Wire
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 shape (OrthoPolyLine
@@ -20681 +20576 @@
 on &361
 )
-*699 (Wire
+*696 (Wire
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 shape (OrthoPolyLine
@@ -20716 +20611 @@
 on &361
 )
-*700 (Wire
+*697 (Wire
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 shape (OrthoPolyLine
@@ -20754 +20649 @@
 on &362
 )
-*701 (Wire
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@@ -20789 +20684 @@
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 )
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@@ -20824 +20719 @@
 on &377
 )
-*703 (Wire
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 shape (OrthoPolyLine
@@ -20858 +20753 @@
 on &376
 )
-*704 (Wire
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 shape (OrthoPolyLine
@@ -20892 +20787 @@
 on &377
 )
-*705 (Wire
+*702 (Wire
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 shape (OrthoPolyLine
@@ -20927 +20822 @@
 on &378
 )
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@@ -20962 +20857 @@
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 )
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 shape (OrthoPolyLine
@@ -21000 +20895 @@
 on &398
 )
-*708 (Wire
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 shape (OrthoPolyLine
@@ -21036 +20931 @@
 on &379
 )
-*709 (Wire
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 shape (OrthoPolyLine
@@ -21070 +20965 @@
 on &378
 )
-*710 (Wire
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 shape (OrthoPolyLine
@@ -21110 +21005 @@
 on &399
 )
-*711 (Wire
+*708 (Wire
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 shape (OrthoPolyLine
@@ -21148 +21043 @@
 on &400
 )
-*712 (Wire
+*709 (Wire
 uid 10266,0
 shape (OrthoPolyLine
@@ -21181 +21076 @@
 )
 )
-on &499
-)
-*713 (Wire
+on &498
+)
+*710 (Wire
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 shape (OrthoPolyLine
@@ -21219 +21114 @@
 on &402
 )
-*714 (Wire
+*711 (Wire
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 shape (OrthoPolyLine
@@ -21255 +21150 @@
 on &403
 )
-*715 (Wire
+*712 (Wire
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 shape (OrthoPolyLine
@@ -21291 +21186 @@
 on &404
 )
-*716 (Wire
+*713 (Wire
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 shape (OrthoPolyLine
@@ -21329 +21224 @@
 on &405
 )
-*717 (Wire
+*714 (Wire
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@@ -21367 +21262 @@
 on &406
 )
-*718 (Wire
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 shape (OrthoPolyLine
@@ -21404 +21299 @@
 on &401
 )
-*719 (Wire
-uid 10439,0
-optionalChildren [
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-uid 12639,0
-ps "OnConnectorStrategy"
-shape (Circle
-uid 12640,0
-va (VaSet
-vasetType 1
-)
-xt "-54400,71600,-53600,72400"
-radius 400
-)
-)
-]
-shape (OrthoPolyLine
-uid 10440,0
-va (VaSet
-vasetType 3
-)
-xt "-54000,68000,-21750,72000"
-pts [
-"-21750,72000"
-"-54000,72000"
-"-54000,68000"
-"-52750,68000"
-]
-)
-start &30
-end &125
-sat 32
-eat 32
-st 0
-sf 1
-si 0
-tg (WTG
-uid 10441,0
-ps "ConnStartEndStrategy"
-stg "STSignalDisplayStrategy"
-f (Text
-uid 10442,0
-va (VaSet
-)
-xt "-25750,71000,-21150,72000"
-st "trigger_out"
-blo "-25750,71800"
-tm "WireNameMgr"
-)
-)
-on &431
-)
-*721 (Wire
+*716 (Wire
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 shape (OrthoPolyLine
@@ -21463 +21306 @@
 vasetType 3
 )
-xt "750,69000,31250,76000"
-pts [
-"31250,76000"
-"24000,76000"
-"24000,69000"
-"750,69000"
+xt "750,74000,27250,74000"
+pts [
+"27250,74000"
+"750,74000"
 ]
 )
@@ -21487 +21328 @@
 va (VaSet
 )
-xt "2000,68000,9800,69000"
+xt "1000,73000,8800,74000"
 st "ram_write_ready_ack"
-blo "2000,68800"
+blo "1000,73800"
 tm "WireNameMgr"
 )
 )
-on &432
-)
-*722 (Wire
+on &431
+)
+*717 (Wire
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 shape (OrthoPolyLine
@@ -21528 +21369 @@
 )
 )
-on &433
-)
-*723 (Wire
+on &432
+)
+*718 (Wire
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 shape (OrthoPolyLine
@@ -21563 +21404 @@
 )
 )
-on &434
-)
-*724 (Wire
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+)
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 shape (OrthoPolyLine
@@ -21578 +21419 @@
 ]
 )
-end &447
+end &446
 sat 16
 eat 32
@@ -21598 +21439 @@
 )
 )
-on &434
-)
-*725 (Wire
+on &433
+)
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@@ -21613 +21454 @@
 ]
 )
-end &448
+end &447
 sat 16
 eat 32
@@ -21633 +21474 @@
 )
 )
-on &433
-)
-*726 (Wire
+on &432
+)
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 shape (OrthoPolyLine
@@ -21649 +21490 @@
 ]
 )
-end &442
+end &441
 sat 16
 eat 32
@@ -21671 +21512 @@
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 )
-*727 (Wire
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@@ -21684 +21525 @@
 ]
 )
-end &446
+end &445
 sat 16
 eat 32
@@ -21704 +21545 @@
 )
 )
-on &453
-)
-*728 (Wire
+on &452
+)
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 shape (OrthoPolyLine
@@ -21719 +21560 @@
 ]
 )
-start &443
-end &436
+start &442
+end &435
 sat 32
 eat 32
@@ -21742 +21583 @@
 )
 )
-on &435
-)
-*729 (Wire
+on &434
+)
+*724 (Wire
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 shape (OrthoPolyLine
@@ -21757 +21598 @@
 ]
 )
-start &444
-end &438
+start &443
+end &437
 sat 32
 eat 32
@@ -21780 +21621 @@
 )
 )
-on &437
-)
-*730 (Wire
+on &436
+)
+*725 (Wire
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 shape (OrthoPolyLine
@@ -21795 +21636 @@
 ]
 )
-start &445
-end &440
+start &444
+end &439
 sat 32
 eat 32
@@ -21818 +21659 @@
 )
 )
-on &439
-)
-*731 (Wire
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+)
+*726 (Wire
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 shape (OrthoPolyLine
@@ -21854 +21695 @@
 )
 )
-on &453
-)
-*732 (Wire
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+)
+*727 (Wire
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 shape (OrthoPolyLine
@@ -21889 +21730 @@
 )
 )
-on &454
-)
-*733 (Wire
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+)
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@@ -21904 +21745 @@
 ]
 )
-end &461
+end &460
 sat 16
 eat 32
@@ -21925 +21766 @@
 )
 )
-on &454
-)
-*734 (Wire
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+)
+*729 (Wire
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 shape (OrthoPolyLine
@@ -21941 +21782 @@
 )
 start &411
-end &459
+end &458
 sat 32
 eat 32
@@ -21963 +21804 @@
 )
 )
-on &473
-)
-*735 (Wire
-uid 12635,0
-shape (OrthoPolyLine
-uid 12636,0
-va (VaSet
-vasetType 3
-)
-xt "-55250,72000,-54000,72000"
-pts [
-"-54000,72000"
-"-55250,72000"
-]
-)
-start &720
-end &476
-sat 32
-eat 32
-stc 0
-st 0
-sf 1
-si 0
-tg (WTG
-uid 12637,0
-ps "ConnStartEndStrategy"
-stg "STSignalDisplayStrategy"
-f (Text
-uid 12638,0
-va (VaSet
-)
-xt "-54000,71000,-49400,72000"
-st "trigger_out"
-blo "-54000,71800"
-tm "WireNameMgr"
-)
-)
-on &431
-)
-*736 (Wire
+on &472
+)
+*730 (Wire
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 shape (OrthoPolyLine
@@ -22017 +21821 @@
 ]
 )
-start &456
-end &475
+start &455
+end &474
 sat 32
 eat 32
@@ -22040 +21844 @@
 )
 )
-on &484
-)
-*737 (Wire
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+)
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 shape (OrthoPolyLine
@@ -22052 +21856 @@
 pts [
 "-21750,74000"
-"-38000,74000"
 "-55250,74000"
 ]
 )
 start &66
-end &478
+end &477
 sat 32
 eat 32
@@ -22077 +21880 @@
 )
 )
-on &485
-)
-*738 (Wire
+on &484
+)
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 shape (OrthoPolyLine
@@ -22094 +21897 @@
 )
 start &67
-end &479
+end &478
 sat 32
 eat 32
@@ -22114 +21917 @@
 )
 )
-on &486
-)
-*739 (Wire
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+)
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 shape (OrthoPolyLine
@@ -22132 +21935 @@
 ]
 )
-end &480
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 sat 16
 eat 32
@@ -22154 +21957 @@
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 )
-*740 (Wire
+*734 (Wire
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 shape (OrthoPolyLine
@@ -22167 +21970 @@
 ]
 )
-start &449
-end &488
+start &448
+end &487
 sat 32
 eat 32
@@ -22190 +21993 @@
 )
 )
-on &487
-)
-*741 (Wire
+on &486
+)
+*735 (Wire
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 shape (OrthoPolyLine
@@ -22199 +22002 @@
 vasetType 3
 )
-xt "63750,62000,69000,62000"
-pts [
-"69000,62000"
-"63750,62000"
-]
-)
-end &490
+xt "72750,62000,78000,62000"
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+"78000,62000"
+"72750,62000"
+]
+)
+end &489
 sat 16
 eat 32
@@ -22219 +22022 @@
 va (VaSet
 )
-xt "65000,61000,68100,62000"
+xt "74000,61000,77100,62000"
 st "CLK_25"
-blo "65000,61800"
+blo "74000,61800"
 tm "WireNameMgr"
 )
@@ -22227 +22030 @@
 on &188
 )
-*742 (Wire
+*736 (Wire
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 shape (OrthoPolyLine
@@ -22234 +22037 @@
 vasetType 3
 )
-xt "63750,63000,87250,67000"
+xt "72750,63000,87250,67000"
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 "87250,67000"
-"79000,67000"
-"79000,63000"
-"63750,63000"
+"77000,67000"
+"77000,63000"
+"72750,63000"
 ]
 )
 start &114
-end &491
+end &490
 sat 32
 eat 32
@@ -22263 +22066 @@
 )
 )
-on &497
-)
-*743 (Wire
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+)
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@@ -22273 +22076 @@
 lineWidth 2
 )
-xt "63750,64000,87250,68000"
+xt "72750,64000,87250,68000"
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 "87250,68000"
-"78000,68000"
-"78000,64000"
-"63750,64000"
+"76000,68000"
+"76000,64000"
+"72750,64000"
 ]
 )
 start &115
-end &492
+end &491
 sat 32
 eat 32
@@ -22303 +22106 @@
 )
 )
-on &498
-)
-*744 (Wire
+on &497
+)
+*738 (Wire
 uid 13210,0
 shape (OrthoPolyLine
@@ -22312 +22115 @@
 vasetType 3
 )
-xt "42000,62000,50250,62000"
-pts [
-"50250,62000"
-"42000,62000"
-]
-)
-start &493
-end &502
+xt "54000,62000,59250,62000"
+pts [
+"59250,62000"
+"54000,62000"
+]
+)
+start &492
+end &501
 sat 32
 eat 32
@@ -22333 +22136 @@
 va (VaSet
 )
-xt "46250,61000,49450,62000"
+xt "53250,61000,56450,62000"
 st "trigger1"
-blo "46250,61800"
+blo "53250,61800"
 tm "WireNameMgr"
 )
 )
-on &500
-)
-*745 (Wire
+on &499
+)
+*739 (Wire
 uid 13216,0
 shape (OrthoPolyLine
@@ -22348 +22151 @@
 vasetType 3
 )
-xt "42000,60000,45000,60000"
-pts [
-"45000,60000"
-"42000,60000"
-]
-)
-end &507
+xt "54000,60000,59000,60000"
+pts [
+"59000,60000"
+"54000,60000"
+]
+)
+end &506
 sat 16
 eat 32
@@ -22368 +22171 @@
 uid 13221,0
 va (VaSet
-isHidden 1
-)
-xt "43000,59000,47800,60000"
+)
+xt "54000,59000,58800,60000"
 st "s_trigger_0"
-blo "43000,59800"
+blo "54000,59800"
 tm "WireNameMgr"
 )
 )
-on &499
-)
-*746 (Wire
+on &498
+)
+*740 (Wire
 uid 13224,0
 shape (OrthoPolyLine
@@ -22385 +22187 @@
 vasetType 3
 )
-xt "33000,61000,36000,61000"
-pts [
-"36000,61000"
-"33000,61000"
-]
-)
-start &504
+xt "45000,61000,48000,61000"
+pts [
+"48000,61000"
+"45000,61000"
+]
+)
+start &503
 sat 32
 eat 16
@@ -22405 +22207 @@
 uid 13229,0
 va (VaSet
-isHidden 1
-)
-xt "34000,60000,37600,61000"
+)
+xt "45000,60000,48600,61000"
 st "s_trigger"
-blo "34000,60800"
+blo "45000,60800"
 tm "WireNameMgr"
 )
@@ -22415 +22216 @@
 on &401
 )
-*747 (Wire
+*741 (Wire
 uid 13695,0
 shape (OrthoPolyLine
@@ -22429 +22230 @@
 ]
 )
-start &524
+start &523
 end &116
 sat 32
@@ -22452 +22253 @@
 )
 )
-on &525
-)
-*748 (Wire
+on &524
+)
+*742 (Wire
 uid 13921,0
 shape (OrthoPolyLine
@@ -22491 +22292 @@
 on &71
 )
-*749 (Wire
+*743 (Wire
 uid 13929,0
 shape (OrthoPolyLine
@@ -22528 +22329 @@
 on &122
 )
-*750 (Wire
+*744 (Wire
 uid 14048,0
 shape (OrthoPolyLine
@@ -22541 +22342 @@
 ]
 )
-start &526
-end &532
+start &525
+end &531
 sat 32
 eat 32
@@ -22563 +22364 @@
 )
 )
-on &527
-)
-*751 (Wire
+on &526
+)
+*745 (Wire
 uid 14171,0
 shape (OrthoPolyLine
@@ -22579 +22380 @@
 ]
 )
-start &528
+start &527
 sat 32
 eat 16
@@ -22601 +22402 @@
 )
 )
-on &529
-)
-*752 (Wire
+on &528
+)
+*746 (Wire
 uid 14427,0
 shape (OrthoPolyLine
@@ -22616 +22417 @@
 ]
 )
-end &531
+end &530
 sat 16
 eat 32
@@ -22638 +22439 @@
 on &187
 )
-*753 (Wire
+*747 (Wire
 uid 14479,0
 shape (OrthoPolyLine
@@ -22651 +22452 @@
 ]
 )
-start &534
-end &540
+start &533
+end &539
 sat 32
 eat 32
@@ -22674 +22475 @@
 )
 )
-on &539
-)
-*754 (Wire
+on &538
+)
+*748 (Wire
 uid 14493,0
 shape (OrthoPolyLine
@@ -22689 +22490 @@
 ]
 )
-start &535
-end &542
+start &534
+end &541
 sat 32
 eat 32
@@ -22712 +22513 @@
 )
 )
-on &541
-)
-*755 (Wire
+on &540
+)
+*749 (Wire
 uid 14622,0
 shape (OrthoPolyLine
@@ -22728 +22529 @@
 ]
 )
-start &533
-end &544
+start &532
+end &543
 sat 32
 eat 32
@@ -22752 +22553 @@
 )
 )
-on &543
-)
-*756 (Wire
+on &542
+)
+*750 (Wire
 uid 15071,0
 shape (OrthoPolyLine
@@ -22768 +22569 @@
 )
 start &101
-end &549
+end &548
 sat 32
 eat 32
@@ -22788 +22589 @@
 )
 )
-on &596
-)
-*757 (Wire
+on &595
+)
+*751 (Wire
 uid 15081,0
 shape (OrthoPolyLine
@@ -22803 +22604 @@
 ]
 )
-start &551
-end &589
+start &550
+end &588
 sat 32
 eat 32
@@ -22826 +22627 @@
 )
 )
-on &597
-)
-*758 (Wire
+on &596
+)
+*752 (Wire
 uid 15122,0
 shape (OrthoPolyLine
@@ -22842 +22643 @@
 ]
 )
-start &587
-end &564
+start &586
+end &563
 sat 32
 eat 32
@@ -22864 +22665 @@
 )
 )
-on &598
-)
-*759 (Wire
+on &597
+)
+*753 (Wire
 uid 15130,0
 shape (OrthoPolyLine
@@ -22879 +22680 @@
 ]
 )
-end &579
+end &578
 es 0
 sat 16
@@ -22902 +22703 @@
 )
 )
-on &541
-)
-*760 (Wire
+on &540
+)
+*754 (Wire
 uid 15138,0
 shape (OrthoPolyLine
@@ -22917 +22718 @@
 ]
 )
-end &581
+end &580
 es 0
 sat 16
@@ -22940 +22741 @@
 )
 )
-on &539
+on &538
+)
+*755 (Wire
+uid 15379,0
+shape (OrthoPolyLine
+uid 15380,0
+va (VaSet
+vasetType 3
+)
+xt "29000,64000,29000,67250"
+pts [
+"29000,64000"
+"29000,67250"
+]
+)
+end &134
+sat 16
+eat 32
+st 0
+sf 1
+si 0
+tg (WTG
+uid 15383,0
+ps "ConnStartEndStrategy"
+stg "STSignalDisplayStrategy"
+f (Text
+uid 15384,0
+va (VaSet
+)
+xt "29000,64000,32100,65000"
+st "CLK_25"
+blo "29000,64800"
+tm "WireNameMgr"
+)
+)
+on &188
 )
 ]
@@ -22954 +22790 @@
 color "26368,26368,26368"
 )
-packageList *761 (PackageList
+packageList *756 (PackageList
 uid 41,0
 stg "VerticalLayoutStrategy"
 textVec [
-*762 (Text
+*757 (Text
 uid 42,0
 va (VaSet
@@ -22967 +22803 @@
 blo "-163000,-15200"
 )
-*763 (MLText
+*758 (MLText
 uid 43,0
 va (VaSet
@@ -22992 +22828 @@
 stg "VerticalLayoutStrategy"
 textVec [
-*764 (Text
+*759 (Text
 uid 45,0
 va (VaSet
@@ -23002 +22838 @@
 blo "20000,800"
 )
-*765 (Text
+*760 (Text
 uid 46,0
 va (VaSet
@@ -23012 +22848 @@
 blo "20000,1800"
 )
-*766 (MLText
+*761 (MLText
 uid 47,0
 va (VaSet
@@ -23022 +22858 @@
 tm "BdCompilerDirectivesTextMgr"
 )
-*767 (Text
+*762 (Text
 uid 48,0
 va (VaSet
@@ -23032 +22868 @@
 blo "20000,4800"
 )
-*768 (MLText
+*763 (MLText
 uid 49,0
 va (VaSet
@@ -23040 +22876 @@
 tm "BdCompilerDirectivesTextMgr"
 )
-*769 (Text
+*764 (Text
 uid 50,0
 va (VaSet
@@ -23050 +22886 @@
 blo "20000,5800"
 )
-*770 (MLText
+*765 (MLText
 uid 51,0
 va (VaSet
@@ -23062 +22898 @@
 )
 windowSize "0,0,1281,1024"
-viewArea "-85665,-1810,-19291,52928"
+viewArea "-65668,47481,1175,102606"
 cachedDiagramExtent "-174000,-25425,428157,346294"
 pageSetupInfo (PageSetupInfo
@@ -23088 +22924 @@
 hasePageBreakOrigin 1
 pageBreakOrigin "-73000,0"
-lastUid 15174,0
+lastUid 15388,0
 defaultCommentText (CommentText
 shape (Rectangle
@@ -23150 +22986 @@
 stg "VerticalLayoutStrategy"
 textVec [
-*771 (Text
+*766 (Text
 va (VaSet
 font "Arial,8,1"
@@ -23159 +22995 @@
 tm "BdLibraryNameMgr"
 )
-*772 (Text
+*767 (Text
 va (VaSet
 font "Arial,8,1"
@@ -23168 +23004 @@
 tm "BlkNameMgr"
 )
-*773 (Text
+*768 (Text
 va (VaSet
 font "Arial,8,1"
@@ -23219 +23055 @@
 stg "VerticalLayoutStrategy"
 textVec [
-*774 (Text
+*769 (Text
 va (VaSet
 font "Arial,8,1"
@@ -23227 +23063 @@
 blo "550,4300"
 )
-*775 (Text
+*770 (Text
 va (VaSet
 font "Arial,8,1"
@@ -23235 +23071 @@
 blo "550,5300"
 )
-*776 (Text
+*771 (Text
 va (VaSet
 font "Arial,8,1"
@@ -23284 +23120 @@
 stg "VerticalLayoutStrategy"
 textVec [
-*777 (Text
+*772 (Text
 va (VaSet
 font "Arial,8,1"
@@ -23293 +23129 @@
 tm "BdLibraryNameMgr"
 )
-*778 (Text
+*773 (Text
 va (VaSet
 font "Arial,8,1"
@@ -23302 +23138 @@
 tm "CptNameMgr"
 )
-*779 (Text
+*774 (Text
 va (VaSet
 font "Arial,8,1"
@@ -23356 +23192 @@
 stg "VerticalLayoutStrategy"
 textVec [
-*780 (Text
+*775 (Text
 va (VaSet
 font "Arial,8,1"
@@ -23364 +23200 @@
 blo "500,4300"
 )
-*781 (Text
+*776 (Text
 va (VaSet
 font "Arial,8,1"
@@ -23372 +23208 @@
 blo "500,5300"
 )
-*782 (Text
+*777 (Text
 va (VaSet
 font "Arial,8,1"
@@ -23417 +23253 @@
 stg "VerticalLayoutStrategy"
 textVec [
-*783 (Text
+*778 (Text
 va (VaSet
 font "Arial,8,1"
@@ -23425 +23261 @@
 blo "50,4300"
 )
-*784 (Text
+*779 (Text
 va (VaSet
 font "Arial,8,1"
@@ -23433 +23269 @@
 blo "50,5300"
 )
-*785 (Text
+*780 (Text
 va (VaSet
 font "Arial,8,1"
@@ -23474 +23310 @@
 stg "VerticalLayoutStrategy"
 textVec [
-*786 (Text
+*781 (Text
 va (VaSet
 font "Arial,8,1"
@@ -23483 +23319 @@
 tm "HdlTextNameMgr"
 )
-*787 (Text
+*782 (Text
 va (VaSet
 font "Arial,8,1"
@@ -23886 +23722 @@
 stg "VerticalLayoutStrategy"
 textVec [
-*788 (Text
+*783 (Text
 va (VaSet
 font "Arial,8,1"
@@ -23894 +23730 @@
 blo "14100,20800"
 )
-*789 (MLText
+*784 (MLText
 va (VaSet
 )
@@ -23946 +23782 @@
 stg "VerticalLayoutStrategy"
 textVec [
-*790 (Text
+*785 (Text
 va (VaSet
 font "Arial,8,1"
@@ -23954 +23790 @@
 blo "14100,20800"
 )
-*791 (MLText
+*786 (MLText
 va (VaSet
 )
@@ -24079 +23915 @@
 font "Arial,8,1"
 )
-xt "-174000,107600,-169300,108600"
+xt "-174000,106800,-169300,107800"
 st "Post User:"
-blo "-174000,108400"
+blo "-174000,107600"
 )
 postUserText (MLText
@@ -24094 +23930 @@
 commonDM (CommonDM
 ldm (LogicalDM
-suid 299,0
+suid 300,0
 usingSuid 1
-emptyRow *792 (LEmptyRow
+emptyRow *787 (LEmptyRow
 )
 uid 54,0
 optionalChildren [
-*793 (RefLabelRowHdr
-)
-*794 (TitleRowHdr
-)
-*795 (FilterRowHdr
-)
-*796 (RefLabelColHdr
+*788 (RefLabelRowHdr
+)
+*789 (TitleRowHdr
+)
+*790 (FilterRowHdr
+)
+*791 (RefLabelColHdr
 tm "RefLabelColHdrMgr"
 )
-*797 (RowExpandColHdr
+*792 (RowExpandColHdr
 tm "RowExpandColHdrMgr"
 )
-*798 (GroupColHdr
+*793 (GroupColHdr
 tm "GroupColHdrMgr"
 )
-*799 (NameColHdr
+*794 (NameColHdr
 tm "BlockDiagramNameColHdrMgr"
 )
-*800 (ModeColHdr
+*795 (ModeColHdr
 tm "BlockDiagramModeColHdrMgr"
 )
-*801 (TypeColHdr
+*796 (TypeColHdr
 tm "BlockDiagramTypeColHdrMgr"
 )
-*802 (BoundsColHdr
+*797 (BoundsColHdr
 tm "BlockDiagramBoundsColHdrMgr"
 )
-*803 (InitColHdr
+*798 (InitColHdr
 tm "BlockDiagramInitColHdrMgr"
 )
-*804 (EolColHdr
+*799 (EolColHdr
 tm "BlockDiagramEolColHdrMgr"
 )
-*805 (LeafLogPort
+*800 (LeafLogPort
 port (LogicalPort
 m 4
@@ -24147 +23983 @@
 uid 516,0
 )
-*806 (LeafLogPort
+*801 (LeafLogPort
 port (LogicalPort
 m 4
@@ -24160 +23996 @@
 uid 518,0
 )
-*807 (LeafLogPort
+*802 (LeafLogPort
 port (LogicalPort
 m 4
@@ -24173 +24009 @@
 uid 520,0
 )
-*808 (LeafLogPort
+*803 (LeafLogPort
 port (LogicalPort
 m 4
@@ -24186 +24022 @@
 uid 530,0
 )
-*809 (LeafLogPort
+*804 (LeafLogPort
 port (LogicalPort
 m 4
@@ -24199 +24035 @@
 uid 532,0
 )
-*810 (LeafLogPort
+*805 (LeafLogPort
 port (LogicalPort
 m 1
@@ -24212 +24048 @@
 uid 534,0
 )
-*811 (LeafLogPort
+*806 (LeafLogPort
 port (LogicalPort
 m 1
@@ -24225 +24061 @@
 uid 536,0
 )
-*812 (LeafLogPort
+*807 (LeafLogPort
 port (LogicalPort
 m 2
@@ -24238 +24074 @@
 uid 538,0
 )
-*813 (LeafLogPort
+*808 (LeafLogPort
 port (LogicalPort
 m 1
@@ -24251 +24087 @@
 uid 540,0
 )
-*814 (LeafLogPort
+*809 (LeafLogPort
 port (LogicalPort
 m 1
@@ -24264 +24100 @@
 uid 542,0
 )
-*815 (LeafLogPort
+*810 (LeafLogPort
 port (LogicalPort
 m 1
@@ -24277 +24113 @@
 uid 546,0
 )
-*816 (LeafLogPort
+*811 (LeafLogPort
 port (LogicalPort
 decl (Decl
@@ -24288 +24124 @@
 uid 548,0
 )
-*817 (LeafLogPort
+*812 (LeafLogPort
 port (LogicalPort
 decl (Decl
@@ -24300 +24136 @@
 uid 1455,0
 )
-*818 (LeafLogPort
+*813 (LeafLogPort
 port (LogicalPort
 decl (Decl
@@ -24313 +24149 @@
 uid 1457,0
 )
-*819 (LeafLogPort
+*814 (LeafLogPort
 port (LogicalPort
 decl (Decl
@@ -24325 +24161 @@
 uid 1694,0
 )
-*820 (LeafLogPort
+*815 (LeafLogPort
 port (LogicalPort
 lang 2
@@ -24341 +24177 @@
 uid 1993,0
 )
-*821 (LeafLogPort
+*816 (LeafLogPort
 port (LogicalPort
 m 4
@@ -24356 +24192 @@
 uid 2305,0
 )
-*822 (LeafLogPort
+*817 (LeafLogPort
 port (LogicalPort
 lang 2
@@ -24369 +24205 @@
 uid 2510,0
 )
-*823 (LeafLogPort
+*818 (LeafLogPort
 port (LogicalPort
 lang 2
@@ -24383 +24219 @@
 uid 2512,0
 )
-*824 (LeafLogPort
+*819 (LeafLogPort
 port (LogicalPort
 lang 2
@@ -24398 +24234 @@
 uid 2514,0
 )
-*825 (LeafLogPort
+*820 (LeafLogPort
 port (LogicalPort
 lang 2
@@ -24414 +24250 @@
 uid 2516,0
 )
-*826 (LeafLogPort
+*821 (LeafLogPort
 port (LogicalPort
 lang 2
@@ -24429 +24265 @@
 uid 2518,0
 )
-*827 (LeafLogPort
+*822 (LeafLogPort
 port (LogicalPort
 lang 2
@@ -24443 +24279 @@
 uid 2520,0
 )
-*828 (LeafLogPort
+*823 (LeafLogPort
 port (LogicalPort
 lang 2
@@ -24457 +24293 @@
 uid 2522,0
 )
-*829 (LeafLogPort
+*824 (LeafLogPort
 port (LogicalPort
 m 4
@@ -24469 +24305 @@
 uid 2604,0
 )
-*830 (LeafLogPort
+*825 (LeafLogPort
 port (LogicalPort
 m 4
@@ -24482 +24318 @@
 uid 2606,0
 )
-*831 (LeafLogPort
+*826 (LeafLogPort
 port (LogicalPort
 m 4
@@ -24495 +24331 @@
 uid 2608,0
 )
-*832 (LeafLogPort
+*827 (LeafLogPort
 port (LogicalPort
 m 4
@@ -24507 +24343 @@
 uid 2610,0
 )
-*833 (LeafLogPort
+*828 (LeafLogPort
 port (LogicalPort
 m 4
@@ -24519 +24355 @@
 uid 2612,0
 )
-*834 (LeafLogPort
+*829 (LeafLogPort
 port (LogicalPort
 m 4
@@ -24532 +24368 @@
 uid 2646,0
 )
-*835 (LeafLogPort
+*830 (LeafLogPort
 port (LogicalPort
 m 1
@@ -24545 +24381 @@
 uid 2812,0
 )
-*836 (LeafLogPort
+*831 (LeafLogPort
 port (LogicalPort
 m 4
@@ -24557 +24393 @@
 uid 2962,0
 )
-*837 (LeafLogPort
+*832 (LeafLogPort
 port (LogicalPort
 m 1
@@ -24569 +24405 @@
 uid 3902,0
 )
-*838 (LeafLogPort
+*833 (LeafLogPort
 port (LogicalPort
 m 1
@@ -24581 +24417 @@
 uid 4070,0
 )
-*839 (LeafLogPort
+*834 (LeafLogPort
 port (LogicalPort
 m 4
@@ -24593 +24429 @@
 uid 4212,0
 )
-*840 (LeafLogPort
+*835 (LeafLogPort
 port (LogicalPort
 decl (Decl
@@ -24604 +24440 @@
 uid 4234,0
 )
-*841 (LeafLogPort
+*836 (LeafLogPort
 port (LogicalPort
 decl (Decl
@@ -24616 +24452 @@
 uid 4262,0
 )
-*842 (LeafLogPort
+*837 (LeafLogPort
 port (LogicalPort
 decl (Decl
@@ -24627 +24463 @@
 uid 4276,0
 )
-*843 (LeafLogPort
+*838 (LeafLogPort
 port (LogicalPort
 m 4
@@ -24640 +24476 @@
 uid 4563,0
 )
-*844 (LeafLogPort
+*839 (LeafLogPort
 port (LogicalPort
 m 4
@@ -24652 +24488 @@
 uid 4565,0
 )
-*845 (LeafLogPort
+*840 (LeafLogPort
 port (LogicalPort
 m 4
@@ -24665 +24501 @@
 uid 4569,0
 )
-*846 (LeafLogPort
+*841 (LeafLogPort
 port (LogicalPort
 m 1
@@ -24679 +24515 @@
 uid 4585,0
 )
-*847 (LeafLogPort
+*842 (LeafLogPort
 port (LogicalPort
 m 1
@@ -24692 +24528 @@
 uid 4587,0
 )
-*848 (LeafLogPort
+*843 (LeafLogPort
 port (LogicalPort
 decl (Decl
@@ -24703 +24539 @@
 uid 4733,0
 )
-*849 (LeafLogPort
+*844 (LeafLogPort
 port (LogicalPort
 decl (Decl
@@ -24714 +24550 @@
 uid 4735,0
 )
-*850 (LeafLogPort
+*845 (LeafLogPort
 port (LogicalPort
 decl (Decl
@@ -24725 +24561 @@
 uid 4737,0
 )
-*851 (LeafLogPort
+*846 (LeafLogPort
 port (LogicalPort
 decl (Decl
@@ -24736 +24572 @@
 uid 4739,0
 )
-*852 (LeafLogPort
+*847 (LeafLogPort
 port (LogicalPort
 m 4
@@ -24748 +24584 @@
 uid 4749,0
 )
-*853 (LeafLogPort
+*848 (LeafLogPort
 port (LogicalPort
 m 1
@@ -24761 +24597 @@
 uid 4974,0
 )
-*854 (LeafLogPort
+*849 (LeafLogPort
 port (LogicalPort
 m 1
@@ -24774 +24610 @@
 uid 4976,0
 )
-*855 (LeafLogPort
+*850 (LeafLogPort
 port (LogicalPort
 m 4
@@ -24787 +24623 @@
 uid 5198,0
 )
-*856 (LeafLogPort
+*851 (LeafLogPort
 port (LogicalPort
 m 4
@@ -24799 +24635 @@
 uid 5200,0
 )
-*857 (LeafLogPort
+*852 (LeafLogPort
 port (LogicalPort
 m 4
@@ -24811 +24647 @@
 uid 5202,0
 )
-*858 (LeafLogPort
+*853 (LeafLogPort
 port (LogicalPort
 m 4
@@ -24824 +24660 @@
 uid 5204,0
 )
-*859 (LeafLogPort
+*854 (LeafLogPort
 port (LogicalPort
 m 4
@@ -24836 +24672 @@
 uid 5206,0
 )
-*860 (LeafLogPort
+*855 (LeafLogPort
 port (LogicalPort
 m 4
@@ -24848 +24684 @@
 uid 5208,0
 )
-*861 (LeafLogPort
+*856 (LeafLogPort
 port (LogicalPort
 m 4
@@ -24860 +24696 @@
 uid 5210,0
 )
-*862 (LeafLogPort
+*857 (LeafLogPort
 port (LogicalPort
 m 4
@@ -24872 +24708 @@
 uid 5212,0
 )
-*863 (LeafLogPort
+*858 (LeafLogPort
 port (LogicalPort
 m 4
@@ -24884 +24720 @@
 uid 5214,0
 )
-*864 (LeafLogPort
+*859 (LeafLogPort
 port (LogicalPort
 m 1
@@ -24899 +24735 @@
 uid 5226,0
 )
-*865 (LeafLogPort
+*860 (LeafLogPort
 port (LogicalPort
 m 4
@@ -24911 +24747 @@
 uid 5502,0
 )
-*866 (LeafLogPort
+*861 (LeafLogPort
 port (LogicalPort
 m 4
@@ -24923 +24759 @@
 uid 5504,0
 )
-*867 (LeafLogPort
+*862 (LeafLogPort
 port (LogicalPort
 m 4
@@ -24935 +24771 @@
 uid 5600,0
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+*1010 (MRCItem
+litem &883
 pos 88
 dimension 20
 uid 9248,0
 )
-*1017 (MRCItem
-litem &889
+*1011 (MRCItem
+litem &884
 pos 89
 dimension 20
 uid 9250,0
 )
-*1018 (MRCItem
-litem &890
+*1012 (MRCItem
+litem &885
 pos 90
 dimension 20
 uid 10025,0
 )
-*1019 (MRCItem
-litem &891
+*1013 (MRCItem
+litem &886
 pos 91
 dimension 20
 uid 10027,0
 )
-*1020 (MRCItem
-litem &892
+*1014 (MRCItem
+litem &887
 pos 92
 dimension 20
 uid 10029,0
 )
-*1021 (MRCItem
-litem &893
+*1015 (MRCItem
+litem &888
 pos 93
 dimension 20
 uid 10209,0
 )
-*1022 (MRCItem
-litem &894
+*1016 (MRCItem
+litem &889
 pos 94
 dimension 20
 uid 10211,0
 )
-*1023 (MRCItem
-litem &895
+*1017 (MRCItem
+litem &890
 pos 95
 dimension 20
 uid 10295,0
 )
-*1024 (MRCItem
-litem &896
+*1018 (MRCItem
+litem &891
 pos 96
 dimension 20
 uid 10335,0
 )
-*1025 (MRCItem
-litem &897
+*1019 (MRCItem
+litem &892
 pos 97
 dimension 20
 uid 10337,0
 )
-*1026 (MRCItem
-litem &898
+*1020 (MRCItem
+litem &893
 pos 98
 dimension 20
 uid 10339,0
 )
-*1027 (MRCItem
-litem &899
+*1021 (MRCItem
+litem &894
 pos 99
 dimension 20
 uid 10341,0
 )
-*1028 (MRCItem
-litem &900
+*1022 (MRCItem
+litem &895
 pos 32
 dimension 20
 uid 10343,0
 )
-*1029 (MRCItem
-litem &901
+*1023 (MRCItem
+litem &896
 pos 100
 dimension 20
-uid 10474,0
-)
-*1030 (MRCItem
-litem &902
+uid 10476,0
+)
+*1024 (MRCItem
+litem &897
 pos 101
 dimension 20
-uid 10476,0
-)
-*1031 (MRCItem
-litem &903
+uid 10764,0
+)
+*1025 (MRCItem
+litem &898
 pos 102
 dimension 20
-uid 10764,0
-)
-*1032 (MRCItem
-litem &904
-pos 103
-dimension 20
 uid 10766,0
 )
-*1033 (MRCItem
-litem &905
+*1026 (MRCItem
+litem &899
 pos 33
 dimension 20
 uid 10768,0
 )
-*1034 (MRCItem
-litem &906
+*1027 (MRCItem
+litem &900
 pos 34
 dimension 20
 uid 10770,0
 )
-*1035 (MRCItem
-litem &907
+*1028 (MRCItem
+litem &901
 pos 35
 dimension 20
 uid 10772,0
 )
-*1036 (MRCItem
-litem &908
+*1029 (MRCItem
+litem &902
+pos 103
+dimension 20
+uid 11412,0
+)
+*1030 (MRCItem
+litem &903
 pos 104
 dimension 20
-uid 11412,0
-)
-*1037 (MRCItem
-litem &909
+uid 11967,0
+)
+*1031 (MRCItem
+litem &904
 pos 105
 dimension 20
-uid 11967,0
-)
-*1038 (MRCItem
-litem &910
+uid 12311,0
+)
+*1032 (MRCItem
+litem &905
 pos 106
 dimension 20
-uid 12311,0
-)
-*1039 (MRCItem
-litem &911
+uid 12660,0
+)
+*1033 (MRCItem
+litem &906
 pos 107
 dimension 20
-uid 12660,0
-)
-*1040 (MRCItem
-litem &912
+uid 12662,0
+)
+*1034 (MRCItem
+litem &907
 pos 108
 dimension 20
-uid 12662,0
-)
-*1041 (MRCItem
-litem &913
-pos 109
-dimension 20
 uid 12664,0
 )
-*1042 (MRCItem
-litem &914
+*1035 (MRCItem
+litem &908
 pos 36
 dimension 20
 uid 12720,0
 )
-*1043 (MRCItem
-litem &915
+*1036 (MRCItem
+litem &909
+pos 109
+dimension 20
+uid 13276,0
+)
+*1037 (MRCItem
+litem &910
 pos 110
 dimension 20
-uid 13276,0
-)
-*1044 (MRCItem
-litem &916
+uid 13278,0
+)
+*1038 (MRCItem
+litem &911
 pos 111
 dimension 20
-uid 13278,0
-)
-*1045 (MRCItem
-litem &917
+uid 13280,0
+)
+*1039 (MRCItem
+litem &912
 pos 112
 dimension 20
-uid 13280,0
-)
-*1046 (MRCItem
-litem &918
+uid 13282,0
+)
+*1040 (MRCItem
+litem &913
 pos 113
 dimension 20
-uid 13282,0
-)
-*1047 (MRCItem
-litem &919
+uid 13688,0
+)
+*1041 (MRCItem
+litem &914
 pos 114
 dimension 20
-uid 13688,0
-)
-*1048 (MRCItem
-litem &920
+uid 14041,0
+)
+*1042 (MRCItem
+litem &915
 pos 115
 dimension 20
-uid 14041,0
-)
-*1049 (MRCItem
-litem &921
+uid 14164,0
+)
+*1043 (MRCItem
+litem &916
 pos 116
 dimension 20
-uid 14164,0
-)
-*1050 (MRCItem
-litem &922
+uid 14508,0
+)
+*1044 (MRCItem
+litem &917
 pos 117
 dimension 20
-uid 14508,0
-)
-*1051 (MRCItem
-litem &923
+uid 14510,0
+)
+*1045 (MRCItem
+litem &918
 pos 118
 dimension 20
-uid 14510,0
-)
-*1052 (MRCItem
-litem &924
+uid 14635,0
+)
+*1046 (MRCItem
+litem &919
 pos 119
 dimension 20
-uid 14635,0
-)
-*1053 (MRCItem
-litem &925
+uid 15145,0
+)
+*1047 (MRCItem
+litem &920
 pos 120
 dimension 20
-uid 15145,0
-)
-*1054 (MRCItem
-litem &926
+uid 15147,0
+)
+*1048 (MRCItem
+litem &921
 pos 121
-dimension 20
-uid 15147,0
-)
-*1055 (MRCItem
-litem &927
-pos 122
 dimension 20
 uid 15149,0
@@ -26538 +26354 @@
 uid 73,0
 optionalChildren [
-*1056 (MRCItem
-litem &796
+*1049 (MRCItem
+litem &791
 pos 0
 dimension 20
 uid 74,0
 )
-*1057 (MRCItem
-litem &798
+*1050 (MRCItem
+litem &793
 pos 1
 dimension 50
 uid 75,0
 )
-*1058 (MRCItem
-litem &799
+*1051 (MRCItem
+litem &794
 pos 2
 dimension 100
 uid 76,0
 )
-*1059 (MRCItem
-litem &800
+*1052 (MRCItem
+litem &795
 pos 3
 dimension 50
 uid 77,0
 )
-*1060 (MRCItem
-litem &801
+*1053 (MRCItem
+litem &796
 pos 4
 dimension 100
 uid 78,0
 )
-*1061 (MRCItem
-litem &802
+*1054 (MRCItem
+litem &797
 pos 5
 dimension 100
 uid 79,0
 )
-*1062 (MRCItem
-litem &803
+*1055 (MRCItem
+litem &798
 pos 6
 dimension 50
 uid 80,0
 )
-*1063 (MRCItem
-litem &804
+*1056 (MRCItem
+litem &799
 pos 7
 dimension 290
@@ -26601 +26417 @@
 genericsCommonDM (CommonDM
 ldm (LogicalDM
-emptyRow *1064 (LEmptyRow
+emptyRow *1057 (LEmptyRow
 )
 uid 83,0
 optionalChildren [
-*1065 (RefLabelRowHdr
-)
-*1066 (TitleRowHdr
-)
-*1067 (FilterRowHdr
-)
-*1068 (RefLabelColHdr
+*1058 (RefLabelRowHdr
+)
+*1059 (TitleRowHdr
+)
+*1060 (FilterRowHdr
+)
+*1061 (RefLabelColHdr
 tm "RefLabelColHdrMgr"
 )
-*1069 (RowExpandColHdr
+*1062 (RowExpandColHdr
 tm "RowExpandColHdrMgr"
 )
-*1070 (GroupColHdr
+*1063 (GroupColHdr
 tm "GroupColHdrMgr"
 )
-*1071 (NameColHdr
+*1064 (NameColHdr
 tm "GenericNameColHdrMgr"
 )
-*1072 (TypeColHdr
+*1065 (TypeColHdr
 tm "GenericTypeColHdrMgr"
 )
-*1073 (InitColHdr
+*1066 (InitColHdr
 tm "GenericValueColHdrMgr"
 )
-*1074 (PragmaColHdr
+*1067 (PragmaColHdr
 tm "GenericPragmaColHdrMgr"
 )
-*1075 (EolColHdr
+*1068 (EolColHdr
 tm "GenericEolColHdrMgr"
 )
-*1076 (LogGeneric
+*1069 (LogGeneric
 generic (GiElement
 name "RAMADDRWIDTH64b"
@@ -26650 +26466 @@
 uid 95,0
 optionalChildren [
-*1077 (Sheet
+*1070 (Sheet
 sheetRow (SheetRow
 headerVa (MVa
@@ -26667 +26483 @@
 font "Tahoma,10,0"
 )
-emptyMRCItem *1078 (MRCItem
-litem &1064
+emptyMRCItem *1071 (MRCItem
+litem &1057
 pos 1
 dimension 20
@@ -26674 +26490 @@
 uid 97,0
 optionalChildren [
-*1079 (MRCItem
-litem &1065
+*1072 (MRCItem
+litem &1058
 pos 0
 dimension 20
 uid 98,0
 )
-*1080 (MRCItem
-litem &1066
+*1073 (MRCItem
+litem &1059
 pos 1
 dimension 23
 uid 99,0
 )
-*1081 (MRCItem
-litem &1067
+*1074 (MRCItem
+litem &1060
 pos 2
 hidden 1
@@ -26693 +26509 @@
 uid 100,0
 )
-*1082 (MRCItem
-litem &1076
+*1075 (MRCItem
+litem &1069
 pos 0
 dimension 20
@@ -26710 +26526 @@
 uid 101,0
 optionalChildren [
-*1083 (MRCItem
-litem &1068
+*1076 (MRCItem
+litem &1061
 pos 0
 dimension 20
 uid 102,0
 )
-*1084 (MRCItem
-litem &1070
+*1077 (MRCItem
+litem &1063
 pos 1
 dimension 50
 uid 103,0
 )
-*1085 (MRCItem
-litem &1071
+*1078 (MRCItem
+litem &1064
 pos 2
 dimension 186
 uid 104,0
 )
-*1086 (MRCItem
-litem &1072
+*1079 (MRCItem
+litem &1065
 pos 3
 dimension 96
 uid 105,0
 )
-*1087 (MRCItem
-litem &1073
+*1080 (MRCItem
+litem &1066
 pos 4
 dimension 50
 uid 106,0
 )
-*1088 (MRCItem
-litem &1074
+*1081 (MRCItem
+litem &1067
 pos 5
 dimension 50
 uid 107,0
 )
-*1089 (MRCItem
-litem &1075
+*1082 (MRCItem
+litem &1068
 pos 6
 dimension 80

firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib/hds/@f@a@d_main/symbol.sb

@@ -1199 +1199 @@
 (vvPair
 variable "date"
-value "04.02.2011"
+value "08.02.2011"
 )
 (vvPair
 variable "day"
-value "Fr"
+value "Di"
 )
 (vvPair
 variable "day_long"
-value "Freitag"
+value "Dienstag"
 )
 (vvPair
 variable "dd"
-value "04"
+value "08"
 )
 (vvPair
@@ -1351 +1351 @@
 (vvPair
 variable "time"
-value "12:56:44"
+value "11:06:22"
 )
 (vvPair
@@ -4000 +4000 @@
 )
 )
-lastUid 5873,0
+lastUid 5942,0
 okToSyncOnLoad 1
 OkToSyncGenericsOnLoad 1

firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib/hds/w5300_modul/symbol.sb

@@ -347 +347 @@
 t "std_logic_vector"
 b "(7 downto 0)"
+prec "-- read/write configRAM"
+preAdd 0
 o 25
 suid 24,0
@@ -358 +360 @@
 n "config_busy"
 t "std_logic"
-prec "-- --"
-preAdd 0
+preAdd 0
+posAdd 0
 o 31
 suid 25,0
@@ -385 +387 @@
 n "config_started"
 t "std_logic"
+posAdd 0
 o 24
 suid 27,0
@@ -410 +413 @@
 n "new_config"
 t "std_logic"
-prec "--"
+prec "-- FAD configuration signals:
+------------------------------------------------------------------------------
+-- start entire configuration chain"
 preAdd 0
 o 23
@@ -441 +446 @@
 eolc "-- default domino wave off"
 posAdd 0
-o 35
+o 36
 suid 31,0
 i "'0'"
@@ -457 +462 @@
 preAdd 0
 posAdd 0
-o 36
+o 37
 suid 32,0
 i "'0'"
@@ -485 +490 @@
 eolc "-- default DWRITE HIGH."
 posAdd 0
-o 37
+o 38
 suid 35,0
 i "'1'"
@@ -498 +503 @@
 n "ps_direction"
 t "std_logic"
+prec "------------------------------------------------------------------------------
+
+-- ADC CLK generator, is able to shift phase with respect to X_50M
+-- these signals control the behavior of the digital clock manager (DCM)
+------------------------------------------------------------------------------"
 eolc "-- default phase shift upwards"
-posAdd 0
-o 38
+preAdd 0
+posAdd 0
+o 40
 suid 36,0
 i "'1'"
@@ -516 +527 @@
 preAdd 0
 posAdd 0
-o 39
+o 41
 suid 37,0
 i "'0'"
@@ -531 +542 @@
 eolc "-- pulse this to reset the variable phase shift"
 posAdd 0
-o 40
+o 42
 suid 38,0
 i "'0'"
@@ -546 +557 @@
 eolc "-- default SRCLK on."
 posAdd 0
-o 41
+o 39
 suid 39,0
 i "'1'"
@@ -558 +569 @@
 n "config_rw_ack"
 t "std_logic"
-prec "-- --"
 preAdd 0
 posAdd 0
@@ -572 +582 @@
 n "config_rw_ready"
 t "std_logic"
-prec "-- --"
 preAdd 0
 posAdd 0
@@ -587 +596 @@
 n "socks_connected"
 t "std_logic"
+posc "------------------------------------------------------------------------------"
+posAdd 0
 o 44
 suid 42,0
@@ -599 +610 @@
 n "socks_waiting"
 t "std_logic"
+prec "------------------------------------------------------------------------------
+
+-- signals used to control FAD LED bahavior:
+-- one of the three LEDs is used for com-status info
+------------------------------------------------------------------------------"
 preAdd 0
 o 43
@@ -612 +628 @@
 n "trigger_enable"
 t "std_logic"
+prec "------------------------------------------------------------------------------
+
+-- user controllable enable signals
+------------------------------------------------------------------------------"
 eolc "-- default triggers are NOT accepted"
-posAdd 0
-o 42
+preAdd 0
+posAdd 0
+o 35
 suid 44,0
 i "'0'"
@@ -656 +677 @@
 t "std_logic_vector"
 b "(1 downto 0)"
+prec "------------------------------------------------------------------------------
+
+-- MAC/IP calculation signals:
+------------------------------------------------------------------------------"
+preAdd 0
 o 32
 suid 48,0
@@ -680 +706 @@
 t "std_logic_vector"
 b "(1 downto 0)"
+posAdd 0
 o 34
 suid 50,0
@@ -1114 +1141 @@
 value "14"
 )
-uid 1329,0
+uid 1354,0
 )
 ]
@@ -1170 +1197 @@
 pos 0
 dimension 20
-uid 1330,0
+uid 1355,0
 )
 ]
@@ -1283 +1310 @@
 (vvPair
 variable "date"
-value "27.01.2011"
+value "08.02.2011"
 )
 (vvPair
 variable "day"
-value "Do"
+value "Di"
 )
 (vvPair
 variable "day_long"
-value "Donnerstag"
+value "Dienstag"
 )
 (vvPair
 variable "dd"
-value "27"
+value "08"
 )
 (vvPair
@@ -1359 +1386 @@
 (vvPair
 variable "mm"
-value "01"
+value "02"
 )
 (vvPair
@@ -1367 +1394 @@
 (vvPair
 variable "month"
-value "Jan"
+value "Feb"
 )
 (vvPair
 variable "month_long"
-value "Januar"
+value "Februar"
 )
 (vvPair
@@ -1403 +1430 @@
 (vvPair
 variable "task_ModelSimPath"
-value "<TBD>"
+value "C:\\modeltech_6.6a\\win32"
 )
 (vvPair
@@ -1435 +1462 @@
 (vvPair
 variable "time"
-value "15:14:14"
+value "10:18:42"
 )
 (vvPair
@@ -2161 +2188 @@
 xt "200,31000,13900,35000"
 st "
----- Uncomment the following library declaration if instantiating
----- any Xilinx primitives in this code.
---library UNISIM;
---use UNISIM.VComponents.all;
+
 "
 tm "CommentText"
@@ -2439 +2463 @@
 font "Courier New,8,0"
 )
-xt "2000,36800,33000,37600"
-st "config_addr       : OUT    std_logic_vector (7 downto 0) ;
+xt "2000,38400,33000,40000"
+st "-- read/write configRAM
+config_addr       : OUT    std_logic_vector (7 downto 0) ;
 "
 )
@@ -2449 +2474 @@
 t "std_logic_vector"
 b "(7 downto 0)"
+prec "-- read/write configRAM"
+preAdd 0
 o 25
 suid 24,0
@@ -2485 +2512 @@
 font "Courier New,8,0"
 )
-xt "2000,43200,23000,44800"
-st "-- --
-config_busy       : IN     std_logic  ;
+xt "2000,44000,23000,44800"
+st "config_busy       : IN     std_logic  ;
 "
 )
@@ -2494 +2520 @@
 n "config_busy"
 t "std_logic"
-prec "-- --"
-preAdd 0
+preAdd 0
+posAdd 0
 o 31
 suid 25,0
@@ -2533 +2559 @@
 font "Courier New,8,0"
 )
-xt "2000,37600,43000,38400"
+xt "2000,40000,43000,40800"
 st "config_data       : INOUT  std_logic_vector (15 downto 0) := (others => 'Z') ;
 "
@@ -2580 +2606 @@
 font "Courier New,8,0"
 )
-xt "2000,36000,23000,36800"
+xt "2000,37600,23000,38400"
 st "config_started    : IN     std_logic  ;
 "
@@ -2588 +2614 @@
 n "config_started"
 t "std_logic"
+posAdd 0
 o 24
 suid 27,0
@@ -2625 +2652 @@
 font "Courier New,8,0"
 )
-xt "2000,38400,37000,39200"
+xt "2000,40800,37000,41600"
 st "config_wr_en      : OUT    std_logic                      := '0' ;
 "
@@ -2672 +2699 @@
 font "Courier New,8,0"
 )
-xt "2000,34400,37000,36000"
-st "--
+xt "2000,34400,43000,37600"
+st "-- FAD configuration signals:
+------------------------------------------------------------------------------
+-- start entire configuration chain
 new_config        : OUT    std_logic                      := '0' ;
 "
@@ -2682 +2711 @@
 n "new_config"
 t "std_logic"
-prec "--"
+prec "-- FAD configuration signals:
+------------------------------------------------------------------------------
+-- start entire configuration chain"
 preAdd 0
 o 23
@@ -2722 +2753 @@
 font "Courier New,8,0"
 )
-xt "2000,39200,37000,40000"
+xt "2000,41600,37000,42400"
 st "config_rd_en      : OUT    std_logic                      := '0' ;
 "
@@ -2770 +2801 @@
 font "Courier New,8,0"
 )
-xt "2000,47200,50500,48000"
+xt "2000,54400,50500,55200"
 st "denable           : OUT    std_logic                      := '0' ; -- default domino wave off
 "
@@ -2781 +2812 @@
 eolc "-- default domino wave off"
 posAdd 0
-o 35
+o 36
 suid 31,0
 i "'0'"
@@ -2819 +2850 @@
 font "Courier New,8,0"
 )
-xt "2000,48000,48500,48800"
+xt "2000,55200,48500,56000"
 st "dwrite_enable     : OUT    std_logic                      := '0' ; -- default DWRITE low.
 "
@@ -2831 +2862 @@
 preAdd 0
 posAdd 0
-o 36
+o 37
 suid 32,0
 i "'0'"
@@ -2916 +2947 @@
 font "Courier New,8,0"
 )
-xt "2000,48800,49000,49600"
+xt "2000,56000,49000,56800"
 st "sclk_enable       : OUT    std_logic                      := '1' ; -- default DWRITE HIGH.
 "
@@ -2927 +2958 @@
 eolc "-- default DWRITE HIGH."
 posAdd 0
-o 37
+o 38
 suid 35,0
 i "'1'"
@@ -2965 +2996 @@
 font "Courier New,8,0"
 )
-xt "2000,49600,52500,50400"
-st "ps_direction      : OUT    std_logic                      := '1' ; -- default phase shift upwards
+xt "2000,57600,52500,62400"
+st "------------------------------------------------------------------------------
+
+-- ADC CLK generator, is able to shift phase with respect to X_50M
+-- these signals control the behavior of the digital clock manager (DCM)
+------------------------------------------------------------------------------
+ps_direction      : OUT    std_logic                      := '1' ; -- default phase shift upwards
 "
 )
@@ -2974 +3010 @@
 n "ps_direction"
 t "std_logic"
+prec "------------------------------------------------------------------------------
+
+-- ADC CLK generator, is able to shift phase with respect to X_50M
+-- these signals control the behavior of the digital clock manager (DCM)
+------------------------------------------------------------------------------"
 eolc "-- default phase shift upwards"
-posAdd 0
-o 38
+preAdd 0
+posAdd 0
+o 40
 suid 36,0
 i "'1'"
@@ -3014 +3056 @@
 font "Courier New,8,0"
 )
-xt "2000,50400,53500,51200"
+xt "2000,62400,53500,63200"
 st "ps_do_phase_shift : OUT    std_logic                      := '0' ; --pulse this to phase shift once
 "
@@ -3026 +3068 @@
 preAdd 0
 posAdd 0
-o 39
+o 41
 suid 37,0
 i "'0'"
@@ -3064 +3106 @@
 font "Courier New,8,0"
 )
-xt "2000,51200,61000,52000"
+xt "2000,63200,61000,64000"
 st "ps_reset          : OUT    std_logic                      := '0' ; -- pulse this to reset the variable phase shift
 "
@@ -3075 +3117 @@
 eolc "-- pulse this to reset the variable phase shift"
 posAdd 0
-o 40
+o 42
 suid 38,0
 i "'0'"
@@ -3113 +3155 @@
 font "Courier New,8,0"
 )
-xt "2000,52000,47500,52800"
+xt "2000,56800,47500,57600"
 st "srclk_enable      : OUT    std_logic                      := '1' ; -- default SRCLK on.
 "
@@ -3124 +3166 @@
 eolc "-- default SRCLK on."
 posAdd 0
-o 41
+o 39
 suid 39,0
 i "'1'"
@@ -3161 +3203 @@
 font "Courier New,8,0"
 )
-xt "2000,40000,23000,41600"
-st "-- --
-config_rw_ack     : IN     std_logic  ;
+xt "2000,42400,23000,43200"
+st "config_rw_ack     : IN     std_logic  ;
 "
 )
@@ -3170 +3211 @@
 n "config_rw_ack"
 t "std_logic"
-prec "-- --"
 preAdd 0
 posAdd 0
@@ -3209 +3249 @@
 font "Courier New,8,0"
 )
-xt "2000,41600,23000,43200"
-st "-- --
-config_rw_ready   : IN     std_logic  ;
+xt "2000,43200,23000,44000"
+st "config_rw_ready   : IN     std_logic  ;
 "
 )
@@ -3218 +3257 @@
 n "config_rw_ready"
 t "std_logic"
-prec "-- --"
 preAdd 0
 posAdd 0
@@ -3258 +3296 @@
 font "Courier New,8,0"
 )
-xt "2000,54400,22000,55200"
+xt "2000,68800,43000,70400"
 st "socks_connected   : OUT    std_logic 
+------------------------------------------------------------------------------
 "
 )
@@ -3267 +3306 @@
 n "socks_connected"
 t "std_logic"
+posc "------------------------------------------------------------------------------"
+posAdd 0
 o 44
 suid 42,0
@@ -3304 +3345 @@
 font "Courier New,8,0"
 )
-xt "2000,53600,23000,54400"
-st "socks_waiting     : OUT    std_logic  ;
+xt "2000,64000,43000,68800"
+st "------------------------------------------------------------------------------
+
+-- signals used to control FAD LED bahavior:
+-- one of the three LEDs is used for com-status info
+------------------------------------------------------------------------------
+socks_waiting     : OUT    std_logic  ;
 "
 )
@@ -3313 +3359 @@
 n "socks_waiting"
 t "std_logic"
+prec "------------------------------------------------------------------------------
+
+-- signals used to control FAD LED bahavior:
+-- one of the three LEDs is used for com-status info
+------------------------------------------------------------------------------"
 preAdd 0
 o 43
@@ -3351 +3402 @@
 font "Courier New,8,0"
 )
-xt "2000,52800,55500,53600"
-st "trigger_enable    : OUT    std_logic                      := '0' ; -- default triggers are NOT accepted
+xt "2000,50400,55500,54400"
+st "------------------------------------------------------------------------------
+
+-- user controllable enable signals
+------------------------------------------------------------------------------
+trigger_enable    : OUT    std_logic                      := '0' ; -- default triggers are NOT accepted
 "
 )
@@ -3360 +3415 @@
 n "trigger_enable"
 t "std_logic"
+prec "------------------------------------------------------------------------------
+
+-- user controllable enable signals
+------------------------------------------------------------------------------"
 eolc "-- default triggers are NOT accepted"
-posAdd 0
-o 42
+preAdd 0
+posAdd 0
+o 35
 suid 44,0
 i "'0'"
@@ -3496 +3556 @@
 font "Courier New,8,0"
 )
-xt "2000,44800,33000,45600"
-st "MAC_jumper        : IN     std_logic_vector (1 downto 0) ;
+xt "2000,44800,43000,48800"
+st "------------------------------------------------------------------------------
+
+-- MAC/IP calculation signals:
+------------------------------------------------------------------------------
+MAC_jumper        : IN     std_logic_vector (1 downto 0) ;
 "
 )
@@ -3505 +3569 @@
 t "std_logic_vector"
 b "(1 downto 0)"
+prec "------------------------------------------------------------------------------
+
+-- MAC/IP calculation signals:
+------------------------------------------------------------------------------"
+preAdd 0
 o 32
 suid 48,0
@@ -3541 +3610 @@
 font "Courier New,8,0"
 )
-xt "2000,45600,33000,46400"
+xt "2000,48800,33000,49600"
 st "BoardID           : IN     std_logic_vector (3 downto 0) ;
 "
@@ -3586 +3655 @@
 font "Courier New,8,0"
 )
-xt "2000,46400,33000,47200"
+xt "2000,49600,33000,50400"
 st "CrateID           : IN     std_logic_vector (1 downto 0) ;
 "
@@ -3595 +3664 @@
 t "std_logic_vector"
 b "(1 downto 0)"
+posAdd 0
 o 34
 suid 50,0
@@ -4276 +4346 @@
 font "Arial,8,1"
 )
-xt "0,55200,2400,56200"
+xt "0,70400,2400,71400"
 st "User:"
-blo "0,56000"
+blo "0,71200"
 )
 internalLabel (Text
@@ -4295 +4365 @@
 font "Courier New,8,0"
 )
-xt "2000,56200,2000,56200"
+xt "2000,71400,2000,71400"
 tm "SyDeclarativeTextMgr"
 )
@@ -4308 +4378 @@
 )
 )
-lastUid 1330,0
+lastUid 1355,0
 activeModelName "Symbol:CDM"
 )