Changeset 10697 for firmware/FSC
- Timestamp:
- 05/13/11 11:48:49 (14 years ago)
- Location:
- firmware/FSC
- Files:
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- 1 added
- 17 edited
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doc (modified) (1 prop)
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doc/FSC_registers.ods (added)
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src/FSC_eth_with_user_interface.c (modified) (9 diffs)
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src/ad7719_adc.c (modified) (4 diffs)
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src/ad7719_adc.h (modified) (2 diffs)
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src/application.c (modified) (1 diff)
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src/application.h (modified) (3 diffs)
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src/macros.h (modified) (1 diff)
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src/output.c (modified) (3 diffs)
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src/output.h (modified) (1 diff)
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src/parser.c (modified) (2 diffs)
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src/parser.h (modified) (1 diff)
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src/spi_master.c (modified) (3 diffs)
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src/spi_master.h (modified) (1 diff)
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src/w5100_spi_interface.c (modified) (6 diffs)
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src/w5100_spi_interface.h (modified) (2 diffs)
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test_projects/test_ethernet/test_ethernet.aps (modified) (1 diff)
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test_projects/test_ethernet/test_ethernet.aws (modified) (1 diff)
Legend:
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- Added
- Removed
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firmware/FSC/doc
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Property svn:ignore
set to
*.ods#
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Property svn:ignore
set to
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firmware/FSC/src/FSC_eth_with_user_interface.c
r10677 r10697 21 21 bool heartbeat_enable; 22 22 23 // AD7719 global variables 24 U32 ad7719_values[RESISTANCE_CHANNELS]; 25 U08 ad7719_enables[RESISTANCE_CHANNELS/8]; 26 U08 ad7719_channels_ready[RESISTANCE_CHANNELS/8]; 27 U08 ad7719_readings_since_last_muxing = 0; 28 U08 ad7719_current_channel = 0; 29 U32 ad7719_current_reading = 0; 23 30 24 bool ad7719_measured_all = false; 31 25 bool ad7719_values_printed = true; … … 33 27 34 28 // ATMEGA ADC global variables 35 U08 adc_readings_until_mean=250; 36 U32 adc_values[VOLTAGE_CHANNELS]; // stores measured voltage in steps of 16mV 37 U08 adc_enables[VOLTAGE_CHANNELS/8]; 38 U08 adc_channels_ready[VOLTAGE_CHANNELS/8]; 39 U08 adc_readings_since_last_muxing = 0; 40 U08 adc_current_channel = 0; 41 U16 adc_current_reading = 0; 29 42 30 bool adc_measured_all = false; 43 31 bool adc_values_printed = true; … … 53 41 // M A I N --- M A I N --- M A I N --- M A I N --- M A I N 54 42 //----------------------------------------------------------------------------- 55 /*56 int main(void)57 {58 59 60 U16 received_bytes;61 U08 really_downloaded_bytes;62 while(!usart_rx_ready){63 received_bytes = get_S0_RX_RSR();64 65 66 67 68 if (get_S0_RX_RSR() != 0) { // we have something to read69 usart_write_str((pU08)"\nReading ");70 usart_write_U16(get_S0_RX_RSR(), 6);71 usart_write_str((pU08)" b from W5100\n");72 73 while (received_bytes != 0) {74 really_downloaded_bytes = w5100_get_RX(16, true);75 usart_write_char('!');76 usart_write_U08(really_downloaded_bytes,4);77 usart_write_char('\n');78 for (U08 i=0; i<really_downloaded_bytes; i++){79 usart_write_U08_hex(eth_read_buffer[i]);80 usart_write_char(' ');81 }82 received_bytes -= really_downloaded_bytes;83 }84 }85 usart_write_char('\n');86 87 _delay_ms(400);88 _delay_ms(400);89 _delay_ms(400);90 _delay_ms(400);91 }92 usart_rx_ready = false;93 94 bool quit = false;95 while (!quit) {96 usart_write_str((pU08)"Enter the string to send to PC or \"XXX\" in order to quit\n");97 while(!usart_rx_ready){98 _delay_ms(100);99 }100 usart_rx_ready = false;101 102 if ( (usart_rx_buffer[0]=='X') && (usart_rx_buffer[1]=='X') && (usart_rx_buffer[2]=='X') )103 quit = true;104 else {105 // copy string to W5100 TX buffer and issue 'SEND' command.106 for (U08 i =0; i<usart_received_chars; i++){107 eth_write_buffer[i]=usart_rx_buffer[i];108 }109 110 w5100_set_TX(usart_received_chars);111 112 }113 114 115 }116 117 } // end of main()118 */119 43 int main(void) 120 44 { … … 123 47 spi_init(); // Initialize SPI interface as master 124 48 timer_init(); // set up TIMER2: TIMER2_COMP interrupt occurs every 1ms 125 49 atmega_adc_init(); 50 126 51 w5100_reset(); 127 52 w5100_init(); 128 53 54 ad7719_init(); 55 129 56 // Enable interrupts 130 57 sei(); … … 167 94 if (get_S0_RX_RSR() != 0) { // we have something to read 168 95 downloaded_bytes = w5100_get_RX(ETH_READ_BUFFER_SIZE, true); 169 usart_write_str((pU08)"got ethernet stream - no. of. bytes:"); 170 usart_write_U08(downloaded_bytes,3); 171 usart_write_char('\n'); 172 for (U08 i=0; i<downloaded_bytes; i++){ 173 usart_write_U08_hex(eth_read_buffer[i]); 174 usart_write_char(' '); 175 } 176 usart_write_char('\n'); 177 } 178 } 179 180 //---------------------------------------------------------------------------- 96 parse_w5300_incoming( downloaded_bytes ); 97 } 98 } 99 100 //---------------------------------------------------------------------------- 101 181 102 if (check_if_adc_measurement_done()) { 103 telegram_start(); 104 w5100_set_TX(adc_values, ADC_VALUES_LEN_BYTE); 105 182 106 if(adc_print_endless){ 183 107 usart_write_str((pU08)"V|"); 184 108 usart_write_U32(sec ,8); 185 109 print_adc_nicely(false,true); 186 for ( U08 i=0; i<(VOLTAGE_CHANNELS/8); ++i ) { 187 adc_channels_ready[i]=0; 188 } 110 reset_voltage_done(); 189 111 } else 190 112 if ( !adc_values_printed) { … … 195 117 196 118 if (check_if_ad7719_measurement_done()) { 119 telegram_start(); 120 w5100_set_TX(ad7719_values, AD7719_VALUES_LEN_BYTE); 121 197 122 if(ad7719_print_endless){ 198 123 usart_write_str((pU08)"R|"); 199 124 usart_write_U32(sec ,8); 200 125 print_ad7719_nicely(false,true); 201 for ( U08 i=0; i<(RESISTANCE_CHANNELS/8); ++i ) { 202 ad7719_channels_ready[i]=0; 203 } 126 reset_resistance_done(); 204 127 } else 205 128 if ( !ad7719_values_printed) { … … 261 184 //IF ATmega internal ADC did finish a conversion --every 200us 262 185 if ( (ADCSRA & (1<<ADIF)) && !adc_measured_all) { 263 adc_current_reading = (U16)ADCL;264 adc_current_reading += (U16)ADCH<<8;265 if ( adc_readings_since_last_muxing == ADC_READINGS_UNTIL_SETTLED+adc_readings_until_mean-1) {266 adc_channels_ready[ adc_current_channel/8] |= (1<<(adc_current_channel%8));267 adc_current_channel = increase_adc (adc_current_channel);268 adc_values[ adc_current_channel] = 0;269 Set_V_Muxer( adc_current_channel);270 adc_readings_since_last_muxing = 0;186 *adc_current_reading = (U16)ADCL; 187 *adc_current_reading += (U16)ADCH<<8; 188 if (*adc_readings_since_last_muxing == ADC_READINGS_UNTIL_SETTLED+adc_readings_until_mean-1) { 189 adc_channels_ready[*adc_current_channel/8] |= (1<<(*adc_current_channel%8)); 190 *adc_current_channel = increase_adc (*adc_current_channel); 191 adc_values[*adc_current_channel] = 0; 192 Set_V_Muxer(*adc_current_channel); 193 *adc_readings_since_last_muxing = 0; 271 194 _delay_ms(10); 272 195 } 273 196 else if (adc_readings_since_last_muxing >= ADC_READINGS_UNTIL_SETTLED-1) { 274 adc_values[ adc_current_channel] +=adc_current_reading;275 ++ adc_readings_since_last_muxing;197 adc_values[*adc_current_channel] += *adc_current_reading; 198 ++(*adc_readings_since_last_muxing); 276 199 } 277 200 else { 278 ++ adc_readings_since_last_muxing;201 ++(*adc_readings_since_last_muxing); 279 202 } 280 203 … … 285 208 286 209 if (AD7719_IS_READY() && !ad7719_measured_all) { 287 ad7719_current_reading = read_adc(); // --takes at 4MHz SCLK speed about 6us210 *ad7719_current_reading = read_adc(); // --takes at 4MHz SCLK speed about 6us 288 211 // AD7719 is only read out if settled. saves time. 289 if ( ad7719_readings_since_last_muxing == AD7719_READINGS_UNTIL_SETTLED-1) {290 ad7719_values[ ad7719_current_channel] =ad7719_current_reading;291 ad7719_readings_since_last_muxing=0;212 if (*ad7719_readings_since_last_muxing == AD7719_READINGS_UNTIL_SETTLED-1) { 213 ad7719_values[*ad7719_current_channel] = *ad7719_current_reading; 214 *ad7719_readings_since_last_muxing=0; 292 215 if (debug_mode) { 293 usart_write_U32_hex( ad7719_current_reading);216 usart_write_U32_hex(*ad7719_current_reading); 294 217 usart_write_char('\n'); 295 218 usart_write_char('\n'); … … 299 222 // note that this channel is ready, now and 300 223 // proceed to the next enabled channel. 301 ad7719_channels_ready[ ad7719_current_channel/8] |= (1<<(ad7719_current_channel%8));302 ad7719_current_channel = increase_ad7719 (ad7719_current_channel);303 Set_T_Muxer( ad7719_current_channel);224 ad7719_channels_ready[*ad7719_current_channel/8] |= (1<<(*ad7719_current_channel%8)); 225 *ad7719_current_channel = increase_ad7719 (*ad7719_current_channel); 226 Set_T_Muxer(*ad7719_current_channel); 304 227 } else { // the AD7719 did not settle yet, we discard the reading 305 ++ ad7719_readings_since_last_muxing;228 ++(*ad7719_readings_since_last_muxing); 306 229 if (debug_mode) { 307 usart_write_U32_hex( ad7719_current_reading);230 usart_write_U32_hex(*ad7719_current_reading); 308 231 usart_write_char('\n'); 309 232 } -
firmware/FSC/src/ad7719_adc.c
r10109 r10697 8 8 void ad7719_init(void) 9 9 { 10 // setup the SPI interface according to AD7710 specs. 11 // This is needed, because W5100 has different SPI specs. 12 spi_setup_ad7719(); 13 10 14 11 15 // ADC communiaction works like this: … … 26 30 27 31 28 CLR_BIT(PORTD,SPI_AD_CS); // Set CS low 29 spi_transfer_byte(FILTER_RD); // Next Operation is write to IOCON 30 SET_BIT(PORTD,SPI_AD_CS); 31 32 _delay_us(50); 33 34 CLR_BIT(PORTD,SPI_AD_CS); // Set CS low 35 spi_transfer_byte(0); // Next Operation is write to IOCON 36 SET_BIT(PORTD,SPI_AD_CS); 37 38 _delay_us(50); 39 40 CLR_BIT(PORTD,SPI_AD_CS); // Set CS low 41 spi_transfer_byte(IOCON_WR); // Next Operation is write to IOCON 42 SET_BIT(PORTD,SPI_AD_CS); 43 44 _delay_us(50); 32 CLR_BIT(PORTD,SPI_AD_CS); 33 spi_transfer_byte(FILTER_RD); // Next operation is a read from filter register 34 SET_BIT(PORTD,SPI_AD_CS); 35 #ifdef AD7719_COM_DELAY_NEEDED 36 _delay_us(50); 37 #endif 38 39 CLR_BIT(PORTD,SPI_AD_CS); 40 spi_transfer_byte(0); // now this read takes place 41 SET_BIT(PORTD,SPI_AD_CS); 42 #ifdef AD7719_COM_DELAY_NEEDED 43 _delay_us(50); 44 #endif 45 46 CLR_BIT(PORTD,SPI_AD_CS); 47 spi_transfer_byte(IOCON_WR); // Next Operation is write to IOCON -- this is a 2byte register 48 SET_BIT(PORTD,SPI_AD_CS); 49 50 #ifdef AD7719_COM_DELAY_NEEDED 51 _delay_us(50); 52 #endif 45 53 46 54 CLR_BIT(PORTD,SPI_AD_CS); 47 55 spi_transfer_byte(IOCON_INIT_HIGH); // Write to IOCON1 48 56 SET_BIT(PORTD,SPI_AD_CS); 49 _delay_us(50); 57 #ifdef AD7719_COM_DELAY_NEEDED 58 _delay_us(50); 59 #endif 50 60 CLR_BIT(PORTD,SPI_AD_CS); 51 61 spi_transfer_byte(IOCON_INIT_LOWBYTE); // Write to IOCON2 52 SET_BIT(PORTD,SPI_AD_CS); // Set CS high 53 54 _delay_us(50); 55 56 CLR_BIT(PORTD,SPI_AD_CS); // Set CS low 57 spi_transfer_byte(FILTER_WR); // Next Operation is write to FILTER Start SPI 58 SET_BIT(PORTD,SPI_AD_CS); 59 60 _delay_us(50); 61 CLR_BIT(PORTD,SPI_AD_CS); 62 63 spi_transfer_byte(FILTER_INIT); // Write to FILTER 64 SET_BIT(PORTD,SPI_AD_CS); // Set CS high 65 _delay_us(50); 66 CLR_BIT(PORTD,SPI_AD_CS); // Set CS low 67 spi_transfer_byte(AD1CON_WR); // Next Operation is write to AD1CON Start SPI 68 SET_BIT(PORTD,SPI_AD_CS); 69 70 _delay_us(50); 71 72 CLR_BIT(PORTD,SPI_AD_CS); 73 spi_transfer_byte(AD1CON_INIT); // Write to AD1CON 74 SET_BIT(PORTD,SPI_AD_CS); // Set CS high 75 76 _delay_us(50); 77 78 CLR_BIT(PORTD,SPI_AD_CS); // Set CS low 62 SET_BIT(PORTD,SPI_AD_CS); 63 64 #ifdef AD7719_COM_DELAY_NEEDED 65 _delay_us(50); 66 #endif 67 68 CLR_BIT(PORTD,SPI_AD_CS); 69 spi_transfer_byte(FILTER_WR); // Next Operation is write to FILTER 70 SET_BIT(PORTD,SPI_AD_CS); 71 72 #ifdef AD7719_COM_DELAY_NEEDED 73 _delay_us(50); 74 #endif 75 CLR_BIT(PORTD,SPI_AD_CS); 76 spi_transfer_byte(FILTER_INIT); // Set Filter register to 0x52 --> good for 50Hz noise rejection. 77 SET_BIT(PORTD,SPI_AD_CS); 78 #ifdef AD7719_COM_DELAY_NEEDED 79 _delay_us(50); 80 #endif 81 CLR_BIT(PORTD,SPI_AD_CS); 82 spi_transfer_byte(AD1CON_WR); // Next Operation is write to AD1CON 83 SET_BIT(PORTD,SPI_AD_CS); 84 85 #ifdef AD7719_COM_DELAY_NEEDED 86 _delay_us(50); 87 #endif 88 89 CLR_BIT(PORTD,SPI_AD_CS); 90 spi_transfer_byte(AD1CON_INIT); // auxilliary ADC is not used in this application --> AD7719 data sheet for more info about aux. ADC 91 SET_BIT(PORTD,SPI_AD_CS); 92 93 #ifdef AD7719_COM_DELAY_NEEDED 94 _delay_us(50); 95 #endif 96 97 CLR_BIT(PORTD,SPI_AD_CS); 79 98 spi_transfer_byte(AD0CON_WR); // Next Operation is write to AD0CON Start SPI 80 99 SET_BIT(PORTD,SPI_AD_CS); 81 100 82 _delay_us(50); 101 #ifdef AD7719_COM_DELAY_NEEDED 102 _delay_us(50); 103 #endif 83 104 84 105 CLR_BIT(PORTD,SPI_AD_CS); 85 106 spi_transfer_byte(AD0CON_INIT); // Write to AD0CON 86 SET_BIT(PORTD,SPI_AD_CS); // Set CS high 87 88 _delay_us(50); 89 90 CLR_BIT(PORTD,SPI_AD_CS); // Set CS low 91 spi_transfer_byte(MODE_WR); // Next Operation is write to MODE Start SPI 92 SET_BIT(PORTD,SPI_AD_CS); 93 94 _delay_us(50); 95 96 CLR_BIT(PORTD,SPI_AD_CS); 97 spi_transfer_byte(MODE_CONT); // Write to MODE 98 SET_BIT(PORTD,SPI_AD_CS); // Set CS high 99 100 _delay_us(50); 101 102 CLR_BIT(PORTD,SPI_AD_CS); // Set CS low 103 spi_transfer_byte(FILTER_RD); // Next Operation is write to IOCON 104 SET_BIT(PORTD,SPI_AD_CS); 105 106 _delay_us(50); 107 108 CLR_BIT(PORTD,SPI_AD_CS); // Set CS low 109 spi_transfer_byte(0); // Next Operation is write to IOCON 110 SET_BIT(PORTD,SPI_AD_CS); 111 112 _delay_us(50); 113 114 107 SET_BIT(PORTD,SPI_AD_CS); 108 109 #ifdef AD7719_COM_DELAY_NEEDED 110 _delay_us(50); 111 #endif 112 113 CLR_BIT(PORTD,SPI_AD_CS); 114 spi_transfer_byte(MODE_WR); // Next Operation is write to MODE 115 SET_BIT(PORTD,SPI_AD_CS); 116 117 #ifdef AD7719_COM_DELAY_NEEDED 118 _delay_us(50); 119 #endif 120 121 CLR_BIT(PORTD,SPI_AD_CS); 122 spi_transfer_byte(MODE_CONT); // Set mode to: continuous sampling. 123 SET_BIT(PORTD,SPI_AD_CS); 124 125 #ifdef AD7719_COM_DELAY_NEEDED 126 _delay_us(50); 127 #endif 128 129 // these 130 CLR_BIT(PORTD,SPI_AD_CS); 131 spi_transfer_byte(FILTER_RD); // Next Operation is read from Filter register... 132 SET_BIT(PORTD,SPI_AD_CS); 133 134 #ifdef AD7719_COM_DELAY_NEEDED 135 _delay_us(50); 136 #endif 137 138 CLR_BIT(PORTD,SPI_AD_CS); // the reading takes place here 139 spi_transfer_byte(0); 140 SET_BIT(PORTD,SPI_AD_CS); 141 142 #ifdef AD7719_COM_DELAY_NEEDED 143 _delay_us(50); 144 #endif 115 145 } 116 146 117 147 void startconv(U08 continuous) 118 148 { 149 // setup the SPI interface according to AD7710 specs. 150 // This is needed, because W5100 has different SPI specs. 151 spi_setup_ad7719(); 152 119 153 CLR_BIT(PORTD,SPI_AD_CS); // Set CS low 120 154 spi_transfer_byte(MODE_WR); // Next Operation is write to Mode Register … … 128 162 void stopconv(void) 129 163 { 164 // setup the SPI interface according to AD7710 specs. 165 // This is needed, because W5100 has different SPI specs. 166 spi_setup_ad7719(); 167 130 168 CLR_BIT(PORTD,SPI_AD_CS); // Set CS low 131 169 spi_transfer_byte(MODE_WR); // Next Operation is write to Mode Register … … 138 176 139 177 U32 read_adc(void) 140 { 178 { 179 // setup the SPI interface according to AD7710 specs. 180 // This is needed, because W5100 has different SPI specs. 181 spi_setup_ad7719(); 182 141 183 CLR_BIT(PORTD,SPI_AD_CS); // Set CS low 142 184 spi_transfer_byte(AD0DAT_RD); // Next Operation is read from Main ADC Data Register 143 185 SET_BIT(PORTD,SPI_AD_CS); 186 187 #ifdef AD7719_COM_DELAY_NEEDED 144 188 _delay_us(50); 189 #endif 145 190 146 191 CLR_BIT(PORTD,SPI_AD_CS); -
firmware/FSC/src/ad7719_adc.h
r10109 r10697 7 7 #include "num_conversion.h" 8 8 //----------------------------------------------------------------------------- 9 // SPI INTERFACE of AD7719 10 // SCLK: 11 // SCLK HIGH & LOW cycle min 100ns --> 5MHz maximum SCLK frequency 12 // FSC runs at 8MHz CPU clock ... so 4MHz SPI clock is the theoretocal maximum anyway. 13 // SCLK should idle high --> mode 3 14 // 15 // CS falling edge & SCLK falling edge, may be at the same time ... 16 // 17 18 // There is a delay in all communications between AD7719 and ATmega. 19 // I guess this is not needed at all. 20 // This switch is able to get them in again 21 #define AD7719_COM_DELAY_NEEDED 22 9 23 // Bit Definitions 10 24 #define ADC_RDY PD6 … … 71 85 72 86 #define AD0CON_INIT 0x8E // 1000.1110 73 // AD0EN is set 87 // AD0EN is set --> main ADC is swtiched on 74 88 // WL is cleared --> 24bit 75 89 // CH = 00 --> AIN1 , AIN2 used -
firmware/FSC/src/application.c
r10677 r10697 5 5 #include <avr/wdt.h> 6 6 7 // in order to implement the "registers" I work with a quite long 8 // char-array like this: 9 10 U08 FSCregister[FSC_REGISTER_LENGTH]; 11 // but this register is not only accessible by 12 // FSCregister[i], but as well by special pointers like this: 13 U32 *status = (U32*)&FSCregister[0]; 14 U32 *time_sec = (U32*)&(FSCregister[4]); 15 U16 *time_ms = (U16*)&(FSCregister[6]); 16 U16 *FR_period = (U16*)&(FSCregister[8]); 17 U16 *ref_resistor = (U16*)&(FSCregister[10]); 18 19 20 U32 *ad7719_values = (U32*)&FSCregister[68]; 21 U08 *ad7719_enables = &FSCregister[32]; 22 U08 *ad7719_channels_ready = &FSCregister[50]; 23 U08 *ad7719_readings_since_last_muxing = &FSCregister[14]; 24 U08 *ad7719_current_channel = &FSCregister[15]; 25 U32 *ad7719_current_reading = (U32*)&FSCregister[16]; 26 27 U16 *adc_values = (U16*) &FSCregister[324]; 28 U08 *adc_enables = &FSCregister[40]; 29 U08 *adc_channels_ready = &FSCregister[58]; 30 U08 *adc_readings_since_last_muxing = &FSCregister[20]; 31 U08 *adc_current_channel = &FSCregister[21]; 32 U16 *adc_current_reading = (U16*) &FSCregister[22]; 33 34 35 36 // using these pointers one can manipulate measurement values like this: 37 // res_value[3] = 453212; 38 // and then readout the most significant byte of this same value by accessing: 39 // FSCregister[92]; 40 // I like this very much for asking the boards status ... this is just a copy of the registers, 41 // into the W5100 TX FIFO. 42 // submitting the measurement values is just a partial copy... 43 44 //----------------------------------------------------------------------------- 7 45 8 46 //----------------------------------------------------------------------------- -
firmware/FSC/src/application.h
r10677 r10697 5 5 #include "typedefs.h" 6 6 //----------------------------------------------------------------------------- 7 // in order to implement the "registers" I work with a quite long 8 // char-array like this: 9 # define FSC_REGISTER_LENGTH 500 10 extern U08 FSCregister[FSC_REGISTER_LENGTH]; 11 // but this register is not only accessible by 12 // FSCregister[i], but as well by special pointers like this: 13 extern U32 *status ; 14 extern U32 *time_sec ; 15 extern U16 *time_ms ; 16 extern U16 *FR_period ; 17 extern U16 *ref_resistor ; 7 18 19 extern U32 *ad7719_values ; 20 #define AD7719_VALUES_LEN_BYTE 512 21 extern U08 *ad7719_enables ; 22 extern U08 *ad7719_channels_ready ; 23 extern U08 *ad7719_readings_since_last_muxing ; 24 extern U08 *ad7719_current_channel ; 25 extern U32 *ad7719_current_reading ; 26 27 extern U16 *adc_values ; 28 #define ADC_VALUES_LEN_BYTE 152 29 extern U08 *adc_enables ; 30 extern U08 *adc_channels_ready ; 31 extern U08 *adc_readings_since_last_muxing ; 32 extern U08 *adc_current_channel ; 33 extern U16 *adc_current_reading ; 34 // using these pointers one can manipulate measurement values like this: 35 // res_value[3] = 453212; 36 // and then readout the most significant byte of this same value by accessing: 37 // FSCregister[92]; 38 // I like this very much for asking the boards status ... this is just a copy of the registers, 39 // into the W5100 TX FIFO. 40 // submitting the measurement values is just a partial copy... 8 41 9 42 //----------------------------------------------------------------------------- … … 52 85 53 86 // AD7719 global variables 54 extern U32 ad7719_values[];55 extern U08 ad7719_enables[];56 extern U08 ad7719_channels_ready[];57 extern U08 ad7719_readings_since_last_muxing;58 extern U08 ad7719_current_channel;59 extern U32 ad7719_current_reading;60 87 extern bool ad7719_measured_all; 61 88 extern bool ad7719_values_printed; … … 63 90 64 91 // ATMEGA ADC global variables 65 extern U32 adc_values[]; // stores measured voltage in steps of 16mV 66 extern U08 adc_enables[]; 67 extern U08 adc_channels_ready[]; 68 extern U08 adc_readings_since_last_muxing; 69 extern U08 adc_current_channel; 70 extern U16 adc_current_reading; 92 #define adc_readings_until_mean 250 71 93 extern bool adc_measured_all; 72 94 extern bool adc_values_printed; -
firmware/FSC/src/macros.h
r10094 r10697 13 13 #define HI(x) ((x) >> 8) // Highbyte of 16-bit value 14 14 15 15 16 #define ABS(x) ((x >= 0) ? x : -x) // Absolute value of x 16 17 -
firmware/FSC/src/output.c
r10677 r10697 3 3 #include "application.h" 4 4 #include "timer.h" 5 #include "w5100_spi_interface.h" 5 6 6 7 void print_status() { … … 46 47 47 48 usart_write_str((pU08)"adc current channel:"); 48 usart_write_U08( adc_current_channel,2);49 usart_write_U08(*adc_current_channel,2); 49 50 usart_write_char('\n'); 50 51 51 52 usart_write_str((pU08)"ad7719 current channel:"); 52 usart_write_U08( ad7719_current_channel,2);53 usart_write_U08(*ad7719_current_channel,2); 53 54 usart_write_char('\n'); 54 55 … … 174 175 print_ad7719_nicely(); 175 176 } 177 178 179 void telegram_start(){ 180 eth_write_buffer[0]='@'; 181 eth_write_buffer[1]='@'; 182 w5100_set_TX(eth_write_buffer, 2); 183 } -
firmware/FSC/src/output.h
r10667 r10697 11 11 void print_status() ; 12 12 13 14 void telegram_start(); 15 13 16 #endif -
firmware/FSC/src/parser.c
r10677 r10697 3 3 #include "application.h" 4 4 #include "usart.h" 5 #include "w5100_spi_interface.h" 5 6 // this method parses the data, 6 7 // which came in via USART … … 306 307 307 308 */ 309 310 /////////////////////////////////////////////////////////////////////////////////////// 311 // W5300 incoming commands parser 312 void parse_w5300_incoming( U08 bytes_in_w5100_rx_buffer ) { 313 314 if (bytes_in_w5100_rx_buffer == 0) // it was stupid to call this parser without having any bytes downloaded 315 return; 316 317 switch (eth_read_buffer[0]) { 318 case 'w': // *w*rite to register command 319 write_FSC_register(); 320 read_FSC_register(); 321 break; 322 323 case 'r': // *r*ead from register command 324 read_FSC_register(); 325 break; 326 327 case 't': // measure *t*emperature (resistance) channels only 328 reset_resistance_done(); 329 simple_acknowledge(); 330 break; 331 332 case 'v': // measure *v*oltage channels only 333 reset_voltage_done(); 334 simple_acknowledge(); 335 break; 336 337 case 'm': // *m*easure active channels commands 338 reset_done(); 339 simple_acknowledge(); 340 break; 341 342 case 's': // return *s*tatus information 343 // this might take a lot of time... about... 25us per byte .. --> less than 25ms 344 w5100_set_TX(FSCregister, FSC_REGISTER_LENGTH); 345 break; 346 347 case 'z': // re*z*et ATmega32 and peripherals 348 eth_write_buffer[0]='!'; 349 eth_write_buffer[1]='!'; 350 w5100_set_TX(eth_write_buffer, 2); 351 // let watchdog occur! 352 // gotta read, how this works... 353 break; 354 } 355 } 356 357 void write_FSC_register() { 358 FSCregister[eth_read_buffer[2]]=eth_read_buffer[3]; 359 } 360 361 void read_FSC_register() { 362 eth_write_buffer[0]=eth_read_buffer[0]; 363 eth_write_buffer[1]=eth_read_buffer[1]; 364 eth_write_buffer[2]=eth_read_buffer[2]; 365 eth_write_buffer[3]=FSCregister[eth_read_buffer[2]]; 366 w5100_set_TX(eth_write_buffer, 4); 367 } 368 369 void reset_resistance_done(){ 370 for (U08 i=0; i < (RESISTANCE_CHANNELS/8); i++){ 371 ad7719_channels_ready[i] = 0; 372 } 373 } 374 void reset_voltage_done(){ 375 for (U08 i=0; i < (VOLTAGE_CHANNELS/8); i++){ 376 adc_channels_ready[i] = 0; 377 } 378 } 379 void reset_done(){ 380 reset_resistance_done(); 381 reset_voltage_done(); 382 } 383 384 void simple_acknowledge(){ 385 eth_write_buffer[0]=eth_read_buffer[0]; 386 eth_write_buffer[1]=eth_read_buffer[1]; 387 w5100_set_TX(eth_write_buffer, 2); 388 } -
firmware/FSC/src/parser.h
r10674 r10697 2 2 #define __PARSER_H 3 3 4 #include "typedefs.h" 4 5 void parse_ascii(); 5 6 void MSR_parser() ; 6 7 7 8 // all allowed non readable commands are listed here 9 // this is not used at all right? 8 10 #define SET_ENABLES 0x01 // sets all enables -- needs 8 + 11 bytes of data 9 11 #define SW_TO_HUMAN 0xFF // SWITCH_TO_HUMAN_READABLE_INTERFACE 10 12 13 void parse_w5300_incoming( U08 bytes_in_w5100_rx_buffer ); 14 void write_FSC_register(); 15 void read_FSC_register(); 16 void reset_resistance_done(); 17 void reset_voltage_done(); 18 void reset_done(); 19 void simple_acknowledge(); 20 11 21 #endif -
firmware/FSC/src/spi_master.c
r10677 r10697 15 15 //----------------------------------------------------------------------------- 16 16 17 void spi_setup_w5100() { 18 spi_clock_index = 4; // 1Mbps 19 // this is reasonable for W5100 because of slow level shifters on the FSC. 20 // in case the slow level shifters, are improved. this value may go up to 6! 21 22 spi_dord = 0; // Data Order MSB first dord = 0 --> good for all devices 23 spi_cpol = 0; spi_cpha = 0; // SPI mode=0 good for ethernet. 24 spi_setup(); // Setup SPI bits and clock speed 25 } 26 27 void spi_setup_ad7719() { 28 spi_clock_index = 6; // since AD7719 is not connected via level shifters .. we can go up to 4Mbps 29 30 spi_dord = 0; // Data Order MSB first dord = 0 --> good for all devices 31 spi_cpol = 1; spi_cpha = 1; // SPI mode=3 good for AD7719. 32 spi_setup(); // Setup SPI bits and clock speed 33 } 34 35 17 36 18 37 … … 23 42 // 1.) Ethernet Modul WIZ812MJ 24 43 // 2.) AD7719 24bit ADC 25 // 3.) LIS3LV accelerometer 44 // 3.) LIS3LV accelerometer <---- not used yet. 26 45 // 4.) MAX6662 temp sensor <---- not assembled! 27 46 … … 241 260 242 261 // Wait for transfer completed 243 PORTB |= 1<<PB3;262 244 263 while (!(SPSR & (1 << SPIF))) 245 264 { 246 PORTB ^= 1<<PB3; 247 } 248 PORTB &= ~(1<<PB3); 265 } 266 249 267 250 268 // Return result of transfer -
firmware/FSC/src/spi_master.h
r10677 r10697 33 33 void spi_set_cpha(U08 cpha); 34 34 void spi_setup(void); 35 void spi_setup_ad7719(); 36 void spi_setup_w5100(); 35 37 void spi_transfer_string(U08 length, U08* addr, U08 device); 36 38 //----------------------------------------------------------------------------- -
firmware/FSC/src/w5100_spi_interface.c
r10677 r10697 59 59 void w5100_write( U16 addr, U08 data) 60 60 { 61 // setup the SPI interface according to W5100 specs. 62 // This is needed, because AD7719 has different SPI specs. 63 spi_setup_w5100(); 64 61 65 spi_write_buffer[0]=0xF0; 62 66 spi_write_buffer[1]=(U08)(addr>>8); … … 70 74 U08 w5100_read( U16 addr) 71 75 { 76 // setup the SPI interface according to W5100 specs. 77 // This is needed, because AD7719 has different SPI specs. 78 spi_setup_w5100(); 79 72 80 spi_write_buffer[0]=0x0F; 73 81 spi_write_buffer[1]=(U08)(addr>>8); … … 244 252 U16 offset = last_RX_read_pointer & S0_RX_MASK; 245 253 U16 start_address = S0_RX_BASE + offset; 246 247 usart_write_str("last_read_pointer:");248 usart_write_U16_hex(last_RX_read_pointer);249 usart_write_str("\noffset:");250 usart_write_U16_hex(offset);251 usart_write_str("\nstart_address:");252 usart_write_U16_hex(start_address);253 usart_write_char('\n');254 254 255 255 if ((offset + NumBytes) > (S0_RX_MASK + 1) ) // if data is turned over in RX-mem … … 299 299 300 300 // returns number of words, transmitted into TX - buffer. 301 U 08 w5100_set_TX(U08NumBytes) {301 U16 w5100_set_TX(U08* string, U16 NumBytes) { 302 302 U16 freesize = get_S0_TX_FSR(); 303 303 if (freesize == 0) … … 334 334 for (U08 i = 0; i < upper_size; ++i) 335 335 { 336 w5100_write(start_address + i, eth_write_buffer[i]);336 w5100_write(start_address + i, string[i]); 337 337 } 338 338 for (U08 i = 0; i < lower_size; ++i) 339 339 { 340 w5100_write(S0_RX_BASE + i, eth_write_buffer[upper_size+i]);340 w5100_write(S0_RX_BASE + i, string[upper_size+i]); 341 341 } 342 342 } … … 345 345 for (U08 i = 0; i < NumBytes; ++i) 346 346 { 347 w5100_write(start_address + i, eth_write_buffer[i]);347 w5100_write(start_address + i, string[i]); 348 348 } 349 349 } -
firmware/FSC/src/w5100_spi_interface.h
r10677 r10697 10 10 11 11 12 #define ETH_READ_BUFFER_SIZE 3213 #define ETH_WRITE_BUFFER_SIZE 3212 #define ETH_READ_BUFFER_SIZE 4 13 #define ETH_WRITE_BUFFER_SIZE 4 14 14 extern volatile U08 eth_read_buffer[ETH_READ_BUFFER_SIZE]; 15 15 extern volatile U08 eth_write_buffer[ETH_WRITE_BUFFER_SIZE]; … … 215 215 U08 w5100_get_RX(U08 NumBytes, BOOL send_ACK); 216 216 void w5100_TX(U08 NumBytes, U08 *str); 217 U 08 w5100_set_TX(U08NumBytes);217 U16 w5100_set_TX(U08* string, U16 NumBytes); 218 218 219 219 extern bool w5100_needs_reset; -
firmware/FSC/test_projects/test_ethernet/test_ethernet.aps
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-gdwarf-2 -std=gnu99 -DF_CPU=8000000UL -Os -funsigned-char -funsigned-bitfields -fpack-struct -fshort-enums</OPTIONSFORALL><LINKEROPTIONS></LINKEROPTIONS><SEGMENTS/></CONFIG></CONFIGS><LASTCONFIG>default</LASTCONFIG><USES_WINAVR>1</USES_WINAVR><GCC_LOC>C:\WinAVR-20100110\bin\avr-gcc.exe</GCC_LOC><MAKE_LOC>C:\WinAVR-20100110\utils\bin\make.exe</MAKE_LOC></AVRGCCPLUGIN><IOView><usergroups/><sort sorted="0" column="0" ordername="0" orderaddress="0" ordergroup="0"/></IOView><Files><File00000><FileId>00000</FileId><FileName>E:\FACT\fact.isdc.unige.ch_svn_firmware\FSC\src\FSC_test.c</FileName><Status>1</Status></File00000></Files><Events><Bookmarks></Bookmarks></Events><Trace><Filters></Filters></Trace></AVRStudio> -
firmware/FSC/test_projects/test_ethernet/test_ethernet.aws
r10668 r10697 1 <AVRWorkspace><IOSettings><CurrentRegisters/></IOSettings><part name="ATMEGA32"/><Files /></AVRWorkspace>1 <AVRWorkspace><IOSettings><CurrentRegisters/></IOSettings><part name="ATMEGA32"/><Files><File00000 Name="E:\FACT\fact.isdc.unige.ch_svn_firmware\FSC\src\FSC_test.c" Position="195 82 1327 572" LineCol="0 0" State="Maximized"/></Files></AVRWorkspace>
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