Changeset 10740 for firmware/FTM/ethernet
- Timestamp:
- 05/18/11 13:59:12 (14 years ago)
- File:
-
- 1 edited
-
firmware/FTM/ethernet/w5300_modul.vhd (modified) (18 diffs)
Legend:
- Unmodified
- Added
- Removed
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firmware/FTM/ethernet/w5300_modul.vhd
r10639 r10740 18 18 -- 19 19 ---------------------------------------------------------------------------------- 20 21 20 LIBRARY IEEE; 22 21 USE IEEE.STD_LOGIC_1164.all; … … 118 117 INIT, IM, MT, STX, STX1, STX2, STX3, SRX, SRX1, SRX2, SRX3, MAC, MAC1, MAC2, GW, GW1, SNM, SNM1, IP, IP1, TIMEOUT, RETRY, 119 118 SI, SI0, SI1, SI2, SI3, SI4, SI5, SI6, ESTABLISH, EST1, CONFIG, MAIN, MAIN1, MAIN2, MAIN3, CHK_RECEIVED, SEND_FTU_ERROR, 120 READ_DATA, WRITE_TO_SD_ADDR, READ_FTU_ERROR, READ_ FROM_SD_ADDR, READ_FROM_DD_ADDR, READ_FROM_FL_ADDR, READ_FROM_HEADER_MODUL);119 READ_DATA, WRITE_TO_SD_ADDR, READ_FTU_ERROR, READ_DD_BLOCK, READ_FROM_SD_ADDR, READ_FROM_DD_ADDR, READ_FROM_FL_ADDR, READ_FROM_HEADER_MODUL); 121 120 type state_write_type is (WR_START, WR_LENGTH, WR_01, WR_02, WR_03, WR_04, WR_05, WR_06, WR_07, WR_08, 122 121 WR_WRITE_START_DEL, WR_GET_HEADER, WR_GET_HEADER_WAIT, WR_SD_ADDR, WR_FIFO_DATA, WR_FIFO_DATA_01, WR_FIFO_HEADER, WR_FIFO_HEADER_01, WR_WRITE_END_DEL); 123 122 type state_interrupt_1_type is (IR1_01, IR1_02, IR1_03, IR1_04); 124 123 type state_interrupt_2_type is (IR2_01, IR2_02, IR2_03, IR2_04, IR2_05, IR2_06); 125 type state_read_data_type is (RD_1, RD_2, RD_3, RD_4, RD_5, RD_CMD, RD_CMD_PARSE, RD_PING, RD_WRITE_SD_ADDR, RD_READ_SD_ADDR, RD_READ_SD_BLOCK, RD_ READ_DD_BLOCK, RD_WRITE_SD_BLOCK, RD_X_EVNTS,RD_END);124 type state_read_data_type is (RD_1, RD_2, RD_3, RD_4, RD_5, RD_CMD, RD_CMD_PARSE, RD_PING, RD_WRITE_SD_ADDR, RD_READ_SD_ADDR, RD_READ_SD_BLOCK, RD_WRITE_SD_BLOCK, RD_X_EVNTS,RD_END); 126 125 type state_write_sd_type is (WRITE_SD_START, WRITE_SD_WAIT, WRITE_SD_END); 127 126 type state_read_sd_type is (READ_SD_START, READ_SD_WAIT, READ_SD_END); … … 131 130 type state_read_dd_block_type is (READ_DD_BLOCK_START, READ_DD_BLOCK_WRITE_GENERAL, READ_DD_BLOCK_WRITE, READ_DD_BLOCK_END, READ_DD_BLOCK_INTERN); 132 131 type state_send_ftu_error_type is (SFE_START, SFE_END); 132 type state_rd_x_evnts_type is (RD_X_01, RD_X_02, RD_X_03); 133 133 134 134 signal RST_TIME : std_logic_vector(19 downto 0) := X"7A120"; … … 153 153 signal state_read_dd_block : state_read_dd_block_type := READ_DD_BLOCK_START; 154 154 signal state_send_ftu_error : state_send_ftu_error_type := SFE_START; 155 155 signal state_rd_x_evnts : state_rd_x_evnts_type := RD_X_01; 156 156 157 157 signal interrupt_ignore : std_logic := '1'; … … 460 460 when SI => 461 461 par_addr <= W5300_S0_MR + socket_cnt * W5300_S_INC; 462 par_data <= X"0101"; -- ALIGN, TCP462 par_data <= X"0101"; -- 0x0101: ALIGN, TCP 463 463 state_init <= WRITE_REG; 464 464 next_state <= SI0; … … 554 554 new_config <= '1'; 555 555 config_started_ack <= '0'; 556 state_init <= MAIN; 557 558 -- main "loop" 559 when MAIN => 556 560 if (config_started = '1') then 557 561 new_config <= '0'; 558 562 config_started_ack <= '1'; 559 state_init <= MAIN;560 563 end if; 561 562 -- main "loop"563 when MAIN =>564 564 chk_recv_cntr <= chk_recv_cntr + 1; 565 565 if (chk_recv_cntr = 1000) then 566 566 chk_recv_cntr <= 0; 567 state_read_data <= RD_1;568 567 state_init <= READ_DATA; 569 568 busy <= '1'; … … 575 574 state_read_dd_block <= READ_DD_BLOCK_END; 576 575 end if; 577 state_read_data <= RD_READ_DD_BLOCK; 578 state_init <= READ_DATA; 576 state_init <= READ_DD_BLOCK; 579 577 elsif ((ftu_error_send = '1') and (wait_for_data_flag = '0')) then 580 578 ftu_error_send_ack <= '1'; … … 587 585 588 586 587 -- read dynamic data block and write it to ethernet 588 when READ_DD_BLOCK => 589 case state_read_dd_block is 590 when READ_DD_BLOCK_START => 591 dd_block_start <= '1'; 592 dd_block_ready <= '0'; 593 if (dd_block_start_ack = '1') then 594 dd_block_start <= '0'; 595 state_read_dd_block <= READ_DD_BLOCK_WRITE_GENERAL; 596 end if; 597 -- write on-time counter and tempertures to dd-block 598 when READ_DD_BLOCK_WRITE_GENERAL => 599 dd_write_general <= '1'; 600 if (dd_write_general_started = '1') then 601 dd_write_general <= '0'; 602 state_read_dd_block <= READ_DD_BLOCK_WRITE; 603 end if; 604 -- write dd-block to ethernet when on-time counter and temperatures are ready 605 when READ_DD_BLOCK_WRITE => 606 if (dd_write_general_ready = '1') then 607 data_package_type <= FTM_PACKAGE_TYPE_DD; 608 data_package_length <= DD_BLOCK_SIZE + 1; -- +1 := package end 609 read_addr_state <= READ_FROM_DD_ADDR; 610 local_sd_addr <= X"000"; -- start at address 0x000 611 local_write_length <= "00000" & DD_BLOCK_SIZE; 612 state_read_dd_block <= READ_DD_BLOCK_END; 613 next_state <= READ_DD_BLOCK; 614 state_init <= WRITE_DATA; 615 end if; 616 when READ_DD_BLOCK_END => 617 dd_block_ready <= '1'; 618 if (internal_cmd = '1') then 619 state_read_dd_block <= READ_DD_BLOCK_INTERN; 620 else 621 next_state_read_data <= RD_CMD; 622 state_read_dd_block <= READ_DD_BLOCK_START; 623 state_init <= READ_DATA; 624 state_read_data <= RD_5; 625 end if; 626 when READ_DD_BLOCK_INTERN => 627 if (dd_send = '0') then 628 dd_send_ready <= '1'; 629 dd_send_ack <= '0'; 630 internal_cmd <= '0'; 631 state_read_dd_block <= READ_DD_BLOCK_START; 632 state_init <= MAIN; 633 end if; 634 end case; -- state_read_dd_block 635 589 636 -- send FTU error message 590 637 when SEND_FTU_ERROR => … … 632 679 else 633 680 busy <= '0'; 681 state_read_data <= RD_1; 634 682 state_init <= MAIN; 635 683 end if; … … 646 694 647 695 when RD_END => 696 state_read_data <= RD_1; 648 697 if (new_config_flag = '1') then 649 698 new_config_flag <= '0'; … … 652 701 next_state <= MAIN; 653 702 end if; 654 if (internal_cmd = '0') then 655 par_addr <= W5300_S0_CR; 656 par_data <= X"0040"; -- RECV 657 state_init <= WRITE_REG; 658 else 659 internal_cmd <= '0'; 660 state_init <= MAIN; 661 end if; 703 par_addr <= W5300_S0_CR; 704 par_data <= X"0040"; -- RECV 705 state_init <= WRITE_REG; 662 706 663 707 … … 701 745 start_run <= '0'; 702 746 state_read_data <= RD_5; 747 else 748 state_init <= MAIN; 703 749 end if; 704 750 -- start run an take X events … … 716 762 stop_run <= '0'; 717 763 state_read_data <= RD_5; 764 else 765 state_init <= MAIN; 718 766 end if; 719 767 … … 724 772 crate_reset <= '0'; 725 773 state_read_data <= RD_5; 774 else 775 state_init <= MAIN; 726 776 end if; 727 777 … … 754 804 -- read dynamic data block 755 805 when PAR_READ_DD => 756 state_read_data <= RD_READ_DD_BLOCK; 806 state_init <= READ_DD_BLOCK; 807 state_read_data <= RD_5; 757 808 when others => 758 809 state_read_data <= RD_5; … … 788 839 ping_ftu_start <= '0'; 789 840 state_ping <= PING_WAIT; 841 else 842 state_init <= MAIN; 790 843 end if; 791 844 when PING_WAIT => 792 845 if (ping_ftu_ready = '1') then 793 846 state_ping <= PING_WRITE_LIST; 847 else 848 state_init <= MAIN; 794 849 end if; 795 850 when PING_WRITE_LIST => … … 803 858 next_state <= READ_DATA; 804 859 state_init <= WRITE_DATA; 805 end case;806 807 -- read dynamic data block and write it to ethernet808 when RD_READ_DD_BLOCK =>809 case state_read_dd_block is810 when READ_DD_BLOCK_START =>811 dd_block_start <= '1';812 dd_block_ready <= '0';813 if (dd_block_start_ack = '1') then814 dd_block_start <= '0';815 state_read_dd_block <= READ_DD_BLOCK_WRITE_GENERAL;816 end if;817 -- write on-time counter and tempertures to dd-block818 when READ_DD_BLOCK_WRITE_GENERAL =>819 dd_write_general <= '1';820 if (dd_write_general_started = '1') then821 dd_write_general <= '0';822 state_read_dd_block <= READ_DD_BLOCK_WRITE;823 end if;824 -- write dd-block to ethernet when on-time counter and temperatures are ready825 when READ_DD_BLOCK_WRITE =>826 if (dd_write_general_ready = '1') then827 data_package_type <= FTM_PACKAGE_TYPE_DD;828 data_package_length <= DD_BLOCK_SIZE + 1; -- +1 := package end829 read_addr_state <= READ_FROM_DD_ADDR;830 local_sd_addr <= X"000"; -- start at address 0x000831 local_write_length <= "00000" & DD_BLOCK_SIZE;832 state_read_dd_block <= READ_DD_BLOCK_END;833 next_state <= READ_DATA;834 state_init <= WRITE_DATA;835 end if;836 when READ_DD_BLOCK_END =>837 dd_block_ready <= '1';838 next_state_read_data <= RD_CMD;839 --840 if (internal_cmd = '1') then841 state_read_dd_block <= READ_DD_BLOCK_INTERN;842 else843 state_read_dd_block <= READ_DD_BLOCK_START;844 state_read_data <= RD_5;845 end if;846 when READ_DD_BLOCK_INTERN =>847 if (dd_send = '0') then848 dd_send_ready <= '1';849 dd_send_ack <= '0';850 state_read_dd_block <= READ_DD_BLOCK_START;851 state_read_data <= RD_5;852 end if;853 854 860 end case; 855 861 … … 913 919 -- read X events 914 920 when RD_X_EVNTS => 915 if (next_packet_data_cnt = 0) then916 start_run_num_events (31 downto 16) <= data_read;917 else918 start_run_num_events (15 downto 0) <= data_read;919 start_run_param <= cmd_array (2);920 start_run <= '1';921 if (start_run_ack = '1') then922 start_run <= '0';923 next_packet_data_cnt <= 0;921 case state_rd_x_evnts is 922 when RD_X_01 => 923 start_run_num_events (31 downto 16) <= data_read; 924 state_read_data <= RD_5; 925 state_rd_x_evnts <= RD_X_02; 926 when RD_X_02 => 927 start_run_num_events (15 downto 0) <= data_read; 928 start_run_param <= cmd_array (2); 929 start_run <= '1'; 924 930 wait_for_data_flag <= '0'; 925 next_state_read_data <= RD_CMD; 926 state_read_data <= RD_5; 927 end if; 928 end if; 929 931 state_rd_x_evnts <= RD_X_03; 932 when RD_X_03 => 933 if (start_run_ack = '1') then 934 start_run <= '0'; 935 state_rd_x_evnts <= RD_X_01; 936 next_state_read_data <= RD_CMD; 937 state_read_data <= RD_5; 938 else 939 state_init <= MAIN; 940 end if; 941 end case; 942 930 943 end case; -- state_read_data 931 944
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