Changeset 10779 for firmware/FTM/Timing_counters

Timestamp:

05/23/11 15:00:19 (14 years ago)

Author:

weitzel

Message:

some changes in FTM Timing_counter

File:

• firmware/FTM/Timing_counters/Timing_counter.vhd (modified) (5 diffs)

firmware/FTM/Timing_counters/Timing_counter.vhd

@@ -23 +23 @@
 --
 -- May 18 2011 by Patrick Vogler
+--
+-- May 20, 2011, by Q. Weitzel
+-- counting was wrong by one clock cycle (1 us)
+--
+-- May 23, 2011, by Q. Weitzel
+-- counter reset changed from async to sync reset
+-- reset, enable and read_counter removed from sensitity lists
+--
 ----------------------------------------------------------------------------------
 
@@ -40 +48 @@
 USE ftm_definitions.ftm_array_types.all;
 USE ftm_definitions.ftm_constants.all;
-
 
 
@@ -64 +71 @@
 
 
-
 architecture Behavioral of Timing_counter is
 
@@ -78 +84 @@
 --  counting
 -------------------------------------------------------------------------------
-  count :  process (clk, reset, enable)
-  begin 
-    if reset = '1' then
-         counting    <= (others => '0');
-         precounting <= (others => '0');
-                 
-       elsif rising_edge(clk) then 
-           if enable = '1' then
-              precounting <= precounting + 1;
-              if (precounting = (PRECOUNT_DIVIDER - 1)) then         
-                counting <= counting + 1;
-                precounting <= (others => '0');  
-              end if;          
-       end if;       
-    end if;   
+  count :  process (clk)
+  begin
+     
+    if rising_edge(clk) then
+      if (reset = '1') then
+        counting    <= (others => '0');
+        precounting <= (others => '0');        
+      elsif enable = '1' then
+        precounting <= precounting + 1;
+        if (precounting = (PRECOUNT_DIVIDER - 1)) then         
+          counting <= counting + 1;
+          precounting <= (others => '0');        
+        end if;          
+      end if;       
+    end if;
+    
   end process count;
-
 
 -- read counter
 -------------------------------------------------------------------------------
-  readout_counter : process (clk, read_counter)
+  readout_counter : process (clk)
   begin
     if rising_edge(clk) then
@@ -131 +137 @@
 
 end Behavioral;
-
-