Changeset 11648 for firmware/FTM/Clock_cond_interface/Clock_cond_interface_tb.vhd

Timestamp:

07/27/11 11:55:25 (13 years ago)

Author:

vogler

Message:

clock cond interface, new settings loaded only when changed

File:

• firmware/FTM/Clock_cond_interface/Clock_cond_interface_tb.vhd (modified) (6 diffs)

firmware/FTM/Clock_cond_interface/Clock_cond_interface_tb.vhd

@@ -53 +53 @@
          LD_Clk_Cond : IN  std_logic;
          TIM_Sel : OUT  std_logic;
+        --              locked  : out STD_LOGIC;  -- PLL in the Clock Conditioner locked
          cc_R0 : IN  std_logic_vector(31 downto 0);
          cc_R1 : IN  std_logic_vector(31 downto 0);
@@ -83 +84 @@
    signal cc_R13 : std_logic_vector(31 downto 0) := x"020A000D";
    signal cc_R14 : std_logic_vector(31 downto 0) := x"0830280E";
-   signal cc_R15 : std_logic_vector(31 downto 0) :=  x"1400FA0F";   
+   signal cc_R15 : std_logic_vector(31 downto 0) := x"1400FA0F";   
 
          
@@ -101 +102 @@
    signal config_started : std_logic;
    signal config_done : std_logic;
-
+ --  signal locked : STD_LOGIC;  -- PLL in the Clock Conditioner locked
 
     
@@ -121 +122 @@
           LD_Clk_Cond => LD_Clk_Cond,
           TIM_Sel => TIM_Sel,
+        --               locked => locked,         
           cc_R0 => cc_R0,
           cc_R1 => cc_R1,
@@ -147 +149 @@
    end process;
  
---   CLK_Clk_Cond_process :process
---   begin
---              CLK_Clk_Cond <= '0';
---              wait for CLK_Clk_Cond_period/2;
---              CLK_Clk_Cond <= '1';
---              wait for CLK_Clk_Cond_period/2;
---   end process;
- 
+
 
 
@@ -174 +169 @@
       start_config <= '0'; 
           
-                wait for 180 us;
+                wait for 300 us;
       LD_Clk_Cond <= '1';               
       
+                
+                wait for 300 us;
+                LD_Clk_Cond <= '0';
+      start_config <= '1';
+      wait for clk_period*100;
+      start_config <= '0';
+      wait for 300 us;
+      LD_Clk_Cond <= '1';       
+                
+                
+                
+                
+                
+                -- programm new settings
+                
+                cc_R0 <= x"00038027";
+      cc_R1 <= x"00010101";
+      cc_R8 <= x"10000963";
+      cc_R9 <= x"A0032A09";
+      cc_R11 <= x"0082000B";
+      cc_R13 <= x"020A000D";
+      cc_R14 <= x"0830280E";
+      cc_R15 <= x"1400FA0F";   
+        
+                wait for 300 us;
+                LD_Clk_Cond <= '0';
+      start_config <= '1';
+      wait for clk_period*100;
+      start_config <= '0';
+      wait for 300 us;
+      LD_Clk_Cond <= '1';       
+                
+                
+                
       wait;
    end process;