Changeset 10914 for firmware


Ignore:
Timestamp:
Jun 6, 2011, 4:25:42 PM (8 years ago)
Author:
neise
Message:
 
Location:
firmware/FAD/FACT_FAD_20MHz_VAR_PS
Files:
24 added
8 edited

Legend:

Unmodified
Added
Removed
  • firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD.hdp

    r10225 r10914  
    88simprim = C:/FPGAdv82PS/Xilinx_Lib/simprim
    99unimacro = C:/FPGAdv82PS/Xilinx_Lib/unimacro
    10 unisim = D:\unisim\unisim
    11 XilinxCoreLib = D:\unisim\xilinxcorelib
     10unisim = C:/FPGAdv82PS/Xilinx_Lib/unisim
     11XilinxCoreLib = C:/FPGAdv82PS/Xilinx_Lib/XilinxCoreLib
    1212[QuestaSim]
    1313secureip = D:/unisim/secureip
  • firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_TB_lib/hdl/clock_generator_beha.vhd

    r9912 r10914  
    2626ENTITY clock_generator IS
    2727   GENERIC(
    28       clock_period : time := 20 ns;
     28      clock_period : time := 50 ns;
    2929      reset_time   : time := 50 ns
    3030   );
  • firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_TB_lib/hdl/fad_main_tb_struct.vhd

    r10883 r10914  
    22--
    33-- Created:
    4 --          by - daqct3.UNKNOWN (IHP110)
    5 --          at - 22:55:01 26.05.2011
    6 --
    7 -- Generated by Mentor Graphics' HDL Designer(TM) 2009.1 (Build 12)
     4--          by - dneise.UNKNOWN (E5B-LABOR6)
     5--          at - 13:22:05 01.06.2011
     6--
     7-- Generated by Mentor Graphics' HDL Designer(TM) 2009.2 (Build 10)
    88--
    99LIBRARY ieee;
     
    2020--
    2121-- Created:
    22 --          by - daqct3.UNKNOWN (IHP110)
    23 --          at - 22:55:01 26.05.2011
    24 --
    25 -- Generated by Mentor Graphics' HDL Designer(TM) 2009.1 (Build 12)
     22--          by - dneise.UNKNOWN (E5B-LABOR6)
     23--          at - 13:22:05 01.06.2011
     24--
     25-- Generated by Mentor Graphics' HDL Designer(TM) 2009.2 (Build 10)
    2626--
    2727LIBRARY ieee;
     
    177177   COMPONENT clock_generator
    178178   GENERIC (
    179       clock_period : time := 20 ns;
     179      clock_period : time := 50 ns;
    180180      reset_time   : time := 50 ns
    181181   );
  • firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_TB_lib/hds/clock_generator/symbol.sb

    r9912 r10914  
    265265name "clock_period"
    266266type "time"
    267 value "20 ns"
    268 )
    269 uid 156,0
     267value "50 ns"
     268)
     269uid 183,0
    270270)
    271271*44 (LogGeneric
     
    275275value "50 ns"
    276276)
    277 uid 158,0
     277uid 185,0
    278278)
    279279]
     
    331331pos 0
    332332dimension 20
    333 uid 157,0
     333uid 184,0
    334334)
    335335*51 (MRCItem
     
    337337pos 1
    338338dimension 20
    339 uid 159,0
     339uid 186,0
    340340)
    341341]
     
    410410(vvPair
    411411variable "HDLDir"
    412 value "D:\\E5b\\E5b_09_189\\FPGA\\FAD_repos\\unstable\\FACT_FAD\\FACT_FAD_TB_lib\\hdl"
     412value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_TB_lib\\hdl"
    413413)
    414414(vvPair
    415415variable "HDSDir"
    416 value "D:\\E5b\\E5b_09_189\\FPGA\\FAD_repos\\unstable\\FACT_FAD\\FACT_FAD_TB_lib\\hds"
     416value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_TB_lib\\hds"
    417417)
    418418(vvPair
    419419variable "SideDataDesignDir"
    420 value "D:\\E5b\\E5b_09_189\\FPGA\\FAD_repos\\unstable\\FACT_FAD\\FACT_FAD_TB_lib\\hds\\clock_generator\\symbol.sb.info"
     420value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_TB_lib\\hds\\clock_generator\\symbol.sb.info"
    421421)
    422422(vvPair
    423423variable "SideDataUserDir"
    424 value "D:\\E5b\\E5b_09_189\\FPGA\\FAD_repos\\unstable\\FACT_FAD\\FACT_FAD_TB_lib\\hds\\clock_generator\\symbol.sb.user"
     424value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_TB_lib\\hds\\clock_generator\\symbol.sb.user"
    425425)
    426426(vvPair
    427427variable "SourceDir"
    428 value "D:\\E5b\\E5b_09_189\\FPGA\\FAD_repos\\unstable\\FACT_FAD\\FACT_FAD_TB_lib\\hds"
     428value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_TB_lib\\hds"
    429429)
    430430(vvPair
     
    438438(vvPair
    439439variable "config"
    440 value "%(unit)_config"
     440value "%(unit)_%(view)_config"
    441441)
    442442(vvPair
    443443variable "d"
    444 value "D:\\E5b\\E5b_09_189\\FPGA\\FAD_repos\\unstable\\FACT_FAD\\FACT_FAD_TB_lib\\hds\\clock_generator"
     444value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_TB_lib\\hds\\clock_generator"
    445445)
    446446(vvPair
    447447variable "d_logical"
    448 value "D:\\E5b\\E5b_09_189\\FPGA\\FAD_repos\\unstable\\FACT_FAD\\FACT_FAD_TB_lib\\hds\\clock_generator"
     448value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_TB_lib\\hds\\clock_generator"
    449449)
    450450(vvPair
    451451variable "date"
    452 value "23.06.2010"
     452value "01.06.2011"
    453453)
    454454(vvPair
     
    462462(vvPair
    463463variable "dd"
    464 value "23"
     464value "01"
    465465)
    466466(vvPair
     
    490490(vvPair
    491491variable "host"
    492 value "EEPC8"
     492value "E5B-LABOR6"
    493493)
    494494(vvPair
     
    501501)
    502502(vvPair
     503variable "library_downstream_HdsLintPlugin"
     504value "$HDS_PROJECT_DIR/FACT_FAD_TB_lib/designcheck"
     505)
     506(vvPair
     507variable "library_downstream_ISEPARInvoke"
     508value "$HDS_PROJECT_DIR/FACT_FAD_TB_lib/ise"
     509)
     510(vvPair
     511variable "library_downstream_ImpactInvoke"
     512value "$HDS_PROJECT_DIR/FACT_FAD_TB_lib/ise"
     513)
     514(vvPair
     515variable "library_downstream_ModelSimCompiler"
     516value "$HDS_PROJECT_DIR/FACT_FAD_TB_lib/work"
     517)
     518(vvPair
     519variable "library_downstream_XSTDataPrep"
     520value "$HDS_PROJECT_DIR/FACT_FAD_TB_lib/ise"
     521)
     522(vvPair
    503523variable "mm"
    504524value "06"
     
    518538(vvPair
    519539variable "p"
    520 value "D:\\E5b\\E5b_09_189\\FPGA\\FAD_repos\\unstable\\FACT_FAD\\FACT_FAD_TB_lib\\hds\\clock_generator\\symbol.sb"
     540value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_TB_lib\\hds\\clock_generator\\symbol.sb"
    521541)
    522542(vvPair
    523543variable "p_logical"
    524 value "D:\\E5b\\E5b_09_189\\FPGA\\FAD_repos\\unstable\\FACT_FAD\\FACT_FAD_TB_lib\\hds\\clock_generator\\symbol.sb"
     544value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_TB_lib\\hds\\clock_generator\\symbol.sb"
    525545)
    526546(vvPair
     
    546566(vvPair
    547567variable "task_ModelSimPath"
    548 value "$HDS_HOME/../Modeltech/win32"
     568value "C:\\modeltech_6.6a\\win32"
    549569)
    550570(vvPair
     
    554574(vvPair
    555575variable "task_PrecisionRTLPath"
    556 value "$HDS_HOME/../Precision/Mgc_home/bin"
     576value "<TBD>"
    557577)
    558578(vvPair
     
    578598(vvPair
    579599variable "time"
    580 value "10:52:12"
     600value "12:57:51"
    581601)
    582602(vvPair
     
    586606(vvPair
    587607variable "user"
    588 value "Benjamin Krumm"
     608value "dneise"
    589609)
    590610(vvPair
     
    598618(vvPair
    599619variable "year"
    600 value "2010"
     620value "2011"
    601621)
    602622(vvPair
    603623variable "yy"
    604 value "10"
     624value "11"
    605625)
    606626]
     
    787807st "Generic Declarations
    788808
    789 clock_period time 20 ns 
     809clock_period time 50 ns 
    790810reset_time   time 50 ns 
    791811"
     
    798818name "clock_period"
    799819type "time"
    800 value "20 ns"
     820value "50 ns"
    801821)
    802822(GiElement
     
    14481468)
    14491469)
    1450 lastUid 159,0
     1470lastUid 186,0
    14511471activeModelName "Symbol:CDM"
    14521472)
  • firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_TB_lib/hds/fad_main_tb/struct.bd

    r10883 r10914  
    159159)
    160160version "29.1"
    161 appVersion "2009.1 (Build 12)"
     161appVersion "2009.2 (Build 10)"
    162162noEmbeddedEditors 1
    163163model (BlockDiag
     
    166166(vvPair
    167167variable "HDLDir"
    168 value "D:\\firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_TB_lib\\hdl"
     168value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_TB_lib\\hdl"
    169169)
    170170(vvPair
    171171variable "HDSDir"
    172 value "D:\\firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_TB_lib\\hds"
     172value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_TB_lib\\hds"
    173173)
    174174(vvPair
    175175variable "SideDataDesignDir"
    176 value "D:\\firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_TB_lib\\hds\\fad_main_tb\\struct.bd.info"
     176value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_TB_lib\\hds\\fad_main_tb\\struct.bd.info"
    177177)
    178178(vvPair
    179179variable "SideDataUserDir"
    180 value "D:\\firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_TB_lib\\hds\\fad_main_tb\\struct.bd.user"
     180value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_TB_lib\\hds\\fad_main_tb\\struct.bd.user"
    181181)
    182182(vvPair
    183183variable "SourceDir"
    184 value "D:\\firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_TB_lib\\hds"
     184value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_TB_lib\\hds"
    185185)
    186186(vvPair
     
    198198(vvPair
    199199variable "d"
    200 value "D:\\firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_TB_lib\\hds\\fad_main_tb"
     200value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_TB_lib\\hds\\fad_main_tb"
    201201)
    202202(vvPair
    203203variable "d_logical"
    204 value "D:\\firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_TB_lib\\hds\\fad_main_tb"
     204value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_TB_lib\\hds\\fad_main_tb"
    205205)
    206206(vvPair
    207207variable "date"
    208 value "25.05.2011"
     208value "01.06.2011"
    209209)
    210210(vvPair
     
    218218(vvPair
    219219variable "dd"
    220 value "25"
     220value "01"
    221221)
    222222(vvPair
     
    246246(vvPair
    247247variable "host"
    248 value "IHP110"
     248value "E5B-LABOR6"
    249249)
    250250(vvPair
     
    278278(vvPair
    279279variable "mm"
    280 value "05"
     280value "06"
    281281)
    282282(vvPair
     
    286286(vvPair
    287287variable "month"
    288 value "Mai"
     288value "Jun"
    289289)
    290290(vvPair
    291291variable "month_long"
    292 value "Mai"
     292value "Juni"
    293293)
    294294(vvPair
    295295variable "p"
    296 value "D:\\firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_TB_lib\\hds\\fad_main_tb\\struct.bd"
     296value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_TB_lib\\hds\\fad_main_tb\\struct.bd"
    297297)
    298298(vvPair
    299299variable "p_logical"
    300 value "D:\\firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_TB_lib\\hds\\fad_main_tb\\struct.bd"
     300value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_TB_lib\\hds\\fad_main_tb\\struct.bd"
    301301)
    302302(vvPair
     
    322322(vvPair
    323323variable "task_ModelSimPath"
    324 value "D:\\modeltech_6.5e\\win32"
     324value "C:\\modeltech_6.6a\\win32"
    325325)
    326326(vvPair
     
    354354(vvPair
    355355variable "time"
    356 value "17:24:50"
     356value "13:20:42"
    357357)
    358358(vvPair
     
    362362(vvPair
    363363variable "user"
    364 value "daqct3"
     364value "dneise"
    365365)
    366366(vvPair
    367367variable "version"
    368 value "2009.1 (Build 12)"
     368value "2009.2 (Build 10)"
    369369)
    370370(vvPair
     
    406406bg "0,0,32768"
    407407)
    408 xt "109200,97000,120000,98000"
     408xt "109200,97000,118700,98000"
    409409st "
    410410by %user on %dd %month %year
     
    437437bg "0,0,32768"
    438438)
    439 xt "126200,93000,129500,94000"
     439xt "126200,93000,129200,94000"
    440440st "
    441441Project:
     
    468468bg "0,0,32768"
    469469)
    470 xt "109200,95000,120100,96000"
     470xt "109200,95000,119200,96000"
    471471st "
    472472<enter diagram title here>
     
    499499bg "0,0,32768"
    500500)
    501 xt "105200,95000,107500,96000"
     501xt "105200,95000,107300,96000"
    502502st "
    503503Title:
     
    530530bg "0,0,32768"
    531531)
    532 xt "126200,94200,136000,95200"
     532xt "126200,94200,135400,95200"
    533533st "
    534534<enter comments here>
     
    560560bg "0,0,32768"
    561561)
    562 xt "130200,93000,134900,94000"
     562xt "130200,93000,134700,94000"
    563563st "
    564564%project_name
     
    590590fg "32768,0,0"
    591591)
    592 xt "112450,93000,118550,95000"
     592xt "112700,93000,118300,95000"
    593593st "
    594594TU Dortmund
     
    623623bg "0,0,32768"
    624624)
    625 xt "105200,96000,107500,97000"
     625xt "105200,96000,107300,97000"
    626626st "
    627627Path:
     
    654654bg "0,0,32768"
    655655)
    656 xt "105200,97000,108300,98000"
     656xt "105200,97000,107900,98000"
    657657st "
    658658Edited:
     
    685685bg "0,0,32768"
    686686)
    687 xt "109200,96000,125800,97000"
     687xt "109200,96000,123400,97000"
    688688st "
    689689%library/%unit/%view
     
    34323432va (VaSet
    34333433)
    3434 xt "50200,45200,58200,49200"
     3434xt "50200,45200,60200,48200"
    34353435st "
    34363436-- eb_ID 1: hard-wired IDs
     
    38063806va (VaSet
    38073807)
    3808 xt "50200,57200,60900,67200"
     3808xt "50200,57200,62100,66200"
    38093809st "
    38103810-- eb_adc 2: ADC routing
     
    44494449va (VaSet
    44504450)
    4451 xt "27200,72200,40200,77200"
     4451xt "27200,72200,39400,77200"
    44524452st "
    44534453
     
    74437443va (VaSet
    74447444)
    7445 xt "-87000,1000,-70900,11000"
     7445xt "-87000,1000,-72500,11000"
    74467446st "LIBRARY ieee;
    74477447USE ieee.std_logic_1164.all;
     
    74877487isHidden 1
    74887488)
    7489 xt "20000,2000,28200,4000"
     7489xt "20000,2000,27500,4000"
    74907490st "`resetall
    74917491`timescale 1ns/10ps"
     
    75317531associable 1
    75327532)
    7533 windowSize "0,20,1681,1050"
    7534 viewArea "69200,38600,161306,94544"
     7533windowSize "0,0,1281,1024"
     7534viewArea "53418,13863,168802,105975"
    75357535cachedDiagramExtent "-92000,0,146000,98000"
    75367536pageSetupInfo (PageSetupInfo
     
    75457545hasePageBreakOrigin 1
    75467546pageBreakOrigin "-146000,0"
    7547 lastUid 2951,0
     7547lastUid 3294,0
    75487548defaultCommentText (CommentText
    75497549shape (Rectangle
     
    75607560fg "0,0,32768"
    75617561)
    7562 xt "200,200,2400,1200"
     7562xt "200,200,2000,1200"
    75637563st "
    75647564Text
     
    79787978va (VaSet
    79797979)
    7980 xt "200,200,2400,1200"
     7980xt "200,200,2000,1200"
    79817981st "
    79827982Text
     
    83168316va (VaSet
    83178317)
    8318 xt "0,-1100,12900,-100"
     8318xt "0,-1100,12600,-100"
    83198319st "g0: FOR i IN 0 TO n GENERATE"
    83208320tm "FrameTitleTextMgr"
     
    83768376va (VaSet
    83778377)
    8378 xt "0,-1100,7700,-100"
     8378xt "0,-1100,7400,-100"
    83798379st "b0: BLOCK (guard)"
    83808380tm "FrameTitleTextMgr"
  • firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_TB_lib/hds/fad_main_tb/struct.bd.bak

    r10883 r10914  
    137137uid 2336,0
    138138)
     139(Instance
     140name "I0"
     141duLibraryName "FACT_FAD_lib"
     142duName "FAD_main_with_w53002"
     143elements [
     144(GiElement
     145name "RAMADDRWIDTH64b"
     146type "integer"
     147value "15"
     148)
     149]
     150mwi 0
     151uid 3285,0
     152)
    139153]
    140154embeddedInstances [
     
    159173)
    160174version "29.1"
    161 appVersion "2009.1 (Build 12)"
     175appVersion "2009.2 (Build 10)"
    162176noEmbeddedEditors 1
    163177model (BlockDiag
     
    166180(vvPair
    167181variable "HDLDir"
    168 value "D:\\firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_TB_lib\\hdl"
     182value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_TB_lib\\hdl"
    169183)
    170184(vvPair
    171185variable "HDSDir"
    172 value "D:\\firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_TB_lib\\hds"
     186value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_TB_lib\\hds"
    173187)
    174188(vvPair
    175189variable "SideDataDesignDir"
    176 value "D:\\firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_TB_lib\\hds\\fad_main_tb\\struct.bd.info"
     190value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_TB_lib\\hds\\fad_main_tb\\struct.bd.info"
    177191)
    178192(vvPair
    179193variable "SideDataUserDir"
    180 value "D:\\firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_TB_lib\\hds\\fad_main_tb\\struct.bd.user"
     194value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_TB_lib\\hds\\fad_main_tb\\struct.bd.user"
    181195)
    182196(vvPair
    183197variable "SourceDir"
    184 value "D:\\firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_TB_lib\\hds"
     198value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_TB_lib\\hds"
    185199)
    186200(vvPair
     
    198212(vvPair
    199213variable "d"
    200 value "D:\\firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_TB_lib\\hds\\fad_main_tb"
     214value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_TB_lib\\hds\\fad_main_tb"
    201215)
    202216(vvPair
    203217variable "d_logical"
    204 value "D:\\firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_TB_lib\\hds\\fad_main_tb"
     218value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_TB_lib\\hds\\fad_main_tb"
    205219)
    206220(vvPair
    207221variable "date"
    208 value "23.05.2011"
     222value "01.06.2011"
    209223)
    210224(vvPair
    211225variable "day"
    212 value "Mo"
     226value "Mi"
    213227)
    214228(vvPair
    215229variable "day_long"
    216 value "Montag"
     230value "Mittwoch"
    217231)
    218232(vvPair
    219233variable "dd"
    220 value "23"
     234value "01"
    221235)
    222236(vvPair
     
    246260(vvPair
    247261variable "host"
    248 value "IHP110"
     262value "E5B-LABOR6"
    249263)
    250264(vvPair
     
    278292(vvPair
    279293variable "mm"
    280 value "05"
     294value "06"
    281295)
    282296(vvPair
     
    286300(vvPair
    287301variable "month"
    288 value "Mai"
     302value "Jun"
    289303)
    290304(vvPair
    291305variable "month_long"
    292 value "Mai"
     306value "Juni"
    293307)
    294308(vvPair
    295309variable "p"
    296 value "D:\\firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_TB_lib\\hds\\fad_main_tb\\struct.bd"
     310value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_TB_lib\\hds\\fad_main_tb\\struct.bd"
    297311)
    298312(vvPair
    299313variable "p_logical"
    300 value "D:\\firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_TB_lib\\hds\\fad_main_tb\\struct.bd"
     314value "C:\\fact.isdc.unige.ch_svn_firmware\\FAD\\FACT_FAD_20MHz_VAR_PS\\FACT_FAD_TB_lib\\hds\\fad_main_tb\\struct.bd"
    301315)
    302316(vvPair
     
    322336(vvPair
    323337variable "task_ModelSimPath"
    324 value "D:\\modeltech_6.5e\\win32"
     338value "C:\\modeltech_6.6a\\win32"
    325339)
    326340(vvPair
     
    354368(vvPair
    355369variable "time"
    356 value "18:19:57"
     370value "13:20:01"
    357371)
    358372(vvPair
     
    362376(vvPair
    363377variable "user"
    364 value "daqct3"
     378value "dneise"
    365379)
    366380(vvPair
    367381variable "version"
    368 value "2009.1 (Build 12)"
     382value "2009.2 (Build 10)"
    369383)
    370384(vvPair
     
    406420bg "0,0,32768"
    407421)
    408 xt "109200,97000,120300,98000"
     422xt "109200,97000,118900,98000"
    409423st "
    410424by %user on %dd %month %year
     
    437451bg "0,0,32768"
    438452)
    439 xt "126200,93000,129500,94000"
     453xt "126200,93000,129200,94000"
    440454st "
    441455Project:
     
    468482bg "0,0,32768"
    469483)
    470 xt "109200,95000,120100,96000"
     484xt "109200,95000,119200,96000"
    471485st "
    472486<enter diagram title here>
     
    499513bg "0,0,32768"
    500514)
    501 xt "105200,95000,107500,96000"
     515xt "105200,95000,107300,96000"
    502516st "
    503517Title:
     
    530544bg "0,0,32768"
    531545)
    532 xt "126200,94200,136000,95200"
     546xt "126200,94200,135400,95200"
    533547st "
    534548<enter comments here>
     
    560574bg "0,0,32768"
    561575)
    562 xt "130200,93000,134900,94000"
     576xt "130200,93000,134700,94000"
    563577st "
    564578%project_name
     
    590604fg "32768,0,0"
    591605)
    592 xt "112450,93000,118550,95000"
     606xt "112700,93000,118300,95000"
    593607st "
    594608TU Dortmund
     
    623637bg "0,0,32768"
    624638)
    625 xt "105200,96000,107500,97000"
     639xt "105200,96000,107300,97000"
    626640st "
    627641Path:
     
    654668bg "0,0,32768"
    655669)
    656 xt "105200,97000,108300,98000"
     670xt "105200,97000,107900,98000"
    657671st "
    658672Edited:
     
    685699bg "0,0,32768"
    686700)
    687 xt "109200,96000,125800,97000"
     701xt "109200,96000,123400,97000"
    688702st "
    689703%library/%unit/%view
     
    745759n "wiz_reset"
    746760t "std_logic"
    747 o 49
     761o 50
    748762suid 2,0
    749763i "'1'"
     
    964978t "std_logic_vector"
    965979b "(9 DOWNTO 0)"
    966 o 46
     980o 47
    967981suid 26,0
    968982)
     
    10011015t "std_logic_vector"
    10021016b "(15 DOWNTO 0)"
    1003 o 52
     1017o 53
    10041018suid 27,0
    10051019)
     
    10371051n "wiz_cs"
    10381052t "std_logic"
    1039 o 47
     1053o 48
    10401054suid 28,0
    10411055i "'1'"
     
    10741088n "wiz_wr"
    10751089t "std_logic"
    1076 o 50
     1090o 51
    10771091suid 29,0
    10781092i "'1'"
     
    11111125n "wiz_rd"
    11121126t "std_logic"
    1113 o 48
     1127o 49
    11141128suid 30,0
    11151129i "'1'"
     
    16771691preAdd 0
    16781692posAdd 0
    1679 o 51
     1693o 52
    16801694suid 63,0
    16811695)
     
    25502564n "trigger_veto"
    25512565t "std_logic"
    2552 o 44
     2566o 45
    25532567suid 98,0
    25542568i "'1'"
     
    25902604eolc "-- state is encoded here ... useful for debugging."
    25912605posAdd 0
    2592 o 45
     2606o 46
    25932607suid 103,0
     2608)
     2609)
     2610)
     2611*65 (CptPort
     2612uid 2924,0
     2613ps "OnEdgeStrategy"
     2614shape (Triangle
     2615uid 2925,0
     2616ro 90
     2617va (VaSet
     2618vasetType 1
     2619fg "0,65535,0"
     2620)
     2621xt "109000,89625,109750,90375"
     2622)
     2623tg (CPTG
     2624uid 2926,0
     2625ps "CptPortTextPlaceStrategy"
     2626stg "RightVerticalLayoutStrategy"
     2627f (Text
     2628uid 2927,0
     2629va (VaSet
     2630)
     2631xt "96100,89500,108000,90500"
     2632st "socket_tx_free_out : (16:0)"
     2633ju 2
     2634blo "108000,90300"
     2635)
     2636)
     2637thePort (LogicalPort
     2638m 1
     2639decl (Decl
     2640n "socket_tx_free_out"
     2641t "std_logic_vector"
     2642b "(16 DOWNTO 0)"
     2643eolc "-- 17bit value .. that's true"
     2644posAdd 0
     2645o 44
     2646suid 109,0
    25942647)
    25952648)
     
    26042657lineWidth 2
    26052658)
    2606 xt "81000,19000,109000,90000"
     2659xt "81000,19000,109000,91000"
    26072660)
    26082661oxt "15000,-8000,43000,46000"
     
    26122665stg "VerticalLayoutStrategy"
    26132666textVec [
    2614 *65 (Text
     2667*66 (Text
    26152668uid 236,0
    26162669va (VaSet
     
    26222675tm "BdLibraryNameMgr"
    26232676)
    2624 *66 (Text
     2677*67 (Text
    26252678uid 237,0
    26262679va (VaSet
     
    26322685tm "CptNameMgr"
    26332686)
    2634 *67 (Text
     2687*68 (Text
    26352688uid 238,0
    26362689va (VaSet
     
    26742727fg "49152,49152,49152"
    26752728)
    2676 xt "81250,88250,82750,89750"
     2729xt "81250,89250,82750,90750"
    26772730iconName "BlockDiagram.png"
    26782731iconMaskName "BlockDiagram.msk"
     
    26842737archFileType "UNKNOWN"
    26852738)
    2686 *68 (SaComponent
     2739*69 (SaComponent
    26872740uid 274,0
    26882741optionalChildren [
    2689 *69 (CptPort
     2742*70 (CptPort
    26902743uid 266,0
    26912744ps "OnEdgeStrategy"
     
    27232776)
    27242777)
    2725 *70 (CptPort
     2778*71 (CptPort
    27262779uid 270,0
    27272780ps "OnEdgeStrategy"
     
    27762829stg "VerticalLayoutStrategy"
    27772830textVec [
    2778 *71 (Text
     2831*72 (Text
    27792832uid 277,0
    27802833va (VaSet
     
    27862839tm "BdLibraryNameMgr"
    27872840)
    2788 *72 (Text
     2841*73 (Text
    27892842uid 278,0
    27902843va (VaSet
     
    27962849tm "CptNameMgr"
    27972850)
    2798 *73 (Text
     2851*74 (Text
    27992852uid 279,0
    28002853va (VaSet
     
    28552908archFileType "UNKNOWN"
    28562909)
    2857 *74 (Net
     2910*75 (Net
    28582911uid 284,0
    28592912decl (Decl
     
    28712924)
    28722925xt "-90000,46200,-68000,47000"
    2873 st "SIGNAL clk                   : STD_LOGIC
    2874 "
    2875 )
    2876 )
    2877 *75 (Net
     2926st "SIGNAL clk                   : STD_LOGIC"
     2927)
     2928)
     2929*76 (Net
    28782930uid 316,0
    28792931decl (Decl
     
    28892941font "Courier New,8,0"
    28902942)
    2891 xt "-90000,63000,-58500,63800"
    2892 st "SIGNAL wiz_addr              : std_logic_vector(9 DOWNTO 0)
    2893 "
    2894 )
    2895 )
    2896 *76 (Net
     2943xt "-90000,63800,-58500,64600"
     2944st "SIGNAL wiz_addr              : std_logic_vector(9 DOWNTO 0)"
     2945)
     2946)
     2947*77 (Net
    28972948uid 322,0
    28982949decl (Decl
     
    29082959font "Courier New,8,0"
    29092960)
    2910 xt "-90000,64600,-58000,65400"
    2911 st "SIGNAL wiz_data              : std_logic_vector(15 DOWNTO 0)
    2912 "
    2913 )
    2914 )
    2915 *77 (Net
     2961xt "-90000,65400,-58000,66200"
     2962st "SIGNAL wiz_data              : std_logic_vector(15 DOWNTO 0)"
     2963)
     2964)
     2965*78 (Net
    29162966uid 328,0
    29172967decl (Decl
     
    29272977font "Courier New,8,0"
    29282978)
    2929 xt "-90000,66200,-55000,67000"
    2930 st "SIGNAL wiz_rd                : std_logic                    := '1'
    2931 "
    2932 )
    2933 )
    2934 *78 (Net
     2979xt "-90000,67000,-55000,67800"
     2980st "SIGNAL wiz_rd                : std_logic                    := '1'"
     2981)
     2982)
     2983*79 (Net
    29352984uid 334,0
    29362985decl (Decl
     
    29462995font "Courier New,8,0"
    29472996)
    2948 xt "-90000,67800,-55000,68600"
    2949 st "SIGNAL wiz_wr                : std_logic                    := '1'
    2950 "
    2951 )
    2952 )
    2953 *79 (SaComponent
     2997xt "-90000,68600,-55000,69400"
     2998st "SIGNAL wiz_wr                : std_logic                    := '1'"
     2999)
     3000)
     3001*80 (SaComponent
    29543002uid 362,0
    29553003optionalChildren [
    2956 *80 (CptPort
     3004*81 (CptPort
    29573005uid 350,0
    29583006ps "OnEdgeStrategy"
     
    29903038)
    29913039)
    2992 *81 (CptPort
     3040*82 (CptPort
    29933041uid 354,0
    29943042ps "OnEdgeStrategy"
     
    30273075)
    30283076)
    3029 *82 (CptPort
     3077*83 (CptPort
    30303078uid 358,0
    30313079ps "OnEdgeStrategy"
     
    30813129stg "VerticalLayoutStrategy"
    30823130textVec [
    3083 *83 (Text
     3131*84 (Text
    30843132uid 365,0
    30853133va (VaSet
     
    30913139tm "BdLibraryNameMgr"
    30923140)
    3093 *84 (Text
     3141*85 (Text
    30943142uid 366,0
    30953143va (VaSet
     
    31013149tm "CptNameMgr"
    31023150)
    3103 *85 (Text
     3151*86 (Text
    31043152uid 367,0
    31053153va (VaSet
     
    31553203archFileType "UNKNOWN"
    31563204)
    3157 *86 (Net
     3205*87 (Net
    31583206uid 372,0
    31593207decl (Decl
     
    31703218)
    31713219xt "-90000,59000,-58500,59800"
    3172 st "SIGNAL sensor_cs             : std_logic_vector(3 DOWNTO 0)
    3173 "
    3174 )
    3175 )
    3176 *87 (Net
     3220st "SIGNAL sensor_cs             : std_logic_vector(3 DOWNTO 0)"
     3221)
     3222)
     3223*88 (Net
    31773224uid 378,0
    31783225decl (Decl
     
    31883235)
    31893236xt "-90000,58200,-68000,59000"
    3190 st "SIGNAL sclk                  : std_logic
    3191 "
    3192 )
    3193 )
    3194 *88 (Net
     3237st "SIGNAL sclk                  : std_logic"
     3238)
     3239)
     3240*89 (Net
    31953241uid 384,0
    31963242decl (Decl
     
    32083254)
    32093255xt "-90000,59800,-68000,60600"
    3210 st "SIGNAL sio                   : std_logic
    3211 "
    3212 )
    3213 )
    3214 *89 (SaComponent
     3256st "SIGNAL sio                   : std_logic"
     3257)
     3258)
     3259*90 (SaComponent
    32153260uid 414,0
    32163261optionalChildren [
    3217 *90 (CptPort
     3262*91 (CptPort
    32183263uid 410,0
    32193264ps "OnEdgeStrategy"
     
    32703315stg "VerticalLayoutStrategy"
    32713316textVec [
    3272 *91 (Text
     3317*92 (Text
    32733318uid 417,0
    32743319va (VaSet
     
    32803325tm "BdLibraryNameMgr"
    32813326)
    3282 *92 (Text
     3327*93 (Text
    32833328uid 418,0
    32843329va (VaSet
     
    32903335tm "CptNameMgr"
    32913336)
    3292 *93 (Text
     3337*94 (Text
    32933338uid 419,0
    32943339va (VaSet
     
    33503395archFileType "UNKNOWN"
    33513396)
    3352 *94 (Net
     3397*95 (Net
    33533398uid 424,0
    33543399decl (Decl
     
    33653410font "Courier New,8,0"
    33663411)
    3367 xt "-90000,60600,-68000,61400"
    3368 st "SIGNAL trigger               : std_logic
    3369 "
    3370 )
    3371 )
    3372 *95 (HdlText
     3412xt "-90000,61400,-68000,62200"
     3413st "SIGNAL trigger               : std_logic"
     3414)
     3415)
     3416*96 (HdlText
    33733417uid 430,0
    33743418optionalChildren [
    3375 *96 (EmbeddedText
     3419*97 (EmbeddedText
    33763420uid 436,0
    33773421commentText (CommentText
     
    33933437va (VaSet
    33943438)
    3395 xt "50200,45200,58200,49200"
     3439xt "50200,45200,60200,48200"
    33963440st "
    33973441-- eb_ID 1: hard-wired IDs
     
    34243468stg "VerticalLayoutStrategy"
    34253469textVec [
    3426 *97 (Text
     3470*98 (Text
    34273471uid 433,0
    34283472va (VaSet
     
    34343478tm "HdlTextNameMgr"
    34353479)
    3436 *98 (Text
     3480*99 (Text
    34373481uid 434,0
    34383482va (VaSet
     
    34603504viewiconposition 0
    34613505)
    3462 *99 (Net
     3506*100 (Net
    34633507uid 440,0
    34643508decl (Decl
     
    34773521)
    34783522xt "-90000,45400,-58500,46200"
    3479 st "SIGNAL board_id              : std_logic_vector(3 downto 0)
    3480 "
    3481 )
    3482 )
    3483 *100 (Net
     3523st "SIGNAL board_id              : std_logic_vector(3 downto 0)"
     3524)
     3525)
     3526*101 (Net
    34843527uid 448,0
    34853528decl (Decl
     
    34963539)
    34973540xt "-90000,47800,-58500,48600"
    3498 st "SIGNAL crate_id              : std_logic_vector(1 downto 0)
    3499 "
    3500 )
    3501 )
    3502 *101 (SaComponent
     3541st "SIGNAL crate_id              : std_logic_vector(1 downto 0)"
     3542)
     3543)
     3544*102 (SaComponent
    35033545uid 508,0
    35043546optionalChildren [
    3505 *102 (CptPort
     3547*103 (CptPort
    35063548uid 489,0
    35073549ps "OnEdgeStrategy"
     
    35393581)
    35403582)
    3541 *103 (CptPort
     3583*104 (CptPort
    35423584uid 493,0
    35433585ps "OnEdgeStrategy"
     
    35783620)
    35793621)
    3580 *104 (CptPort
     3622*105 (CptPort
    35813623uid 497,0
    35823624ps "OnEdgeStrategy"
     
    36163658)
    36173659)
    3618 *105 (CptPort
     3660*106 (CptPort
    36193661uid 501,0
    36203662ps "OnEdgeStrategy"
     
    36703712stg "VerticalLayoutStrategy"
    36713713textVec [
    3672 *106 (Text
     3714*107 (Text
    36733715uid 511,0
    36743716va (VaSet
     
    36803722tm "BdLibraryNameMgr"
    36813723)
    3682 *107 (Text
     3724*108 (Text
    36833725uid 512,0
    36843726va (VaSet
     
    36903732tm "CptNameMgr"
    36913733)
    3692 *108 (Text
     3734*109 (Text
    36933735uid 513,0
    36943736va (VaSet
     
    37443786archFileType "UNKNOWN"
    37453787)
    3746 *109 (HdlText
     3788*110 (HdlText
    37473789uid 518,0
    37483790optionalChildren [
    3749 *110 (EmbeddedText
     3791*111 (EmbeddedText
    37503792uid 524,0
    37513793commentText (CommentText
     
    37673809va (VaSet
    37683810)
    3769 xt "50200,57200,60900,67200"
     3811xt "50200,57200,62100,66200"
    37703812st "
    37713813-- eb_adc 2: ADC routing
     
    38043846stg "VerticalLayoutStrategy"
    38053847textVec [
    3806 *111 (Text
     3848*112 (Text
    38073849uid 521,0
    38083850va (VaSet
     
    38143856tm "HdlTextNameMgr"
    38153857)
    3816 *112 (Text
     3858*113 (Text
    38173859uid 522,0
    38183860va (VaSet
     
    38403882viewiconposition 0
    38413883)
    3842 *113 (Net
     3884*114 (Net
    38433885uid 528,0
    38443886decl (Decl
     
    38553897)
    38563898xt "-90000,42200,-58500,43000"
    3857 st "SIGNAL adc_otr_array         : std_logic_vector(3 DOWNTO 0)
    3858 "
    3859 )
    3860 )
    3861 *114 (Net
     3899st "SIGNAL adc_otr_array         : std_logic_vector(3 DOWNTO 0)"
     3900)
     3901)
     3902*115 (Net
    38623903uid 536,0
    38633904decl (Decl
     
    38733914)
    38743915xt "-90000,39800,-63000,40600"
    3875 st "SIGNAL adc_data_array        : adc_data_array_type
    3876 "
    3877 )
    3878 )
    3879 *115 (Net
     3916st "SIGNAL adc_data_array        : adc_data_array_type"
     3917)
     3918)
     3919*116 (Net
    38803920uid 544,0
    38813921decl (Decl
     
    38933933)
    38943934xt "-90000,40600,-68000,41400"
    3895 st "SIGNAL adc_oeb               : std_logic
    3896 "
    3897 )
    3898 )
    3899 *116 (Net
     3935st "SIGNAL adc_oeb               : std_logic"
     3936)
     3937)
     3938*117 (Net
    39003939uid 560,0
    39013940decl (Decl
     
    39133952)
    39143953xt "-90000,41400,-68000,42200"
    3915 st "SIGNAL adc_otr               : STD_LOGIC
    3916 "
    3917 )
    3918 )
    3919 *117 (Net
     3954st "SIGNAL adc_otr               : STD_LOGIC"
     3955)
     3956)
     3957*118 (Net
    39203958uid 568,0
    39213959decl (Decl
     
    39343972)
    39353973xt "-90000,39000,-58000,39800"
    3936 st "SIGNAL adc_data              : std_logic_vector(11 DOWNTO 0)
    3937 "
    3938 )
    3939 )
    3940 *118 (Net
     3974st "SIGNAL adc_data              : std_logic_vector(11 DOWNTO 0)"
     3975)
     3976)
     3977*119 (Net
    39413978uid 767,0
    39423979decl (Decl
     
    39523989font "Courier New,8,0"
    39533990)
    3954 xt "-90000,67000,-55000,67800"
    3955 st "SIGNAL wiz_reset             : std_logic                    := '1'
    3956 "
    3957 )
    3958 )
    3959 *119 (Net
     3991xt "-90000,67800,-55000,68600"
     3992st "SIGNAL wiz_reset             : std_logic                    := '1'"
     3993)
     3994)
     3995*120 (Net
    39603996uid 775,0
    39613997decl (Decl
     
    39744010)
    39754011xt "-90000,54200,-49000,55000"
    3976 st "SIGNAL led                   : std_logic_vector(7 DOWNTO 0) := (OTHERS => '0')
    3977 "
    3978 )
    3979 )
    3980 *120 (Net
     4012st "SIGNAL led                   : std_logic_vector(7 DOWNTO 0) := (OTHERS => '0')"
     4013)
     4014)
     4015*121 (Net
    39814016uid 783,0
    39824017decl (Decl
     
    39924027font "Courier New,8,0"
    39934028)
    3994 xt "-90000,63800,-55000,64600"
    3995 st "SIGNAL wiz_cs                : std_logic                    := '1'
    3996 "
    3997 )
    3998 )
    3999 *121 (Net
     4029xt "-90000,64600,-55000,65400"
     4030st "SIGNAL wiz_cs                : std_logic                    := '1'"
     4031)
     4032)
     4033*122 (Net
    40004034uid 791,0
    40014035decl (Decl
     
    40104044font "Courier New,8,0"
    40114045)
    4012 xt "-90000,65400,-68000,66200"
    4013 st "SIGNAL wiz_int               : std_logic
    4014 "
    4015 )
    4016 )
    4017 *122 (Net
     4046xt "-90000,66200,-68000,67000"
     4047st "SIGNAL wiz_int               : std_logic"
     4048)
     4049)
     4050*123 (Net
    40184051uid 799,0
    40194052decl (Decl
     
    40294062)
    40304063xt "-90000,48600,-68000,49400"
    4031 st "SIGNAL dac_cs                : std_logic
    4032 "
    4033 )
    4034 )
    4035 *123 (Net
     4064st "SIGNAL dac_cs                : std_logic"
     4065)
     4066)
     4067*124 (Net
    40364068uid 807,0
    40374069decl (Decl
     
    40484080)
    40494081xt "-90000,55800,-55000,56600"
    4050 st "SIGNAL mosi                  : std_logic                    := '0'
    4051 "
    4052 )
    4053 )
    4054 *124 (Net
     4082st "SIGNAL mosi                  : std_logic                    := '0'"
     4083)
     4084)
     4085*125 (Net
    40554086uid 815,0
    40564087decl (Decl
     
    40694100)
    40704101xt "-90000,51000,-41500,51800"
    4071 st "SIGNAL denable               : std_logic                    := '0' -- default domino wave off
    4072 "
    4073 )
    4074 )
    4075 *125 (Net
     4102st "SIGNAL denable               : std_logic                    := '0' -- default domino wave off"
     4103)
     4104)
     4105*126 (Net
    40764106uid 823,0
    40774107decl (Decl
     
    40874117)
    40884118xt "-90000,25400,-68000,26200"
    4089 st "SIGNAL CLK_25_PS             : std_logic
    4090 "
    4091 )
    4092 )
    4093 *126 (Net
     4119st "SIGNAL CLK_25_PS             : std_logic"
     4120)
     4121)
     4122*127 (Net
    40944123uid 831,0
    40954124decl (Decl
     
    41054134)
    41064135xt "-90000,26200,-68000,27000"
    4107 st "SIGNAL CLK_50                : std_logic
    4108 "
    4109 )
    4110 )
    4111 *127 (Net
     4136st "SIGNAL CLK_50                : std_logic"
     4137)
     4138)
     4139*128 (Net
    41124140uid 839,0
    41134141decl (Decl
     
    41254153)
    41264154xt "-90000,51800,-49000,52600"
    4127 st "SIGNAL drs_channel_id        : std_logic_vector(3 downto 0) := (others => '0')
    4128 "
    4129 )
    4130 )
    4131 *128 (Net
     4155st "SIGNAL drs_channel_id        : std_logic_vector(3 downto 0) := (others => '0')"
     4156)
     4157)
     4158*129 (Net
    41324159uid 847,0
    41334160decl (Decl
     
    41444171)
    41454172xt "-90000,52600,-55000,53400"
    4146 st "SIGNAL drs_dwrite            : std_logic                    := '1'
    4147 "
    4148 )
    4149 )
    4150 *129 (Net
     4173st "SIGNAL drs_dwrite            : std_logic                    := '1'"
     4174)
     4175)
     4176*130 (Net
    41514177uid 855,0
    41524178decl (Decl
     
    41634189)
    41644190xt "-90000,33400,-55000,34200"
    4165 st "SIGNAL RSRLOAD               : std_logic                    := '0'
    4166 "
    4167 )
    4168 )
    4169 *130 (Net
     4191st "SIGNAL RSRLOAD               : std_logic                    := '0'"
     4192)
     4193)
     4194*131 (Net
    41704195uid 863,0
    41714196decl (Decl
     
    41824207)
    41834208xt "-90000,34200,-55000,35000"
    4184 st "SIGNAL SRCLK                 : std_logic                    := '0'
    4185 "
    4186 )
    4187 )
    4188 *131 (Net
     4209st "SIGNAL SRCLK                 : std_logic                    := '0'"
     4210)
     4211)
     4212*132 (Net
    41894213uid 871,0
    41904214decl (Decl
     
    42004224)
    42014225xt "-90000,35800,-68000,36600"
    4202 st "SIGNAL SROUT_in_0            : std_logic
    4203 "
    4204 )
    4205 )
    4206 *132 (Net
     4226st "SIGNAL SROUT_in_0            : std_logic"
     4227)
     4228)
     4229*133 (Net
    42074230uid 879,0
    42084231decl (Decl
     
    42184241)
    42194242xt "-90000,36600,-68000,37400"
    4220 st "SIGNAL SROUT_in_1            : std_logic
    4221 "
    4222 )
    4223 )
    4224 *133 (Net
     4243st "SIGNAL SROUT_in_1            : std_logic"
     4244)
     4245)
     4246*134 (Net
    42254247uid 887,0
    42264248decl (Decl
     
    42364258)
    42374259xt "-90000,37400,-68000,38200"
    4238 st "SIGNAL SROUT_in_2            : std_logic
    4239 "
    4240 )
    4241 )
    4242 *134 (Net
     4260st "SIGNAL SROUT_in_2            : std_logic"
     4261)
     4262)
     4263*135 (Net
    42434264uid 895,0
    42444265decl (Decl
     
    42544275)
    42554276xt "-90000,38200,-68000,39000"
    4256 st "SIGNAL SROUT_in_3            : std_logic
    4257 "
    4258 )
    4259 )
    4260 *135 (Net
     4277st "SIGNAL SROUT_in_3            : std_logic"
     4278)
     4279)
     4280*136 (Net
    42614281uid 1435,0
    42624282decl (Decl
     
    42734293)
    42744294xt "-90000,35000,-55000,35800"
    4275 st "SIGNAL SRIN_out              : std_logic                    := '0'
    4276 "
    4277 )
    4278 )
    4279 *136 (Net
     4295st "SIGNAL SRIN_out              : std_logic                    := '0'"
     4296)
     4297)
     4298*137 (Net
    42804299uid 1443,0
    42814300decl (Decl
     
    42914310)
    42924311xt "-90000,44600,-68000,45400"
    4293 st "SIGNAL amber                 : std_logic
    4294 "
    4295 )
    4296 )
    4297 *137 (Net
     4312st "SIGNAL amber                 : std_logic"
     4313)
     4314)
     4315*138 (Net
    42984316uid 1451,0
    42994317decl (Decl
     
    43094327)
    43104328xt "-90000,57400,-68000,58200"
    4311 st "SIGNAL red                   : std_logic
    4312 "
    4313 )
    4314 )
    4315 *138 (Net
     4329st "SIGNAL red                   : std_logic"
     4330)
     4331)
     4332*139 (Net
    43164333uid 1459,0
    43174334decl (Decl
     
    43274344)
    43284345xt "-90000,53400,-68000,54200"
    4329 st "SIGNAL green                 : std_logic
    4330 "
    4331 )
    4332 )
    4333 *139 (Net
     4346st "SIGNAL green                 : std_logic"
     4347)
     4348)
     4349*140 (Net
    43344350uid 1467,0
    43354351decl (Decl
     
    43464362)
    43474363xt "-90000,47000,-58000,47800"
    4348 st "SIGNAL counter_result        : std_logic_vector(11 DOWNTO 0)
    4349 "
    4350 )
    4351 )
    4352 *140 (Net
     4364st "SIGNAL counter_result        : std_logic_vector(11 DOWNTO 0)"
     4365)
     4366)
     4367*141 (Net
    43534368uid 1475,0
    43544369decl (Decl
     
    43654380)
    43664381xt "-90000,43800,-68000,44600"
    4367 st "SIGNAL alarm_refclk_too_low  : std_logic
    4368 "
    4369 )
    4370 )
    4371 *141 (Net
     4382st "SIGNAL alarm_refclk_too_low  : std_logic"
     4383)
     4384)
     4385*142 (Net
    43724386uid 1483,0
    43734387decl (Decl
     
    43834397)
    43844398xt "-90000,43000,-68000,43800"
    4385 st "SIGNAL alarm_refclk_too_high : std_logic
    4386 "
    4387 )
    4388 )
    4389 *142 (HdlText
     4399st "SIGNAL alarm_refclk_too_high : std_logic"
     4400)
     4401)
     4402*143 (HdlText
    43904403uid 1491,0
    43914404optionalChildren [
    4392 *143 (EmbeddedText
     4405*144 (EmbeddedText
    43934406uid 1497,0
    43944407commentText (CommentText
     
    44104423va (VaSet
    44114424)
    4412 xt "27200,72200,40200,77200"
     4425xt "27200,72200,39400,77200"
    44134426st "
    44144427
     
    44454458stg "VerticalLayoutStrategy"
    44464459textVec [
    4447 *144 (Text
     4460*145 (Text
    44484461uid 1494,0
    44494462va (VaSet
     
    44554468tm "HdlTextNameMgr"
    44564469)
    4457 *145 (Text
     4470*146 (Text
    44584471uid 1495,0
    44594472va (VaSet
     
    44814494viewiconposition 0
    44824495)
    4483 *146 (Net
     4496*147 (Net
    44844497uid 1501,0
    44854498decl (Decl
     
    44964509)
    44974510xt "-90000,28600,-58500,29400"
    4498 st "SIGNAL D_T_in                : std_logic_vector(1 DOWNTO 0)
    4499 "
    4500 )
    4501 )
    4502 *147 (SaComponent
     4511st "SIGNAL D_T_in                : std_logic_vector(1 DOWNTO 0)"
     4512)
     4513)
     4514*148 (SaComponent
    45034515uid 1509,0
    45044516optionalChildren [
    4505 *148 (CptPort
     4517*149 (CptPort
    45064518uid 1519,0
    45074519ps "OnEdgeStrategy"
     
    45394551)
    45404552)
    4541 *149 (CptPort
     4553*150 (CptPort
    45424554uid 1523,0
    45434555ps "OnEdgeStrategy"
     
    45924604stg "VerticalLayoutStrategy"
    45934605textVec [
    4594 *150 (Text
     4606*151 (Text
    45954607uid 1512,0
    45964608va (VaSet
     
    46024614tm "BdLibraryNameMgr"
    46034615)
    4604 *151 (Text
     4616*152 (Text
    46054617uid 1513,0
    46064618va (VaSet
     
    46124624tm "CptNameMgr"
    46134625)
    4614 *152 (Text
     4626*153 (Text
    46154627uid 1514,0
    46164628va (VaSet
     
    46714683archFileType "UNKNOWN"
    46724684)
    4673 *153 (Net
     4685*154 (Net
    46744686uid 1559,0
    46754687decl (Decl
     
    46874699)
    46884700xt "-90000,56600,-29000,57400"
    4689 st "SIGNAL plllock_in            : std_logic_vector(3 DOWNTO 0) -- high level, if dominowave is running and DRS PLL locked
    4690 "
    4691 )
    4692 )
    4693 *154 (Net
     4701st "SIGNAL plllock_in            : std_logic_vector(3 DOWNTO 0) -- high level, if dominowave is running and DRS PLL locked"
     4702)
     4703)
     4704*155 (Net
    46944705uid 1682,0
    46954706lang 2
     
    47064717)
    47074718xt "-90000,24600,-68000,25400"
    4708 st "SIGNAL ADC_CLK               : std_logic
    4709 "
    4710 )
    4711 )
    4712 *155 (Net
     4719st "SIGNAL ADC_CLK               : std_logic"
     4720)
     4721)
     4722*156 (Net
    47134723uid 2001,0
    47144724decl (Decl
     
    47254735)
    47264736xt "-90000,32600,-55000,33400"
    4727 st "SIGNAL REF_CLK               : STD_LOGIC                    := '0'
    4728 "
    4729 )
    4730 )
    4731 *156 (SaComponent
     4737st "SIGNAL REF_CLK               : STD_LOGIC                    := '0'"
     4738)
     4739)
     4740*157 (SaComponent
    47324741uid 2336,0
    47334742optionalChildren [
    4734 *157 (CptPort
     4743*158 (CptPort
    47354744uid 2315,0
    47364745ps "OnEdgeStrategy"
     
    47694778)
    47704779)
    4771 *158 (CptPort
     4780*159 (CptPort
    47724781uid 2319,0
    47734782ps "OnEdgeStrategy"
     
    48074816)
    48084817)
    4809 *159 (CptPort
     4818*160 (CptPort
    48104819uid 2323,0
    48114820ps "OnEdgeStrategy"
     
    48434852)
    48444853)
    4845 *160 (CptPort
     4854*161 (CptPort
    48464855uid 2327,0
    48474856ps "OnEdgeStrategy"
     
    48794888)
    48804889)
    4881 *161 (CptPort
     4890*162 (CptPort
    48824891uid 2331,0
    48834892ps "OnEdgeStrategy"
     
    49154924)
    49164925)
    4917 *162 (CptPort
     4926*163 (CptPort
    49184927uid 2548,0
    49194928ps "OnEdgeStrategy"
     
    49664975stg "VerticalLayoutStrategy"
    49674976textVec [
    4968 *163 (Text
     4977*164 (Text
    49694978uid 2339,0
    49704979va (VaSet
     
    49764985tm "BdLibraryNameMgr"
    49774986)
    4978 *164 (Text
     4987*165 (Text
    49794988uid 2340,0
    49804989va (VaSet
     
    49864995tm "CptNameMgr"
    49874996)
    4988 *165 (Text
     4997*166 (Text
    49894998uid 2341,0
    49904999va (VaSet
     
    50335042archFileType "UNKNOWN"
    50345043)
    5035 *166 (Net
     5044*167 (Net
    50365045uid 2705,0
    50375046decl (Decl
     
    50475056)
    50485057xt "-90000,49400,-68000,50200"
    5049 st "SIGNAL debug_data_ram_empty  : std_logic
    5050 "
    5051 )
    5052 )
    5053 *167 (Net
     5058st "SIGNAL debug_data_ram_empty  : std_logic"
     5059)
     5060)
     5061*168 (Net
    50545062uid 2713,0
    50555063decl (Decl
     
    50655073)
    50665074xt "-90000,50200,-68000,51000"
    5067 st "SIGNAL debug_data_valid      : std_logic
    5068 "
    5069 )
    5070 )
    5071 *168 (Net
     5075st "SIGNAL debug_data_valid      : std_logic"
     5076)
     5077)
     5078*169 (Net
    50725079uid 2721,0
    50735080decl (Decl
     
    50875094xt "-90000,27000,-58500,28600"
    50885095st "-- for debugging
    5089 SIGNAL DG_state              : std_logic_vector(7 downto 0)
    5090 "
    5091 )
    5092 )
    5093 *169 (Net
     5096SIGNAL DG_state              : std_logic_vector(7 downto 0)"
     5097)
     5098)
     5099*170 (Net
    50945100uid 2729,0
    50955101decl (Decl
     
    51055111)
    51065112xt "-90000,30200,-68000,31000"
    5107 st "SIGNAL FTM_RS485_rx_en       : std_logic
    5108 "
    5109 )
    5110 )
    5111 *170 (Net
     5113st "SIGNAL FTM_RS485_rx_en       : std_logic"
     5114)
     5115)
     5116*171 (Net
    51125117uid 2737,0
    51135118decl (Decl
     
    51235128)
    51245129xt "-90000,31000,-68000,31800"
    5125 st "SIGNAL FTM_RS485_tx_d        : std_logic
    5126 "
    5127 )
    5128 )
    5129 *171 (Net
     5130st "SIGNAL FTM_RS485_tx_d        : std_logic"
     5131)
     5132)
     5133*172 (Net
    51305134uid 2745,0
    51315135decl (Decl
     
    51415145)
    51425146xt "-90000,31800,-68000,32600"
    5143 st "SIGNAL FTM_RS485_tx_en       : std_logic
    5144 "
    5145 )
    5146 )
    5147 *172 (Net
     5147st "SIGNAL FTM_RS485_tx_en       : std_logic"
     5148)
     5149)
     5150*173 (Net
    51485151uid 2753,0
    51495152lang 2
     
    51635166)
    51645167xt "-90000,55000,-33000,55800"
    5165 st "SIGNAL mem_manager_state     : std_logic_vector(3 DOWNTO 0) -- state is encoded here ... useful for debugging.
    5166 "
    5167 )
    5168 )
    5169 *173 (Net
     5168st "SIGNAL mem_manager_state     : std_logic_vector(3 DOWNTO 0) -- state is encoded here ... useful for debugging."
     5169)
     5170)
     5171*174 (Net
    51705172uid 2761,0
    51715173decl (Decl
     
    51815183font "Courier New,8,0"
    51825184)
    5183 xt "-90000,61400,-55000,62200"
    5184 st "SIGNAL trigger_veto          : std_logic                    := '1'
    5185 "
    5186 )
    5187 )
    5188 *174 (Net
     5185xt "-90000,62200,-55000,63000"
     5186st "SIGNAL trigger_veto          : std_logic                    := '1'"
     5187)
     5188)
     5189*175 (Net
    51895190uid 2769,0
    51905191decl (Decl
     
    52025203font "Courier New,8,0"
    52035204)
    5204 xt "-90000,62200,-33000,63000"
    5205 st "SIGNAL w5300_state           : std_logic_vector(7 DOWNTO 0) -- state is encoded here ... useful for debugging.
    5206 "
    5207 )
    5208 )
    5209 *175 (Net
     5205xt "-90000,63000,-33000,63800"
     5206st "SIGNAL w5300_state           : std_logic_vector(7 DOWNTO 0) -- state is encoded here ... useful for debugging."
     5207)
     5208)
     5209*176 (Net
    52105210uid 2777,0
    52115211decl (Decl
     
    52215221)
    52225222xt "-90000,29400,-68000,30200"
    5223 st "SIGNAL FTM_RS485_rx_d        : std_logic
     5223st "SIGNAL FTM_RS485_rx_d        : std_logic"
     5224)
     5225)
     5226*177 (Net
     5227uid 2942,0
     5228decl (Decl
     5229n "socket_tx_free_out"
     5230t "std_logic_vector"
     5231b "(16 DOWNTO 0)"
     5232eolc "-- 17bit value .. that's true"
     5233posAdd 0
     5234o 55
     5235suid 64,0
     5236)
     5237declText (MLText
     5238uid 2943,0
     5239va (VaSet
     5240font "Courier New,8,0"
     5241)
     5242xt "-90000,60600,-43000,61400"
     5243st "SIGNAL socket_tx_free_out    : std_logic_vector(16 DOWNTO 0) -- 17bit value .. that's true"
     5244)
     5245)
     5246*178 (SaComponent
     5247uid 3285,0
     5248optionalChildren [
     5249*179 (CptPort
     5250uid 3073,0
     5251ps "OnEdgeStrategy"
     5252shape (Triangle
     5253uid 3074,0
     5254ro 90
     5255va (VaSet
     5256vasetType 1
     5257fg "0,65535,0"
     5258)
     5259xt "168000,19625,168750,20375"
     5260)
     5261tg (CPTG
     5262uid 3075,0
     5263ps "CptPortTextPlaceStrategy"
     5264stg "RightVerticalLayoutStrategy"
     5265f (Text
     5266uid 3076,0
     5267va (VaSet
     5268)
     5269xt "163400,19500,167000,20500"
     5270st "wiz_reset"
     5271ju 2
     5272blo "167000,20300"
     5273)
     5274)
     5275thePort (LogicalPort
     5276m 1
     5277decl (Decl
     5278n "wiz_reset"
     5279t "std_logic"
     5280o 50
     5281suid 2,0
     5282i "'1'"
     5283)
     5284)
     5285)
     5286*180 (CptPort
     5287uid 3077,0
     5288ps "OnEdgeStrategy"
     5289shape (Triangle
     5290uid 3078,0
     5291ro 90
     5292va (VaSet
     5293vasetType 1
     5294fg "0,65535,0"
     5295)
     5296xt "168000,65625,168750,66375"
     5297)
     5298tg (CPTG
     5299uid 3079,0
     5300ps "CptPortTextPlaceStrategy"
     5301stg "RightVerticalLayoutStrategy"
     5302f (Text
     5303uid 3080,0
     5304va (VaSet
     5305)
     5306xt "163000,65500,167000,66500"
     5307st "led : (7:0)"
     5308ju 2
     5309blo "167000,66300"
     5310)
     5311)
     5312thePort (LogicalPort
     5313m 1
     5314decl (Decl
     5315n "led"
     5316t "std_logic_vector"
     5317b "(7 DOWNTO 0)"
     5318posAdd 0
     5319o 38
     5320suid 7,0
     5321i "(OTHERS => '0')"
     5322)
     5323)
     5324)
     5325*181 (CptPort
     5326uid 3081,0
     5327ps "OnEdgeStrategy"
     5328shape (Triangle
     5329uid 3082,0
     5330ro 90
     5331va (VaSet
     5332vasetType 1
     5333fg "0,65535,0"
     5334)
     5335xt "139250,27625,140000,28375"
     5336)
     5337tg (CPTG
     5338uid 3083,0
     5339ps "CptPortTextPlaceStrategy"
     5340stg "VerticalLayoutStrategy"
     5341f (Text
     5342uid 3084,0
     5343va (VaSet
     5344)
     5345xt "141000,27500,143800,28500"
     5346st "trigger"
     5347blo "141000,28300"
     5348)
     5349)
     5350thePort (LogicalPort
     5351decl (Decl
     5352n "trigger"
     5353t "std_logic"
     5354preAdd 0
     5355posAdd 0
     5356o 14
     5357suid 18,0
     5358)
     5359)
     5360)
     5361*182 (CptPort
     5362uid 3085,0
     5363ps "OnEdgeStrategy"
     5364shape (Triangle
     5365uid 3086,0
     5366ro 270
     5367va (VaSet
     5368vasetType 1
     5369fg "0,65535,0"
     5370)
     5371xt "139250,38625,140000,39375"
     5372)
     5373tg (CPTG
     5374uid 3087,0
     5375ps "CptPortTextPlaceStrategy"
     5376stg "VerticalLayoutStrategy"
     5377f (Text
     5378uid 3088,0
     5379va (VaSet
     5380)
     5381xt "141000,38500,144200,39500"
     5382st "adc_oeb"
     5383blo "141000,39300"
     5384)
     5385)
     5386thePort (LogicalPort
     5387m 1
     5388decl (Decl
     5389n "adc_oeb"
     5390t "std_logic"
     5391o 26
     5392suid 21,0
     5393i "'1'"
     5394)
     5395)
     5396)
     5397*183 (CptPort
     5398uid 3089,0
     5399ps "OnEdgeStrategy"
     5400shape (Triangle
     5401uid 3090,0
     5402ro 90
     5403va (VaSet
     5404vasetType 1
     5405fg "0,65535,0"
     5406)
     5407xt "139250,29625,140000,30375"
     5408)
     5409tg (CPTG
     5410uid 3091,0
     5411ps "CptPortTextPlaceStrategy"
     5412stg "VerticalLayoutStrategy"
     5413f (Text
     5414uid 3092,0
     5415va (VaSet
     5416)
     5417xt "141000,29500,146900,30500"
     5418st "board_id : (3:0)"
     5419blo "141000,30300"
     5420)
     5421)
     5422thePort (LogicalPort
     5423decl (Decl
     5424n "board_id"
     5425t "std_logic_vector"
     5426b "(3 DOWNTO 0)"
     5427o 10
     5428suid 24,0
     5429)
     5430)
     5431)
     5432*184 (CptPort
     5433uid 3093,0
     5434ps "OnEdgeStrategy"
     5435shape (Triangle
     5436uid 3094,0
     5437ro 90
     5438va (VaSet
     5439vasetType 1
     5440fg "0,65535,0"
     5441)
     5442xt "139250,30625,140000,31375"
     5443)
     5444tg (CPTG
     5445uid 3095,0
     5446ps "CptPortTextPlaceStrategy"
     5447stg "VerticalLayoutStrategy"
     5448f (Text
     5449uid 3096,0
     5450va (VaSet
     5451)
     5452xt "141000,30500,146700,31500"
     5453st "crate_id : (1:0)"
     5454blo "141000,31300"
     5455)
     5456)
     5457thePort (LogicalPort
     5458decl (Decl
     5459n "crate_id"
     5460t "std_logic_vector"
     5461b "(1 DOWNTO 0)"
     5462o 11
     5463suid 25,0
     5464)
     5465)
     5466)
     5467*185 (CptPort
     5468uid 3097,0
     5469ps "OnEdgeStrategy"
     5470shape (Triangle
     5471uid 3098,0
     5472ro 90
     5473va (VaSet
     5474vasetType 1
     5475fg "0,65535,0"
     5476)
     5477xt "168000,16625,168750,17375"
     5478)
     5479tg (CPTG
     5480uid 3099,0
     5481ps "CptPortTextPlaceStrategy"
     5482stg "RightVerticalLayoutStrategy"
     5483f (Text
     5484uid 3100,0
     5485va (VaSet
     5486)
     5487xt "161000,16500,167000,17500"
     5488st "wiz_addr : (9:0)"
     5489ju 2
     5490blo "167000,17300"
     5491)
     5492)
     5493thePort (LogicalPort
     5494m 1
     5495decl (Decl
     5496n "wiz_addr"
     5497t "std_logic_vector"
     5498b "(9 DOWNTO 0)"
     5499o 47
     5500suid 26,0
     5501)
     5502)
     5503)
     5504*186 (CptPort
     5505uid 3101,0
     5506ps "OnEdgeStrategy"
     5507shape (Diamond
     5508uid 3102,0
     5509ro 90
     5510va (VaSet
     5511vasetType 1
     5512fg "0,65535,0"
     5513)
     5514xt "168000,17625,168750,18375"
     5515)
     5516tg (CPTG
     5517uid 3103,0
     5518ps "CptPortTextPlaceStrategy"
     5519stg "RightVerticalLayoutStrategy"
     5520f (Text
     5521uid 3104,0
     5522va (VaSet
     5523)
     5524xt "160700,17500,167000,18500"
     5525st "wiz_data : (15:0)"
     5526ju 2
     5527blo "167000,18300"
     5528)
     5529)
     5530thePort (LogicalPort
     5531m 2
     5532decl (Decl
     5533n "wiz_data"
     5534t "std_logic_vector"
     5535b "(15 DOWNTO 0)"
     5536o 53
     5537suid 27,0
     5538)
     5539)
     5540)
     5541*187 (CptPort
     5542uid 3105,0
     5543ps "OnEdgeStrategy"
     5544shape (Triangle
     5545uid 3106,0
     5546ro 90
     5547va (VaSet
     5548vasetType 1
     5549fg "0,65535,0"
     5550)
     5551xt "168000,23625,168750,24375"
     5552)
     5553tg (CPTG
     5554uid 3107,0
     5555ps "CptPortTextPlaceStrategy"
     5556stg "RightVerticalLayoutStrategy"
     5557f (Text
     5558uid 3108,0
     5559va (VaSet
     5560)
     5561xt "164300,23500,167000,24500"
     5562st "wiz_cs"
     5563ju 2
     5564blo "167000,24300"
     5565)
     5566)
     5567thePort (LogicalPort
     5568m 1
     5569decl (Decl
     5570n "wiz_cs"
     5571t "std_logic"
     5572o 48
     5573suid 28,0
     5574i "'1'"
     5575)
     5576)
     5577)
     5578*188 (CptPort
     5579uid 3109,0
     5580ps "OnEdgeStrategy"
     5581shape (Triangle
     5582uid 3110,0
     5583ro 90
     5584va (VaSet
     5585vasetType 1
     5586fg "0,65535,0"
     5587)
     5588xt "168000,21625,168750,22375"
     5589)
     5590tg (CPTG
     5591uid 3111,0
     5592ps "CptPortTextPlaceStrategy"
     5593stg "RightVerticalLayoutStrategy"
     5594f (Text
     5595uid 3112,0
     5596va (VaSet
     5597)
     5598xt "164300,21500,167000,22500"
     5599st "wiz_wr"
     5600ju 2
     5601blo "167000,22300"
     5602)
     5603)
     5604thePort (LogicalPort
     5605m 1
     5606decl (Decl
     5607n "wiz_wr"
     5608t "std_logic"
     5609o 51
     5610suid 29,0
     5611i "'1'"
     5612)
     5613)
     5614)
     5615*189 (CptPort
     5616uid 3113,0
     5617ps "OnEdgeStrategy"
     5618shape (Triangle
     5619uid 3114,0
     5620ro 90
     5621va (VaSet
     5622vasetType 1
     5623fg "0,65535,0"
     5624)
     5625xt "168000,20625,168750,21375"
     5626)
     5627tg (CPTG
     5628uid 3115,0
     5629ps "CptPortTextPlaceStrategy"
     5630stg "RightVerticalLayoutStrategy"
     5631f (Text
     5632uid 3116,0
     5633va (VaSet
     5634)
     5635xt "164400,20500,167000,21500"
     5636st "wiz_rd"
     5637ju 2
     5638blo "167000,21300"
     5639)
     5640)
     5641thePort (LogicalPort
     5642m 1
     5643decl (Decl
     5644n "wiz_rd"
     5645t "std_logic"
     5646o 49
     5647suid 30,0
     5648i "'1'"
     5649)
     5650)
     5651)
     5652*190 (CptPort
     5653uid 3117,0
     5654ps "OnEdgeStrategy"
     5655shape (Triangle
     5656uid 3118,0
     5657ro 270
     5658va (VaSet
     5659vasetType 1
     5660fg "0,65535,0"
     5661)
     5662xt "168000,22625,168750,23375"
     5663)
     5664tg (CPTG
     5665uid 3119,0
     5666ps "CptPortTextPlaceStrategy"
     5667stg "RightVerticalLayoutStrategy"
     5668f (Text
     5669uid 3120,0
     5670va (VaSet
     5671)
     5672xt "164300,22500,167000,23500"
     5673st "wiz_int"
     5674ju 2
     5675blo "167000,23300"
     5676)
     5677)
     5678thePort (LogicalPort
     5679decl (Decl
     5680n "wiz_int"
     5681t "std_logic"
     5682o 15
     5683suid 31,0
     5684)
     5685)
     5686)
     5687*191 (CptPort
     5688uid 3121,0
     5689ps "OnEdgeStrategy"
     5690shape (Triangle
     5691uid 3122,0
     5692ro 270
     5693va (VaSet
     5694vasetType 1
     5695fg "0,65535,0"
     5696)
     5697xt "139250,18625,140000,19375"
     5698)
     5699tg (CPTG
     5700uid 3123,0
     5701ps "CptPortTextPlaceStrategy"
     5702stg "VerticalLayoutStrategy"
     5703f (Text
     5704uid 3124,0
     5705va (VaSet
     5706)
     5707xt "141000,18500,145500,19500"
     5708st "CLK_25_PS"
     5709blo "141000,19300"
     5710)
     5711)
     5712thePort (LogicalPort
     5713m 1
     5714decl (Decl
     5715n "CLK_25_PS"
     5716t "std_logic"
     5717o 17
     5718suid 35,0
     5719)
     5720)
     5721)
     5722*192 (CptPort
     5723uid 3125,0
     5724ps "OnEdgeStrategy"
     5725shape (Triangle
     5726uid 3126,0
     5727ro 270
     5728va (VaSet
     5729vasetType 1
     5730fg "0,65535,0"
     5731)
     5732xt "139250,17625,140000,18375"
     5733)
     5734tg (CPTG
     5735uid 3127,0
     5736ps "CptPortTextPlaceStrategy"
     5737stg "VerticalLayoutStrategy"
     5738f (Text
     5739uid 3128,0
     5740va (VaSet
     5741)
     5742xt "141000,17500,144100,18500"
     5743st "CLK_50"
     5744blo "141000,18300"
     5745)
     5746)
     5747thePort (LogicalPort
     5748m 1
     5749decl (Decl
     5750n "CLK_50"
     5751t "std_logic"
     5752preAdd 0
     5753posAdd 0
     5754o 18
     5755suid 37,0
     5756)
     5757)
     5758)
     5759*193 (CptPort
     5760uid 3129,0
     5761ps "OnEdgeStrategy"
     5762shape (Triangle
     5763uid 3130,0
     5764ro 90
     5765va (VaSet
     5766vasetType 1
     5767fg "0,65535,0"
     5768)
     5769xt "139250,16625,140000,17375"
     5770)
     5771tg (CPTG
     5772uid 3131,0
     5773ps "CptPortTextPlaceStrategy"
     5774stg "VerticalLayoutStrategy"
     5775f (Text
     5776uid 3132,0
     5777va (VaSet
     5778)
     5779xt "141000,16500,142900,17500"
     5780st "CLK"
     5781blo "141000,17300"
     5782)
     5783)
     5784thePort (LogicalPort
     5785decl (Decl
     5786n "CLK"
     5787t "std_logic"
     5788o 1
     5789suid 38,0
     5790)
     5791)
     5792)
     5793*194 (CptPort
     5794uid 3133,0
     5795ps "OnEdgeStrategy"
     5796shape (Triangle
     5797uid 3134,0
     5798ro 90
     5799va (VaSet
     5800vasetType 1
     5801fg "0,65535,0"
     5802)
     5803xt "139250,37625,140000,38375"
     5804)
     5805tg (CPTG
     5806uid 3135,0
     5807ps "CptPortTextPlaceStrategy"
     5808stg "VerticalLayoutStrategy"
     5809f (Text
     5810uid 3136,0
     5811va (VaSet
     5812)
     5813xt "141000,37500,149000,38500"
     5814st "adc_otr_array : (3:0)"
     5815blo "141000,38300"
     5816)
     5817)
     5818thePort (LogicalPort
     5819decl (Decl
     5820n "adc_otr_array"
     5821t "std_logic_vector"
     5822b "(3 DOWNTO 0)"
     5823o 9
     5824suid 40,0
     5825)
     5826)
     5827)
     5828*195 (CptPort
     5829uid 3137,0
     5830ps "OnEdgeStrategy"
     5831shape (Triangle
     5832uid 3138,0
     5833ro 90
     5834va (VaSet
     5835vasetType 1
     5836fg "0,65535,0"
     5837)
     5838xt "139250,43625,140000,44375"
     5839)
     5840tg (CPTG
     5841uid 3139,0
     5842ps "CptPortTextPlaceStrategy"
     5843stg "VerticalLayoutStrategy"
     5844f (Text
     5845uid 3140,0
     5846va (VaSet
     5847)
     5848xt "141000,43500,146900,44500"
     5849st "adc_data_array"
     5850blo "141000,44300"
     5851)
     5852)
     5853thePort (LogicalPort
     5854decl (Decl
     5855n "adc_data_array"
     5856t "adc_data_array_type"
     5857o 8
     5858suid 41,0
     5859)
     5860)
     5861)
     5862*196 (CptPort
     5863uid 3141,0
     5864ps "OnEdgeStrategy"
     5865shape (Triangle
     5866uid 3142,0
     5867ro 270
     5868va (VaSet
     5869vasetType 1
     5870fg "0,65535,0"
     5871)
     5872xt "139250,57625,140000,58375"
     5873)
     5874tg (CPTG
     5875uid 3143,0
     5876ps "CptPortTextPlaceStrategy"
     5877stg "VerticalLayoutStrategy"
     5878f (Text
     5879uid 3144,0
     5880va (VaSet
     5881)
     5882xt "141000,57500,149500,58500"
     5883st "drs_channel_id : (3:0)"
     5884blo "141000,58300"
     5885)
     5886)
     5887thePort (LogicalPort
     5888m 1
     5889decl (Decl
     5890n "drs_channel_id"
     5891t "std_logic_vector"
     5892b "(3 downto 0)"
     5893o 35
     5894suid 48,0
     5895i "(others => '0')"
     5896)
     5897)
     5898)
     5899*197 (CptPort
     5900uid 3145,0
     5901ps "OnEdgeStrategy"
     5902shape (Triangle
     5903uid 3146,0
     5904ro 270
     5905va (VaSet
     5906vasetType 1
     5907fg "0,65535,0"
     5908)
     5909xt "139250,62625,140000,63375"
     5910)
     5911tg (CPTG
     5912uid 3147,0
     5913ps "CptPortTextPlaceStrategy"
     5914stg "VerticalLayoutStrategy"
     5915f (Text
     5916uid 3148,0
     5917va (VaSet
     5918)
     5919xt "141000,62500,145300,63500"
     5920st "drs_dwrite"
     5921blo "141000,63300"
     5922)
     5923)
     5924thePort (LogicalPort
     5925m 1
     5926decl (Decl
     5927n "drs_dwrite"
     5928t "std_logic"
     5929o 36
     5930suid 49,0
     5931i "'1'"
     5932)
     5933)
     5934)
     5935*198 (CptPort
     5936uid 3149,0
     5937ps "OnEdgeStrategy"
     5938shape (Triangle
     5939uid 3150,0
     5940ro 90
     5941va (VaSet
     5942vasetType 1
     5943fg "0,65535,0"
     5944)
     5945xt "139250,53625,140000,54375"
     5946)
     5947tg (CPTG
     5948uid 3151,0
     5949ps "CptPortTextPlaceStrategy"
     5950stg "VerticalLayoutStrategy"
     5951f (Text
     5952uid 3152,0
     5953va (VaSet
     5954)
     5955xt "141000,53500,146400,54500"
     5956st "SROUT_in_0"
     5957blo "141000,54300"
     5958)
     5959)
     5960thePort (LogicalPort
     5961decl (Decl
     5962n "SROUT_in_0"
     5963t "std_logic"
     5964o 4
     5965suid 52,0
     5966)
     5967)
     5968)
     5969*199 (CptPort
     5970uid 3153,0
     5971ps "OnEdgeStrategy"
     5972shape (Triangle
     5973uid 3154,0
     5974ro 90
     5975va (VaSet
     5976vasetType 1
     5977fg "0,65535,0"
     5978)
     5979xt "139250,54625,140000,55375"
     5980)
     5981tg (CPTG
     5982uid 3155,0
     5983ps "CptPortTextPlaceStrategy"
     5984stg "VerticalLayoutStrategy"
     5985f (Text
     5986uid 3156,0
     5987va (VaSet
     5988)
     5989xt "141000,54500,146400,55500"
     5990st "SROUT_in_1"
     5991blo "141000,55300"
     5992)
     5993)
     5994thePort (LogicalPort
     5995decl (Decl
     5996n "SROUT_in_1"
     5997t "std_logic"
     5998o 5
     5999suid 53,0
     6000)
     6001)
     6002)
     6003*200 (CptPort
     6004uid 3157,0
     6005ps "OnEdgeStrategy"
     6006shape (Triangle
     6007uid 3158,0
     6008ro 90
     6009va (VaSet
     6010vasetType 1
     6011fg "0,65535,0"
     6012)
     6013xt "139250,55625,140000,56375"
     6014)
     6015tg (CPTG
     6016uid 3159,0
     6017ps "CptPortTextPlaceStrategy"
     6018stg "VerticalLayoutStrategy"
     6019f (Text
     6020uid 3160,0
     6021va (VaSet
     6022)
     6023xt "141000,55500,146400,56500"
     6024st "SROUT_in_2"
     6025blo "141000,56300"
     6026)
     6027)
     6028thePort (LogicalPort
     6029decl (Decl
     6030n "SROUT_in_2"
     6031t "std_logic"
     6032o 6
     6033suid 54,0
     6034)
     6035)
     6036)
     6037*201 (CptPort
     6038uid 3161,0
     6039ps "OnEdgeStrategy"
     6040shape (Triangle
     6041uid 3162,0
     6042ro 90
     6043va (VaSet
     6044vasetType 1
     6045fg "0,65535,0"
     6046)
     6047xt "139250,56625,140000,57375"
     6048)
     6049tg (CPTG
     6050uid 3163,0
     6051ps "CptPortTextPlaceStrategy"
     6052stg "VerticalLayoutStrategy"
     6053f (Text
     6054uid 3164,0
     6055va (VaSet
     6056)
     6057xt "141000,56500,146400,57500"
     6058st "SROUT_in_3"
     6059blo "141000,57300"
     6060)
     6061)
     6062thePort (LogicalPort
     6063decl (Decl
     6064n "SROUT_in_3"
     6065t "std_logic"
     6066o 7
     6067suid 55,0
     6068)
     6069)
     6070)
     6071*202 (CptPort
     6072uid 3165,0
     6073ps "OnEdgeStrategy"
     6074shape (Triangle
     6075uid 3166,0
     6076ro 270
     6077va (VaSet
     6078vasetType 1
     6079fg "0,65535,0"
     6080)
     6081xt "139250,59625,140000,60375"
     6082)
     6083tg (CPTG
     6084uid 3167,0
     6085ps "CptPortTextPlaceStrategy"
     6086stg "VerticalLayoutStrategy"
     6087f (Text
     6088uid 3168,0
     6089va (VaSet
     6090)
     6091xt "141000,59500,145200,60500"
     6092st "RSRLOAD"
     6093blo "141000,60300"
     6094)
     6095)
     6096thePort (LogicalPort
     6097m 1
     6098decl (Decl
     6099n "RSRLOAD"
     6100t "std_logic"
     6101o 23
     6102suid 56,0
     6103i "'0'"
     6104)
     6105)
     6106)
     6107*203 (CptPort
     6108uid 3169,0
     6109ps "OnEdgeStrategy"
     6110shape (Triangle
     6111uid 3170,0
     6112ro 270
     6113va (VaSet
     6114vasetType 1
     6115fg "0,65535,0"
     6116)
     6117xt "139250,60625,140000,61375"
     6118)
     6119tg (CPTG
     6120uid 3171,0
     6121ps "CptPortTextPlaceStrategy"
     6122stg "VerticalLayoutStrategy"
     6123f (Text
     6124uid 3172,0
     6125va (VaSet
     6126)
     6127xt "141000,60500,144000,61500"
     6128st "SRCLK"
     6129blo "141000,61300"
     6130)
     6131)
     6132thePort (LogicalPort
     6133m 1
     6134decl (Decl
     6135n "SRCLK"
     6136t "std_logic"
     6137o 24
     6138suid 57,0
     6139i "'0'"
     6140)
     6141)
     6142)
     6143*204 (CptPort
     6144uid 3173,0
     6145ps "OnEdgeStrategy"
     6146shape (Triangle
     6147uid 3174,0
     6148ro 90
     6149va (VaSet
     6150vasetType 1
     6151fg "0,65535,0"
     6152)
     6153xt "168000,46625,168750,47375"
     6154)
     6155tg (CPTG
     6156uid 3175,0
     6157ps "CptPortTextPlaceStrategy"
     6158stg "RightVerticalLayoutStrategy"
     6159f (Text
     6160uid 3176,0
     6161va (VaSet
     6162)
     6163xt "165300,46500,167000,47500"
     6164st "sclk"
     6165ju 2
     6166blo "167000,47300"
     6167)
     6168)
     6169thePort (LogicalPort
     6170m 1
     6171decl (Decl
     6172n "sclk"
     6173t "std_logic"
     6174o 42
     6175suid 62,0
     6176)
     6177)
     6178)
     6179*205 (CptPort
     6180uid 3177,0
     6181ps "OnEdgeStrategy"
     6182shape (Diamond
     6183uid 3178,0
     6184ro 90
     6185va (VaSet
     6186vasetType 1
     6187fg "0,65535,0"
     6188)
     6189xt "168000,47625,168750,48375"
     6190)
     6191tg (CPTG
     6192uid 3179,0
     6193ps "CptPortTextPlaceStrategy"
     6194stg "RightVerticalLayoutStrategy"
     6195f (Text
     6196uid 3180,0
     6197va (VaSet
     6198)
     6199xt "165600,47500,167000,48500"
     6200st "sio"
     6201ju 2
     6202blo "167000,48300"
     6203)
     6204)
     6205thePort (LogicalPort
     6206m 2
     6207decl (Decl
     6208n "sio"
     6209t "std_logic"
     6210preAdd 0
     6211posAdd 0
     6212o 52
     6213suid 63,0
     6214)
     6215)
     6216)
     6217*206 (CptPort
     6218uid 3181,0
     6219ps "OnEdgeStrategy"
     6220shape (Triangle
     6221uid 3182,0
     6222ro 90
     6223va (VaSet
     6224vasetType 1
     6225fg "0,65535,0"
     6226)
     6227xt "168000,35625,168750,36375"
     6228)
     6229tg (CPTG
     6230uid 3183,0
     6231ps "CptPortTextPlaceStrategy"
     6232stg "RightVerticalLayoutStrategy"
     6233f (Text
     6234uid 3184,0
     6235va (VaSet
     6236)
     6237xt "164200,35500,167000,36500"
     6238st "dac_cs"
     6239ju 2
     6240blo "167000,36300"
     6241)
     6242)
     6243thePort (LogicalPort
     6244m 1
     6245decl (Decl
     6246n "dac_cs"
     6247t "std_logic"
     6248o 31
     6249suid 64,0
     6250)
     6251)
     6252)
     6253*207 (CptPort
     6254uid 3185,0
     6255ps "OnEdgeStrategy"
     6256shape (Triangle
     6257uid 3186,0
     6258ro 90
     6259va (VaSet
     6260vasetType 1
     6261fg "0,65535,0"
     6262)
     6263xt "168000,37625,168750,38375"
     6264)
     6265tg (CPTG
     6266uid 3187,0
     6267ps "CptPortTextPlaceStrategy"
     6268stg "RightVerticalLayoutStrategy"
     6269f (Text
     6270uid 3188,0
     6271va (VaSet
     6272)
     6273xt "160500,37500,167000,38500"
     6274st "sensor_cs : (3:0)"
     6275ju 2
     6276blo "167000,38300"
     6277)
     6278)
     6279thePort (LogicalPort
     6280m 1
     6281decl (Decl
     6282n "sensor_cs"
     6283t "std_logic_vector"
     6284b "(3 DOWNTO 0)"
     6285o 43
     6286suid 65,0
     6287)
     6288)
     6289)
     6290*208 (CptPort
     6291uid 3189,0
     6292ps "OnEdgeStrategy"
     6293shape (Triangle
     6294uid 3190,0
     6295ro 90
     6296va (VaSet
     6297vasetType 1
     6298fg "0,65535,0"
     6299)
     6300xt "168000,48625,168750,49375"
     6301)
     6302tg (CPTG
     6303uid 3191,0
     6304ps "CptPortTextPlaceStrategy"
     6305stg "RightVerticalLayoutStrategy"
     6306f (Text
     6307uid 3192,0
     6308va (VaSet
     6309)
     6310xt "165000,48500,167000,49500"
     6311st "mosi"
     6312ju 2
     6313blo "167000,49300"
     6314)
     6315)
     6316thePort (LogicalPort
     6317m 1
     6318decl (Decl
     6319n "mosi"
     6320t "std_logic"
     6321o 40
     6322suid 66,0
     6323i "'0'"
     6324)
     6325)
     6326)
     6327*209 (CptPort
     6328uid 3193,0
     6329ps "OnEdgeStrategy"
     6330shape (Triangle
     6331uid 3194,0
     6332ro 270
     6333va (VaSet
     6334vasetType 1
     6335fg "0,65535,0"
     6336)
     6337xt "139250,61625,140000,62375"
     6338)
     6339tg (CPTG
     6340uid 3195,0
     6341ps "CptPortTextPlaceStrategy"
     6342stg "VerticalLayoutStrategy"
     6343f (Text
     6344uid 3196,0
     6345va (VaSet
     6346)
     6347xt "141000,61500,144000,62500"
     6348st "denable"
     6349blo "141000,62300"
     6350)
     6351)
     6352thePort (LogicalPort
     6353m 1
     6354decl (Decl
     6355n "denable"
     6356t "std_logic"
     6357eolc "-- default domino wave off"
     6358posAdd 0
     6359o 34
     6360suid 67,0
     6361i "'0'"
     6362)
     6363)
     6364)
     6365*210 (CptPort
     6366uid 3197,0
     6367ps "OnEdgeStrategy"
     6368shape (Triangle
     6369uid 3198,0
     6370ro 270
     6371va (VaSet
     6372vasetType 1
     6373fg "0,65535,0"
     6374)
     6375xt "139250,67625,140000,68375"
     6376)
     6377tg (CPTG
     6378uid 3199,0
     6379ps "CptPortTextPlaceStrategy"
     6380stg "VerticalLayoutStrategy"
     6381f (Text
     6382uid 3200,0
     6383va (VaSet
     6384)
     6385xt "141000,67500,144700,68500"
     6386st "SRIN_out"
     6387blo "141000,68300"
     6388)
     6389)
     6390thePort (LogicalPort
     6391m 1
     6392decl (Decl
     6393n "SRIN_out"
     6394t "std_logic"
     6395o 25
     6396suid 85,0
     6397i "'0'"
     6398)
     6399)
     6400)
     6401*211 (CptPort
     6402uid 3201,0
     6403ps "OnEdgeStrategy"
     6404shape (Triangle
     6405uid 3202,0
     6406ro 90
     6407va (VaSet
     6408vasetType 1
     6409fg "0,65535,0"
     6410)
     6411xt "168000,73625,168750,74375"
     6412)
     6413tg (CPTG
     6414uid 3203,0
     6415ps "CptPortTextPlaceStrategy"
     6416stg "RightVerticalLayoutStrategy"
     6417f (Text
     6418uid 3204,0
     6419va (VaSet
     6420)
     6421xt "164600,73500,167000,74500"
     6422st "green"
     6423ju 2
     6424blo "167000,74300"
     6425)
     6426)
     6427thePort (LogicalPort
     6428m 1
     6429decl (Decl
     6430n "green"
     6431t "std_logic"
     6432o 37
     6433suid 86,0
     6434)
     6435)
     6436)
     6437*212 (CptPort
     6438uid 3205,0
     6439ps "OnEdgeStrategy"
     6440shape (Triangle
     6441uid 3206,0
     6442ro 90
     6443va (VaSet
     6444vasetType 1
     6445fg "0,65535,0"
     6446)
     6447xt "168000,75625,168750,76375"
     6448)
     6449tg (CPTG
     6450uid 3207,0
     6451ps "CptPortTextPlaceStrategy"
     6452stg "RightVerticalLayoutStrategy"
     6453f (Text
     6454uid 3208,0
     6455va (VaSet
     6456)
     6457xt "164500,75500,167000,76500"
     6458st "amber"
     6459ju 2
     6460blo "167000,76300"
     6461)
     6462)
     6463thePort (LogicalPort
     6464m 1
     6465decl (Decl
     6466n "amber"
     6467t "std_logic"
     6468o 29
     6469suid 87,0
     6470)
     6471)
     6472)
     6473*213 (CptPort
     6474uid 3209,0
     6475ps "OnEdgeStrategy"
     6476shape (Triangle
     6477uid 3210,0
     6478ro 90
     6479va (VaSet
     6480vasetType 1
     6481fg "0,65535,0"
     6482)
     6483xt "168000,74625,168750,75375"
     6484)
     6485tg (CPTG
     6486uid 3211,0
     6487ps "CptPortTextPlaceStrategy"
     6488stg "RightVerticalLayoutStrategy"
     6489f (Text
     6490uid 3212,0
     6491va (VaSet
     6492)
     6493xt "165500,74500,167000,75500"
     6494st "red"
     6495ju 2
     6496blo "167000,75300"
     6497)
     6498)
     6499thePort (LogicalPort
     6500m 1
     6501decl (Decl
     6502n "red"
     6503t "std_logic"
     6504o 41
     6505suid 88,0
     6506)
     6507)
     6508)
     6509*214 (CptPort
     6510uid 3213,0
     6511ps "OnEdgeStrategy"
     6512shape (Triangle
     6513uid 3214,0
     6514ro 90
     6515va (VaSet
     6516vasetType 1
     6517fg "0,65535,0"
     6518)
     6519xt "139250,70625,140000,71375"
     6520)
     6521tg (CPTG
     6522uid 3215,0
     6523ps "CptPortTextPlaceStrategy"
     6524stg "VerticalLayoutStrategy"
     6525f (Text
     6526uid 3216,0
     6527va (VaSet
     6528)
     6529xt "141000,70500,146500,71500"
     6530st "D_T_in : (1:0)"
     6531blo "141000,71300"
     6532)
     6533)
     6534thePort (LogicalPort
     6535decl (Decl
     6536n "D_T_in"
     6537t "std_logic_vector"
     6538b "(1 DOWNTO 0)"
     6539o 2
     6540suid 91,0
     6541)
     6542)
     6543)
     6544*215 (CptPort
     6545uid 3217,0
     6546ps "OnEdgeStrategy"
     6547shape (Triangle
     6548uid 3218,0
     6549ro 90
     6550va (VaSet
     6551vasetType 1
     6552fg "0,65535,0"
     6553)
     6554xt "139250,71625,140000,72375"
     6555)
     6556tg (CPTG
     6557uid 3219,0
     6558ps "CptPortTextPlaceStrategy"
     6559stg "VerticalLayoutStrategy"
     6560f (Text
     6561uid 3220,0
     6562va (VaSet
     6563)
     6564xt "141000,71500,146100,72500"
     6565st "drs_refclk_in"
     6566blo "141000,72300"
     6567)
     6568)
     6569thePort (LogicalPort
     6570decl (Decl
     6571n "drs_refclk_in"
     6572t "std_logic"
     6573eolc "-- used to check if DRS REFCLK exsists, if not DENABLE inhibit"
     6574o 12
     6575suid 92,0
     6576)
     6577)
     6578)
     6579*216 (CptPort
     6580uid 3221,0
     6581ps "OnEdgeStrategy"
     6582shape (Triangle
     6583uid 3222,0
     6584ro 90
     6585va (VaSet
     6586vasetType 1
     6587fg "0,65535,0"
     6588)
     6589xt "139250,72625,140000,73375"
     6590)
     6591tg (CPTG
     6592uid 3223,0
     6593ps "CptPortTextPlaceStrategy"
     6594stg "VerticalLayoutStrategy"
     6595f (Text
     6596uid 3224,0
     6597va (VaSet
     6598)
     6599xt "141000,72500,147100,73500"
     6600st "plllock_in : (3:0)"
     6601blo "141000,73300"
     6602)
     6603)
     6604thePort (LogicalPort
     6605decl (Decl
     6606n "plllock_in"
     6607t "std_logic_vector"
     6608b "(3 DOWNTO 0)"
     6609eolc "-- high level, if dominowave is running and DRS PLL locked"
     6610o 13
     6611suid 93,0
     6612)
     6613)
     6614)
     6615*217 (CptPort
     6616uid 3225,0
     6617ps "OnEdgeStrategy"
     6618shape (Triangle
     6619uid 3226,0
     6620ro 90
     6621va (VaSet
     6622vasetType 1
     6623fg "0,65535,0"
     6624)
     6625xt "168000,72625,168750,73375"
     6626)
     6627tg (CPTG
     6628uid 3227,0
     6629ps "CptPortTextPlaceStrategy"
     6630stg "RightVerticalLayoutStrategy"
     6631f (Text
     6632uid 3228,0
     6633va (VaSet
     6634)
     6635xt "158400,72500,167000,73500"
     6636st "counter_result : (11:0)"
     6637ju 2
     6638blo "167000,73300"
     6639)
     6640)
     6641thePort (LogicalPort
     6642m 1
     6643decl (Decl
     6644n "counter_result"
     6645t "std_logic_vector"
     6646b "(11 DOWNTO 0)"
     6647o 30
     6648suid 94,0
     6649)
     6650)
     6651)
     6652*218 (CptPort
     6653uid 3229,0
     6654ps "OnEdgeStrategy"
     6655shape (Triangle
     6656uid 3230,0
     6657ro 90
     6658va (VaSet
     6659vasetType 1
     6660fg "0,65535,0"
     6661)
     6662xt "168000,69625,168750,70375"
     6663)
     6664tg (CPTG
     6665uid 3231,0
     6666ps "CptPortTextPlaceStrategy"
     6667stg "RightVerticalLayoutStrategy"
     6668f (Text
     6669uid 3232,0
     6670va (VaSet
     6671)
     6672xt "158400,69500,167000,70500"
     6673st "alarm_refclk_too_high"
     6674ju 2
     6675blo "167000,70300"
     6676)
     6677)
     6678thePort (LogicalPort
     6679m 1
     6680decl (Decl
     6681n "alarm_refclk_too_high"
     6682t "std_logic"
     6683o 27
     6684suid 95,0
     6685)
     6686)
     6687)
     6688*219 (CptPort
     6689uid 3233,0
     6690ps "OnEdgeStrategy"
     6691shape (Triangle
     6692uid 3234,0
     6693ro 90
     6694va (VaSet
     6695vasetType 1
     6696fg "0,65535,0"
     6697)
     6698xt "168000,70625,168750,71375"
     6699)
     6700tg (CPTG
     6701uid 3235,0
     6702ps "CptPortTextPlaceStrategy"
     6703stg "RightVerticalLayoutStrategy"
     6704f (Text
     6705uid 3236,0
     6706va (VaSet
     6707)
     6708xt "158800,70500,167000,71500"
     6709st "alarm_refclk_too_low"
     6710ju 2
     6711blo "167000,71300"
     6712)
     6713)
     6714thePort (LogicalPort
     6715m 1
     6716decl (Decl
     6717n "alarm_refclk_too_low"
     6718t "std_logic"
     6719posAdd 0
     6720o 28
     6721suid 96,0
     6722)
     6723)
     6724)
     6725*220 (CptPort
     6726uid 3237,0
     6727ps "OnEdgeStrategy"
     6728shape (Triangle
     6729uid 3238,0
     6730ro 270
     6731va (VaSet
     6732vasetType 1
     6733fg "0,65535,0"
     6734)
     6735xt "139250,19625,140000,20375"
     6736)
     6737tg (CPTG
     6738uid 3239,0
     6739ps "CptPortTextPlaceStrategy"
     6740stg "VerticalLayoutStrategy"
     6741f (Text
     6742uid 3240,0
     6743va (VaSet
     6744)
     6745xt "141000,19500,145000,20500"
     6746st "ADC_CLK"
     6747blo "141000,20300"
     6748)
     6749)
     6750thePort (LogicalPort
     6751lang 2
     6752m 1
     6753decl (Decl
     6754n "ADC_CLK"
     6755t "std_logic"
     6756o 16
     6757suid 97,0
     6758)
     6759)
     6760)
     6761*221 (CptPort
     6762uid 3241,0
     6763ps "OnEdgeStrategy"
     6764shape (Triangle
     6765uid 3242,0
     6766ro 90
     6767va (VaSet
     6768vasetType 1
     6769fg "0,65535,0"
     6770)
     6771xt "168000,83625,168750,84375"
     6772)
     6773tg (CPTG
     6774uid 3243,0
     6775ps "CptPortTextPlaceStrategy"
     6776stg "RightVerticalLayoutStrategy"
     6777f (Text
     6778uid 3244,0
     6779va (VaSet
     6780)
     6781xt "162100,83500,167000,84500"
     6782st "trigger_veto"
     6783ju 2
     6784blo "167000,84300"
     6785)
     6786)
     6787thePort (LogicalPort
     6788m 1
     6789decl (Decl
     6790n "trigger_veto"
     6791t "std_logic"
     6792o 45
     6793suid 98,0
     6794i "'1'"
     6795)
     6796)
     6797)
     6798*222 (CptPort
     6799uid 3245,0
     6800ps "OnEdgeStrategy"
     6801shape (Triangle
     6802uid 3246,0
     6803ro 90
     6804va (VaSet
     6805vasetType 1
     6806fg "0,65535,0"
     6807)
     6808xt "139250,73625,140000,74375"
     6809)
     6810tg (CPTG
     6811uid 3247,0
     6812ps "CptPortTextPlaceStrategy"
     6813stg "VerticalLayoutStrategy"
     6814f (Text
     6815uid 3248,0
     6816va (VaSet
     6817)
     6818xt "141000,73500,148000,74500"
     6819st "FTM_RS485_rx_d"
     6820blo "141000,74300"
     6821)
     6822)
     6823thePort (LogicalPort
     6824decl (Decl
     6825n "FTM_RS485_rx_d"
     6826t "std_logic"
     6827o 3
     6828suid 99,0
     6829)
     6830)
     6831)
     6832*223 (CptPort
     6833uid 3249,0
     6834ps "OnEdgeStrategy"
     6835shape (Triangle
     6836uid 3250,0
     6837ro 90
     6838va (VaSet
     6839vasetType 1
     6840fg "0,65535,0"
     6841)
     6842xt "168000,80625,168750,81375"
     6843)
     6844tg (CPTG
     6845uid 3251,0
     6846ps "CptPortTextPlaceStrategy"
     6847stg "RightVerticalLayoutStrategy"
     6848f (Text
     6849uid 3252,0
     6850va (VaSet
     6851)
     6852xt "160100,80500,167000,81500"
     6853st "FTM_RS485_tx_d"
     6854ju 2
     6855blo "167000,81300"
     6856)
     6857)
     6858thePort (LogicalPort
     6859m 1
     6860decl (Decl
     6861n "FTM_RS485_tx_d"
     6862t "std_logic"
     6863o 21
     6864suid 100,0
     6865)
     6866)
     6867)
     6868*224 (CptPort
     6869uid 3253,0
     6870ps "OnEdgeStrategy"
     6871shape (Triangle
     6872uid 3254,0
     6873ro 90
     6874va (VaSet
     6875vasetType 1
     6876fg "0,65535,0"
     6877)
     6878xt "168000,79625,168750,80375"
     6879)
     6880tg (CPTG
     6881uid 3255,0
     6882ps "CptPortTextPlaceStrategy"
     6883stg "RightVerticalLayoutStrategy"
     6884f (Text
     6885uid 3256,0
     6886va (VaSet
     6887)
     6888xt "159600,79500,167000,80500"
     6889st "FTM_RS485_rx_en"
     6890ju 2
     6891blo "167000,80300"
     6892)
     6893)
     6894thePort (LogicalPort
     6895m 1
     6896decl (Decl
     6897n "FTM_RS485_rx_en"
     6898t "std_logic"
     6899o 20
     6900suid 101,0
     6901)
     6902)
     6903)
     6904*225 (CptPort
     6905uid 3257,0
     6906ps "OnEdgeStrategy"
     6907shape (Triangle
     6908uid 3258,0
     6909ro 90
     6910va (VaSet
     6911vasetType 1
     6912fg "0,65535,0"
     6913)
     6914xt "168000,81625,168750,82375"
     6915)
     6916tg (CPTG
     6917uid 3259,0
     6918ps "CptPortTextPlaceStrategy"
     6919stg "RightVerticalLayoutStrategy"
     6920f (Text
     6921uid 3260,0
     6922va (VaSet
     6923)
     6924xt "159700,81500,167000,82500"
     6925st "FTM_RS485_tx_en"
     6926ju 2
     6927blo "167000,82300"
     6928)
     6929)
     6930thePort (LogicalPort
     6931m 1
     6932decl (Decl
     6933n "FTM_RS485_tx_en"
     6934t "std_logic"
     6935o 22
     6936suid 102,0
     6937)
     6938)
     6939)
     6940*226 (CptPort
     6941uid 3261,0
     6942ps "OnEdgeStrategy"
     6943shape (Triangle
     6944uid 3262,0
     6945ro 90
     6946va (VaSet
     6947vasetType 1
     6948fg "0,65535,0"
     6949)
     6950xt "168000,84625,168750,85375"
     6951)
     6952tg (CPTG
     6953uid 3263,0
     6954ps "CptPortTextPlaceStrategy"
     6955stg "RightVerticalLayoutStrategy"
     6956f (Text
     6957uid 3264,0
     6958va (VaSet
     6959)
     6960xt "159900,84500,167000,85500"
     6961st "w5300_state : (7:0)"
     6962ju 2
     6963blo "167000,85300"
     6964)
     6965)
     6966thePort (LogicalPort
     6967m 1
     6968decl (Decl
     6969n "w5300_state"
     6970t "std_logic_vector"
     6971b "(7 DOWNTO 0)"
     6972eolc "-- state is encoded here ... useful for debugging."
     6973posAdd 0
     6974o 46
     6975suid 103,0
     6976)
     6977)
     6978)
     6979*227 (CptPort
     6980uid 3265,0
     6981ps "OnEdgeStrategy"
     6982shape (Triangle
     6983uid 3266,0
     6984ro 90
     6985va (VaSet
     6986vasetType 1
     6987fg "0,65535,0"
     6988)
     6989xt "168000,76625,168750,77375"
     6990)
     6991tg (CPTG
     6992uid 3267,0
     6993ps "CptPortTextPlaceStrategy"
     6994stg "RightVerticalLayoutStrategy"
     6995f (Text
     6996uid 3268,0
     6997va (VaSet
     6998)
     6999xt "157900,76500,167000,77500"
     7000st "debug_data_ram_empty"
     7001ju 2
     7002blo "167000,77300"
     7003)
     7004)
     7005thePort (LogicalPort
     7006m 1
     7007decl (Decl
     7008n "debug_data_ram_empty"
     7009t "std_logic"
     7010o 32
     7011suid 104,0
     7012)
     7013)
     7014)
     7015*228 (CptPort
     7016uid 3269,0
     7017ps "OnEdgeStrategy"
     7018shape (Triangle
     7019uid 3270,0
     7020ro 90
     7021va (VaSet
     7022vasetType 1
     7023fg "0,65535,0"
     7024)
     7025xt "168000,77625,168750,78375"
     7026)
     7027tg (CPTG
     7028uid 3271,0
     7029ps "CptPortTextPlaceStrategy"
     7030stg "RightVerticalLayoutStrategy"
     7031f (Text
     7032uid 3272,0
     7033va (VaSet
     7034)
     7035xt "160400,77500,167000,78500"
     7036st "debug_data_valid"
     7037ju 2
     7038blo "167000,78300"
     7039)
     7040)
     7041thePort (LogicalPort
     7042m 1
     7043decl (Decl
     7044n "debug_data_valid"
     7045t "std_logic"
     7046o 33
     7047suid 105,0
     7048)
     7049)
     7050)
     7051*229 (CptPort
     7052uid 3273,0
     7053ps "OnEdgeStrategy"
     7054shape (Triangle
     7055uid 3274,0
     7056ro 90
     7057va (VaSet
     7058vasetType 1
     7059fg "0,65535,0"
     7060)
     7061xt "168000,82625,168750,83375"
     7062)
     7063tg (CPTG
     7064uid 3275,0
     7065ps "CptPortTextPlaceStrategy"
     7066stg "RightVerticalLayoutStrategy"
     7067f (Text
     7068uid 3276,0
     7069va (VaSet
     7070)
     7071xt "156600,82500,167000,83500"
     7072st "mem_manager_state : (3:0)"
     7073ju 2
     7074blo "167000,83300"
     7075)
     7076)
     7077thePort (LogicalPort
     7078lang 2
     7079m 1
     7080decl (Decl
     7081n "mem_manager_state"
     7082t "std_logic_vector"
     7083b "(3 DOWNTO 0)"
     7084eolc "-- state is encoded here ... useful for debugging."
     7085posAdd 0
     7086o 39
     7087suid 106,0
     7088)
     7089)
     7090)
     7091*230 (CptPort
     7092uid 3277,0
     7093ps "OnEdgeStrategy"
     7094shape (Triangle
     7095uid 3278,0
     7096ro 90
     7097va (VaSet
     7098vasetType 1
     7099fg "0,65535,0"
     7100)
     7101xt "168000,78625,168750,79375"
     7102)
     7103tg (CPTG
     7104uid 3279,0
     7105ps "CptPortTextPlaceStrategy"
     7106stg "RightVerticalLayoutStrategy"
     7107f (Text
     7108uid 3280,0
     7109va (VaSet
     7110)
     7111xt "160800,78500,167000,79500"
     7112st "DG_state : (7:0)"
     7113ju 2
     7114blo "167000,79300"
     7115)
     7116)
     7117thePort (LogicalPort
     7118m 1
     7119decl (Decl
     7120n "DG_state"
     7121t "std_logic_vector"
     7122b "(7 downto 0)"
     7123prec "-- for debugging"
     7124preAdd 0
     7125o 19
     7126suid 108,0
     7127)
     7128)
     7129)
     7130*231 (CptPort
     7131uid 3281,0
     7132ps "OnEdgeStrategy"
     7133shape (Triangle
     7134uid 3282,0
     7135ro 90
     7136va (VaSet
     7137vasetType 1
     7138fg "0,65535,0"
     7139)
     7140xt "168000,85625,168750,86375"
     7141)
     7142tg (CPTG
     7143uid 3283,0
     7144ps "CptPortTextPlaceStrategy"
     7145stg "RightVerticalLayoutStrategy"
     7146f (Text
     7147uid 3284,0
     7148va (VaSet
     7149)
     7150xt "157100,85500,167000,86500"
     7151st "socket_tx_free_out : (16:0)"
     7152ju 2
     7153blo "167000,86300"
     7154)
     7155)
     7156thePort (LogicalPort
     7157m 1
     7158decl (Decl
     7159n "socket_tx_free_out"
     7160t "std_logic_vector"
     7161b "(16 DOWNTO 0)"
     7162eolc "-- 17bit value .. that's true"
     7163posAdd 0
     7164o 44
     7165suid 109,0
     7166)
     7167)
     7168)
     7169]
     7170shape (Rectangle
     7171uid 3286,0
     7172va (VaSet
     7173vasetType 1
     7174fg "0,65535,0"
     7175lineColor "0,32896,0"
     7176lineWidth 2
     7177)
     7178xt "140000,15000,168000,87000"
     7179)
     7180oxt "15000,-8000,43000,80000"
     7181ttg (MlTextGroup
     7182uid 3287,0
     7183ps "CenterOffsetStrategy"
     7184stg "VerticalLayoutStrategy"
     7185textVec [
     7186*232 (Text
     7187uid 3288,0
     7188va (VaSet
     7189font "Arial,8,1"
     7190)
     7191xt "144200,80000,150400,81000"
     7192st "FACT_FAD_lib"
     7193blo "144200,80800"
     7194tm "BdLibraryNameMgr"
     7195)
     7196*233 (Text
     7197uid 3289,0
     7198va (VaSet
     7199font "Arial,8,1"
     7200)
     7201xt "144200,81000,154000,82000"
     7202st "FAD_main_with_w53002"
     7203blo "144200,81800"
     7204tm "CptNameMgr"
     7205)
     7206*234 (Text
     7207uid 3290,0
     7208va (VaSet
     7209font "Arial,8,1"
     7210)
     7211xt "144200,82000,145200,83000"
     7212st "I0"
     7213blo "144200,82800"
     7214tm "InstanceNameMgr"
     7215)
     7216]
     7217)
     7218ga (GenericAssociation
     7219uid 3291,0
     7220ps "EdgeToEdgeStrategy"
     7221matrix (Matrix
     7222uid 3292,0
     7223text (MLText
     7224uid 3293,0
     7225va (VaSet
     7226font "Courier New,8,0"
     7227)
     7228xt "142000,14200,162000,15000"
     7229st "RAMADDRWIDTH64b = 15    ( integer ) 
    52247230"
    52257231)
    5226 )
    5227 *176 (Wire
     7232header ""
     7233)
     7234elements [
     7235(GiElement
     7236name "RAMADDRWIDTH64b"
     7237type "integer"
     7238value "15"
     7239)
     7240]
     7241)
     7242viewicon (ZoomableIcon
     7243uid 3294,0
     7244sl 0
     7245va (VaSet
     7246vasetType 1
     7247fg "49152,49152,49152"
     7248)
     7249xt "140250,85250,141750,86750"
     7250iconName "BlockDiagram.png"
     7251iconMaskName "BlockDiagram.msk"
     7252ftype 1
     7253)
     7254viewiconposition 0
     7255portVis (PortSigDisplay
     7256)
     7257archFileType "UNKNOWN"
     7258)
     7259*235 (Wire
    52287260uid 286,0
    52297261shape (OrthoPolyLine
     
    52387270]
    52397271)
    5240 start &69
     7272start &70
    52417273end &27
    52427274sat 32
     
    52597291)
    52607292)
    5261 on &74
    5262 )
    5263 *177 (Wire
     7293on &75
     7294)
     7295*236 (Wire
    52647296uid 318,0
    52657297shape (OrthoPolyLine
     
    52767308)
    52777309start &19
    5278 end &157
     7310end &158
    52797311sat 32
    52807312eat 32
     
    52977329)
    52987330)
    5299 on &75
    5300 )
    5301 *178 (Wire
     7331on &76
     7332)
     7333*237 (Wire
    53027334uid 324,0
    53037335shape (OrthoPolyLine
     
    53147346)
    53157347start &20
    5316 end &158
     7348end &159
    53177349sat 32
    53187350eat 32
     
    53357367)
    53367368)
    5337 on &76
    5338 )
    5339 *179 (Wire
     7369on &77
     7370)
     7371*238 (Wire
    53407372uid 330,0
    53417373shape (OrthoPolyLine
     
    53517383)
    53527384start &23
    5353 end &159
     7385end &160
    53547386sat 32
    53557387eat 32
     
    53717403)
    53727404)
    5373 on &77
    5374 )
    5375 *180 (Wire
     7405on &78
     7406)
     7407*239 (Wire
    53767408uid 336,0
    53777409shape (OrthoPolyLine
     
    53877419)
    53887420start &22
    5389 end &160
     7421end &161
    53907422sat 32
    53917423eat 32
     
    54077439)
    54087440)
    5409 on &78
    5410 )
    5411 *181 (Wire
     7441on &79
     7442)
     7443*240 (Wire
    54127444uid 374,0
    54137445shape (OrthoPolyLine
     
    54267458)
    54277459start &41
    5428 end &82
     7460end &83
    54297461sat 32
    54307462eat 32
     
    54477479)
    54487480)
    5449 on &86
    5450 )
    5451 *182 (Wire
     7481on &87
     7482)
     7483*241 (Wire
    54527484uid 380,0
    54537485shape (OrthoPolyLine
     
    54637495)
    54647496start &38
    5465 end &80
     7497end &81
    54667498sat 32
    54677499eat 32
     
    54837515)
    54847516)
    5485 on &87
    5486 )
    5487 *183 (Wire
     7517on &88
     7518)
     7519*242 (Wire
    54887520uid 386,0
    54897521shape (OrthoPolyLine
     
    54997531)
    55007532start &39
    5501 end &81
     7533end &82
    55027534sat 32
    55037535eat 32
     
    55197551)
    55207552)
    5521 on &88
    5522 )
    5523 *184 (Wire
     7553on &89
     7554)
     7555*243 (Wire
    55247556uid 426,0
    55257557shape (OrthoPolyLine
     
    55347566]
    55357567)
    5536 start &90
     7568start &91
    55377569end &15
    55387570sat 32
     
    55547586)
    55557587)
    5556 on &94
    5557 )
    5558 *185 (Wire
     7588on &95
     7589)
     7590*244 (Wire
    55597591uid 442,0
    55607592shape (OrthoPolyLine
     
    55737605)
    55747606start &17
    5575 end &95
     7607end &96
    55767608sat 32
    55777609eat 2
     
    55947626)
    55957627)
    5596 on &99
    5597 )
    5598 *186 (Wire
     7628on &100
     7629)
     7630*245 (Wire
    55997631uid 450,0
    56007632shape (OrthoPolyLine
     
    56137645)
    56147646start &18
    5615 end &95
     7647end &96
    56167648sat 32
    56177649eat 2
     
    56347666)
    56357667)
    5636 on &100
    5637 )
    5638 *187 (Wire
     7668on &101
     7669)
     7670*246 (Wire
    56397671uid 530,0
    56407672shape (OrthoPolyLine
     
    56537685)
    56547686start &28
    5655 end &109
     7687end &110
    56567688sat 32
    56577689eat 2
     
    56747706)
    56757707)
    5676 on &113
    5677 )
    5678 *188 (Wire
     7708on &114
     7709)
     7710*247 (Wire
    56797711uid 538,0
    56807712shape (OrthoPolyLine
     
    56937725)
    56947726start &29
    5695 end &109
     7727end &110
    56967728sat 32
    56977729eat 2
     
    57147746)
    57157747)
    5716 on &114
    5717 )
    5718 *189 (Wire
     7748on &115
     7749)
     7750*248 (Wire
    57197751uid 546,0
    57207752shape (OrthoPolyLine
     
    57327764)
    57337765start &16
    5734 end &109
     7766end &110
    57357767sat 32
    57367768eat 1
     
    57527784)
    57537785)
    5754 on &115
    5755 )
    5756 *190 (Wire
     7786on &116
     7787)
     7788*249 (Wire
    57577789uid 554,0
    57587790shape (OrthoPolyLine
     
    57677799]
    57687800)
    5769 start &109
    5770 end &105
     7801start &110
     7802end &106
    57717803sat 2
    57727804eat 32
     
    57877819)
    57887820)
    5789 on &115
    5790 )
    5791 *191 (Wire
     7821on &116
     7822)
     7823*250 (Wire
    57927824uid 562,0
    57937825shape (OrthoPolyLine
     
    58027834]
    58037835)
    5804 start &104
    5805 end &109
     7836start &105
     7837end &110
    58067838sat 32
    58077839eat 1
     
    58227854)
    58237855)
    5824 on &116
    5825 )
    5826 *192 (Wire
     7856on &117
     7857)
     7858*251 (Wire
    58277859uid 570,0
    58287860shape (OrthoPolyLine
     
    58387870]
    58397871)
    5840 start &103
    5841 end &109
     7872start &104
     7873end &110
    58427874sat 32
    58437875eat 1
     
    58597891)
    58607892)
    5861 on &117
    5862 )
    5863 *193 (Wire
     7893on &118
     7894)
     7895*252 (Wire
    58647896uid 578,0
    58657897shape (OrthoPolyLine
     
    58747906]
    58757907)
    5876 start &102
     7908start &103
    58777909sat 32
    58787910eat 16
     
    58937925)
    58947926)
    5895 on &154
    5896 )
    5897 *194 (Wire
     7927on &155
     7928)
     7929*253 (Wire
    58987930uid 769,0
    58997931shape (OrthoPolyLine
     
    59287960)
    59297961)
    5930 on &118
    5931 )
    5932 *195 (Wire
     7962on &119
     7963)
     7964*254 (Wire
    59337965uid 777,0
    59347966shape (OrthoPolyLine
     
    59657997)
    59667998)
    5967 on &119
    5968 )
    5969 *196 (Wire
     7999on &120
     8000)
     8001*255 (Wire
    59708002uid 785,0
    59718003shape (OrthoPolyLine
     
    59818013)
    59828014start &21
    5983 end &162
     8015end &163
    59848016sat 32
    59858017eat 32
     
    60018033)
    60028034)
    6003 on &120
    6004 )
    6005 *197 (Wire
     8035on &121
     8036)
     8037*256 (Wire
    60068038uid 793,0
    60078039shape (OrthoPolyLine
     
    60168048]
    60178049)
    6018 start &161
     8050start &162
    60198051end &24
    60208052sat 32
     
    60378069)
    60388070)
    6039 on &121
    6040 )
    6041 *198 (Wire
     8071on &122
     8072)
     8073*257 (Wire
    60428074uid 801,0
    60438075shape (OrthoPolyLine
     
    60728104)
    60738105)
    6074 on &122
    6075 )
    6076 *199 (Wire
     8106on &123
     8107)
     8108*258 (Wire
    60778109uid 809,0
    60788110shape (OrthoPolyLine
     
    61078139)
    61088140)
    6109 on &123
    6110 )
    6111 *200 (Wire
     8141on &124
     8142)
     8143*259 (Wire
    61128144uid 817,0
    61138145shape (OrthoPolyLine
     
    61428174)
    61438175)
    6144 on &124
    6145 )
    6146 *201 (Wire
     8176on &125
     8177)
     8178*260 (Wire
    61478179uid 825,0
    61488180shape (OrthoPolyLine
     
    61778209)
    61788210)
    6179 on &125
    6180 )
    6181 *202 (Wire
     8211on &126
     8212)
     8213*261 (Wire
    61828214uid 833,0
    61838215shape (OrthoPolyLine
     
    62128244)
    62138245)
    6214 on &126
    6215 )
    6216 *203 (Wire
     8246on &127
     8247)
     8248*262 (Wire
    62178249uid 841,0
    62188250shape (OrthoPolyLine
     
    62498281)
    62508282)
    6251 on &127
    6252 )
    6253 *204 (Wire
     8283on &128
     8284)
     8285*263 (Wire
    62548286uid 849,0
    62558287shape (OrthoPolyLine
     
    62858317)
    62868318)
    6287 on &128
    6288 )
    6289 *205 (Wire
     8319on &129
     8320)
     8321*264 (Wire
    62908322uid 857,0
    62918323shape (OrthoPolyLine
     
    63208352)
    63218353)
    6322 on &129
    6323 )
    6324 *206 (Wire
     8354on &130
     8355)
     8356*265 (Wire
    63258357uid 865,0
    63268358shape (OrthoPolyLine
     
    63558387)
    63568388)
    6357 on &130
    6358 )
    6359 *207 (Wire
     8389on &131
     8390)
     8391*266 (Wire
    63608392uid 873,0
    63618393shape (OrthoPolyLine
     
    63908422)
    63918423)
    6392 on &131
    6393 )
    6394 *208 (Wire
     8424on &132
     8425)
     8426*267 (Wire
    63958427uid 881,0
    63968428shape (OrthoPolyLine
     
    64258457)
    64268458)
    6427 on &132
    6428 )
    6429 *209 (Wire
     8459on &133
     8460)
     8461*268 (Wire
    64308462uid 889,0
    64318463shape (OrthoPolyLine
     
    64608492)
    64618493)
    6462 on &133
    6463 )
    6464 *210 (Wire
     8494on &134
     8495)
     8496*269 (Wire
    64658497uid 897,0
    64668498shape (OrthoPolyLine
     
    64958527)
    64968528)
    6497 on &134
    6498 )
    6499 *211 (Wire
     8529on &135
     8530)
     8531*270 (Wire
    65008532uid 1437,0
    65018533shape (OrthoPolyLine
     
    65308562)
    65318563)
    6532 on &135
    6533 )
    6534 *212 (Wire
     8564on &136
     8565)
     8566*271 (Wire
    65358567uid 1445,0
    65368568shape (OrthoPolyLine
     
    65658597)
    65668598)
    6567 on &136
    6568 )
    6569 *213 (Wire
     8599on &137
     8600)
     8601*272 (Wire
    65708602uid 1453,0
    65718603shape (OrthoPolyLine
     
    66008632)
    66018633)
    6602 on &137
    6603 )
    6604 *214 (Wire
     8634on &138
     8635)
     8636*273 (Wire
    66058637uid 1461,0
    66068638shape (OrthoPolyLine
     
    66358667)
    66368668)
    6637 on &138
    6638 )
    6639 *215 (Wire
     8669on &139
     8670)
     8671*274 (Wire
    66408672uid 1469,0
    66418673shape (OrthoPolyLine
     
    66728704)
    66738705)
    6674 on &139
    6675 )
    6676 *216 (Wire
     8706on &140
     8707)
     8708*275 (Wire
    66778709uid 1477,0
    66788710shape (OrthoPolyLine
     
    67078739)
    67088740)
    6709 on &140
    6710 )
    6711 *217 (Wire
     8741on &141
     8742)
     8743*276 (Wire
    67128744uid 1485,0
    67138745shape (OrthoPolyLine
     
    67428774)
    67438775)
    6744 on &141
    6745 )
    6746 *218 (Wire
     8776on &142
     8777)
     8778*277 (Wire
    67478779uid 1503,0
    67488780shape (OrthoPolyLine
     
    67798811)
    67808812)
    6781 on &146
    6782 )
    6783 *219 (Wire
     8813on &147
     8814)
     8815*278 (Wire
    67848816uid 1529,0
    67858817shape (OrthoPolyLine
     
    67968828]
    67978829)
    6798 start &148
     8830start &149
    67998831end &49
    68008832sat 32
     
    68178849)
    68188850)
    6819 on &155
    6820 )
    6821 *220 (Wire
     8851on &156
     8852)
     8853*279 (Wire
    68228854uid 1533,0
    68238855shape (OrthoPolyLine
     
    68328864]
    68338865)
    6834 start &142
     8866start &143
    68358867sat 2
    68368868eat 16
     
    68528884)
    68538885)
    6854 on &146
    6855 )
    6856 *221 (Wire
     8886on &147
     8887)
     8888*280 (Wire
    68578889uid 1561,0
    68588890shape (OrthoPolyLine
     
    68898921)
    68908922)
    6891 on &153
    6892 )
    6893 *222 (Wire
     8923on &154
     8924)
     8925*281 (Wire
    68948926uid 1567,0
    68958927shape (OrthoPolyLine
     
    69048936]
    69058937)
    6906 start &142
     8938start &143
    69078939sat 2
    69088940eat 16
     
    69248956)
    69258957)
    6926 on &153
    6927 )
    6928 *223 (Wire
     8958on &154
     8959)
     8960*282 (Wire
    69298961uid 1684,0
    69308962shape (OrthoPolyLine
     
    69598991)
    69608992)
    6961 on &154
    6962 )
    6963 *224 (Wire
     8993on &155
     8994)
     8995*283 (Wire
    69648996uid 2707,0
    69658997shape (OrthoPolyLine
     
    69949026)
    69959027)
    6996 on &166
    6997 )
    6998 *225 (Wire
     9028on &167
     9029)
     9030*284 (Wire
    69999031uid 2715,0
    70009032shape (OrthoPolyLine
     
    70299061)
    70309062)
    7031 on &167
    7032 )
    7033 *226 (Wire
     9063on &168
     9064)
     9065*285 (Wire
    70349066uid 2723,0
    70359067shape (OrthoPolyLine
     
    70669098)
    70679099)
    7068 on &168
    7069 )
    7070 *227 (Wire
     9100on &169
     9101)
     9102*286 (Wire
    70719103uid 2731,0
    70729104shape (OrthoPolyLine
     
    71019133)
    71029134)
    7103 on &169
    7104 )
    7105 *228 (Wire
     9135on &170
     9136)
     9137*287 (Wire
    71069138uid 2739,0
    71079139shape (OrthoPolyLine
     
    71369168)
    71379169)
    7138 on &170
    7139 )
    7140 *229 (Wire
     9170on &171
     9171)
     9172*288 (Wire
    71419173uid 2747,0
    71429174shape (OrthoPolyLine
     
    71719203)
    71729204)
    7173 on &171
    7174 )
    7175 *230 (Wire
     9205on &172
     9206)
     9207*289 (Wire
    71769208uid 2755,0
    71779209shape (OrthoPolyLine
     
    72089240)
    72099241)
    7210 on &172
    7211 )
    7212 *231 (Wire
     9242on &173
     9243)
     9244*290 (Wire
    72139245uid 2763,0
    72149246shape (OrthoPolyLine
     
    72439275)
    72449276)
    7245 on &173
    7246 )
    7247 *232 (Wire
     9277on &174
     9278)
     9279*291 (Wire
    72489280uid 2771,0
    72499281shape (OrthoPolyLine
     
    72809312)
    72819313)
    7282 on &174
    7283 )
    7284 *233 (Wire
     9314on &175
     9315)
     9316*292 (Wire
    72859317uid 2779,0
    72869318shape (OrthoPolyLine
     
    73159347)
    73169348)
    7317 on &175
     9349on &176
     9350)
     9351*293 (Wire
     9352uid 2944,0
     9353shape (OrthoPolyLine
     9354uid 2945,0
     9355va (VaSet
     9356vasetType 3
     9357lineWidth 2
     9358)
     9359xt "109750,90000,124000,90000"
     9360pts [
     9361"109750,90000"
     9362"124000,90000"
     9363]
     9364)
     9365start &65
     9366sat 32
     9367eat 16
     9368sty 1
     9369st 0
     9370sf 1
     9371si 0
     9372tg (WTG
     9373uid 2948,0
     9374ps "ConnStartEndStrategy"
     9375stg "STSignalDisplayStrategy"
     9376f (Text
     9377uid 2949,0
     9378va (VaSet
     9379)
     9380xt "111000,89000,122900,90000"
     9381st "socket_tx_free_out : (16:0)"
     9382blo "111000,89800"
     9383tm "WireNameMgr"
     9384)
     9385)
     9386on &177
    73189387)
    73199388]
     
    73299398color "26368,26368,26368"
    73309399)
    7331 packageList *234 (PackageList
     9400packageList *294 (PackageList
    73329401uid 41,0
    73339402stg "VerticalLayoutStrategy"
    73349403textVec [
    7335 *235 (Text
     9404*295 (Text
    73369405uid 42,0
    73379406va (VaSet
     
    73429411blo "-87000,800"
    73439412)
    7344 *236 (MLText
     9413*296 (MLText
    73459414uid 43,0
    73469415va (VaSet
    73479416)
    7348 xt "-87000,1000,-70900,11000"
     9417xt "-87000,1000,-72500,11000"
    73499418st "LIBRARY ieee;
    73509419USE ieee.std_logic_1164.all;
     
    73659434stg "VerticalLayoutStrategy"
    73669435textVec [
    7367 *237 (Text
     9436*297 (Text
    73689437uid 45,0
    73699438va (VaSet
     
    73759444blo "20000,800"
    73769445)
    7377 *238 (Text
     9446*298 (Text
    73789447uid 46,0
    73799448va (VaSet
     
    73859454blo "20000,1800"
    73869455)
    7387 *239 (MLText
     9456*299 (MLText
    73889457uid 47,0
    73899458va (VaSet
    73909459isHidden 1
    73919460)
    7392 xt "20000,2000,28200,4000"
     9461xt "20000,2000,27500,4000"
    73939462st "`resetall
    73949463`timescale 1ns/10ps"
    73959464tm "BdCompilerDirectivesTextMgr"
    73969465)
    7397 *240 (Text
     9466*300 (Text
    73989467uid 48,0
    73999468va (VaSet
     
    74059474blo "20000,4800"
    74069475)
    7407 *241 (MLText
     9476*301 (MLText
    74089477uid 49,0
    74099478va (VaSet
     
    74139482tm "BdCompilerDirectivesTextMgr"
    74149483)
    7415 *242 (Text
     9484*302 (Text
    74169485uid 50,0
    74179486va (VaSet
     
    74239492blo "20000,5800"
    74249493)
    7425 *243 (MLText
     9494*303 (MLText
    74269495uid 51,0
    74279496va (VaSet
     
    74349503associable 1
    74359504)
    7436 windowSize "0,20,1681,1050"
    7437 viewArea "69198,38598,161304,96306"
    7438 cachedDiagramExtent "-92000,0,146000,98000"
     9505windowSize "0,0,1281,1024"
     9506viewArea "53418,13863,168802,105975"
     9507cachedDiagramExtent "-92000,0,168750,98000"
    74399508pageSetupInfo (PageSetupInfo
    74409509ptrCmd ""
     
    74489517hasePageBreakOrigin 1
    74499518pageBreakOrigin "-146000,0"
    7450 lastUid 2804,0
     9519lastUid 3294,0
    74519520defaultCommentText (CommentText
    74529521shape (Rectangle
     
    74639532fg "0,0,32768"
    74649533)
    7465 xt "200,200,2400,1200"
     9534xt "200,200,2000,1200"
    74669535st "
    74679536Text
     
    75109579stg "VerticalLayoutStrategy"
    75119580textVec [
    7512 *244 (Text
     9581*304 (Text
    75139582va (VaSet
    75149583font "Arial,8,1"
     
    75199588tm "BdLibraryNameMgr"
    75209589)
    7521 *245 (Text
     9590*305 (Text
    75229591va (VaSet
    75239592font "Arial,8,1"
     
    75289597tm "BlkNameMgr"
    75299598)
    7530 *246 (Text
     9599*306 (Text
    75319600va (VaSet
    75329601font "Arial,8,1"
     
    75799648stg "VerticalLayoutStrategy"
    75809649textVec [
    7581 *247 (Text
     9650*307 (Text
    75829651va (VaSet
    75839652font "Arial,8,1"
     
    75879656blo "550,4300"
    75889657)
    7589 *248 (Text
     9658*308 (Text
    75909659va (VaSet
    75919660font "Arial,8,1"
     
    75959664blo "550,5300"
    75969665)
    7597 *249 (Text
     9666*309 (Text
    75989667va (VaSet
    75999668font "Arial,8,1"
     
    76449713stg "VerticalLayoutStrategy"
    76459714textVec [
    7646 *250 (Text
     9715*310 (Text
    76479716va (VaSet
    76489717font "Arial,8,1"
     
    76539722tm "BdLibraryNameMgr"
    76549723)
    7655 *251 (Text
     9724*311 (Text
    76569725va (VaSet
    76579726font "Arial,8,1"
     
    76629731tm "CptNameMgr"
    76639732)
    7664 *252 (Text
     9733*312 (Text
    76659734va (VaSet
    76669735font "Arial,8,1"
     
    77169785stg "VerticalLayoutStrategy"
    77179786textVec [
    7718 *253 (Text
     9787*313 (Text
    77199788va (VaSet
    77209789font "Arial,8,1"
     
    77249793blo "500,4300"
    77259794)
    7726 *254 (Text
     9795*314 (Text
    77279796va (VaSet
    77289797font "Arial,8,1"
     
    77329801blo "500,5300"
    77339802)
    7734 *255 (Text
     9803*315 (Text
    77359804va (VaSet
    77369805font "Arial,8,1"
     
    77779846stg "VerticalLayoutStrategy"
    77789847textVec [
    7779 *256 (Text
     9848*316 (Text
    77809849va (VaSet
    77819850font "Arial,8,1"
     
    77859854blo "50,4300"
    77869855)
    7787 *257 (Text
     9856*317 (Text
    77889857va (VaSet
    77899858font "Arial,8,1"
     
    77939862blo "50,5300"
    77949863)
    7795 *258 (Text
     9864*318 (Text
    77969865va (VaSet
    77979866font "Arial,8,1"
     
    78349903stg "VerticalLayoutStrategy"
    78359904textVec [
    7836 *259 (Text
     9905*319 (Text
    78379906va (VaSet
    78389907font "Arial,8,1"
     
    78439912tm "HdlTextNameMgr"
    78449913)
    7845 *260 (Text
     9914*320 (Text
    78469915va (VaSet
    78479916font "Arial,8,1"
     
    78819950va (VaSet
    78829951)
    7883 xt "200,200,2400,1200"
     9952xt "200,200,2000,1200"
    78849953st "
    78859954Text
     
    821910288va (VaSet
    822010289)
    8221 xt "0,-1100,12900,-100"
     10290xt "0,-1100,12600,-100"
    822210291st "g0: FOR i IN 0 TO n GENERATE"
    822310292tm "FrameTitleTextMgr"
     
    824610315stg "VerticalLayoutStrategy"
    824710316textVec [
    8248 *261 (Text
     10317*321 (Text
    824910318va (VaSet
    825010319font "Arial,8,1"
     
    825410323blo "14100,20800"
    825510324)
    8256 *262 (MLText
     10325*322 (MLText
    825710326va (VaSet
    825810327)
     
    827910348va (VaSet
    828010349)
    8281 xt "0,-1100,7700,-100"
     10350xt "0,-1100,7400,-100"
    828210351st "b0: BLOCK (guard)"
    828310352tm "FrameTitleTextMgr"
     
    830610375stg "VerticalLayoutStrategy"
    830710376textVec [
    8308 *263 (Text
     10377*323 (Text
    830910378va (VaSet
    831010379font "Arial,8,1"
     
    831410383blo "14100,20800"
    831510384)
    8316 *264 (MLText
     10385*324 (MLText
    831710386va (VaSet
    831810387)
     
    845810527commonDM (CommonDM
    845910528ldm (LogicalDM
    8460 suid 62,0
     10529suid 64,0
    846110530usingSuid 1
    8462 emptyRow *265 (LEmptyRow
     10531emptyRow *325 (LEmptyRow
    846310532)
    846410533uid 54,0
    846510534optionalChildren [
    8466 *266 (RefLabelRowHdr
    8467 )
    8468 *267 (TitleRowHdr
    8469 )
    8470 *268 (FilterRowHdr
    8471 )
    8472 *269 (RefLabelColHdr
     10535*326 (RefLabelRowHdr
     10536)
     10537*327 (TitleRowHdr
     10538)
     10539*328 (FilterRowHdr
     10540)
     10541*329 (RefLabelColHdr
    847310542tm "RefLabelColHdrMgr"
    847410543)
    8475 *270 (RowExpandColHdr
     10544*330 (RowExpandColHdr
    847610545tm "RowExpandColHdrMgr"
    847710546)
    8478 *271 (GroupColHdr
     10547*331 (GroupColHdr
    847910548tm "GroupColHdrMgr"
    848010549)
    8481 *272 (NameColHdr
     10550*332 (NameColHdr
    848210551tm "BlockDiagramNameColHdrMgr"
    848310552)
    8484 *273 (ModeColHdr
     10553*333 (ModeColHdr
    848510554tm "BlockDiagramModeColHdrMgr"
    848610555)
    8487 *274 (TypeColHdr
     10556*334 (TypeColHdr
    848810557tm "BlockDiagramTypeColHdrMgr"
    848910558)
    8490 *275 (BoundsColHdr
     10559*335 (BoundsColHdr
    849110560tm "BlockDiagramBoundsColHdrMgr"
    849210561)
    8493 *276 (InitColHdr
     10562*336 (InitColHdr
    849410563tm "BlockDiagramInitColHdrMgr"
    849510564)
    8496 *277 (EolColHdr
     10565*337 (EolColHdr
    849710566tm "BlockDiagramEolColHdrMgr"
    849810567)
    8499 *278 (LeafLogPort
     10568*338 (LeafLogPort
    850010569port (LogicalPort
    850110570m 4
     
    851110580uid 340,0
    851210581)
    8513 *279 (LeafLogPort
     10582*339 (LeafLogPort
    851410583port (LogicalPort
    851510584m 4
     
    852410593uid 342,0
    852510594)
    8526 *280 (LeafLogPort
     10595*340 (LeafLogPort
    852710596port (LogicalPort
    852810597m 4
     
    853710606uid 344,0
    853810607)
    8539 *281 (LeafLogPort
     10608*341 (LeafLogPort
    854010609port (LogicalPort
    854110610m 4
     
    855010619uid 346,0
    855110620)
    8552 *282 (LeafLogPort
     10621*342 (LeafLogPort
    855310622port (LogicalPort
    855410623m 4
     
    856310632uid 348,0
    856410633)
    8565 *283 (LeafLogPort
     10634*343 (LeafLogPort
    856610635port (LogicalPort
    856710636m 4
     
    857610645uid 404,0
    857710646)
    8578 *284 (LeafLogPort
     10647*344 (LeafLogPort
    857910648port (LogicalPort
    858010649m 4
     
    858810657uid 406,0
    858910658)
    8590 *285 (LeafLogPort
     10659*345 (LeafLogPort
    859110660port (LogicalPort
    859210661m 4
     
    860210671uid 408,0
    860310672)
    8604 *286 (LeafLogPort
     10673*346 (LeafLogPort
    860510674port (LogicalPort
    860610675m 4
     
    861610685uid 456,0
    861710686)
    8618 *287 (LeafLogPort
     10687*347 (LeafLogPort
    861910688port (LogicalPort
    862010689m 4
     
    863110700uid 458,0
    863210701)
    8633 *288 (LeafLogPort
     10702*348 (LeafLogPort
    863410703port (LogicalPort
    863510704m 4
     
    864410713uid 460,0
    864510714)
    8646 *289 (LeafLogPort
     10715*349 (LeafLogPort
    864710716port (LogicalPort
    864810717m 4
     
    865710726uid 584,0
    865810727)
    8659 *290 (LeafLogPort
     10728*350 (LeafLogPort
    866010729port (LogicalPort
    866110730m 4
     
    866910738uid 586,0
    867010739)
    8671 *291 (LeafLogPort
     10740*351 (LeafLogPort
    867210741port (LogicalPort
    867310742m 4
     
    868310752uid 588,0
    868410753)
    8685 *292 (LeafLogPort
     10754*352 (LeafLogPort
    868610755port (LogicalPort
    868710756m 4
     
    869710766uid 590,0
    869810767)
    8699 *293 (LeafLogPort
     10768*353 (LeafLogPort
    870010769port (LogicalPort
    870110770m 4
     
    871210781uid 592,0
    871310782)
    8714 *294 (LeafLogPort
     10783*354 (LeafLogPort
    871510784port (LogicalPort
    871610785m 4
     
    872510794uid 903,0
    872610795)
    8727 *295 (LeafLogPort
     10796*355 (LeafLogPort
    872810797port (LogicalPort
    872910798m 4
     
    874010809uid 905,0
    874110810)
    8742 *296 (LeafLogPort
     10811*356 (LeafLogPort
    874310812port (LogicalPort
    874410813m 4
     
    875310822uid 907,0
    875410823)
    8755 *297 (LeafLogPort
     10824*357 (LeafLogPort
    875610825port (LogicalPort
    875710826m 4
     
    876510834uid 909,0
    876610835)
    8767 *298 (LeafLogPort
     10836*358 (LeafLogPort
    876810837port (LogicalPort
    876910838m 4
     
    877710846uid 911,0
    877810847)
    8779 *299 (LeafLogPort
     10848*359 (LeafLogPort
    878010849port (LogicalPort
    878110850m 4
     
    879010859uid 913,0
    879110860)
    8792 *300 (LeafLogPort
     10861*360 (LeafLogPort
    879310862port (LogicalPort
    879410863m 4
     
    880510874uid 915,0
    880610875)
    8807 *301 (LeafLogPort
     10876*361 (LeafLogPort
    880810877port (LogicalPort
    880910878m 4
     
    881710886uid 917,0
    881810887)
    8819 *302 (LeafLogPort
     10888*362 (LeafLogPort
    882010889port (LogicalPort
    882110890m 4
     
    882910898uid 919,0
    883010899)
    8831 *303 (LeafLogPort
     10900*363 (LeafLogPort
    883210901port (LogicalPort
    883310902m 4
     
    884310912uid 921,0
    884410913)
    8845 *304 (LeafLogPort
     10914*364 (LeafLogPort
    884610915port (LogicalPort
    884710916m 4
     
    885610925uid 923,0
    885710926)
    8858 *305 (LeafLogPort
     10927*365 (LeafLogPort
    885910928port (LogicalPort
    886010929m 4
     
    886910938uid 925,0
    887010939)
    8871 *306 (LeafLogPort
     10940*366 (LeafLogPort
    887210941port (LogicalPort
    887310942m 4
     
    888210951uid 927,0
    888310952)
    8884 *307 (LeafLogPort
     10953*367 (LeafLogPort
    888510954port (LogicalPort
    888610955m 4
     
    889410963uid 929,0
    889510964)
    8896 *308 (LeafLogPort
     10965*368 (LeafLogPort
    889710966port (LogicalPort
    889810967m 4
     
    890610975uid 931,0
    890710976)
    8908 *309 (LeafLogPort
     10977*369 (LeafLogPort
    890910978port (LogicalPort
    891010979m 4
     
    891810987uid 933,0
    891910988)
    8920 *310 (LeafLogPort
     10989*370 (LeafLogPort
    892110990port (LogicalPort
    892210991m 4
     
    893010999uid 935,0
    893111000)
    8932 *311 (LeafLogPort
     11001*371 (LeafLogPort
    893311002port (LogicalPort
    893411003m 4
     
    894311012uid 1541,0
    894411013)
    8945 *312 (LeafLogPort
     11014*372 (LeafLogPort
    894611015port (LogicalPort
    894711016m 4
     
    895511024uid 1543,0
    895611025)
    8957 *313 (LeafLogPort
     11026*373 (LeafLogPort
    895811027port (LogicalPort
    895911028m 4
     
    896711036uid 1545,0
    896811037)
    8969 *314 (LeafLogPort
     11038*374 (LeafLogPort
    897011039port (LogicalPort
    897111040m 4
     
    897911048uid 1547,0
    898011049)
    8981 *315 (LeafLogPort
     11050*375 (LeafLogPort
    898211051port (LogicalPort
    898311052m 4
     
    899211061uid 1549,0
    899311062)
    8994 *316 (LeafLogPort
     11063*376 (LeafLogPort
    899511064port (LogicalPort
    899611065m 4
     
    900511074uid 1551,0
    900611075)
    9007 *317 (LeafLogPort
     11076*377 (LeafLogPort
    900811077port (LogicalPort
    900911078m 4
     
    901711086uid 1553,0
    901811087)
    9019 *318 (LeafLogPort
     11088*378 (LeafLogPort
    902011089port (LogicalPort
    902111090m 4
     
    903011099uid 1555,0
    903111100)
    9032 *319 (LeafLogPort
     11101*379 (LeafLogPort
    903311102port (LogicalPort
    903411103m 4
     
    904411113uid 1575,0
    904511114)
    9046 *320 (LeafLogPort
     11115*380 (LeafLogPort
    904711116port (LogicalPort
    904811117lang 2
     
    905711126uid 1690,0
    905811127)
    9059 *321 (LeafLogPort
     11128*381 (LeafLogPort
    906011129port (LogicalPort
    906111130m 4
     
    907011139uid 2003,0
    907111140)
    9072 *322 (LeafLogPort
     11141*382 (LeafLogPort
    907311142port (LogicalPort
    907411143m 4
     
    908211151uid 2785,0
    908311152)
    9084 *323 (LeafLogPort
     11153*383 (LeafLogPort
    908511154port (LogicalPort
    908611155m 4
     
    909411163uid 2787,0
    909511164)
    9096 *324 (LeafLogPort
     11165*384 (LeafLogPort
    909711166port (LogicalPort
    909811167m 4
     
    910911178uid 2789,0
    911011179)
    9111 *325 (LeafLogPort
     11180*385 (LeafLogPort
    911211181port (LogicalPort
    911311182m 4
     
    912111190uid 2791,0
    912211191)
    9123 *326 (LeafLogPort
     11192*386 (LeafLogPort
    912411193port (LogicalPort
    912511194m 4
     
    913311202uid 2793,0
    913411203)
    9135 *327 (LeafLogPort
     11204*387 (LeafLogPort
    913611205port (LogicalPort
    913711206m 4
     
    914511214uid 2795,0
    914611215)
    9147 *328 (LeafLogPort
     11216*388 (LeafLogPort
    914811217port (LogicalPort
    914911218lang 2
     
    916111230uid 2797,0
    916211231)
    9163 *329 (LeafLogPort
     11232*389 (LeafLogPort
    916411233port (LogicalPort
    916511234m 4
     
    917411243uid 2799,0
    917511244)
    9176 *330 (LeafLogPort
     11245*390 (LeafLogPort
    917711246port (LogicalPort
    917811247m 4
     
    918911258uid 2801,0
    919011259)
    9191 *331 (LeafLogPort
     11260*391 (LeafLogPort
    919211261port (LogicalPort
    919311262m 4
     
    920011269)
    920111270uid 2803,0
     11271)
     11272*392 (LeafLogPort
     11273port (LogicalPort
     11274m 4
     11275decl (Decl
     11276n "socket_tx_free_out"
     11277t "std_logic_vector"
     11278b "(16 DOWNTO 0)"
     11279eolc "-- 17bit value .. that's true"
     11280posAdd 0
     11281o 55
     11282suid 64,0
     11283)
     11284)
     11285uid 2950,0
    920211286)
    920311287]
     
    920811292uid 67,0
    920911293optionalChildren [
    9210 *332 (Sheet
     11294*393 (Sheet
    921111295sheetRow (SheetRow
    921211296headerVa (MVa
     
    922511309font "Tahoma,10,0"
    922611310)
    9227 emptyMRCItem *333 (MRCItem
    9228 litem &265
    9229 pos 54
     11311emptyMRCItem *394 (MRCItem
     11312litem &325
     11313pos 55
    923011314dimension 20
    923111315)
    923211316uid 69,0
    923311317optionalChildren [
    9234 *334 (MRCItem
    9235 litem &266
     11318*395 (MRCItem
     11319litem &326
    923611320pos 0
    923711321dimension 20
    923811322uid 70,0
    923911323)
    9240 *335 (MRCItem
    9241 litem &267
     11324*396 (MRCItem
     11325litem &327
    924211326pos 1
    924311327dimension 23
    924411328uid 71,0
    924511329)
    9246 *336 (MRCItem
    9247 litem &268
     11330*397 (MRCItem
     11331litem &328
    924811332pos 2
    924911333hidden 1
     
    925111335uid 72,0
    925211336)
    9253 *337 (MRCItem
    9254 litem &278
     11337*398 (MRCItem
     11338litem &338
    925511339pos 0
    925611340dimension 20
    925711341uid 341,0
    925811342)
    9259 *338 (MRCItem
    9260 litem &279
     11343*399 (MRCItem
     11344litem &339
    926111345pos 1
    926211346dimension 20
    926311347uid 343,0
    926411348)
    9265 *339 (MRCItem
    9266 litem &280
     11349*400 (MRCItem
     11350litem &340
    926711351pos 2
    926811352dimension 20
    926911353uid 345,0
    927011354)
    9271 *340 (MRCItem
    9272 litem &281
     11355*401 (MRCItem
     11356litem &341
    927311357pos 3
    927411358dimension 20
    927511359uid 347,0
    927611360)
    9277 *341 (MRCItem
    9278 litem &282
     11361*402 (MRCItem
     11362litem &342
    927911363pos 4
    928011364dimension 20
    928111365uid 349,0
    928211366)
    9283 *342 (MRCItem
    9284 litem &283
     11367*403 (MRCItem
     11368litem &343
    928511369pos 5
    928611370dimension 20
    928711371uid 405,0
    928811372)
    9289 *343 (MRCItem
    9290 litem &284
     11373*404 (MRCItem
     11374litem &344
    929111375pos 6
    929211376dimension 20
    929311377uid 407,0
    929411378)
    9295 *344 (MRCItem
    9296 litem &285
     11379*405 (MRCItem
     11380litem &345
    929711381pos 7
    929811382dimension 20
    929911383uid 409,0
    930011384)
    9301 *345 (MRCItem
    9302 litem &286
     11385*406 (MRCItem
     11386litem &346
    930311387pos 8
    930411388dimension 20
    930511389uid 457,0
    930611390)
    9307 *346 (MRCItem
    9308 litem &287
     11391*407 (MRCItem
     11392litem &347
    930911393pos 9
    931011394dimension 20
    931111395uid 459,0
    931211396)
    9313 *347 (MRCItem
    9314 litem &288
     11397*408 (MRCItem
     11398litem &348
    931511399pos 10
    931611400dimension 20
    931711401uid 461,0
    931811402)
    9319 *348 (MRCItem
    9320 litem &289
     11403*409 (MRCItem
     11404litem &349
    932111405pos 11
    932211406dimension 20
    932311407uid 585,0
    932411408)
    9325 *349 (MRCItem
    9326 litem &290
     11409*410 (MRCItem
     11410litem &350
    932711411pos 12
    932811412dimension 20
    932911413uid 587,0
    933011414)
    9331 *350 (MRCItem
    9332 litem &291
     11415*411 (MRCItem
     11416litem &351
    933311417pos 13
    933411418dimension 20
    933511419uid 589,0
    933611420)
    9337 *351 (MRCItem
    9338 litem &292
     11421*412 (MRCItem
     11422litem &352
    933911423pos 14
    934011424dimension 20
    934111425uid 591,0
    934211426)
    9343 *352 (MRCItem
    9344 litem &293
     11427*413 (MRCItem
     11428litem &353
    934511429pos 15
    934611430dimension 20
    934711431uid 593,0
    934811432)
    9349 *353 (MRCItem
    9350 litem &294
     11433*414 (MRCItem
     11434litem &354
    935111435pos 16
    935211436dimension 20
    935311437uid 904,0
    935411438)
    9355 *354 (MRCItem
    9356 litem &295
     11439*415 (MRCItem
     11440litem &355
    935711441pos 17
    935811442dimension 20
    935911443uid 906,0
    936011444)
    9361 *355 (MRCItem
    9362 litem &296
     11445*416 (MRCItem
     11446litem &356
    936311447pos 18
    936411448dimension 20
    936511449uid 908,0
    936611450)
    9367 *356 (MRCItem
    9368 litem &297
     11451*417 (MRCItem
     11452litem &357
    936911453pos 19
    937011454dimension 20
    937111455uid 910,0
    937211456)
    9373 *357 (MRCItem
    9374 litem &298
     11457*418 (MRCItem
     11458litem &358
    937511459pos 20
    937611460dimension 20
    937711461uid 912,0
    937811462)
    9379 *358 (MRCItem
    9380 litem &299
     11463*419 (MRCItem
     11464litem &359
    938111465pos 21
    938211466dimension 20
    938311467uid 914,0
    938411468)
    9385 *359 (MRCItem
    9386 litem &300
     11469*420 (MRCItem
     11470litem &360
    938711471pos 22
    938811472dimension 20
    938911473uid 916,0
    939011474)
    9391 *360 (MRCItem
    9392 litem &301
     11475*421 (MRCItem
     11476litem &361
    939311477pos 23
    939411478dimension 20
    939511479uid 918,0
    939611480)
    9397 *361 (MRCItem
    9398 litem &302
     11481*422 (MRCItem
     11482litem &362
    939911483pos 24
    940011484dimension 20
    940111485uid 920,0
    940211486)
    9403 *362 (MRCItem
    9404 litem &303
     11487*423 (MRCItem
     11488litem &363
    940511489pos 25
    940611490dimension 20
    940711491uid 922,0
    940811492)
    9409 *363 (MRCItem
    9410 litem &304
     11493*424 (MRCItem
     11494litem &364
    941111495pos 26
    941211496dimension 20
    941311497uid 924,0
    941411498)
    9415 *364 (MRCItem
    9416 litem &305
     11499*425 (MRCItem
     11500litem &365
    941711501pos 27
    941811502dimension 20
    941911503uid 926,0
    942011504)
    9421 *365 (MRCItem
    9422 litem &306
     11505*426 (MRCItem
     11506litem &366
    942311507pos 28
    942411508dimension 20
    942511509uid 928,0
    942611510)
    9427 *366 (MRCItem
    9428 litem &307
     11511*427 (MRCItem
     11512litem &367
    942911513pos 29
    943011514dimension 20
    943111515uid 930,0
    943211516)
    9433 *367 (MRCItem
    9434 litem &308
     11517*428 (MRCItem
     11518litem &368
    943511519pos 30
    943611520dimension 20
    943711521uid 932,0
    943811522)
    9439 *368 (MRCItem
    9440 litem &309
     11523*429 (MRCItem
     11524litem &369
    944111525pos 31
    944211526dimension 20
    944311527uid 934,0
    944411528)
    9445 *369 (MRCItem
    9446 litem &310
     11529*430 (MRCItem
     11530litem &370
    944711531pos 32
    944811532dimension 20
    944911533uid 936,0
    945011534)
    9451 *370 (MRCItem
    9452 litem &311
     11535*431 (MRCItem
     11536litem &371
    945311537pos 33
    945411538dimension 20
    945511539uid 1542,0
    945611540)
    9457 *371 (MRCItem
    9458 litem &312
     11541*432 (MRCItem
     11542litem &372
    945911543pos 34
    946011544dimension 20
    946111545uid 1544,0
    946211546)
    9463 *372 (MRCItem
    9464 litem &313
     11547*433 (MRCItem
     11548litem &373
    946511549pos 35
    946611550dimension 20
    946711551uid 1546,0
    946811552)
    9469 *373 (MRCItem
    9470 litem &314
     11553*434 (MRCItem
     11554litem &374
    947111555pos 36
    947211556dimension 20
    947311557uid 1548,0
    947411558)
    9475 *374 (MRCItem
    9476 litem &315
     11559*435 (MRCItem
     11560litem &375
    947711561pos 37
    947811562dimension 20
    947911563uid 1550,0
    948011564)
    9481 *375 (MRCItem
    9482 litem &316
     11565*436 (MRCItem
     11566litem &376
    948311567pos 38
    948411568dimension 20
    948511569uid 1552,0
    948611570)
    9487 *376 (MRCItem
    9488 litem &317
     11571*437 (MRCItem
     11572litem &377
    948911573pos 39
    949011574dimension 20
    949111575uid 1554,0
    949211576)
    9493 *377 (MRCItem
    9494 litem &318
     11577*438 (MRCItem
     11578litem &378
    949511579pos 40
    949611580dimension 20
    949711581uid 1556,0
    949811582)
    9499 *378 (MRCItem
    9500 litem &319
     11583*439 (MRCItem
     11584litem &379
    950111585pos 41
    950211586dimension 20
    950311587uid 1576,0
    950411588)
    9505 *379 (MRCItem
    9506 litem &320
     11589*440 (MRCItem
     11590litem &380
    950711591pos 42
    950811592dimension 20
    950911593uid 1691,0
    951011594)
    9511 *380 (MRCItem
    9512 litem &321
     11595*441 (MRCItem
     11596litem &381
    951311597pos 43
    951411598dimension 20
    951511599uid 2004,0
    951611600)
    9517 *381 (MRCItem
    9518 litem &322
     11601*442 (MRCItem
     11602litem &382
    951911603pos 44
    952011604dimension 20
    952111605uid 2786,0
    952211606)
    9523 *382 (MRCItem
    9524 litem &323
     11607*443 (MRCItem
     11608litem &383
    952511609pos 45
    952611610dimension 20
    952711611uid 2788,0
    952811612)
    9529 *383 (MRCItem
    9530 litem &324
     11613*444 (MRCItem
     11614litem &384
    953111615pos 46
    953211616dimension 20
    953311617uid 2790,0
    953411618)
    9535 *384 (MRCItem
    9536 litem &325
     11619*445 (MRCItem
     11620litem &385
    953711621pos 47
    953811622dimension 20
    953911623uid 2792,0
    954011624)
    9541 *385 (MRCItem
    9542 litem &326
     11625*446 (MRCItem
     11626litem &386
    954311627pos 48
    954411628dimension 20
    954511629uid 2794,0
    954611630)
    9547 *386 (MRCItem
    9548 litem &327
     11631*447 (MRCItem
     11632litem &387
    954911633pos 49
    955011634dimension 20
    955111635uid 2796,0
    955211636)
    9553 *387 (MRCItem
    9554 litem &328
     11637*448 (MRCItem
     11638litem &388
    955511639pos 50
    955611640dimension 20
    955711641uid 2798,0
    955811642)
    9559 *388 (MRCItem
    9560 litem &329
     11643*449 (MRCItem
     11644litem &389
    956111645pos 51
    956211646dimension 20
    956311647uid 2800,0
    956411648)
    9565 *389 (MRCItem
    9566 litem &330
     11649*450 (MRCItem
     11650litem &390
    956711651pos 52
    956811652dimension 20
    956911653uid 2802,0
    957011654)
    9571 *390 (MRCItem
    9572 litem &331
     11655*451 (MRCItem
     11656litem &391
    957311657pos 53
    957411658dimension 20
    957511659uid 2804,0
     11660)
     11661*452 (MRCItem
     11662litem &392
     11663pos 54
     11664dimension 20
     11665uid 2951,0
    957611666)
    957711667]
     
    958611676uid 73,0
    958711677optionalChildren [
    9588 *391 (MRCItem
    9589 litem &269
     11678*453 (MRCItem
     11679litem &329
    959011680pos 0
    959111681dimension 20
    959211682uid 74,0
    959311683)
    9594 *392 (MRCItem
    9595 litem &271
     11684*454 (MRCItem
     11685litem &331
    959611686pos 1
    959711687dimension 50
    959811688uid 75,0
    959911689)
    9600 *393 (MRCItem
    9601 litem &272
     11690*455 (MRCItem
     11691litem &332
    960211692pos 2
    960311693dimension 100
    960411694uid 76,0
    960511695)
    9606 *394 (MRCItem
    9607 litem &273
     11696*456 (MRCItem
     11697litem &333
    960811698pos 3
    960911699dimension 50
    961011700uid 77,0
    961111701)
    9612 *395 (MRCItem
    9613 litem &274
     11702*457 (MRCItem
     11703litem &334
    961411704pos 4
    961511705dimension 100
    961611706uid 78,0
    961711707)
    9618 *396 (MRCItem
    9619 litem &275
     11708*458 (MRCItem
     11709litem &335
    962011710pos 5
    962111711dimension 100
    962211712uid 79,0
    962311713)
    9624 *397 (MRCItem
    9625 litem &276
     11714*459 (MRCItem
     11715litem &336
    962611716pos 6
    962711717dimension 50
    962811718uid 80,0
    962911719)
    9630 *398 (MRCItem
    9631 litem &277
     11720*460 (MRCItem
     11721litem &337
    963211722pos 7
    963311723dimension 80
     
    964911739genericsCommonDM (CommonDM
    965011740ldm (LogicalDM
    9651 emptyRow *399 (LEmptyRow
     11741emptyRow *461 (LEmptyRow
    965211742)
    965311743uid 83,0
    965411744optionalChildren [
    9655 *400 (RefLabelRowHdr
    9656 )
    9657 *401 (TitleRowHdr
    9658 )
    9659 *402 (FilterRowHdr
    9660 )
    9661 *403 (RefLabelColHdr
     11745*462 (RefLabelRowHdr
     11746)
     11747*463 (TitleRowHdr
     11748)
     11749*464 (FilterRowHdr
     11750)
     11751*465 (RefLabelColHdr
    966211752tm "RefLabelColHdrMgr"
    966311753)
    9664 *404 (RowExpandColHdr
     11754*466 (RowExpandColHdr
    966511755tm "RowExpandColHdrMgr"
    966611756)
    9667 *405 (GroupColHdr
     11757*467 (GroupColHdr
    966811758tm "GroupColHdrMgr"
    966911759)
    9670 *406 (NameColHdr
     11760*468 (NameColHdr
    967111761tm "GenericNameColHdrMgr"
    967211762)
    9673 *407 (TypeColHdr
     11763*469 (TypeColHdr
    967411764tm "GenericTypeColHdrMgr"
    967511765)
    9676 *408 (InitColHdr
     11766*470 (InitColHdr
    967711767tm "GenericValueColHdrMgr"
    967811768)
    9679 *409 (PragmaColHdr
     11769*471 (PragmaColHdr