Ignore:
Timestamp:
08/24/10 13:39:00 (14 years ago)
Author:
weitzel
Message:
overflow register implemented for FTU rate counter
File:
1 edited

Legend:

Unmodified
Added
Removed
  • firmware/FTU/FTU_top.vhd

    r9880 r9890  
    9797
    9898  --rate counter signals
    99   signal cntr_reset_sig : STD_LOGIC;  -- initialized in FTU_control 
    100   signal rate_array_sig : rate_array_type := (0,0,0,0,0);
    101   signal prescaling_sig : STD_LOGIC_VECTOR(7 downto 0);
     99  signal cntr_reset_sig : STD_LOGIC;  -- initialized in FTU_control
     100  signal rate_array_sig : rate_array_type;  -- initialized by counters
     101  signal prescaling_sig : STD_LOGIC_VECTOR(7 downto 0);  -- initialized in FTU_control 
    102102  signal overflow_array : STD_LOGIC_VECTOR(7 downto 0) := "00000000";
     103  signal new_rate_A_sig : STD_LOGIC;  -- initialized by patch A counter
     104  signal new_rate_B_sig : STD_LOGIC;  -- initialized by patch B counter
     105  signal new_rate_C_sig : STD_LOGIC;  -- initialized by patch C counter
     106  signal new_rate_D_sig : STD_LOGIC;  -- initialized by patch D counter
     107  signal new_rate_t_sig : STD_LOGIC;  -- initialized by trigger counter
     108  signal new_rates_sig  : STD_LOGIC := '0';
    103109 
    104110  signal clk_50M_sig   : STD_LOGIC;         -- generated by internal DCM
     
    133139      prescaling : in  std_logic_vector(7 downto 0);
    134140      counts     : out integer range 0 to 2**16 - 1;
    135       overflow   : out std_logic
     141      overflow   : out std_logic;
     142      new_rate   : out std_logic
    136143      );
    137144  end component;
     
    146153      ram_dob        : IN  STD_LOGIC_VECTOR(15 downto 0);
    147154      rate_array     : IN  rate_array_type;
     155      overflow_array : in  STD_LOGIC_VECTOR(7 downto 0);
     156      new_rates      : IN  std_logic;
    148157      reset          : OUT std_logic;
    149158      config_start   : OUT std_logic;
     
    206215  enables_D <= enable_array_sig(3)(8 downto 0);
    207216
     217  new_rates_sig <= new_rate_A_sig and new_rate_B_sig and new_rate_C_sig and new_rate_D_sig and new_rate_t_sig;
     218 
    208219  --differential input buffer for patch A
    209220  IBUFDS_LVDS_33_A : IBUFDS_LVDS_33
     
    261272      prescaling => prescaling_sig,
    262273      counts     => rate_array_sig(0),
    263       overflow   => overflow_array(0)
     274      overflow   => overflow_array(0),
     275      new_rate   => new_rate_A_sig
    264276    );
    265277
     
    271283      prescaling => prescaling_sig,
    272284      counts     => rate_array_sig(1),
    273       overflow   => overflow_array(1)
     285      overflow   => overflow_array(1),
     286      new_rate   => new_rate_B_sig
    274287    );
    275288
     
    281294      prescaling => prescaling_sig,
    282295      counts     => rate_array_sig(2),
    283       overflow   => overflow_array(2)
     296      overflow   => overflow_array(2),
     297      new_rate   => new_rate_C_sig
    284298    );
    285299
     
    291305      prescaling => prescaling_sig,
    292306      counts     => rate_array_sig(3),
    293       overflow   => overflow_array(3)
     307      overflow   => overflow_array(3),
     308      new_rate   => new_rate_D_sig
    294309    );
    295310
     
    301316      prescaling => prescaling_sig,
    302317      counts     => rate_array_sig(4),
    303       overflow   => overflow_array(4)
     318      overflow   => overflow_array(4),
     319      new_rate   => new_rate_t_sig
    304320    );
    305321 
     
    313329      ram_dob        => ram_dob_sig,
    314330      rate_array     => rate_array_sig,
     331      overflow_array => overflow_array,
     332      new_rates      => new_rates_sig,
    315333      reset          => reset_sig,
    316334      config_start   => config_start_sig,
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