Search:
Login
Preferences
Help/Guide
About Trac
Wiki
Timeline
Browse Source
View Tickets
Search
Context Navigation
←
Previous Change
Next Change
→
Changeset
156
for
FPGA
Timestamp:
02/03/10 13:59:50 (
15 years
ago)
Author:
qweitzel
Message:
First check-in of VHDL code for FTU: counters, dcm, spi
Location:
FPGA/FTU
Files:
14 added
FTU_dac_control.vhd
(added)
FTU_top_tb.vhd
(added)
counter
(added)
counter/upcnt16.vhd
(added)
counter/upcnt5.vhd
(added)
ip_cores
(added)
ip_cores/FTU_dac_dcm.vhd
(added)
ip_cores/FTU_dac_dcm_arwz.ucf
(added)
spi_interface
(added)
spi_interface/sck_logic_16.vhd
(added)
spi_interface/spi_control_sm_16.vhd
(added)
spi_interface/spi_interface_16.vhd
(added)
spi_interface/spi_rcv_shift_reg_16.vhd
(added)
spi_interface/spi_xmit_shift_reg_16.vhd
(added)
Note:
See
TracChangeset
for help on using the changeset viewer.
Download in other formats:
Unified Diff
Zip Archive