Changeset 9928 for firmware/FTU
- Timestamp:
- 09/16/10 17:07:04 (14 years ago)
- Location:
- firmware/FTU
- Files:
-
- 4 added
- 3 edited
-
FTU_top.vhd (modified) (3 diffs)
-
FTU_top_tb.vhd (modified) (5 diffs)
-
ftu_definitions.vhd (modified) (2 diffs)
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rs485/FTU_rs485_control.vhd (added)
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rs485/FTU_rs485_interface.vhd (added)
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rs485/FTU_rs485_interpreter.vhd (added)
-
rs485/FTU_rs485_receiver.vhd (added)
Legend:
- Unmodified
- Added
- Removed
-
firmware/FTU/FTU_top.vhd
r9911 r9928 27 27 library ftu_definitions; 28 28 USE ftu_definitions.ftu_array_types.all; 29 USE ftu_definitions.ftu_constants.all; 29 30 30 31 ---- Uncomment the following library declaration if instantiating … … 174 175 component FTU_spi_interface 175 176 port( 176 clk_50MHz : IN std_logic; 177 config_start : IN std_logic; 178 dac_array : IN dac_array_type; 179 config_ready : OUT std_logic; 180 config_started : OUT std_logic; 181 dac_cs : OUT std_logic; 182 mosi : OUT std_logic; 183 sclk : OUT std_logic 184 ); 185 end component; 186 177 clk_50MHz : IN std_logic; 178 config_start : IN std_logic; 179 dac_array : IN dac_array_type; 180 config_ready : OUT std_logic; 181 config_started : OUT std_logic; 182 dac_cs : OUT std_logic; 183 mosi : OUT std_logic; 184 sclk : OUT std_logic 185 ); 186 end component; 187 188 component FTU_rs485_control 189 port( 190 main_clk : IN std_logic; 191 brd_add : IN std_logic_vector(5 downto 0); 192 rx_d : IN std_logic; 193 rates_ready : IN std_logic; 194 DACs_ready : IN std_logic; 195 enables_ready : IN std_logic; 196 prescaling_ready : IN std_logic; 197 rate_array_rs485 : IN rate_array_type; 198 overflow_array_rs485_in : IN STD_LOGIC_VECTOR(7 downto 0); 199 dac_array_rs485_in : IN dac_array_type; 200 enable_array_rs485_in : IN enable_array_type; 201 prescaling_rs485_in : IN STD_LOGIC_VECTOR(7 downto 0); 202 rx_en : OUT std_logic; 203 tx_d : OUT std_logic; 204 tx_en : OUT std_logic; 205 new_DACs : OUT std_logic; 206 new_enables : OUT std_logic; 207 new_prescaling : OUT std_logic; 208 read_rates : OUT std_logic; 209 read_DACs : OUT std_logic; 210 read_enables : OUT std_logic; 211 read_prescaling : OUT std_logic; 212 --rs485_error : OUT std_logic; -- to be discussed! 213 dac_array_rs485_out : OUT dac_array_type; 214 enable_array_rs485_out : OUT enable_array_type; 215 prescaling_rs485_out : OUT STD_LOGIC_VECTOR(7 downto 0) 216 ); 217 end component; 218 187 219 component FTU_dual_port_ram 188 220 port( … … 362 394 ); 363 395 396 Inst_FTU_rs485_control : FTU_rs485_control 397 port map( 398 main_clk => clk_50M_sig, 399 brd_add => brd_add, 400 rx_d => rx, 401 rates_ready => '0', 402 DACs_ready => '0', 403 enables_ready => '0', 404 prescaling_ready => '0', 405 rate_array_rs485 => (0,0,0,0,0), 406 overflow_array_rs485_in => "00000000", 407 dac_array_rs485_in => DEFAULT_DAC, 408 enable_array_rs485_in => DEFAULT_ENABLE, 409 prescaling_rs485_in => conv_std_logic_vector(DEFAULT_PRESCALING,8), 410 rx_en => rx_en, 411 tx_d => tx, 412 tx_en => tx_en, 413 new_DACs => open, 414 new_enables => open, 415 new_prescaling => open, 416 read_rates => open, 417 read_DACs => open, 418 read_enables => open, 419 read_prescaling => open, 420 --rs485_error =>, -- to be discussed! 421 dac_array_rs485_out => open, 422 enable_array_rs485_out => open, 423 prescaling_rs485_out => open 424 ); 425 364 426 Inst_FTU_dual_port_ram : FTU_dual_port_ram 365 427 port map( -
firmware/FTU/FTU_top_tb.vhd
r9890 r9928 98 98 signal trig_prim_p : STD_LOGIC := '0'; 99 99 signal trig_prim_n : STD_LOGIC := '0'; 100 signal rx : STD_LOGIC := ' 0';100 signal rx : STD_LOGIC := '1'; 101 101 102 102 --Outputs … … 123 123 -- Clock period definitions 124 124 constant ext_clk_period : TIME := 20 ns; 125 125 constant baud_rate_period : TIME := 10 us; 126 126 127 begin 127 128 … … 205 206 stim_proc: process 206 207 begin 208 --------------------------------------------------------------------------- 207 209 -- FTU not yet initialized 210 --------------------------------------------------------------------------- 208 211 wait for 10us; 209 212 trigger_sig <= '1'; … … 218 221 wait for 5ns; 219 222 trigger_sig <= '0'; 223 --------------------------------------------------------------------------- 220 224 -- now FTU is initialized 225 --------------------------------------------------------------------------- 221 226 wait for 4us; 222 227 trigger_sig <= '1'; … … 231 236 wait for 5ns; 232 237 trigger_sig <= '0'; 238 --------------------------------------------------------------------------- 239 -- test now RS485 240 --------------------------------------------------------------------------- 241 wait for 100us; 242 rx <= '0'; --start bit 243 wait for baud_rate_period; 244 rx <= '0'; --start delimiter bit 0 245 wait for baud_rate_period; 246 rx <= '0'; --start delimiter bit 1 247 wait for baud_rate_period; 248 rx <= '0'; --start delimiter bit 2 249 wait for baud_rate_period; 250 rx <= '0'; --start delimiter bit 3 251 wait for baud_rate_period; 252 rx <= '0'; --start delimiter bit 4 253 wait for baud_rate_period; 254 rx <= '0'; --start delimiter bit 5 255 wait for baud_rate_period; 256 rx <= '1'; --start delimiter bit 6 257 wait for baud_rate_period; 258 rx <= '0'; --start delimiter bit 7 259 wait for baud_rate_period; 260 rx <= '1'; --stop bit 261 wait for baud_rate_period; 262 rx <= '1'; --stop bit 263 wait for baud_rate_period; 264 --------------------------------------------------------------------------- 265 wait for 1us; 266 rx <= '0'; --start bit 267 wait for baud_rate_period; 268 rx <= '0'; --FTU address bit 0 269 wait for baud_rate_period; 270 rx <= '0'; --FTU address bit 1 271 wait for baud_rate_period; 272 rx <= '0'; --FTU address bit 2 273 wait for baud_rate_period; 274 rx <= '0'; --FTU address bit 3 275 wait for baud_rate_period; 276 rx <= '0'; --FTU address bit 4 277 wait for baud_rate_period; 278 rx <= '0'; --FTU address bit 5 279 wait for baud_rate_period; 280 rx <= '0'; --FTU address bit 6 281 wait for baud_rate_period; 282 rx <= '0'; --FTU address bit 7 283 wait for baud_rate_period; 284 rx <= '1'; --stop bit 285 wait for baud_rate_period; 286 rx <= '1'; --stop bit 287 wait for baud_rate_period; 288 --------------------------------------------------------------------------- 289 wait for 10ns; 290 rx <= '0'; --start bit 291 wait for baud_rate_period; 292 rx <= '0'; --FTM address bit 0 293 wait for baud_rate_period; 294 rx <= '0'; --FTM address bit 1 295 wait for baud_rate_period; 296 rx <= '0'; --FTM address bit 2 297 wait for baud_rate_period; 298 rx <= '0'; --FTM address bit 3 299 wait for baud_rate_period; 300 rx <= '0'; --FTM address bit 4 301 wait for baud_rate_period; 302 rx <= '0'; --FTM address bit 5 303 wait for baud_rate_period; 304 rx <= '1'; --FTM address bit 6 305 wait for baud_rate_period; 306 rx <= '1'; --FTM address bit 7 307 wait for baud_rate_period; 308 rx <= '1'; --stop bit 309 wait for baud_rate_period; 310 rx <= '1'; --stop bit 311 wait for baud_rate_period; 312 --------------------------------------------------------------------------- 313 wait for 100ns; 314 rx <= '0'; --start bit 315 wait for baud_rate_period; 316 rx <= '0'; --instruction bit 0 317 wait for baud_rate_period; 318 rx <= '1'; --instruction bit 1 319 wait for baud_rate_period; 320 rx <= '0'; --instruction bit 2 321 wait for baud_rate_period; 322 rx <= '0'; --instruction bit 3 323 wait for baud_rate_period; 324 rx <= '0'; --instruction bit 4 325 wait for baud_rate_period; 326 rx <= '0'; --instruction bit 5 327 wait for baud_rate_period; 328 rx <= '0'; --instruction bit 6 329 wait for baud_rate_period; 330 rx <= '0'; --instruction bit 7 331 wait for baud_rate_period; 332 rx <= '1'; --stop bit 333 wait for baud_rate_period; 334 rx <= '1'; --stop bit 335 wait for baud_rate_period; 336 --------------------------------------------------------------------------- 337 wait for 200us; 338 rx <= '0'; --start bit 339 wait for baud_rate_period; 340 rx <= '0'; --data1 bit 0 341 wait for baud_rate_period; 342 rx <= '0'; --data1 bit 1 343 wait for baud_rate_period; 344 rx <= '0'; --data1 bit 2 345 wait for baud_rate_period; 346 rx <= '0'; --data1 bit 3 347 wait for baud_rate_period; 348 rx <= '0'; --data1 bit 4 349 wait for baud_rate_period; 350 rx <= '0'; --data1 bit 5 351 wait for baud_rate_period; 352 rx <= '0'; --data1 bit 6 353 wait for baud_rate_period; 354 rx <= '0'; --data1 bit 7 355 wait for baud_rate_period; 356 rx <= '1'; --stop bit 357 wait for baud_rate_period; 358 rx <= '1'; --stop bit 359 wait for baud_rate_period; 360 --------------------------------------------------------------------------- 361 wait for 100ns; 362 rx <= '0'; --start bit 363 wait for baud_rate_period; 364 rx <= '0'; --data2 bit 0 365 wait for baud_rate_period; 366 rx <= '0'; --data2 bit 1 367 wait for baud_rate_period; 368 rx <= '0'; --data2 bit 2 369 wait for baud_rate_period; 370 rx <= '0'; --data2 bit 3 371 wait for baud_rate_period; 372 rx <= '0'; --data2 bit 4 373 wait for baud_rate_period; 374 rx <= '0'; --data2 bit 5 375 wait for baud_rate_period; 376 rx <= '0'; --data2 bit 6 377 wait for baud_rate_period; 378 rx <= '0'; --data2 bit 7 379 wait for baud_rate_period; 380 rx <= '1'; --stop bit 381 wait for baud_rate_period; 382 rx <= '1'; --stop bit 383 wait for baud_rate_period; 384 --------------------------------------------------------------------------- 385 wait for 100ns; 386 rx <= '0'; --start bit 387 wait for baud_rate_period; 388 rx <= '0'; --data3 bit 0 389 wait for baud_rate_period; 390 rx <= '0'; --data3 bit 1 391 wait for baud_rate_period; 392 rx <= '0'; --data3 bit 2 393 wait for baud_rate_period; 394 rx <= '0'; --data3 bit 3 395 wait for baud_rate_period; 396 rx <= '0'; --data3 bit 4 397 wait for baud_rate_period; 398 rx <= '0'; --data3 bit 5 399 wait for baud_rate_period; 400 rx <= '0'; --data3 bit 6 401 wait for baud_rate_period; 402 rx <= '0'; --data3 bit 7 403 wait for baud_rate_period; 404 rx <= '1'; --stop bit 405 wait for baud_rate_period; 406 rx <= '1'; --stop bit 407 wait for baud_rate_period; 408 --------------------------------------------------------------------------- 409 wait for 100ns; 410 rx <= '0'; --start bit 411 wait for baud_rate_period; 412 rx <= '0'; --data4 bit 0 413 wait for baud_rate_period; 414 rx <= '0'; --data4 bit 1 415 wait for baud_rate_period; 416 rx <= '0'; --data4 bit 2 417 wait for baud_rate_period; 418 rx <= '0'; --data4 bit 3 419 wait for baud_rate_period; 420 rx <= '0'; --data4 bit 4 421 wait for baud_rate_period; 422 rx <= '0'; --data4 bit 5 423 wait for baud_rate_period; 424 rx <= '0'; --data4 bit 6 425 wait for baud_rate_period; 426 rx <= '0'; --data4 bit 7 427 wait for baud_rate_period; 428 rx <= '1'; --stop bit 429 wait for baud_rate_period; 430 rx <= '1'; --stop bit 431 wait for baud_rate_period; 432 --------------------------------------------------------------------------- 433 wait for 100ns; 434 rx <= '0'; --start bit 435 wait for baud_rate_period; 436 rx <= '0'; --data5 bit 0 437 wait for baud_rate_period; 438 rx <= '0'; --data5 bit 1 439 wait for baud_rate_period; 440 rx <= '0'; --data5 bit 2 441 wait for baud_rate_period; 442 rx <= '0'; --data5 bit 3 443 wait for baud_rate_period; 444 rx <= '0'; --data5 bit 4 445 wait for baud_rate_period; 446 rx <= '0'; --data5 bit 5 447 wait for baud_rate_period; 448 rx <= '0'; --data5 bit 6 449 wait for baud_rate_period; 450 rx <= '0'; --data5 bit 7 451 wait for baud_rate_period; 452 rx <= '1'; --stop bit 453 wait for baud_rate_period; 454 rx <= '1'; --stop bit 455 wait for baud_rate_period; 456 --------------------------------------------------------------------------- 457 wait for 100ns; 458 rx <= '0'; --start bit 459 wait for baud_rate_period; 460 rx <= '0'; --data6 bit 0 461 wait for baud_rate_period; 462 rx <= '0'; --data6 bit 1 463 wait for baud_rate_period; 464 rx <= '0'; --data6 bit 2 465 wait for baud_rate_period; 466 rx <= '0'; --data6 bit 3 467 wait for baud_rate_period; 468 rx <= '0'; --data6 bit 4 469 wait for baud_rate_period; 470 rx <= '0'; --data6 bit 5 471 wait for baud_rate_period; 472 rx <= '0'; --data6 bit 6 473 wait for baud_rate_period; 474 rx <= '0'; --data6 bit 7 475 wait for baud_rate_period; 476 rx <= '1'; --stop bit 477 wait for baud_rate_period; 478 rx <= '1'; --stop bit 479 wait for baud_rate_period; 480 --------------------------------------------------------------------------- 481 wait for 100ns; 482 rx <= '0'; --start bit 483 wait for baud_rate_period; 484 rx <= '0'; --data7 bit 0 485 wait for baud_rate_period; 486 rx <= '0'; --data7 bit 1 487 wait for baud_rate_period; 488 rx <= '0'; --data7 bit 2 489 wait for baud_rate_period; 490 rx <= '0'; --data7 bit 3 491 wait for baud_rate_period; 492 rx <= '0'; --data7 bit 4 493 wait for baud_rate_period; 494 rx <= '0'; --data7 bit 5 495 wait for baud_rate_period; 496 rx <= '0'; --data7 bit 6 497 wait for baud_rate_period; 498 rx <= '0'; --data7 bit 7 499 wait for baud_rate_period; 500 rx <= '1'; --stop bit 501 wait for baud_rate_period; 502 rx <= '1'; --stop bit 503 wait for baud_rate_period; 504 --------------------------------------------------------------------------- 505 wait for 100ns; 506 rx <= '0'; --start bit 507 wait for baud_rate_period; 508 rx <= '0'; --data8 bit 0 509 wait for baud_rate_period; 510 rx <= '0'; --data8 bit 1 511 wait for baud_rate_period; 512 rx <= '0'; --data8 bit 2 513 wait for baud_rate_period; 514 rx <= '0'; --data8 bit 3 515 wait for baud_rate_period; 516 rx <= '0'; --data8 bit 4 517 wait for baud_rate_period; 518 rx <= '0'; --data8 bit 5 519 wait for baud_rate_period; 520 rx <= '0'; --data8 bit 6 521 wait for baud_rate_period; 522 rx <= '0'; --data8 bit 7 523 wait for baud_rate_period; 524 rx <= '1'; --stop bit 525 wait for baud_rate_period; 526 rx <= '1'; --stop bit 527 wait for baud_rate_period; 528 --------------------------------------------------------------------------- 529 wait for 100ns; 530 rx <= '0'; --start bit 531 wait for baud_rate_period; 532 rx <= '0'; --data9 bit 0 533 wait for baud_rate_period; 534 rx <= '0'; --data9 bit 1 535 wait for baud_rate_period; 536 rx <= '0'; --data9 bit 2 537 wait for baud_rate_period; 538 rx <= '0'; --data9 bit 3 539 wait for baud_rate_period; 540 rx <= '0'; --data9 bit 4 541 wait for baud_rate_period; 542 rx <= '0'; --data9 bit 5 543 wait for baud_rate_period; 544 rx <= '0'; --data9 bit 6 545 wait for baud_rate_period; 546 rx <= '0'; --data9 bit 7 547 wait for baud_rate_period; 548 rx <= '1'; --stop bit 549 wait for baud_rate_period; 550 rx <= '1'; --stop bit 551 wait for baud_rate_period; 552 --------------------------------------------------------------------------- 553 wait for 100ns; 554 rx <= '0'; --start bit 555 wait for baud_rate_period; 556 rx <= '0'; --data10 bit 0 557 wait for baud_rate_period; 558 rx <= '0'; --data10 bit 1 559 wait for baud_rate_period; 560 rx <= '0'; --data10 bit 2 561 wait for baud_rate_period; 562 rx <= '0'; --data10 bit 3 563 wait for baud_rate_period; 564 rx <= '0'; --data10 bit 4 565 wait for baud_rate_period; 566 rx <= '0'; --data10 bit 5 567 wait for baud_rate_period; 568 rx <= '0'; --data10 bit 6 569 wait for baud_rate_period; 570 rx <= '0'; --data10 bit 7 571 wait for baud_rate_period; 572 rx <= '1'; --stop bit 573 wait for baud_rate_period; 574 rx <= '1'; --stop bit 575 wait for baud_rate_period; 576 --------------------------------------------------------------------------- 577 wait for 100ns; 578 rx <= '0'; --start bit 579 wait for baud_rate_period; 580 rx <= '0'; --data11 bit 0 581 wait for baud_rate_period; 582 rx <= '0'; --data11 bit 1 583 wait for baud_rate_period; 584 rx <= '0'; --data11 bit 2 585 wait for baud_rate_period; 586 rx <= '0'; --data11 bit 3 587 wait for baud_rate_period; 588 rx <= '0'; --data11 bit 4 589 wait for baud_rate_period; 590 rx <= '0'; --data11 bit 5 591 wait for baud_rate_period; 592 rx <= '0'; --data11 bit 6 593 wait for baud_rate_period; 594 rx <= '0'; --data11 bit 7 595 wait for baud_rate_period; 596 rx <= '1'; --stop bit 597 wait for baud_rate_period; 598 rx <= '1'; --stop bit 599 wait for baud_rate_period; 600 --------------------------------------------------------------------------- 601 wait for 100ns; 602 rx <= '0'; --start bit 603 wait for baud_rate_period; 604 rx <= '0'; --check sum bit 0 605 wait for baud_rate_period; 606 rx <= '0'; --check sum bit 1 607 wait for baud_rate_period; 608 rx <= '0'; --check sum bit 2 609 wait for baud_rate_period; 610 rx <= '0'; --check sum bit 3 611 wait for baud_rate_period; 612 rx <= '0'; --check sum bit 4 613 wait for baud_rate_period; 614 rx <= '0'; --check sum bit 5 615 wait for baud_rate_period; 616 rx <= '0'; --check sum bit 6 617 wait for baud_rate_period; 618 rx <= '0'; --check sum bit 7 619 wait for baud_rate_period; 620 rx <= '1'; --stop bit 621 wait for baud_rate_period; 622 rx <= '1'; --stop bit 623 wait for baud_rate_period; 624 --------------------------------------------------------------------------- 625 rx <= '1'; 233 626 wait; 234 627 -
firmware/FTU/ftu_definitions.vhd
r9890 r9928 58 58 constant INT_CLK_FREQUENCY : integer := 50000000; -- 50MHz 59 59 constant COUNTER_FREQUENCY : integer := 1000000; -- has to be smaller than INT_CLK_FREQUENCY 60 constant CNTR_FREQ_DIVIDER : integer := 500000; 60 constant CNTR_FREQ_DIVIDER : integer := 500000; -- for simulation, should normally be 1 61 61 62 62 --32byte dual-port RAM, port A: 8byte, port B: 16byte … … 72 72 constant NO_OF_DAC_NOT_USED : integer := 3; 73 73 constant NO_OF_COUNTER : integer := 5; 74 75 --communication with FTM 76 constant RS485_BAUD_RATE : integer := 100000; -- bits / sec in our case 77 constant RS485_BLOCK_WIDTH : integer := 128; -- 16 byte protocol 78 constant RS485_START_DELIM : std_logic_vector(7 downto 0) := "01000000"; -- start delimiter 79 constant FTM_ADDRESS : std_logic_vector(7 downto 0) := "11000000"; -- 192 74 80 75 81 end ftu_constants;
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