Changeset 10081 for firmware/FAD/FACT_FAD_20MHz_VAR_PS
- Timestamp:
- 01/05/11 17:19:13 (14 years ago)
- Location:
- firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib
- Files:
-
- 17 edited
Legend:
- Unmodified
- Added
- Removed
-
firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib/hdl/data_generator.vhd
r10073 r10081 67 67 68 68 drs_read_s_cell_ready : in std_logic; 69 drs_s_cell_array : in drs_s_cell_array_type 69 drs_s_cell_array : in drs_s_cell_array_type; 70 71 drs_readout_started : out std_logic 70 72 ); 71 73 end data_generator ; … … 73 75 architecture Behavioral of data_generator is 74 76 75 type state_generate_type is (INIT, CONFIG, CONFIG1, CONFIG2,CONFIG3, CONFIG4, CONFIG5, CONFIG6, WRITE_HEADER, WRITE_EXTERNAL_TRIGGER, WRITE_INTERNAL_TRIGGER, WRITE_BOARD_ID, WRITE_TEMPERATURES,77 type state_generate_type is (INIT, CONFIG, CONFIG1, CONFIG2,CONFIG3, CONFIG4, CONFIG5, CONFIG6, CONFIG7, WRITE_HEADER, WRITE_EXTERNAL_TRIGGER, WRITE_INTERNAL_TRIGGER, WRITE_BOARD_ID, WRITE_TEMPERATURES, 76 78 WRITE_DAC1, WRITE_DAC2, WRITE_CHANNEL_ID, WRITE_START_CELL, WRITE_ROI, WRITE_ADC_DATA, WRITE_DATA_END, WRITE_DATA_END_WAIT, 77 79 WRITE_END_FLAG, WRITE_DATA_STOP, … … 93 95 signal roi_max_int : roi_max_type; 94 96 97 signal sig_drs_readout_started : std_logic := '0'; 98 95 99 begin 96 100 101 drs_readout_started <= sig_drs_readout_started; 97 102 98 103 generate_data : process (clk) … … 151 156 if (drs_srin_write_ready = '1') then 152 157 roi_max_int <= roi_max; 153 state_generate <= WRITE_DATA_IDLE; 154 end if; 158 state_generate <= CONFIG6; 159 end if; 160 when CONFIG6 => 161 drs_channel_id <= DRS_WRITE_CONFIG_REG; 162 drs_srin_data <= "11111111"; 163 drs_srin_write_8b <= '1'; 164 if (drs_srin_write_ack = '1') then 165 drs_srin_write_8b <= '0'; 166 state_generate <= CONFIG7; 167 end if; 168 when CONFIG7 => 169 if (drs_srin_write_ready = '1') then 170 roi_max_int <= roi_max; 171 state_generate <= WRITE_DATA_IDLE; 172 end if; 155 173 -- end configure DRS 156 174 … … 161 179 -- if (ram_write_ea = '1' and (trigger_flag = '1' or s_trigger = '1')) then 162 180 if (ram_write_ea = '1' and trigger_flag = '1') then 181 sig_drs_readout_started <= '1'; -- is set to '0' in state WRITE_DAC1 163 182 -- stop drs, dwrite low 164 183 drs_dwrite <= '0'; … … 193 212 194 213 when WRITE_DAC1 => 214 sig_drs_readout_started <= '0'; -- is set to '1' in state WRITE_DATA_IDLE 195 215 data_out <= conv_std_logic_vector (dac_array (3), 16) 196 216 & conv_std_logic_vector (dac_array (2), 16) … … 256 276 & "000" & adc_otr(1) & adc_data_array(1) 257 277 & "000" & adc_otr(0) & adc_data_array(0); 258 --data_out <= "00000" & conv_std_logic_vector (data_cntr, 11)278 -- data_out <= "00000" & conv_std_logic_vector (data_cntr, 11) 259 279 -- & "00010" & conv_std_logic_vector (data_cntr, 11) 260 280 -- & "00100" & conv_std_logic_vector (data_cntr, 11) -
firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib/hdl/data_generator.vhd.bak
r10073 r10081 67 67 68 68 drs_read_s_cell_ready : in std_logic; 69 drs_s_cell_array : in drs_s_cell_array_type 69 drs_s_cell_array : in drs_s_cell_array_type; 70 71 drs_readout_started : out std_logic 70 72 ); 71 73 end data_generator ; … … 73 75 architecture Behavioral of data_generator is 74 76 75 type state_generate_type is (INIT, CONFIG, CONFIG1, CONFIG2,CONFIG3, CONFIG4, CONFIG5, CONFIG6, WRITE_HEADER, WRITE_EXTERNAL_TRIGGER, WRITE_INTERNAL_TRIGGER, WRITE_BOARD_ID, WRITE_TEMPERATURES,77 type state_generate_type is (INIT, CONFIG, CONFIG1, CONFIG2,CONFIG3, CONFIG4, CONFIG5, CONFIG6, CONFIG7, WRITE_HEADER, WRITE_EXTERNAL_TRIGGER, WRITE_INTERNAL_TRIGGER, WRITE_BOARD_ID, WRITE_TEMPERATURES, 76 78 WRITE_DAC1, WRITE_DAC2, WRITE_CHANNEL_ID, WRITE_START_CELL, WRITE_ROI, WRITE_ADC_DATA, WRITE_DATA_END, WRITE_DATA_END_WAIT, 77 79 WRITE_END_FLAG, WRITE_DATA_STOP, … … 93 95 signal roi_max_int : roi_max_type; 94 96 97 signal sig_drs_readout_started : std_logic := '0'; 98 95 99 begin 96 100 101 drs_readout_started <= sig_drs_readout_started; 97 102 98 103 generate_data : process (clk) … … 142 147 when CONFIG4 => 143 148 drs_channel_id <= DRS_WRITE_SHIFT_REG; 144 drs_srin_data <= "1 0101010";149 drs_srin_data <= "11111111"; 145 150 drs_srin_write_8b <= '1'; 146 151 if (drs_srin_write_ack = '1') then … … 151 156 if (drs_srin_write_ready = '1') then 152 157 roi_max_int <= roi_max; 153 state_generate <= WRITE_DATA_IDLE; 154 end if; 158 state_generate <= CONFIG6; 159 end if; 160 when CONFIG6 => 161 drs_channel_id <= DRS_WRITE_CONFIG_REG; 162 drs_srin_data <= "11111111"; 163 drs_srin_write_8b <= '1'; 164 if (drs_srin_write_ack = '1') then 165 drs_srin_write_8b <= '0'; 166 state_generate <= CONFIG7; 167 end if; 168 when CONFIG7 => 169 if (drs_srin_write_ready = '1') then 170 roi_max_int <= roi_max; 171 state_generate <= WRITE_DATA_IDLE; 172 end if; 155 173 -- end configure DRS 156 174 … … 161 179 -- if (ram_write_ea = '1' and (trigger_flag = '1' or s_trigger = '1')) then 162 180 if (ram_write_ea = '1' and trigger_flag = '1') then 181 sig_drs_readout_started <= '1'; -- is set to '0' in state WRITE_DAC1 163 182 -- stop drs, dwrite low 164 183 drs_dwrite <= '0'; … … 193 212 194 213 when WRITE_DAC1 => 214 sig_drs_readout_started <= '0'; -- is set to '1' in state WRITE_DATA_IDLE 195 215 data_out <= conv_std_logic_vector (dac_array (3), 16) 196 216 & conv_std_logic_vector (dac_array (2), 16) … … 252 272 when WRITE_ADC_DATA => 253 273 if (data_cntr < roi_max (channel_id)) then 254 data_out <= "000" & adc_otr(3) & adc_data_array(3)255 & "000" & adc_otr(2) & adc_data_array(2)256 & "000" & adc_otr(1) & adc_data_array(1)257 & "000" & adc_otr(0) & adc_data_array(0);258 --data_out <= "00000" & conv_std_logic_vector (data_cntr, 11)259 --& "00010" & conv_std_logic_vector (data_cntr, 11)260 --& "00100" & conv_std_logic_vector (data_cntr, 11)261 --& "00110" & conv_std_logic_vector (data_cntr, 11) ;274 -- data_out <= "000" & adc_otr(3) & adc_data_array(3) 275 -- & "000" & adc_otr(2) & adc_data_array(2) 276 -- & "000" & adc_otr(1) & adc_data_array(1) 277 -- & "000" & adc_otr(0) & adc_data_array(0); 278 data_out <= "00000" & conv_std_logic_vector (data_cntr, 11) 279 & "00010" & conv_std_logic_vector (data_cntr, 11) 280 & "00100" & conv_std_logic_vector (data_cntr, 11) 281 & "00110" & conv_std_logic_vector (data_cntr, 11) ; 262 282 addr_cntr <= addr_cntr + 1; 263 283 state_generate <= WRITE_ADC_DATA; -
firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib/hdl/drs_pulser_dummy.vhd
r10072 r10081 61 61 srin_write_ack <= '1'; 62 62 srin_cntr <= 0; 63 SRCLK_EN <= '1';63 --SRCLK_EN <= '1'; 64 64 state_main <= SRIN_WRITE_8B; 65 65 end if; … … 75 75 76 76 when SRIN_WRITE_8B => 77 SRCLK_EN <= '1'; 77 78 srin_out <= srin_data (7 - srin_cntr); 78 79 if (srin_cntr = 7) then 79 SRCLK_EN <= '0';80 --SRCLK_EN <= '0'; 80 81 state_main <= SRIN_WRITE_END; 81 82 else … … 83 84 end if; 84 85 when SRIN_WRITE_END => 85 srin_out <= '0'; 86 SRCLK_EN <= '0'; 87 srin_out <= '1'; 86 88 srin_write_ready <= '1'; 87 89 srin_write_ack <= '0'; -
firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib/hdl/fad_board_struct.vhd
r10078 r10081 3 3 -- Created: 4 4 -- by - dneise.UNKNOWN (E5B-LABOR6) 5 -- at - 1 2:19:0705.01.20115 -- at - 17:46:34 05.01.2011 6 6 -- 7 7 -- Generated by Mentor Graphics' HDL Designer(TM) 2009.2 (Build 10) … … 79 79 -- Created: 80 80 -- by - dneise.UNKNOWN (E5B-LABOR6) 81 -- at - 1 2:19:0805.01.201181 -- at - 17:46:35 05.01.2011 82 82 -- 83 83 -- Generated by Mentor Graphics' HDL Designer(TM) 2009.2 (Build 10) … … 124 124 -- status: 125 125 SIGNAL shifting : std_logic := '0'; 126 127 -- Implicit buffer signal declarations 128 SIGNAL SRIN_internal : std_logic; 126 129 127 130 … … 253 256 -- HDL Embedded Text Block 9 eb3 254 257 -- eb3 9 255 A0_T(0) <= CLK50_OUT;256 A0_T(1) <= CLK25_OUT;258 A0_T(0) <= ready; 259 A0_T(1) <= shifting; 257 260 A0_T(2) <= CLK25_PSOUT; 258 261 A0_T(3) <= PS_DIR_IN; … … 262 265 A0_T(7) <= DCM_locked; 263 266 264 A1_T(0) <= ready;265 A1_T(1) <= shifting;266 A1_T(2) <= PS DONE_extraOUT;267 A1_T(3) <= PSCLK_OUT;268 A1_T(4) <= LOCKED_extraOUT;269 270 A1_T(5) <= '0';271 A1_T(6) <= '0';272 A1_T(7) <= '0';267 A1_T(0) <= SRIN_internal; 268 A1_T(1) <= PSDONE_extraOUT; 269 A1_T(2) <= PSCLK_OUT; 270 A1_T(3) <= LOCKED_extraOUT; 271 272 A1_T(4) <= drs_channel_id(0); 273 A1_T(5) <= drs_channel_id(1); 274 A1_T(6) <= drs_channel_id(2); 275 A1_T(7) <= drs_channel_id(3); 273 276 274 277 … … 311 314 RSRLOAD => RSRLOAD, 312 315 SRCLK => SRCLK, 313 SRIN_out => SRIN ,316 SRIN_out => SRIN_internal, 314 317 adc_clk_en => adc_clk_en, 315 318 adc_oeb => OE_ADC, … … 337 340 ); 338 341 342 -- Implicit buffered output assignments 343 SRIN <= SRIN_internal; 344 339 345 END struct; -
firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib/hdl/fad_definitions.vhd
r10072 r10081 140 140 constant CMD_PS_RESET : std_logic_vector := X"17"; 141 141 -- DRS Registers 142 constant DRS_CONFIG_REG : std_logic_vector := "1100"; 142 143 constant DRS_WRITE_SHIFT_REG : std_logic_vector := "1101"; 143 144 constant DRS_WRITE_CONFIG_REG : std_logic_vector := "1110"; 145 constant DRS_DISABLE_ALL_OUTS : std_logic_vector := "1111"; 144 146 145 147 -- Declare functions and procedure -
firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib/hdl/fad_definitions.vhd.bak
r9912 r10081 23 23 24 24 -- @ ETH zurich 25 constant NETMASK : ip_type := (255, 255, 248, 0);26 constant IP_ADDRESS : ip_type := (192, 33, 99, 225);27 constant GATEWAY : ip_type := (192, 33, 96, 1);25 -- constant NETMASK : ip_type := (255, 255, 248, 0); 26 -- constant IP_ADDRESS : ip_type := (192, 33, 99, 225); 27 -- constant GATEWAY : ip_type := (192, 33, 96, 1); 28 28 29 29 -- @ TU Dortmund 30 --constant NETMASK : ip_type := (255, 255, 255, 0);31 --constant IP_ADDRESS : ip_type := (129, 217, 160, 119);32 --constant GATEWAY : ip_type := (129, 217, 160, 1);30 constant NETMASK : ip_type := (255, 255, 255, 0); 31 constant IP_ADDRESS : ip_type := (129, 217, 160, 119); 32 constant GATEWAY : ip_type := (129, 217, 160, 1); 33 33 34 34 constant FIRST_PORT : integer := 5000; … … 79 79 80 80 -- 81 constant W5300_TX_FIFO_SIZE : integer := (15360 / 2); -- Socket TX FIFO-Size in 16 Bit Words 81 constant W5300_TX_FIFO_SIZE_8B : integer := 15360; -- Socket TX FIFO-Size in Bytes 82 constant W5300_TX_FIFO_SIZE : integer := (W5300_TX_FIFO_SIZE_8B / 2); -- Socket TX FIFO-Size in 16 Bit Words 82 83 83 84 constant LOG2_OF_RAM_SIZE_64B : integer := 15; … … 119 120 constant CMD_READ : std_logic_vector := X"0A"; 120 121 constant CMD_WRITE : std_logic_vector := X"05"; 122 -- Config-RAM 123 constant BADDR_ROI : std_logic_vector := X"00"; -- Baseaddress ROI-Values 124 constant BADDR_DAC : std_logic_vector := X"24"; -- Baseaddress DAC-Values 121 125 122 126 constant CMD_DENABLE : std_logic_vector := X"06"; … … 135 139 136 140 constant CMD_PS_RESET : std_logic_vector := X"17"; 137 141 -- DRS Registers 142 constant DRS_WRITE_SHIFT_REG : std_logic_vector := "1101"; 138 143 139 144 -
firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib/hdl/fad_main_struct.vhd
r10078 r10081 3 3 -- Created: 4 4 -- by - dneise.UNKNOWN (E5B-LABOR6) 5 -- at - 1 2:19:0605.01.20115 -- at - 17:46:33 05.01.2011 6 6 -- 7 7 -- Generated by Mentor Graphics' HDL Designer(TM) 2009.2 (Build 10) … … 80 80 -- Created: 81 81 -- by - dneise.UNKNOWN (E5B-LABOR6) 82 -- at - 1 2:19:0705.01.201182 -- at - 17:46:34 05.01.2011 83 83 -- 84 84 -- Generated by Mentor Graphics' HDL Designer(TM) 2009.2 (Build 10) … … 137 137 SIGNAL drs_read_s_cell : std_logic := '0'; 138 138 SIGNAL drs_read_s_cell_ready : std_logic; 139 SIGNAL drs_readout_started : std_logic; 139 140 SIGNAL drs_s_cell_array : drs_s_cell_array_type; 140 141 SIGNAL drs_srin_data : std_logic_vector(7 DOWNTO 0) := (others => '0'); … … 298 299 drs_srin_write_ready : IN std_logic ; 299 300 drs_read_s_cell_ready : IN std_logic ; 300 drs_s_cell_array : IN drs_s_cell_array_type 301 drs_s_cell_array : IN drs_s_cell_array_type ; 302 drs_readout_started : OUT std_logic 301 303 ); 302 304 END COMPONENT; … … 596 598 drs_srin_write_ready => srin_write_ready, 597 599 drs_read_s_cell_ready => drs_read_s_cell_ready, 598 drs_s_cell_array => drs_s_cell_array 600 drs_s_cell_array => drs_s_cell_array, 601 drs_readout_started => drs_readout_started 599 602 ); 600 603 I_main_drs_pulser : drs_pulser … … 628 631 amber => amber, 629 632 red => red, 630 trigger => trigger_out,633 trigger => drs_readout_started, 631 634 socks_waiting => socks_waiting, 632 635 socks_connected => socks_connected -
firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib/hds/.xrf/fad_board_struct.xrf
r10075 r10081 265 265 DESIGN @f@a@d_@board 266 266 VIEW struct.bd 267 NO_GRAPHIC 126 267 GRAPHIC 13136,0 127 0 268 DESIGN @f@a@d_@board 269 VIEW struct.bd 270 NO_GRAPHIC 129 268 271 LIBRARY FACT_FAD_lib 269 272 DESIGN @f@a@d_main 270 273 VIEW struct 271 GRAPHIC 169,0 1 280272 DESIGN @f@a@d_main 273 VIEW symbol.sb 274 GRAPHIC 14,0 1 291275 DESIGN @f@a@d_main 276 VIEW symbol.sb 277 GRAPHIC 1755,0 13 30278 DESIGN @f@a@d_main 279 VIEW symbol.sb 280 GRAPHIC 2710,0 13 40281 DESIGN @f@a@d_main 282 VIEW symbol.sb 283 GRAPHIC 2715,0 13 50284 DESIGN @f@a@d_main 285 VIEW symbol.sb 286 GRAPHIC 2720,0 13 60287 DESIGN @f@a@d_main 288 VIEW symbol.sb 289 GRAPHIC 2725,0 1 370290 DESIGN @f@a@d_main 291 VIEW symbol.sb 292 GRAPHIC 2282,0 1 380293 DESIGN @f@a@d_main 294 VIEW symbol.sb 295 GRAPHIC 1976,0 1 390296 DESIGN @f@a@d_main 297 VIEW symbol.sb 298 GRAPHIC 923,0 14 00299 DESIGN @f@a@d_main 300 VIEW symbol.sb 301 GRAPHIC 928,0 14 10302 DESIGN @f@a@d_main 303 VIEW symbol.sb 304 GRAPHIC 464,0 14 20305 DESIGN @f@a@d_main 306 VIEW symbol.sb 307 GRAPHIC 1062,0 14 30308 DESIGN @f@a@d_main 309 VIEW symbol.sb 310 GRAPHIC 4584,0 14 40311 DESIGN @f@a@d_main 312 VIEW symbol.sb 313 GRAPHIC 4589,0 14 50314 DESIGN @f@a@d_main 315 VIEW symbol.sb 316 GRAPHIC 4579,0 14 60317 DESIGN @f@a@d_main 318 VIEW symbol.sb 319 GRAPHIC 1389,0 1 470320 DESIGN @f@a@d_main 321 VIEW symbol.sb 322 GRAPHIC 1725,0 1 480323 DESIGN @f@a@d_main 324 VIEW symbol.sb 325 GRAPHIC 4497,0 1 490326 DESIGN @f@a@d_main 327 VIEW symbol.sb 328 GRAPHIC 4467,0 15 00329 DESIGN @f@a@d_main 330 VIEW symbol.sb 331 GRAPHIC 4487,0 15 10332 DESIGN @f@a@d_main 333 VIEW symbol.sb 334 GRAPHIC 4472,0 15 20335 DESIGN @f@a@d_main 336 VIEW symbol.sb 337 GRAPHIC 4482,0 15 30338 DESIGN @f@a@d_main 339 VIEW symbol.sb 340 GRAPHIC 4477,0 15 40341 DESIGN @f@a@d_main 342 VIEW symbol.sb 343 GRAPHIC 4517,0 15 50344 DESIGN @f@a@d_main 345 VIEW symbol.sb 346 GRAPHIC 4522,0 15 60347 DESIGN @f@a@d_main 348 VIEW symbol.sb 349 GRAPHIC 2987,0 1 570350 DESIGN @f@a@d_main 351 VIEW symbol.sb 352 GRAPHIC 2992,0 1 580353 DESIGN @f@a@d_main 354 VIEW symbol.sb 355 GRAPHIC 4780,0 1 590356 DESIGN @f@a@d_main 357 VIEW symbol.sb 358 GRAPHIC 4323,0 16 00359 DESIGN @f@a@d_main 360 VIEW symbol.sb 361 GRAPHIC 833,0 16 10362 DESIGN @f@a@d_main 363 VIEW symbol.sb 364 GRAPHIC 4911,0 16 20365 DESIGN @f@a@d_main 366 VIEW symbol.sb 367 GRAPHIC 3641,0 16 30368 DESIGN @f@a@d_main 369 VIEW symbol.sb 370 GRAPHIC 4144,0 16 40371 DESIGN @f@a@d_main 372 VIEW symbol.sb 373 GRAPHIC 2448,0 16 50374 DESIGN @f@a@d_main 375 VIEW symbol.sb 376 GRAPHIC 2453,0 16 60377 DESIGN @f@a@d_main 378 VIEW symbol.sb 379 GRAPHIC 4906,0 1 670380 DESIGN @f@a@d_main 381 VIEW symbol.sb 382 GRAPHIC 163,0 1 680383 DESIGN @f@a@d_main 384 VIEW symbol.sb 385 GRAPHIC 4067,0 1 690386 DESIGN @f@a@d_main 387 VIEW symbol.sb 388 GRAPHIC 4502,0 17 00389 DESIGN @f@a@d_main 390 VIEW symbol.sb 391 GRAPHIC 4512,0 17 10392 DESIGN @f@a@d_main 393 VIEW symbol.sb 394 GRAPHIC 4916,0 17 20395 DESIGN @f@a@d_main 396 VIEW symbol.sb 397 GRAPHIC 3631,0 17 30398 DESIGN @f@a@d_main 399 VIEW symbol.sb 400 GRAPHIC 3646,0 17 40401 DESIGN @f@a@d_main 402 VIEW symbol.sb 403 GRAPHIC 4507,0 17 50404 DESIGN @f@a@d_main 405 VIEW symbol.sb 406 GRAPHIC 1037,0 1 770407 DESIGN @f@a@d_main 408 VIEW symbol.sb 409 GRAPHIC 1047,0 1 780410 DESIGN @f@a@d_main 411 VIEW symbol.sb 412 GRAPHIC 1057,0 1 790413 DESIGN @f@a@d_main 414 VIEW symbol.sb 415 GRAPHIC 135,0 18 00416 DESIGN @f@a@d_main 417 VIEW symbol.sb 418 GRAPHIC 1052,0 18 10419 DESIGN @f@a@d_main 420 VIEW symbol.sb 421 GRAPHIC 3636,0 18 20422 DESIGN @f@a@d_main 423 VIEW symbol.sb 424 GRAPHIC 1042,0 18 30274 GRAPHIC 169,0 131 0 275 DESIGN @f@a@d_main 276 VIEW symbol.sb 277 GRAPHIC 14,0 132 1 278 DESIGN @f@a@d_main 279 VIEW symbol.sb 280 GRAPHIC 1755,0 136 0 281 DESIGN @f@a@d_main 282 VIEW symbol.sb 283 GRAPHIC 2710,0 137 0 284 DESIGN @f@a@d_main 285 VIEW symbol.sb 286 GRAPHIC 2715,0 138 0 287 DESIGN @f@a@d_main 288 VIEW symbol.sb 289 GRAPHIC 2720,0 139 0 290 DESIGN @f@a@d_main 291 VIEW symbol.sb 292 GRAPHIC 2725,0 140 0 293 DESIGN @f@a@d_main 294 VIEW symbol.sb 295 GRAPHIC 2282,0 141 0 296 DESIGN @f@a@d_main 297 VIEW symbol.sb 298 GRAPHIC 1976,0 142 0 299 DESIGN @f@a@d_main 300 VIEW symbol.sb 301 GRAPHIC 923,0 143 0 302 DESIGN @f@a@d_main 303 VIEW symbol.sb 304 GRAPHIC 928,0 144 0 305 DESIGN @f@a@d_main 306 VIEW symbol.sb 307 GRAPHIC 464,0 145 0 308 DESIGN @f@a@d_main 309 VIEW symbol.sb 310 GRAPHIC 1062,0 146 0 311 DESIGN @f@a@d_main 312 VIEW symbol.sb 313 GRAPHIC 4584,0 147 0 314 DESIGN @f@a@d_main 315 VIEW symbol.sb 316 GRAPHIC 4589,0 148 0 317 DESIGN @f@a@d_main 318 VIEW symbol.sb 319 GRAPHIC 4579,0 149 0 320 DESIGN @f@a@d_main 321 VIEW symbol.sb 322 GRAPHIC 1389,0 150 0 323 DESIGN @f@a@d_main 324 VIEW symbol.sb 325 GRAPHIC 1725,0 151 0 326 DESIGN @f@a@d_main 327 VIEW symbol.sb 328 GRAPHIC 4497,0 152 0 329 DESIGN @f@a@d_main 330 VIEW symbol.sb 331 GRAPHIC 4467,0 153 0 332 DESIGN @f@a@d_main 333 VIEW symbol.sb 334 GRAPHIC 4487,0 154 0 335 DESIGN @f@a@d_main 336 VIEW symbol.sb 337 GRAPHIC 4472,0 155 0 338 DESIGN @f@a@d_main 339 VIEW symbol.sb 340 GRAPHIC 4482,0 156 0 341 DESIGN @f@a@d_main 342 VIEW symbol.sb 343 GRAPHIC 4477,0 157 0 344 DESIGN @f@a@d_main 345 VIEW symbol.sb 346 GRAPHIC 4517,0 158 0 347 DESIGN @f@a@d_main 348 VIEW symbol.sb 349 GRAPHIC 4522,0 159 0 350 DESIGN @f@a@d_main 351 VIEW symbol.sb 352 GRAPHIC 2987,0 160 0 353 DESIGN @f@a@d_main 354 VIEW symbol.sb 355 GRAPHIC 2992,0 161 0 356 DESIGN @f@a@d_main 357 VIEW symbol.sb 358 GRAPHIC 4780,0 162 0 359 DESIGN @f@a@d_main 360 VIEW symbol.sb 361 GRAPHIC 4323,0 163 0 362 DESIGN @f@a@d_main 363 VIEW symbol.sb 364 GRAPHIC 833,0 164 0 365 DESIGN @f@a@d_main 366 VIEW symbol.sb 367 GRAPHIC 4911,0 165 0 368 DESIGN @f@a@d_main 369 VIEW symbol.sb 370 GRAPHIC 3641,0 166 0 371 DESIGN @f@a@d_main 372 VIEW symbol.sb 373 GRAPHIC 4144,0 167 0 374 DESIGN @f@a@d_main 375 VIEW symbol.sb 376 GRAPHIC 2448,0 168 0 377 DESIGN @f@a@d_main 378 VIEW symbol.sb 379 GRAPHIC 2453,0 169 0 380 DESIGN @f@a@d_main 381 VIEW symbol.sb 382 GRAPHIC 4906,0 170 0 383 DESIGN @f@a@d_main 384 VIEW symbol.sb 385 GRAPHIC 163,0 171 0 386 DESIGN @f@a@d_main 387 VIEW symbol.sb 388 GRAPHIC 4067,0 172 0 389 DESIGN @f@a@d_main 390 VIEW symbol.sb 391 GRAPHIC 4502,0 173 0 392 DESIGN @f@a@d_main 393 VIEW symbol.sb 394 GRAPHIC 4512,0 174 0 395 DESIGN @f@a@d_main 396 VIEW symbol.sb 397 GRAPHIC 4916,0 175 0 398 DESIGN @f@a@d_main 399 VIEW symbol.sb 400 GRAPHIC 3631,0 176 0 401 DESIGN @f@a@d_main 402 VIEW symbol.sb 403 GRAPHIC 3646,0 177 0 404 DESIGN @f@a@d_main 405 VIEW symbol.sb 406 GRAPHIC 4507,0 178 0 407 DESIGN @f@a@d_main 408 VIEW symbol.sb 409 GRAPHIC 1037,0 180 0 410 DESIGN @f@a@d_main 411 VIEW symbol.sb 412 GRAPHIC 1047,0 181 0 413 DESIGN @f@a@d_main 414 VIEW symbol.sb 415 GRAPHIC 1057,0 182 0 416 DESIGN @f@a@d_main 417 VIEW symbol.sb 418 GRAPHIC 135,0 183 0 419 DESIGN @f@a@d_main 420 VIEW symbol.sb 421 GRAPHIC 1052,0 184 0 422 DESIGN @f@a@d_main 423 VIEW symbol.sb 424 GRAPHIC 3636,0 185 0 425 DESIGN @f@a@d_main 426 VIEW symbol.sb 427 GRAPHIC 1042,0 186 0 425 428 LIBRARY FACT_FAD_lib 426 429 DESIGN @f@a@d_@board 427 430 VIEW struct.bd 428 NO_GRAPHIC 186 429 DESIGN @f@a@d_@board 430 VIEW struct.bd 431 GRAPHIC 169,0 189 0 432 DESIGN @f@a@d_@board 433 VIEW struct.bd 434 NO_GRAPHIC 192 435 DESIGN @f@a@d_@board 436 VIEW struct.bd 437 GRAPHIC 265,0 195 0 438 DESIGN @f@a@d_@board 439 VIEW struct.bd 440 NO_GRAPHIC 199 441 DESIGN @f@a@d_@board 442 VIEW struct.bd 443 GRAPHIC 3248,0 200 0 444 DESIGN @f@a@d_@board 445 VIEW struct.bd 446 NO_GRAPHIC 206 447 DESIGN @f@a@d_@board 448 VIEW struct.bd 449 GRAPHIC 3300,0 207 0 450 DESIGN @f@a@d_@board 451 VIEW struct.bd 452 NO_GRAPHIC 213 453 DESIGN @f@a@d_@board 454 VIEW struct.bd 455 GRAPHIC 3394,0 214 0 456 DESIGN @f@a@d_@board 457 VIEW struct.bd 458 NO_GRAPHIC 220 459 DESIGN @f@a@d_@board 460 VIEW struct.bd 461 GRAPHIC 3542,0 221 0 462 DESIGN @f@a@d_@board 463 VIEW struct.bd 464 NO_GRAPHIC 227 465 DESIGN @f@a@d_@board 466 VIEW struct.bd 467 GRAPHIC 3700,0 228 0 468 DESIGN @f@a@d_@board 469 VIEW struct.bd 470 NO_GRAPHIC 244 471 DESIGN @f@a@d_@board 472 VIEW struct.bd 473 GRAPHIC 6888,0 245 0 431 NO_GRAPHIC 189 432 DESIGN @f@a@d_@board 433 VIEW struct.bd 434 GRAPHIC 169,0 192 0 435 DESIGN @f@a@d_@board 436 VIEW struct.bd 437 NO_GRAPHIC 195 438 DESIGN @f@a@d_@board 439 VIEW struct.bd 440 GRAPHIC 265,0 198 0 441 DESIGN @f@a@d_@board 442 VIEW struct.bd 443 NO_GRAPHIC 202 444 DESIGN @f@a@d_@board 445 VIEW struct.bd 446 GRAPHIC 3248,0 203 0 447 DESIGN @f@a@d_@board 448 VIEW struct.bd 449 NO_GRAPHIC 209 450 DESIGN @f@a@d_@board 451 VIEW struct.bd 452 GRAPHIC 3300,0 210 0 453 DESIGN @f@a@d_@board 454 VIEW struct.bd 455 NO_GRAPHIC 216 456 DESIGN @f@a@d_@board 457 VIEW struct.bd 458 GRAPHIC 3394,0 217 0 459 DESIGN @f@a@d_@board 460 VIEW struct.bd 461 NO_GRAPHIC 223 462 DESIGN @f@a@d_@board 463 VIEW struct.bd 464 GRAPHIC 3542,0 224 0 465 DESIGN @f@a@d_@board 466 VIEW struct.bd 467 NO_GRAPHIC 230 468 DESIGN @f@a@d_@board 469 VIEW struct.bd 470 GRAPHIC 3700,0 231 0 474 471 DESIGN @f@a@d_@board 475 472 VIEW struct.bd … … 477 474 DESIGN @f@a@d_@board 478 475 VIEW struct.bd 479 GRAPHIC 7092,0 248 0 480 DESIGN @f@a@d_@board 481 VIEW struct.bd 482 NO_GRAPHIC 251 483 DESIGN @f@a@d_@board 484 VIEW struct.bd 485 GRAPHIC 10310,0 252 0 486 DESIGN @f@a@d_@board 487 VIEW struct.bd 488 NO_GRAPHIC 272 489 DESIGN @f@a@d_@board 490 VIEW struct.bd 491 GRAPHIC 10023,0 273 0 492 DESIGN @f@a@d_@board 493 VIEW struct.bd 494 GRAPHIC 7652,0 276 0 495 DESIGN @f@a@d_@board 496 VIEW struct.bd 497 NO_GRAPHIC 279 498 DESIGN @f@a@d_@board 499 VIEW struct.bd 500 GRAPHIC 169,0 281 0 501 DESIGN @f@a@d_@board 502 VIEW struct.bd 503 GRAPHIC 176,0 282 1 504 DESIGN @f@a@d_@board 505 VIEW struct.bd 506 GRAPHIC 245,0 286 0 507 DESIGN @f@a@d_@board 508 VIEW struct.bd 509 GRAPHIC 1865,0 287 0 510 DESIGN @f@a@d_@board 511 VIEW struct.bd 512 GRAPHIC 1873,0 288 0 513 DESIGN @f@a@d_@board 514 VIEW struct.bd 515 GRAPHIC 1881,0 289 0 516 DESIGN @f@a@d_@board 517 VIEW struct.bd 518 GRAPHIC 1889,0 290 0 519 DESIGN @f@a@d_@board 520 VIEW struct.bd 521 GRAPHIC 1467,0 291 0 522 DESIGN @f@a@d_@board 523 VIEW struct.bd 524 GRAPHIC 1730,0 292 0 525 DESIGN @f@a@d_@board 526 VIEW struct.bd 527 GRAPHIC 277,0 293 0 528 DESIGN @f@a@d_@board 529 VIEW struct.bd 530 GRAPHIC 285,0 294 0 531 DESIGN @f@a@d_@board 532 VIEW struct.bd 533 GRAPHIC 3218,0 295 0 534 DESIGN @f@a@d_@board 535 VIEW struct.bd 536 GRAPHIC 450,0 296 0 537 DESIGN @f@a@d_@board 538 VIEW struct.bd 539 GRAPHIC 10506,0 297 0 540 DESIGN @f@a@d_@board 541 VIEW struct.bd 542 GRAPHIC 10514,0 298 0 543 DESIGN @f@a@d_@board 544 VIEW struct.bd 545 GRAPHIC 10498,0 299 0 546 DESIGN @f@a@d_@board 547 VIEW struct.bd 548 GRAPHIC 10034,0 300 0 549 DESIGN @f@a@d_@board 550 VIEW struct.bd 551 GRAPHIC 9502,0 301 0 552 DESIGN @f@a@d_@board 553 VIEW struct.bd 554 GRAPHIC 10554,0 302 0 555 DESIGN @f@a@d_@board 556 VIEW struct.bd 557 GRAPHIC 10594,0 303 0 558 DESIGN @f@a@d_@board 559 VIEW struct.bd 560 GRAPHIC 10586,0 304 0 561 DESIGN @f@a@d_@board 562 VIEW struct.bd 563 GRAPHIC 10578,0 305 0 564 DESIGN @f@a@d_@board 565 VIEW struct.bd 566 GRAPHIC 10538,0 306 0 567 DESIGN @f@a@d_@board 568 VIEW struct.bd 569 GRAPHIC 10546,0 307 0 570 DESIGN @f@a@d_@board 571 VIEW struct.bd 572 GRAPHIC 10522,0 308 0 573 DESIGN @f@a@d_@board 574 VIEW struct.bd 575 GRAPHIC 10530,0 309 0 576 DESIGN @f@a@d_@board 577 VIEW struct.bd 578 GRAPHIC 2409,0 310 0 579 DESIGN @f@a@d_@board 580 VIEW struct.bd 581 GRAPHIC 2423,0 311 0 582 DESIGN @f@a@d_@board 583 VIEW struct.bd 584 GRAPHIC 12320,0 312 0 585 DESIGN @f@a@d_@board 586 VIEW struct.bd 587 GRAPHIC 10052,0 313 0 588 DESIGN @f@a@d_@board 589 VIEW struct.bd 590 GRAPHIC 362,0 314 0 591 DESIGN @f@a@d_@board 592 VIEW struct.bd 593 GRAPHIC 12545,0 315 0 594 DESIGN @f@a@d_@board 595 VIEW struct.bd 596 GRAPHIC 7477,0 316 0 597 DESIGN @f@a@d_@board 598 VIEW struct.bd 599 GRAPHIC 6431,0 317 0 600 DESIGN @f@a@d_@board 601 VIEW struct.bd 602 GRAPHIC 8853,0 318 0 603 DESIGN @f@a@d_@board 604 VIEW struct.bd 605 GRAPHIC 1841,0 319 0 606 DESIGN @f@a@d_@board 607 VIEW struct.bd 608 GRAPHIC 12573,0 320 0 609 DESIGN @f@a@d_@board 610 VIEW struct.bd 611 GRAPHIC 4942,0 321 0 612 DESIGN @f@a@d_@board 613 VIEW struct.bd 614 GRAPHIC 3682,0 322 0 615 DESIGN @f@a@d_@board 616 VIEW struct.bd 617 GRAPHIC 10562,0 324 0 618 DESIGN @f@a@d_@board 619 VIEW struct.bd 620 GRAPHIC 12559,0 325 0 621 DESIGN @f@a@d_@board 622 VIEW struct.bd 623 GRAPHIC 3009,0 326 0 624 DESIGN @f@a@d_@board 625 VIEW struct.bd 626 GRAPHIC 3021,0 327 0 627 DESIGN @f@a@d_@board 628 VIEW struct.bd 629 GRAPHIC 10570,0 328 0 630 DESIGN @f@a@d_@board 631 VIEW struct.bd 632 GRAPHIC 426,0 329 0 633 DESIGN @f@a@d_@board 634 VIEW struct.bd 635 GRAPHIC 434,0 330 0 636 DESIGN @f@a@d_@board 637 VIEW struct.bd 638 GRAPHIC 458,0 331 0 639 DESIGN @f@a@d_@board 640 VIEW struct.bd 641 GRAPHIC 418,0 332 0 642 DESIGN @f@a@d_@board 643 VIEW struct.bd 644 GRAPHIC 466,0 333 0 645 DESIGN @f@a@d_@board 646 VIEW struct.bd 647 GRAPHIC 3015,0 334 0 648 DESIGN @f@a@d_@board 649 VIEW struct.bd 650 GRAPHIC 442,0 335 0 651 DESIGN @f@a@d_@board 652 VIEW struct.bd 653 NO_GRAPHIC 338 476 GRAPHIC 6888,0 248 0 477 DESIGN @f@a@d_@board 478 VIEW struct.bd 479 NO_GRAPHIC 250 480 DESIGN @f@a@d_@board 481 VIEW struct.bd 482 GRAPHIC 7092,0 251 0 483 DESIGN @f@a@d_@board 484 VIEW struct.bd 485 NO_GRAPHIC 254 486 DESIGN @f@a@d_@board 487 VIEW struct.bd 488 GRAPHIC 10310,0 255 0 489 DESIGN @f@a@d_@board 490 VIEW struct.bd 491 NO_GRAPHIC 275 492 DESIGN @f@a@d_@board 493 VIEW struct.bd 494 GRAPHIC 10023,0 276 0 495 DESIGN @f@a@d_@board 496 VIEW struct.bd 497 GRAPHIC 7652,0 279 0 498 DESIGN @f@a@d_@board 499 VIEW struct.bd 500 NO_GRAPHIC 282 501 DESIGN @f@a@d_@board 502 VIEW struct.bd 503 GRAPHIC 169,0 284 0 504 DESIGN @f@a@d_@board 505 VIEW struct.bd 506 GRAPHIC 176,0 285 1 507 DESIGN @f@a@d_@board 508 VIEW struct.bd 509 GRAPHIC 245,0 289 0 510 DESIGN @f@a@d_@board 511 VIEW struct.bd 512 GRAPHIC 1865,0 290 0 513 DESIGN @f@a@d_@board 514 VIEW struct.bd 515 GRAPHIC 1873,0 291 0 516 DESIGN @f@a@d_@board 517 VIEW struct.bd 518 GRAPHIC 1881,0 292 0 519 DESIGN @f@a@d_@board 520 VIEW struct.bd 521 GRAPHIC 1889,0 293 0 522 DESIGN @f@a@d_@board 523 VIEW struct.bd 524 GRAPHIC 1467,0 294 0 525 DESIGN @f@a@d_@board 526 VIEW struct.bd 527 GRAPHIC 1730,0 295 0 528 DESIGN @f@a@d_@board 529 VIEW struct.bd 530 GRAPHIC 277,0 296 0 531 DESIGN @f@a@d_@board 532 VIEW struct.bd 533 GRAPHIC 285,0 297 0 534 DESIGN @f@a@d_@board 535 VIEW struct.bd 536 GRAPHIC 3218,0 298 0 537 DESIGN @f@a@d_@board 538 VIEW struct.bd 539 GRAPHIC 450,0 299 0 540 DESIGN @f@a@d_@board 541 VIEW struct.bd 542 GRAPHIC 10506,0 300 0 543 DESIGN @f@a@d_@board 544 VIEW struct.bd 545 GRAPHIC 10514,0 301 0 546 DESIGN @f@a@d_@board 547 VIEW struct.bd 548 GRAPHIC 10498,0 302 0 549 DESIGN @f@a@d_@board 550 VIEW struct.bd 551 GRAPHIC 10034,0 303 0 552 DESIGN @f@a@d_@board 553 VIEW struct.bd 554 GRAPHIC 9502,0 304 0 555 DESIGN @f@a@d_@board 556 VIEW struct.bd 557 GRAPHIC 10554,0 305 0 558 DESIGN @f@a@d_@board 559 VIEW struct.bd 560 GRAPHIC 10594,0 306 0 561 DESIGN @f@a@d_@board 562 VIEW struct.bd 563 GRAPHIC 10586,0 307 0 564 DESIGN @f@a@d_@board 565 VIEW struct.bd 566 GRAPHIC 10578,0 308 0 567 DESIGN @f@a@d_@board 568 VIEW struct.bd 569 GRAPHIC 10538,0 309 0 570 DESIGN @f@a@d_@board 571 VIEW struct.bd 572 GRAPHIC 10546,0 310 0 573 DESIGN @f@a@d_@board 574 VIEW struct.bd 575 GRAPHIC 10522,0 311 0 576 DESIGN @f@a@d_@board 577 VIEW struct.bd 578 GRAPHIC 10530,0 312 0 579 DESIGN @f@a@d_@board 580 VIEW struct.bd 581 GRAPHIC 2409,0 313 0 582 DESIGN @f@a@d_@board 583 VIEW struct.bd 584 GRAPHIC 2423,0 314 0 585 DESIGN @f@a@d_@board 586 VIEW struct.bd 587 GRAPHIC 12320,0 315 0 588 DESIGN @f@a@d_@board 589 VIEW struct.bd 590 GRAPHIC 10052,0 316 0 591 DESIGN @f@a@d_@board 592 VIEW struct.bd 593 GRAPHIC 362,0 317 0 594 DESIGN @f@a@d_@board 595 VIEW struct.bd 596 GRAPHIC 12545,0 318 0 597 DESIGN @f@a@d_@board 598 VIEW struct.bd 599 GRAPHIC 7477,0 319 0 600 DESIGN @f@a@d_@board 601 VIEW struct.bd 602 GRAPHIC 6431,0 320 0 603 DESIGN @f@a@d_@board 604 VIEW struct.bd 605 GRAPHIC 8853,0 321 0 606 DESIGN @f@a@d_@board 607 VIEW struct.bd 608 GRAPHIC 1841,0 322 0 609 DESIGN @f@a@d_@board 610 VIEW struct.bd 611 GRAPHIC 12573,0 323 0 612 DESIGN @f@a@d_@board 613 VIEW struct.bd 614 GRAPHIC 4942,0 324 0 615 DESIGN @f@a@d_@board 616 VIEW struct.bd 617 GRAPHIC 3682,0 325 0 618 DESIGN @f@a@d_@board 619 VIEW struct.bd 620 GRAPHIC 10562,0 327 0 621 DESIGN @f@a@d_@board 622 VIEW struct.bd 623 GRAPHIC 12559,0 328 0 624 DESIGN @f@a@d_@board 625 VIEW struct.bd 626 GRAPHIC 3009,0 329 0 627 DESIGN @f@a@d_@board 628 VIEW struct.bd 629 GRAPHIC 3021,0 330 0 630 DESIGN @f@a@d_@board 631 VIEW struct.bd 632 GRAPHIC 10570,0 331 0 633 DESIGN @f@a@d_@board 634 VIEW struct.bd 635 GRAPHIC 426,0 332 0 636 DESIGN @f@a@d_@board 637 VIEW struct.bd 638 GRAPHIC 434,0 333 0 639 DESIGN @f@a@d_@board 640 VIEW struct.bd 641 GRAPHIC 458,0 334 0 642 DESIGN @f@a@d_@board 643 VIEW struct.bd 644 GRAPHIC 418,0 335 0 645 DESIGN @f@a@d_@board 646 VIEW struct.bd 647 GRAPHIC 466,0 336 0 648 DESIGN @f@a@d_@board 649 VIEW struct.bd 650 GRAPHIC 3015,0 337 0 651 DESIGN @f@a@d_@board 652 VIEW struct.bd 653 GRAPHIC 442,0 338 0 654 DESIGN @f@a@d_@board 655 VIEW struct.bd 656 GRAPHIC 13136,0 342 0 657 DESIGN @f@a@d_@board 658 VIEW struct.bd 659 NO_GRAPHIC 344 -
firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib/hds/.xrf/fad_main_struct.xrf
r10075 r10081 271 271 DESIGN @f@a@d_main 272 272 VIEW struct.bd 273 GRAPHIC 4405,0 138 0 274 DESIGN @f@a@d_main 275 VIEW struct.bd 276 GRAPHIC 10314,0 139 0 277 DESIGN @f@a@d_main 278 VIEW struct.bd 279 GRAPHIC 6544,0 140 0 280 DESIGN @f@a@d_main 281 VIEW struct.bd 282 GRAPHIC 6450,0 141 0 283 DESIGN @f@a@d_main 284 VIEW struct.bd 285 GRAPHIC 5948,0 142 0 286 DESIGN @f@a@d_main 287 VIEW struct.bd 288 GRAPHIC 2640,0 143 0 289 DESIGN @f@a@d_main 290 VIEW struct.bd 291 GRAPHIC 9231,0 144 0 292 DESIGN @f@a@d_main 293 VIEW struct.bd 294 GRAPHIC 9239,0 145 0 295 DESIGN @f@a@d_main 296 VIEW struct.bd 297 GRAPHIC 9941,0 146 0 298 DESIGN @f@a@d_main 299 VIEW struct.bd 300 GRAPHIC 362,0 147 0 301 DESIGN @f@a@d_main 302 VIEW struct.bd 303 GRAPHIC 368,0 148 0 304 DESIGN @f@a@d_main 305 VIEW struct.bd 306 GRAPHIC 2297,0 149 0 307 DESIGN @f@a@d_main 308 VIEW struct.bd 309 GRAPHIC 2574,0 150 0 310 DESIGN @f@a@d_main 311 VIEW struct.bd 312 GRAPHIC 2580,0 151 0 313 DESIGN @f@a@d_main 314 VIEW struct.bd 315 GRAPHIC 10465,0 153 0 316 DESIGN @f@a@d_main 317 VIEW struct.bd 318 GRAPHIC 2924,0 154 0 319 DESIGN @f@a@d_main 320 VIEW struct.bd 321 GRAPHIC 2598,0 155 0 322 DESIGN @f@a@d_main 323 VIEW struct.bd 324 GRAPHIC 10264,0 156 0 325 DESIGN @f@a@d_main 326 VIEW struct.bd 327 GRAPHIC 8730,0 157 0 328 DESIGN @f@a@d_main 329 VIEW struct.bd 330 GRAPHIC 8746,0 158 0 331 DESIGN @f@a@d_main 332 VIEW struct.bd 333 GRAPHIC 5478,0 159 0 334 DESIGN @f@a@d_main 335 VIEW struct.bd 336 GRAPHIC 5472,0 160 0 337 DESIGN @f@a@d_main 338 VIEW struct.bd 339 GRAPHIC 10627,0 161 0 340 DESIGN @f@a@d_main 341 VIEW struct.bd 342 GRAPHIC 10635,0 162 0 343 DESIGN @f@a@d_main 344 VIEW struct.bd 345 GRAPHIC 9949,0 163 0 346 DESIGN @f@a@d_main 347 VIEW struct.bd 348 GRAPHIC 10302,0 164 0 349 DESIGN @f@a@d_main 350 VIEW struct.bd 351 GRAPHIC 10308,0 165 0 352 DESIGN @f@a@d_main 353 VIEW struct.bd 354 GRAPHIC 10296,0 166 0 355 DESIGN @f@a@d_main 356 VIEW struct.bd 357 GRAPHIC 1981,0 167 0 358 DESIGN @f@a@d_main 359 VIEW struct.bd 360 GRAPHIC 10449,0 168 0 361 DESIGN @f@a@d_main 362 VIEW struct.bd 363 GRAPHIC 8414,0 169 0 364 DESIGN @f@a@d_main 365 VIEW struct.bd 366 GRAPHIC 2468,0 170 0 367 DESIGN @f@a@d_main 368 VIEW struct.bd 369 GRAPHIC 2492,0 171 0 370 DESIGN @f@a@d_main 371 VIEW struct.bd 372 GRAPHIC 2486,0 172 0 373 DESIGN @f@a@d_main 374 VIEW struct.bd 375 GRAPHIC 2474,0 173 0 376 DESIGN @f@a@d_main 377 VIEW struct.bd 378 GRAPHIC 2498,0 174 0 379 DESIGN @f@a@d_main 380 VIEW struct.bd 381 GRAPHIC 2504,0 175 0 382 DESIGN @f@a@d_main 383 VIEW struct.bd 384 GRAPHIC 2480,0 176 0 385 DESIGN @f@a@d_main 386 VIEW struct.bd 387 GRAPHIC 320,0 177 0 388 DESIGN @f@a@d_main 389 VIEW struct.bd 390 NO_GRAPHIC 178 391 DESIGN @f@a@d_main 392 VIEW struct.bd 393 GRAPHIC 6276,0 180 0 394 DESIGN @f@a@d_main 395 VIEW struct.bd 396 GRAPHIC 3888,0 181 0 397 DESIGN @f@a@d_main 398 VIEW struct.bd 399 NO_GRAPHIC 183 273 GRAPHIC 11403,0 138 0 274 DESIGN @f@a@d_main 275 VIEW struct.bd 276 GRAPHIC 4405,0 139 0 277 DESIGN @f@a@d_main 278 VIEW struct.bd 279 GRAPHIC 10314,0 140 0 280 DESIGN @f@a@d_main 281 VIEW struct.bd 282 GRAPHIC 6544,0 141 0 283 DESIGN @f@a@d_main 284 VIEW struct.bd 285 GRAPHIC 6450,0 142 0 286 DESIGN @f@a@d_main 287 VIEW struct.bd 288 GRAPHIC 5948,0 143 0 289 DESIGN @f@a@d_main 290 VIEW struct.bd 291 GRAPHIC 2640,0 144 0 292 DESIGN @f@a@d_main 293 VIEW struct.bd 294 GRAPHIC 9231,0 145 0 295 DESIGN @f@a@d_main 296 VIEW struct.bd 297 GRAPHIC 9239,0 146 0 298 DESIGN @f@a@d_main 299 VIEW struct.bd 300 GRAPHIC 9941,0 147 0 301 DESIGN @f@a@d_main 302 VIEW struct.bd 303 GRAPHIC 362,0 148 0 304 DESIGN @f@a@d_main 305 VIEW struct.bd 306 GRAPHIC 368,0 149 0 307 DESIGN @f@a@d_main 308 VIEW struct.bd 309 GRAPHIC 2297,0 150 0 310 DESIGN @f@a@d_main 311 VIEW struct.bd 312 GRAPHIC 2574,0 151 0 313 DESIGN @f@a@d_main 314 VIEW struct.bd 315 GRAPHIC 2580,0 152 0 316 DESIGN @f@a@d_main 317 VIEW struct.bd 318 GRAPHIC 10465,0 154 0 319 DESIGN @f@a@d_main 320 VIEW struct.bd 321 GRAPHIC 2924,0 155 0 322 DESIGN @f@a@d_main 323 VIEW struct.bd 324 GRAPHIC 2598,0 156 0 325 DESIGN @f@a@d_main 326 VIEW struct.bd 327 GRAPHIC 10264,0 157 0 328 DESIGN @f@a@d_main 329 VIEW struct.bd 330 GRAPHIC 8730,0 158 0 331 DESIGN @f@a@d_main 332 VIEW struct.bd 333 GRAPHIC 8746,0 159 0 334 DESIGN @f@a@d_main 335 VIEW struct.bd 336 GRAPHIC 5478,0 160 0 337 DESIGN @f@a@d_main 338 VIEW struct.bd 339 GRAPHIC 5472,0 161 0 340 DESIGN @f@a@d_main 341 VIEW struct.bd 342 GRAPHIC 10627,0 162 0 343 DESIGN @f@a@d_main 344 VIEW struct.bd 345 GRAPHIC 10635,0 163 0 346 DESIGN @f@a@d_main 347 VIEW struct.bd 348 GRAPHIC 9949,0 164 0 349 DESIGN @f@a@d_main 350 VIEW struct.bd 351 GRAPHIC 10302,0 165 0 352 DESIGN @f@a@d_main 353 VIEW struct.bd 354 GRAPHIC 10308,0 166 0 355 DESIGN @f@a@d_main 356 VIEW struct.bd 357 GRAPHIC 10296,0 167 0 358 DESIGN @f@a@d_main 359 VIEW struct.bd 360 GRAPHIC 1981,0 168 0 361 DESIGN @f@a@d_main 362 VIEW struct.bd 363 GRAPHIC 10449,0 169 0 364 DESIGN @f@a@d_main 365 VIEW struct.bd 366 GRAPHIC 8414,0 170 0 367 DESIGN @f@a@d_main 368 VIEW struct.bd 369 GRAPHIC 2468,0 171 0 370 DESIGN @f@a@d_main 371 VIEW struct.bd 372 GRAPHIC 2492,0 172 0 373 DESIGN @f@a@d_main 374 VIEW struct.bd 375 GRAPHIC 2486,0 173 0 376 DESIGN @f@a@d_main 377 VIEW struct.bd 378 GRAPHIC 2474,0 174 0 379 DESIGN @f@a@d_main 380 VIEW struct.bd 381 GRAPHIC 2498,0 175 0 382 DESIGN @f@a@d_main 383 VIEW struct.bd 384 GRAPHIC 2504,0 176 0 385 DESIGN @f@a@d_main 386 VIEW struct.bd 387 GRAPHIC 2480,0 177 0 388 DESIGN @f@a@d_main 389 VIEW struct.bd 390 GRAPHIC 320,0 178 0 391 DESIGN @f@a@d_main 392 VIEW struct.bd 393 NO_GRAPHIC 179 394 DESIGN @f@a@d_main 395 VIEW struct.bd 396 GRAPHIC 6276,0 181 0 397 DESIGN @f@a@d_main 398 VIEW struct.bd 399 GRAPHIC 3888,0 182 0 400 DESIGN @f@a@d_main 401 VIEW struct.bd 402 NO_GRAPHIC 184 400 403 LIBRARY FACT_FAD_lib 401 404 DESIGN adc_buffer 402 405 VIEW beha 403 GRAPHIC 5678,0 18 50404 DESIGN @f@a@d_main 405 VIEW struct.bd 406 NO_GRAPHIC 19 2407 DESIGN @f@a@d_main 408 VIEW struct.bd 409 GRAPHIC 9175,0 19 40406 GRAPHIC 5678,0 186 0 407 DESIGN @f@a@d_main 408 VIEW struct.bd 409 NO_GRAPHIC 193 410 DESIGN @f@a@d_main 411 VIEW struct.bd 412 GRAPHIC 9175,0 195 0 410 413 DESIGN clock_generator_var_ps 411 414 VIEW symbol.sb 412 GRAPHIC 168,0 19 60415 GRAPHIC 168,0 197 0 413 416 DESIGN clock_generator_var_ps 414 417 VIEW symbol.sb 415 GRAPHIC 848,0 19 70418 GRAPHIC 848,0 198 0 416 419 DESIGN clock_generator_var_ps 417 420 VIEW symbol.sb 418 GRAPHIC 703,0 19 80421 GRAPHIC 703,0 199 0 419 422 DESIGN clock_generator_var_ps 420 423 VIEW symbol.sb 421 GRAPHIC 698,0 1990424 GRAPHIC 698,0 200 0 422 425 DESIGN clock_generator_var_ps 423 426 VIEW symbol.sb 424 GRAPHIC 126,0 20 00427 GRAPHIC 126,0 201 0 425 428 DESIGN clock_generator_var_ps 426 429 VIEW symbol.sb 427 GRAPHIC 643,0 20 10430 GRAPHIC 643,0 202 0 428 431 DESIGN clock_generator_var_ps 429 432 VIEW symbol.sb 430 GRAPHIC 121,0 20 20433 GRAPHIC 121,0 203 0 431 434 DESIGN clock_generator_var_ps 432 435 VIEW symbol.sb 433 GRAPHIC 481,0 20 30436 GRAPHIC 481,0 204 0 434 437 DESIGN clock_generator_var_ps 435 438 VIEW symbol.sb 436 GRAPHIC 544,0 20 40439 GRAPHIC 544,0 205 0 437 440 DESIGN clock_generator_var_ps 438 441 VIEW symbol.sb 439 GRAPHIC 524,0 20 50442 GRAPHIC 524,0 206 0 440 443 DESIGN clock_generator_var_ps 441 444 VIEW symbol.sb 442 GRAPHIC 539,0 20 60445 GRAPHIC 539,0 207 0 443 446 DESIGN clock_generator_var_ps 444 447 VIEW symbol.sb 445 GRAPHIC 529,0 20 70448 GRAPHIC 529,0 208 0 446 449 DESIGN clock_generator_var_ps 447 450 VIEW symbol.sb 448 GRAPHIC 534,0 20 80451 GRAPHIC 534,0 209 0 449 452 DESIGN clock_generator_var_ps 450 453 VIEW symbol.sb 451 GRAPHIC 475,0 2 090454 GRAPHIC 475,0 210 0 452 455 DESIGN clock_generator_var_ps 453 456 VIEW symbol.sb 454 GRAPHIC 463,0 21 00457 GRAPHIC 463,0 211 0 455 458 DESIGN clock_generator_var_ps 456 459 VIEW symbol.sb 457 GRAPHIC 469,0 21 10458 DESIGN @f@a@d_main 459 VIEW struct.bd 460 GRAPHIC 5072,0 21 50460 GRAPHIC 469,0 212 0 461 DESIGN @f@a@d_main 462 VIEW struct.bd 463 GRAPHIC 5072,0 216 0 461 464 DESIGN control_unit 462 465 VIEW symbol.sb 463 GRAPHIC 130,0 21 70466 GRAPHIC 130,0 218 0 464 467 DESIGN control_unit 465 468 VIEW symbol.sb 466 GRAPHIC 135,0 21 80469 GRAPHIC 135,0 219 0 467 470 DESIGN control_unit 468 471 VIEW symbol.sb 469 GRAPHIC 170,0 2 190472 GRAPHIC 170,0 220 0 470 473 DESIGN control_unit 471 474 VIEW symbol.sb 472 GRAPHIC 175,0 22 00475 GRAPHIC 175,0 221 0 473 476 DESIGN control_unit 474 477 VIEW symbol.sb 475 GRAPHIC 160,0 22 10478 GRAPHIC 160,0 222 0 476 479 DESIGN control_unit 477 480 VIEW symbol.sb 478 GRAPHIC 145,0 22 20481 GRAPHIC 145,0 223 0 479 482 DESIGN control_unit 480 483 VIEW symbol.sb 481 GRAPHIC 140,0 22 30484 GRAPHIC 140,0 224 0 482 485 DESIGN control_unit 483 486 VIEW symbol.sb 484 GRAPHIC 180,0 22 40487 GRAPHIC 180,0 225 0 485 488 DESIGN control_unit 486 489 VIEW symbol.sb 487 GRAPHIC 558,0 22 50490 GRAPHIC 558,0 226 0 488 491 DESIGN control_unit 489 492 VIEW symbol.sb 490 GRAPHIC 564,0 22 70493 GRAPHIC 564,0 228 0 491 494 DESIGN control_unit 492 495 VIEW symbol.sb 493 GRAPHIC 350,0 2 290496 GRAPHIC 350,0 230 0 494 497 DESIGN control_unit 495 498 VIEW symbol.sb 496 GRAPHIC 165,0 23 00499 GRAPHIC 165,0 231 0 497 500 DESIGN control_unit 498 501 VIEW symbol.sb 499 GRAPHIC 155,0 23 10502 GRAPHIC 155,0 232 0 500 503 DESIGN control_unit 501 504 VIEW symbol.sb 502 GRAPHIC 150,0 23 20503 DESIGN @f@a@d_main 504 VIEW struct.bd 505 GRAPHIC 8277,0 23 50505 GRAPHIC 150,0 233 0 506 DESIGN @f@a@d_main 507 VIEW struct.bd 508 GRAPHIC 8277,0 236 0 506 509 DESIGN data@r@a@m_64b_16b_width14_5 507 510 VIEW data@r@a@m_64b_16b_width14_5_a 508 GRAPHIC 48,0 23 70511 GRAPHIC 48,0 238 0 509 512 DESIGN data@r@a@m_64b_16b_width14_5 510 513 VIEW data@r@a@m_64b_16b_width14_5_a 511 GRAPHIC 53,0 23 80514 GRAPHIC 53,0 239 0 512 515 DESIGN data@r@a@m_64b_16b_width14_5 513 516 VIEW data@r@a@m_64b_16b_width14_5_a 514 GRAPHIC 58,0 2 390517 GRAPHIC 58,0 240 0 515 518 DESIGN data@r@a@m_64b_16b_width14_5 516 519 VIEW data@r@a@m_64b_16b_width14_5_a 517 GRAPHIC 63,0 24 00520 GRAPHIC 63,0 241 0 518 521 DESIGN data@r@a@m_64b_16b_width14_5 519 522 VIEW data@r@a@m_64b_16b_width14_5_a 520 GRAPHIC 68,0 24 10523 GRAPHIC 68,0 242 0 521 524 DESIGN data@r@a@m_64b_16b_width14_5 522 525 VIEW data@r@a@m_64b_16b_width14_5_a 523 GRAPHIC 73,0 24 20526 GRAPHIC 73,0 243 0 524 527 DESIGN data@r@a@m_64b_16b_width14_5 525 528 VIEW data@r@a@m_64b_16b_width14_5_a 526 GRAPHIC 78,0 243 0 527 DESIGN @f@a@d_main 528 VIEW struct.bd 529 GRAPHIC 1399,0 246 0 530 DESIGN data_generator 531 VIEW symbol.sb 532 GRAPHIC 14,0 247 1 533 DESIGN data_generator 534 VIEW @behavioral 535 GRAPHIC 48,0 251 0 536 DESIGN data_generator 537 VIEW @behavioral 538 GRAPHIC 53,0 253 0 539 DESIGN data_generator 540 VIEW @behavioral 541 GRAPHIC 58,0 254 0 542 DESIGN data_generator 543 VIEW @behavioral 544 GRAPHIC 73,0 255 0 545 DESIGN data_generator 546 VIEW @behavioral 547 GRAPHIC 78,0 256 0 548 DESIGN data_generator 549 VIEW @behavioral 550 GRAPHIC 402,0 257 0 551 DESIGN data_generator 552 VIEW @behavioral 553 GRAPHIC 407,0 258 0 554 DESIGN data_generator 555 VIEW @behavioral 556 GRAPHIC 1479,0 259 0 557 DESIGN data_generator 558 VIEW @behavioral 559 GRAPHIC 1122,0 261 0 560 DESIGN data_generator 561 VIEW @behavioral 562 GRAPHIC 963,0 263 0 563 DESIGN data_generator 564 VIEW @behavioral 565 GRAPHIC 1127,0 265 0 566 DESIGN data_generator 567 VIEW @behavioral 568 GRAPHIC 1048,0 267 0 569 DESIGN data_generator 570 VIEW @behavioral 571 GRAPHIC 958,0 268 0 572 DESIGN data_generator 573 VIEW @behavioral 574 GRAPHIC 1053,0 269 0 575 DESIGN data_generator 576 VIEW @behavioral 577 GRAPHIC 1201,0 270 0 578 DESIGN data_generator 579 VIEW @behavioral 580 GRAPHIC 1196,0 271 0 581 DESIGN data_generator 582 VIEW @behavioral 583 GRAPHIC 1206,0 272 0 584 DESIGN data_generator 585 VIEW @behavioral 586 GRAPHIC 473,0 273 0 587 DESIGN data_generator 588 VIEW @behavioral 589 GRAPHIC 412,0 274 0 590 DESIGN data_generator 591 VIEW @behavioral 592 GRAPHIC 1085,0 275 0 593 DESIGN data_generator 594 VIEW @behavioral 595 GRAPHIC 1090,0 276 0 596 DESIGN data_generator 597 VIEW @behavioral 598 GRAPHIC 1240,0 277 0 599 DESIGN data_generator 600 VIEW @behavioral 601 GRAPHIC 526,0 278 0 602 DESIGN data_generator 603 VIEW @behavioral 604 GRAPHIC 88,0 279 0 605 DESIGN data_generator 606 VIEW @behavioral 607 GRAPHIC 285,0 280 0 608 DESIGN data_generator 609 VIEW @behavioral 610 GRAPHIC 93,0 281 0 611 DESIGN data_generator 612 VIEW @behavioral 613 GRAPHIC 98,0 282 0 614 DESIGN data_generator 615 VIEW @behavioral 616 GRAPHIC 1164,0 283 0 617 DESIGN data_generator 618 VIEW @behavioral 619 GRAPHIC 1159,0 285 0 620 DESIGN data_generator 621 VIEW @behavioral 622 GRAPHIC 898,0 286 0 623 DESIGN data_generator 624 VIEW @behavioral 625 GRAPHIC 637,0 287 0 626 DESIGN data_generator 627 VIEW @behavioral 628 GRAPHIC 1395,0 288 0 629 DESIGN data_generator 630 VIEW @behavioral 631 GRAPHIC 1427,0 289 0 632 DESIGN data_generator 633 VIEW @behavioral 634 GRAPHIC 676,0 290 0 635 DESIGN data_generator 636 VIEW @behavioral 637 GRAPHIC 845,0 291 0 638 DESIGN data_generator 639 VIEW @behavioral 640 GRAPHIC 681,0 292 0 641 DESIGN data_generator 642 VIEW @behavioral 643 GRAPHIC 801,0 293 0 644 DESIGN data_generator 645 VIEW @behavioral 646 GRAPHIC 1464,0 294 0 647 DESIGN data_generator 648 VIEW @behavioral 649 GRAPHIC 1469,0 295 0 650 DESIGN data_generator 651 VIEW @behavioral 652 GRAPHIC 1459,0 296 0 653 DESIGN data_generator 654 VIEW @behavioral 655 GRAPHIC 1474,0 297 0 656 DESIGN data_generator 657 VIEW @behavioral 658 GRAPHIC 806,0 298 0 659 DESIGN data_generator 660 VIEW @behavioral 661 GRAPHIC 811,0 299 0 662 DESIGN @f@a@d_main 663 VIEW struct.bd 664 GRAPHIC 4903,0 302 0 665 DESIGN @f@a@d_main 666 VIEW struct.bd 667 NO_GRAPHIC 320 668 DESIGN @f@a@d_main 669 VIEW struct.bd 670 GRAPHIC 11209,0 322 0 671 DESIGN @f@a@d_main 672 VIEW struct.bd 673 GRAPHIC 11216,0 323 1 674 DESIGN @f@a@d_main 675 VIEW struct.bd 676 NO_GRAPHIC 336 677 DESIGN @f@a@d_main 678 VIEW struct.bd 679 GRAPHIC 2311,0 338 0 680 DESIGN memory_manager 681 VIEW symbol.sb 682 GRAPHIC 14,0 339 1 683 DESIGN memory_manager 684 VIEW beha 685 GRAPHIC 138,0 344 0 686 DESIGN memory_manager 687 VIEW beha 688 GRAPHIC 194,0 345 0 689 DESIGN memory_manager 690 VIEW beha 691 GRAPHIC 349,0 346 0 692 DESIGN memory_manager 693 VIEW beha 694 GRAPHIC 949,0 347 0 695 DESIGN memory_manager 696 VIEW beha 697 GRAPHIC 569,0 349 0 698 DESIGN memory_manager 699 VIEW beha 700 GRAPHIC 224,0 351 0 701 DESIGN memory_manager 702 VIEW beha 703 GRAPHIC 254,0 352 0 704 DESIGN memory_manager 705 VIEW beha 706 GRAPHIC 804,0 353 0 707 DESIGN memory_manager 708 VIEW beha 709 GRAPHIC 433,0 354 0 710 DESIGN memory_manager 711 VIEW beha 712 GRAPHIC 622,0 355 0 713 DESIGN memory_manager 714 VIEW beha 715 GRAPHIC 289,0 356 0 716 DESIGN memory_manager 717 VIEW beha 718 GRAPHIC 309,0 357 0 719 DESIGN memory_manager 720 VIEW beha 721 GRAPHIC 284,0 358 0 722 DESIGN memory_manager 723 VIEW beha 724 GRAPHIC 294,0 359 0 725 DESIGN memory_manager 726 VIEW beha 727 GRAPHIC 304,0 360 0 728 DESIGN memory_manager 729 VIEW beha 730 GRAPHIC 299,0 361 0 731 DESIGN memory_manager 732 VIEW beha 733 GRAPHIC 379,0 362 0 734 DESIGN memory_manager 735 VIEW beha 736 GRAPHIC 915,0 363 0 737 DESIGN memory_manager 738 VIEW beha 739 GRAPHIC 51,0 364 0 740 DESIGN @f@a@d_main 741 VIEW struct.bd 742 GRAPHIC 5793,0 367 0 529 GRAPHIC 78,0 244 0 530 DESIGN @f@a@d_main 531 VIEW struct.bd 532 GRAPHIC 1399,0 247 0 533 DESIGN data_generator 534 VIEW symbol.sb 535 GRAPHIC 14,0 248 1 536 DESIGN data_generator 537 VIEW @behavioral 538 GRAPHIC 48,0 252 0 539 DESIGN data_generator 540 VIEW @behavioral 541 GRAPHIC 53,0 254 0 542 DESIGN data_generator 543 VIEW @behavioral 544 GRAPHIC 58,0 255 0 545 DESIGN data_generator 546 VIEW @behavioral 547 GRAPHIC 73,0 256 0 548 DESIGN data_generator 549 VIEW @behavioral 550 GRAPHIC 78,0 257 0 551 DESIGN data_generator 552 VIEW @behavioral 553 GRAPHIC 402,0 258 0 554 DESIGN data_generator 555 VIEW @behavioral 556 GRAPHIC 407,0 259 0 557 DESIGN data_generator 558 VIEW @behavioral 559 GRAPHIC 1479,0 260 0 560 DESIGN data_generator 561 VIEW @behavioral 562 GRAPHIC 1122,0 262 0 563 DESIGN data_generator 564 VIEW @behavioral 565 GRAPHIC 963,0 264 0 566 DESIGN data_generator 567 VIEW @behavioral 568 GRAPHIC 1127,0 266 0 569 DESIGN data_generator 570 VIEW @behavioral 571 GRAPHIC 1048,0 268 0 572 DESIGN data_generator 573 VIEW @behavioral 574 GRAPHIC 958,0 269 0 575 DESIGN data_generator 576 VIEW @behavioral 577 GRAPHIC 1053,0 270 0 578 DESIGN data_generator 579 VIEW @behavioral 580 GRAPHIC 1201,0 271 0 581 DESIGN data_generator 582 VIEW @behavioral 583 GRAPHIC 1196,0 272 0 584 DESIGN data_generator 585 VIEW @behavioral 586 GRAPHIC 1206,0 273 0 587 DESIGN data_generator 588 VIEW @behavioral 589 GRAPHIC 473,0 274 0 590 DESIGN data_generator 591 VIEW @behavioral 592 GRAPHIC 412,0 275 0 593 DESIGN data_generator 594 VIEW @behavioral 595 GRAPHIC 1085,0 276 0 596 DESIGN data_generator 597 VIEW @behavioral 598 GRAPHIC 1090,0 277 0 599 DESIGN data_generator 600 VIEW @behavioral 601 GRAPHIC 1240,0 278 0 602 DESIGN data_generator 603 VIEW @behavioral 604 GRAPHIC 526,0 279 0 605 DESIGN data_generator 606 VIEW @behavioral 607 GRAPHIC 88,0 280 0 608 DESIGN data_generator 609 VIEW @behavioral 610 GRAPHIC 285,0 281 0 611 DESIGN data_generator 612 VIEW @behavioral 613 GRAPHIC 93,0 282 0 614 DESIGN data_generator 615 VIEW @behavioral 616 GRAPHIC 98,0 283 0 617 DESIGN data_generator 618 VIEW @behavioral 619 GRAPHIC 1164,0 284 0 620 DESIGN data_generator 621 VIEW @behavioral 622 GRAPHIC 1159,0 286 0 623 DESIGN data_generator 624 VIEW @behavioral 625 GRAPHIC 898,0 287 0 626 DESIGN data_generator 627 VIEW @behavioral 628 GRAPHIC 637,0 288 0 629 DESIGN data_generator 630 VIEW @behavioral 631 GRAPHIC 1395,0 289 0 632 DESIGN data_generator 633 VIEW @behavioral 634 GRAPHIC 1427,0 290 0 635 DESIGN data_generator 636 VIEW @behavioral 637 GRAPHIC 676,0 291 0 638 DESIGN data_generator 639 VIEW @behavioral 640 GRAPHIC 845,0 292 0 641 DESIGN data_generator 642 VIEW @behavioral 643 GRAPHIC 681,0 293 0 644 DESIGN data_generator 645 VIEW @behavioral 646 GRAPHIC 801,0 294 0 647 DESIGN data_generator 648 VIEW @behavioral 649 GRAPHIC 1464,0 295 0 650 DESIGN data_generator 651 VIEW @behavioral 652 GRAPHIC 1469,0 296 0 653 DESIGN data_generator 654 VIEW @behavioral 655 GRAPHIC 1459,0 297 0 656 DESIGN data_generator 657 VIEW @behavioral 658 GRAPHIC 1474,0 298 0 659 DESIGN data_generator 660 VIEW @behavioral 661 GRAPHIC 806,0 299 0 662 DESIGN data_generator 663 VIEW @behavioral 664 GRAPHIC 811,0 300 0 665 DESIGN data_generator 666 VIEW @behavioral 667 GRAPHIC 1519,0 301 0 668 DESIGN @f@a@d_main 669 VIEW struct.bd 670 GRAPHIC 4903,0 304 0 671 DESIGN @f@a@d_main 672 VIEW struct.bd 673 NO_GRAPHIC 322 674 DESIGN @f@a@d_main 675 VIEW struct.bd 676 GRAPHIC 11209,0 324 0 677 DESIGN @f@a@d_main 678 VIEW struct.bd 679 GRAPHIC 11216,0 325 1 680 DESIGN @f@a@d_main 681 VIEW struct.bd 682 NO_GRAPHIC 338 683 DESIGN @f@a@d_main 684 VIEW struct.bd 685 GRAPHIC 2311,0 340 0 686 DESIGN memory_manager 687 VIEW symbol.sb 688 GRAPHIC 14,0 341 1 689 DESIGN memory_manager 690 VIEW beha 691 GRAPHIC 138,0 346 0 692 DESIGN memory_manager 693 VIEW beha 694 GRAPHIC 194,0 347 0 695 DESIGN memory_manager 696 VIEW beha 697 GRAPHIC 349,0 348 0 698 DESIGN memory_manager 699 VIEW beha 700 GRAPHIC 949,0 349 0 701 DESIGN memory_manager 702 VIEW beha 703 GRAPHIC 569,0 351 0 704 DESIGN memory_manager 705 VIEW beha 706 GRAPHIC 224,0 353 0 707 DESIGN memory_manager 708 VIEW beha 709 GRAPHIC 254,0 354 0 710 DESIGN memory_manager 711 VIEW beha 712 GRAPHIC 804,0 355 0 713 DESIGN memory_manager 714 VIEW beha 715 GRAPHIC 433,0 356 0 716 DESIGN memory_manager 717 VIEW beha 718 GRAPHIC 622,0 357 0 719 DESIGN memory_manager 720 VIEW beha 721 GRAPHIC 289,0 358 0 722 DESIGN memory_manager 723 VIEW beha 724 GRAPHIC 309,0 359 0 725 DESIGN memory_manager 726 VIEW beha 727 GRAPHIC 284,0 360 0 728 DESIGN memory_manager 729 VIEW beha 730 GRAPHIC 294,0 361 0 731 DESIGN memory_manager 732 VIEW beha 733 GRAPHIC 304,0 362 0 734 DESIGN memory_manager 735 VIEW beha 736 GRAPHIC 299,0 363 0 737 DESIGN memory_manager 738 VIEW beha 739 GRAPHIC 379,0 364 0 740 DESIGN memory_manager 741 VIEW beha 742 GRAPHIC 915,0 365 0 743 DESIGN memory_manager 744 VIEW beha 745 GRAPHIC 51,0 366 0 746 DESIGN @f@a@d_main 747 VIEW struct.bd 748 GRAPHIC 5793,0 369 0 743 749 DESIGN spi_interface 744 750 VIEW symbol.sb 745 GRAPHIC 1121,0 3 690751 GRAPHIC 1121,0 371 0 746 752 DESIGN spi_interface 747 753 VIEW symbol.sb 748 GRAPHIC 326,0 37 00754 GRAPHIC 326,0 372 0 749 755 DESIGN spi_interface 750 756 VIEW symbol.sb 751 GRAPHIC 197,0 37 10757 GRAPHIC 197,0 373 0 752 758 DESIGN spi_interface 753 759 VIEW symbol.sb 754 GRAPHIC 321,0 37 20760 GRAPHIC 321,0 374 0 755 761 DESIGN spi_interface 756 762 VIEW symbol.sb 757 GRAPHIC 1198,0 37 30763 GRAPHIC 1198,0 375 0 758 764 DESIGN spi_interface 759 765 VIEW symbol.sb 760 GRAPHIC 1017,0 37 40766 GRAPHIC 1017,0 376 0 761 767 DESIGN spi_interface 762 768 VIEW symbol.sb 763 GRAPHIC 1229,0 37 50769 GRAPHIC 1229,0 377 0 764 770 DESIGN spi_interface 765 771 VIEW symbol.sb 766 GRAPHIC 126,0 37 60772 GRAPHIC 126,0 378 0 767 773 DESIGN spi_interface 768 774 VIEW symbol.sb 769 GRAPHIC 819,0 37 70775 GRAPHIC 819,0 379 0 770 776 DESIGN spi_interface 771 777 VIEW symbol.sb 772 GRAPHIC 1022,0 3 780778 GRAPHIC 1022,0 380 0 773 779 DESIGN spi_interface 774 780 VIEW symbol.sb 775 GRAPHIC 824,0 3 790781 GRAPHIC 824,0 381 0 776 782 DESIGN spi_interface 777 783 VIEW symbol.sb 778 GRAPHIC 1283,0 38 00779 DESIGN @f@a@d_main 780 VIEW struct.bd 781 GRAPHIC 1768,0 38 30784 GRAPHIC 1283,0 382 0 785 DESIGN @f@a@d_main 786 VIEW struct.bd 787 GRAPHIC 1768,0 385 0 782 788 DESIGN trigger_counter 783 789 VIEW beha 784 GRAPHIC 48,0 38 50790 GRAPHIC 48,0 387 0 785 791 DESIGN trigger_counter 786 792 VIEW beha 787 GRAPHIC 53,0 38 60793 GRAPHIC 53,0 388 0 788 794 DESIGN trigger_counter 789 795 VIEW beha 790 GRAPHIC 148,0 38 70791 DESIGN @f@a@d_main 792 VIEW struct.bd 793 GRAPHIC 1606,0 39 00794 DESIGN w5300_modul 795 VIEW symbol.sb 796 GRAPHIC 14,0 39 11797 DESIGN w5300_modul 798 VIEW @behavioral 799 GRAPHIC 48,0 39 50800 DESIGN w5300_modul 801 VIEW @behavioral 802 GRAPHIC 53,0 39 60803 DESIGN w5300_modul 804 VIEW @behavioral 805 GRAPHIC 58,0 39 70806 DESIGN w5300_modul 807 VIEW @behavioral 808 GRAPHIC 63,0 3980809 DESIGN w5300_modul 810 VIEW @behavioral 811 GRAPHIC 68,0 3990812 DESIGN w5300_modul 813 VIEW @behavioral 814 GRAPHIC 73,0 40 00815 DESIGN w5300_modul 816 VIEW @behavioral 817 GRAPHIC 491,0 40 10818 DESIGN w5300_modul 819 VIEW @behavioral 820 GRAPHIC 83,0 40 20821 DESIGN w5300_modul 822 VIEW @behavioral 823 GRAPHIC 88,0 40 30824 DESIGN w5300_modul 825 VIEW @behavioral 826 GRAPHIC 93,0 40 40827 DESIGN w5300_modul 828 VIEW @behavioral 829 GRAPHIC 98,0 40 50830 DESIGN w5300_modul 831 VIEW @behavioral 832 GRAPHIC 103,0 40 60833 DESIGN w5300_modul 834 VIEW @behavioral 835 GRAPHIC 108,0 40 70836 DESIGN w5300_modul 837 VIEW @behavioral 838 GRAPHIC 113,0 4 080839 DESIGN w5300_modul 840 VIEW @behavioral 841 GRAPHIC 885,0 4 090842 DESIGN w5300_modul 843 VIEW @behavioral 844 GRAPHIC 118,0 41 00845 DESIGN w5300_modul 846 VIEW @behavioral 847 GRAPHIC 353,0 41 10848 DESIGN w5300_modul 849 VIEW @behavioral 850 GRAPHIC 348,0 41 20851 DESIGN w5300_modul 852 VIEW @behavioral 853 GRAPHIC 385,0 41 30854 DESIGN w5300_modul 855 VIEW @behavioral 856 GRAPHIC 521,0 41 40857 DESIGN w5300_modul 858 VIEW @behavioral 859 GRAPHIC 576,0 41 50860 DESIGN w5300_modul 861 VIEW @behavioral 862 GRAPHIC 566,0 41 60863 DESIGN w5300_modul 864 VIEW @behavioral 865 GRAPHIC 551,0 41 70866 DESIGN w5300_modul 867 VIEW @behavioral 868 GRAPHIC 561,0 4 180869 DESIGN w5300_modul 870 VIEW @behavioral 871 GRAPHIC 571,0 4 190872 DESIGN w5300_modul 873 VIEW @behavioral 874 GRAPHIC 640,0 42 00875 DESIGN w5300_modul 876 VIEW @behavioral 877 GRAPHIC 1052,0 42 10878 DESIGN w5300_modul 879 VIEW @behavioral 880 GRAPHIC 1057,0 42 30881 DESIGN w5300_modul 882 VIEW @behavioral 883 GRAPHIC 556,0 42 50884 DESIGN w5300_modul 885 VIEW @behavioral 886 GRAPHIC 670,0 42 70887 DESIGN w5300_modul 888 VIEW @behavioral 889 GRAPHIC 723,0 4 280890 DESIGN w5300_modul 891 VIEW @behavioral 892 GRAPHIC 917,0 4 290893 DESIGN w5300_modul 894 VIEW @behavioral 895 GRAPHIC 949,0 43 00896 DESIGN w5300_modul 897 VIEW @behavioral 898 GRAPHIC 954,0 43 10899 DESIGN w5300_modul 900 VIEW @behavioral 901 GRAPHIC 988,0 43 20902 DESIGN w5300_modul 903 VIEW @behavioral 904 GRAPHIC 1020,0 43 30905 DESIGN w5300_modul 906 VIEW @behavioral 907 GRAPHIC 1096,0 43 40908 DESIGN w5300_modul 909 VIEW @behavioral 910 GRAPHIC 1091,0 43 50796 GRAPHIC 148,0 389 0 797 DESIGN @f@a@d_main 798 VIEW struct.bd 799 GRAPHIC 1606,0 392 0 800 DESIGN w5300_modul 801 VIEW symbol.sb 802 GRAPHIC 14,0 393 1 803 DESIGN w5300_modul 804 VIEW @behavioral 805 GRAPHIC 48,0 397 0 806 DESIGN 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@f@a@d_main 1492 VIEW struct.bd 1493 GRAPHIC 364,0 697 0 1494 DESIGN @f@a@d_main 1495 VIEW struct.bd 1496 GRAPHIC 2476,0 698 0 1497 DESIGN @f@a@d_main 1498 VIEW struct.bd 1499 GRAPHIC 8416,0 699 0 1500 DESIGN @f@a@d_main 1501 VIEW struct.bd 1502 GRAPHIC 2470,0 700 0 1503 DESIGN @f@a@d_main 1504 VIEW struct.bd 1505 GRAPHIC 2506,0 701 0 1506 DESIGN @f@a@d_main 1507 VIEW struct.bd 1508 GRAPHIC 2500,0 702 0 1509 DESIGN @f@a@d_main 1510 VIEW struct.bd 1511 GRAPHIC 2494,0 703 0 1512 DESIGN @f@a@d_main 1513 VIEW struct.bd 1514 GRAPHIC 10266,0 704 0 1515 DESIGN @f@a@d_main 1516 VIEW struct.bd 1517 GRAPHIC 5950,0 705 0 1518 DESIGN @f@a@d_main 1519 VIEW struct.bd 1520 GRAPHIC 5962,0 706 0 1521 DESIGN @f@a@d_main 1522 VIEW struct.bd 1523 GRAPHIC 5090,0 707 0 1524 DESIGN @f@a@d_main 1525 VIEW struct.bd 1526 GRAPHIC 5114,0 708 0 1527 DESIGN @f@a@d_main 1528 VIEW struct.bd 1529 GRAPHIC 5122,0 709 0 1530 DESIGN @f@a@d_main 1531 VIEW struct.bd 1532 GRAPHIC 5130,0 710 0 1533 DESIGN @f@a@d_main 1534 VIEW struct.bd 1535 GRAPHIC 10194,0 711 0 1536 DESIGN @f@a@d_main 1537 VIEW struct.bd 1538 GRAPHIC 10202,0 712 0 1539 DESIGN @f@a@d_main 1540 VIEW struct.bd 1541 GRAPHIC 5106,0 713 0 1542 DESIGN @f@a@d_main 1543 VIEW struct.bd 1544 GRAPHIC 6362,0 714 0 1545 DESIGN @f@a@d_main 1546 VIEW struct.bd 1547 GRAPHIC 6452,0 715 0 1548 DESIGN @f@a@d_main 1549 VIEW struct.bd 1550 GRAPHIC 8752,0 716 0 1551 DESIGN @f@a@d_main 1552 VIEW struct.bd 1553 GRAPHIC 9233,0 717 0 1554 DESIGN @f@a@d_main 1555 VIEW struct.bd 1556 GRAPHIC 9241,0 718 0 1557 DESIGN @f@a@d_main 1558 VIEW struct.bd 1559 GRAPHIC 9943,0 719 0 1560 DESIGN @f@a@d_main 1561 VIEW struct.bd 1562 GRAPHIC 9951,0 720 0 1563 DESIGN @f@a@d_main 1564 VIEW struct.bd 1565 GRAPHIC 10637,0 721 0 1566 DESIGN @f@a@d_main 1567 VIEW struct.bd 1568 GRAPHIC 10629,0 722 0 1569 DESIGN @f@a@d_main 1570 VIEW struct.bd 1571 GRAPHIC 6276,0 726 0 1572 DESIGN @f@a@d_main 1573 VIEW struct.bd 1574 GRAPHIC 3888,0 727 0 1575 DESIGN @f@a@d_main 1576 VIEW struct.bd 1577 NO_GRAPHIC 729 920 NO_GRAPHIC 440 921 DESIGN @f@a@d_main 922 VIEW struct.bd 923 GRAPHIC 5678,0 443 0 924 DESIGN @f@a@d_main 925 VIEW struct.bd 926 GRAPHIC 9175,0 444 0 927 DESIGN @f@a@d_main 928 VIEW struct.bd 929 GRAPHIC 5072,0 445 0 930 DESIGN @f@a@d_main 931 VIEW struct.bd 932 GRAPHIC 8277,0 446 0 933 DESIGN @f@a@d_main 934 VIEW struct.bd 935 GRAPHIC 1399,0 447 0 936 DESIGN @f@a@d_main 937 VIEW struct.bd 938 GRAPHIC 4903,0 448 0 939 DESIGN @f@a@d_main 940 VIEW struct.bd 941 GRAPHIC 11209,0 449 0 942 DESIGN @f@a@d_main 943 VIEW struct.bd 944 GRAPHIC 2311,0 450 0 945 DESIGN @f@a@d_main 946 VIEW struct.bd 947 GRAPHIC 5793,0 451 0 948 DESIGN @f@a@d_main 949 VIEW struct.bd 950 GRAPHIC 1768,0 452 0 951 DESIGN @f@a@d_main 952 VIEW struct.bd 953 GRAPHIC 1606,0 453 0 954 DESIGN @f@a@d_main 955 VIEW struct.bd 956 NO_GRAPHIC 456 957 DESIGN @f@a@d_main 958 VIEW struct.bd 959 GRAPHIC 6529,0 458 0 960 DESIGN @f@a@d_main 961 VIEW struct.bd 962 GRAPHIC 9957,0 461 0 963 DESIGN @f@a@d_main 964 VIEW struct.bd 965 GRAPHIC 8721,0 464 0 966 DESIGN @f@a@d_main 967 VIEW struct.bd 968 GRAPHIC 9430,0 467 0 969 DESIGN @f@a@d_main 970 VIEW struct.bd 971 GRAPHIC 9472,0 470 0 972 DESIGN @f@a@d_main 973 VIEW struct.bd 974 GRAPHIC 9662,0 473 0 975 DESIGN @f@a@d_main 976 VIEW struct.bd 977 GRAPHIC 9679,0 476 0 978 DESIGN @f@a@d_main 979 VIEW struct.bd 980 GRAPHIC 9710,0 479 0 981 DESIGN @f@a@d_main 982 VIEW struct.bd 983 GRAPHIC 8562,0 482 0 984 DESIGN @f@a@d_main 985 VIEW struct.bd 986 GRAPHIC 10380,0 493 0 987 DESIGN @f@a@d_main 988 VIEW struct.bd 989 NO_GRAPHIC 496 990 DESIGN @f@a@d_main 991 VIEW struct.bd 992 GRAPHIC 5678,0 498 0 993 DESIGN @f@a@d_main 994 VIEW struct.bd 995 GRAPHIC 5646,0 500 0 996 DESIGN @f@a@d_main 997 VIEW struct.bd 998 GRAPHIC 4272,0 501 0 999 DESIGN @f@a@d_main 1000 VIEW struct.bd 1001 GRAPHIC 2786,0 502 0 1002 DESIGN @f@a@d_main 1003 VIEW struct.bd 1004 GRAPHIC 5626,0 503 0 1005 DESIGN @f@a@d_main 1006 VIEW struct.bd 1007 GRAPHIC 5634,0 504 0 1008 DESIGN @f@a@d_main 1009 VIEW struct.bd 1010 GRAPHIC 9175,0 506 0 1011 DESIGN @f@a@d_main 1012 VIEW struct.bd 1013 GRAPHIC 4042,0 508 0 1014 DESIGN @f@a@d_main 1015 VIEW struct.bd 1016 GRAPHIC 10036,0 509 0 1017 DESIGN @f@a@d_main 1018 VIEW struct.bd 1019 GRAPHIC 9253,0 510 0 1020 DESIGN @f@a@d_main 1021 VIEW struct.bd 1022 GRAPHIC 9261,0 511 0 1023 DESIGN @f@a@d_main 1024 VIEW struct.bd 1025 GRAPHIC 6072,0 512 0 1026 DESIGN @f@a@d_main 1027 VIEW struct.bd 1028 GRAPHIC 3984,0 513 0 1029 DESIGN @f@a@d_main 1030 VIEW struct.bd 1031 GRAPHIC 3888,0 514 0 1032 DESIGN @f@a@d_main 1033 VIEW struct.bd 1034 GRAPHIC 9353,0 515 0 1035 DESIGN @f@a@d_main 1036 VIEW struct.bd 1037 GRAPHIC 9269,0 516 0 1038 DESIGN @f@a@d_main 1039 VIEW struct.bd 1040 GRAPHIC 9325,0 517 0 1041 DESIGN @f@a@d_main 1042 VIEW struct.bd 1043 GRAPHIC 9283,0 518 0 1044 DESIGN @f@a@d_main 1045 VIEW struct.bd 1046 GRAPHIC 9311,0 519 0 1047 DESIGN @f@a@d_main 1048 VIEW struct.bd 1049 GRAPHIC 9297,0 520 0 1050 DESIGN @f@a@d_main 1051 VIEW struct.bd 1052 GRAPHIC 9367,0 521 0 1053 DESIGN @f@a@d_main 1054 VIEW struct.bd 1055 GRAPHIC 9397,0 522 0 1056 DESIGN @f@a@d_main 1057 VIEW struct.bd 1058 GRAPHIC 9382,0 523 0 1059 DESIGN @f@a@d_main 1060 VIEW struct.bd 1061 GRAPHIC 5072,0 525 0 1062 DESIGN @f@a@d_main 1063 VIEW struct.bd 1064 GRAPHIC 5582,0 527 0 1065 DESIGN @f@a@d_main 1066 VIEW struct.bd 1067 GRAPHIC 5090,0 528 0 1068 DESIGN @f@a@d_main 1069 VIEW struct.bd 1070 GRAPHIC 5130,0 529 0 1071 DESIGN @f@a@d_main 1072 VIEW struct.bd 1073 GRAPHIC 5184,0 530 0 1074 DESIGN @f@a@d_main 1075 VIEW struct.bd 1076 GRAPHIC 5122,0 531 0 1077 DESIGN @f@a@d_main 1078 VIEW struct.bd 1079 GRAPHIC 5106,0 532 0 1080 DESIGN @f@a@d_main 1081 VIEW struct.bd 1082 GRAPHIC 5098,0 533 0 1083 DESIGN @f@a@d_main 1084 VIEW struct.bd 1085 GRAPHIC 5190,0 534 0 1086 DESIGN @f@a@d_main 1087 VIEW struct.bd 1088 GRAPHIC 10194,0 535 0 1089 DESIGN @f@a@d_main 1090 VIEW struct.bd 1091 GRAPHIC 10202,0 536 0 1092 DESIGN @f@a@d_main 1093 VIEW struct.bd 1094 GRAPHIC 6002,0 537 0 1095 DESIGN @f@a@d_main 1096 VIEW struct.bd 1097 GRAPHIC 5146,0 538 0 1098 DESIGN @f@a@d_main 1099 VIEW struct.bd 1100 GRAPHIC 5138,0 539 0 1101 DESIGN @f@a@d_main 1102 VIEW struct.bd 1103 GRAPHIC 5114,0 540 0 1104 DESIGN @f@a@d_main 1105 VIEW struct.bd 1106 GRAPHIC 8277,0 542 0 1107 DESIGN @f@a@d_main 1108 VIEW struct.bd 1109 GRAPHIC 5602,0 544 0 1110 DESIGN @f@a@d_main 1111 VIEW struct.bd 1112 GRAPHIC 334,0 545 0 1113 DESIGN @f@a@d_main 1114 VIEW struct.bd 1115 GRAPHIC 328,0 546 0 1116 DESIGN @f@a@d_main 1117 VIEW struct.bd 1118 GRAPHIC 322,0 547 0 1119 DESIGN @f@a@d_main 1120 VIEW struct.bd 1121 GRAPHIC 4240,0 548 0 1122 DESIGN @f@a@d_main 1123 VIEW struct.bd 1124 GRAPHIC 364,0 549 0 1125 DESIGN @f@a@d_main 1126 VIEW struct.bd 1127 GRAPHIC 370,0 550 0 1128 DESIGN @f@a@d_main 1129 VIEW struct.bd 1130 GRAPHIC 1399,0 552 0 1131 DESIGN @f@a@d_main 1132 VIEW struct.bd 1133 GRAPHIC 1406,0 553 1 1134 DESIGN @f@a@d_main 1135 VIEW struct.bd 1136 GRAPHIC 5602,0 557 0 1137 DESIGN @f@a@d_main 1138 VIEW struct.bd 1139 GRAPHIC 334,0 558 0 1140 DESIGN @f@a@d_main 1141 VIEW struct.bd 1142 GRAPHIC 328,0 559 0 1143 DESIGN @f@a@d_main 1144 VIEW struct.bd 1145 GRAPHIC 322,0 560 0 1146 DESIGN @f@a@d_main 1147 VIEW struct.bd 1148 GRAPHIC 2299,0 561 0 1149 DESIGN @f@a@d_main 1150 VIEW struct.bd 1151 GRAPHIC 2576,0 562 0 1152 DESIGN @f@a@d_main 1153 VIEW struct.bd 1154 GRAPHIC 2582,0 563 0 1155 DESIGN @f@a@d_main 1156 VIEW struct.bd 1157 GRAPHIC 10467,0 564 0 1158 DESIGN @f@a@d_main 1159 VIEW struct.bd 1160 GRAPHIC 2588,0 565 0 1161 DESIGN @f@a@d_main 1162 VIEW struct.bd 1163 GRAPHIC 5184,0 566 0 1164 DESIGN @f@a@d_main 1165 VIEW struct.bd 1166 GRAPHIC 5745,0 567 0 1167 DESIGN @f@a@d_main 1168 VIEW struct.bd 1169 GRAPHIC 2594,0 568 0 1170 DESIGN @f@a@d_main 1171 VIEW struct.bd 1172 GRAPHIC 5190,0 569 0 1173 DESIGN @f@a@d_main 1174 VIEW struct.bd 1175 GRAPHIC 5404,0 570 0 1176 DESIGN @f@a@d_main 1177 VIEW struct.bd 1178 GRAPHIC 6018,0 571 0 1179 DESIGN @f@a@d_main 1180 VIEW struct.bd 1181 GRAPHIC 6002,0 572 0 1182 DESIGN @f@a@d_main 1183 VIEW struct.bd 1184 GRAPHIC 6008,0 573 0 1185 DESIGN @f@a@d_main 1186 VIEW struct.bd 1187 GRAPHIC 5138,0 574 0 1188 DESIGN @f@a@d_main 1189 VIEW struct.bd 1190 GRAPHIC 2600,0 575 0 1191 DESIGN @f@a@d_main 1192 VIEW struct.bd 1193 GRAPHIC 5480,0 576 0 1194 DESIGN @f@a@d_main 1195 VIEW struct.bd 1196 GRAPHIC 5474,0 577 0 1197 DESIGN @f@a@d_main 1198 VIEW struct.bd 1199 GRAPHIC 6064,0 578 0 1200 DESIGN @f@a@d_main 1201 VIEW struct.bd 1202 GRAPHIC 2642,0 579 0 1203 DESIGN @f@a@d_main 1204 VIEW struct.bd 1205 GRAPHIC 1411,0 580 0 1206 DESIGN @f@a@d_main 1207 VIEW struct.bd 1208 GRAPHIC 1682,0 581 0 1209 DESIGN @f@a@d_main 1210 VIEW struct.bd 1211 GRAPHIC 1983,0 582 0 1212 DESIGN @f@a@d_main 1213 VIEW struct.bd 1214 GRAPHIC 10439,0 583 0 1215 DESIGN @f@a@d_main 1216 VIEW struct.bd 1217 GRAPHIC 5950,0 584 0 1218 DESIGN @f@a@d_main 1219 VIEW struct.bd 1220 GRAPHIC 5962,0 585 0 1221 DESIGN @f@a@d_main 1222 VIEW struct.bd 1223 GRAPHIC 5626,0 586 0 1224 DESIGN @f@a@d_main 1225 VIEW struct.bd 1226 GRAPHIC 2778,0 587 0 1227 DESIGN @f@a@d_main 1228 VIEW struct.bd 1229 GRAPHIC 9006,0 588 0 1230 DESIGN @f@a@d_main 1231 VIEW struct.bd 1232 GRAPHIC 5634,0 589 0 1233 DESIGN @f@a@d_main 1234 VIEW struct.bd 1235 GRAPHIC 8577,0 590 0 1236 DESIGN @f@a@d_main 1237 VIEW struct.bd 1238 GRAPHIC 6540,0 591 0 1239 DESIGN @f@a@d_main 1240 VIEW struct.bd 1241 GRAPHIC 4401,0 592 0 1242 DESIGN @f@a@d_main 1243 VIEW struct.bd 1244 GRAPHIC 4419,0 593 0 1245 DESIGN @f@a@d_main 1246 VIEW struct.bd 1247 GRAPHIC 10298,0 594 0 1248 DESIGN @f@a@d_main 1249 VIEW struct.bd 1250 GRAPHIC 10304,0 595 0 1251 DESIGN @f@a@d_main 1252 VIEW struct.bd 1253 GRAPHIC 10316,0 596 0 1254 DESIGN @f@a@d_main 1255 VIEW struct.bd 1256 GRAPHIC 10310,0 597 0 1257 DESIGN @f@a@d_main 1258 VIEW struct.bd 1259 GRAPHIC 4743,0 598 0 1260 DESIGN @f@a@d_main 1261 VIEW struct.bd 1262 GRAPHIC 4407,0 599 0 1263 DESIGN @f@a@d_main 1264 VIEW struct.bd 1265 GRAPHIC 11405,0 600 0 1266 DESIGN @f@a@d_main 1267 VIEW struct.bd 1268 GRAPHIC 4903,0 602 0 1269 DESIGN @f@a@d_main 1270 VIEW struct.bd 1271 GRAPHIC 4757,0 604 0 1272 DESIGN @f@a@d_main 1273 VIEW struct.bd 1274 GRAPHIC 4401,0 605 0 1275 DESIGN @f@a@d_main 1276 VIEW struct.bd 1277 GRAPHIC 4419,0 606 0 1278 DESIGN @f@a@d_main 1279 VIEW struct.bd 1280 GRAPHIC 4671,0 607 0 1281 DESIGN @f@a@d_main 1282 VIEW struct.bd 1283 GRAPHIC 4679,0 608 0 1284 DESIGN @f@a@d_main 1285 VIEW struct.bd 1286 GRAPHIC 4687,0 609 0 1287 DESIGN @f@a@d_main 1288 VIEW struct.bd 1289 GRAPHIC 4695,0 610 0 1290 DESIGN @f@a@d_main 1291 VIEW struct.bd 1292 GRAPHIC 4407,0 611 0 1293 DESIGN @f@a@d_main 1294 VIEW struct.bd 1295 GRAPHIC 4743,0 612 0 1296 DESIGN @f@a@d_main 1297 VIEW struct.bd 1298 GRAPHIC 10298,0 613 0 1299 DESIGN @f@a@d_main 1300 VIEW struct.bd 1301 GRAPHIC 10310,0 614 0 1302 DESIGN @f@a@d_main 1303 VIEW struct.bd 1304 GRAPHIC 10304,0 615 0 1305 DESIGN @f@a@d_main 1306 VIEW struct.bd 1307 GRAPHIC 10316,0 616 0 1308 DESIGN @f@a@d_main 1309 VIEW struct.bd 1310 GRAPHIC 10322,0 617 0 1311 DESIGN @f@a@d_main 1312 VIEW struct.bd 1313 GRAPHIC 4948,0 618 0 1314 DESIGN @f@a@d_main 1315 VIEW struct.bd 1316 GRAPHIC 10010,0 619 0 1317 DESIGN @f@a@d_main 1318 VIEW struct.bd 1319 GRAPHIC 11209,0 621 0 1320 DESIGN @f@a@d_main 1321 VIEW struct.bd 1322 GRAPHIC 11216,0 622 1 1323 DESIGN @f@a@d_main 1324 VIEW struct.bd 1325 GRAPHIC 10699,0 628 0 1326 DESIGN @f@a@d_main 1327 VIEW struct.bd 1328 GRAPHIC 10723,0 629 0 1329 DESIGN @f@a@d_main 1330 VIEW struct.bd 1331 GRAPHIC 10737,0 630 0 1332 DESIGN @f@a@d_main 1333 VIEW struct.bd 1334 GRAPHIC 10751,0 631 0 1335 DESIGN @f@a@d_main 1336 VIEW struct.bd 1337 GRAPHIC 10707,0 632 0 1338 DESIGN @f@a@d_main 1339 VIEW struct.bd 1340 GRAPHIC 10685,0 633 0 1341 DESIGN @f@a@d_main 1342 VIEW struct.bd 1343 GRAPHIC 10691,0 634 0 1344 DESIGN @f@a@d_main 1345 VIEW struct.bd 1346 GRAPHIC 2311,0 636 0 1347 DESIGN @f@a@d_main 1348 VIEW struct.bd 1349 GRAPHIC 2318,0 637 1 1350 DESIGN @f@a@d_main 1351 VIEW struct.bd 1352 GRAPHIC 6082,0 642 0 1353 DESIGN @f@a@d_main 1354 VIEW struct.bd 1355 GRAPHIC 2588,0 643 0 1356 DESIGN @f@a@d_main 1357 VIEW struct.bd 1358 GRAPHIC 2582,0 644 0 1359 DESIGN @f@a@d_main 1360 VIEW struct.bd 1361 GRAPHIC 10467,0 645 0 1362 DESIGN @f@a@d_main 1363 VIEW struct.bd 1364 GRAPHIC 5168,0 646 0 1365 DESIGN @f@a@d_main 1366 VIEW struct.bd 1367 GRAPHIC 2576,0 647 0 1368 DESIGN @f@a@d_main 1369 VIEW struct.bd 1370 GRAPHIC 2594,0 648 0 1371 DESIGN @f@a@d_main 1372 VIEW struct.bd 1373 GRAPHIC 6018,0 649 0 1374 DESIGN @f@a@d_main 1375 VIEW struct.bd 1376 GRAPHIC 2600,0 650 0 1377 DESIGN @f@a@d_main 1378 VIEW struct.bd 1379 GRAPHIC 2642,0 651 0 1380 DESIGN @f@a@d_main 1381 VIEW struct.bd 1382 GRAPHIC 2488,0 652 0 1383 DESIGN @f@a@d_main 1384 VIEW struct.bd 1385 GRAPHIC 2482,0 653 0 1386 DESIGN @f@a@d_main 1387 VIEW struct.bd 1388 GRAPHIC 2494,0 654 0 1389 DESIGN @f@a@d_main 1390 VIEW struct.bd 1391 GRAPHIC 2476,0 655 0 1392 DESIGN @f@a@d_main 1393 VIEW struct.bd 1394 GRAPHIC 2506,0 656 0 1395 DESIGN @f@a@d_main 1396 VIEW struct.bd 1397 GRAPHIC 2500,0 657 0 1398 DESIGN @f@a@d_main 1399 VIEW struct.bd 1400 GRAPHIC 2470,0 658 0 1401 DESIGN @f@a@d_main 1402 VIEW struct.bd 1403 GRAPHIC 8416,0 659 0 1404 DESIGN @f@a@d_main 1405 VIEW struct.bd 1406 GRAPHIC 2299,0 660 0 1407 DESIGN @f@a@d_main 1408 VIEW struct.bd 1409 GRAPHIC 5793,0 662 0 1410 DESIGN @f@a@d_main 1411 VIEW struct.bd 1412 GRAPHIC 5805,0 664 0 1413 DESIGN @f@a@d_main 1414 VIEW struct.bd 1415 GRAPHIC 5745,0 665 0 1416 DESIGN @f@a@d_main 1417 VIEW struct.bd 1418 GRAPHIC 5146,0 666 0 1419 DESIGN @f@a@d_main 1420 VIEW struct.bd 1421 GRAPHIC 5404,0 667 0 1422 DESIGN @f@a@d_main 1423 VIEW struct.bd 1424 GRAPHIC 6008,0 668 0 1425 DESIGN @f@a@d_main 1426 VIEW struct.bd 1427 GRAPHIC 5829,0 669 0 1428 DESIGN @f@a@d_main 1429 VIEW struct.bd 1430 GRAPHIC 6160,0 670 0 1431 DESIGN @f@a@d_main 1432 VIEW struct.bd 1433 GRAPHIC 8732,0 671 0 1434 DESIGN @f@a@d_main 1435 VIEW struct.bd 1436 GRAPHIC 5480,0 672 0 1437 DESIGN @f@a@d_main 1438 VIEW struct.bd 1439 GRAPHIC 5837,0 673 0 1440 DESIGN @f@a@d_main 1441 VIEW struct.bd 1442 GRAPHIC 5474,0 674 0 1443 DESIGN @f@a@d_main 1444 VIEW struct.bd 1445 GRAPHIC 5821,0 675 0 1446 DESIGN @f@a@d_main 1447 VIEW struct.bd 1448 GRAPHIC 1768,0 677 0 1449 DESIGN @f@a@d_main 1450 VIEW struct.bd 1451 GRAPHIC 1983,0 679 0 1452 DESIGN @f@a@d_main 1453 VIEW struct.bd 1454 GRAPHIC 10443,0 680 0 1455 DESIGN @f@a@d_main 1456 VIEW struct.bd 1457 GRAPHIC 6276,0 681 0 1458 DESIGN @f@a@d_main 1459 VIEW struct.bd 1460 GRAPHIC 1606,0 683 0 1461 DESIGN @f@a@d_main 1462 VIEW struct.bd 1463 GRAPHIC 1613,0 684 1 1464 DESIGN @f@a@d_main 1465 VIEW struct.bd 1466 GRAPHIC 3888,0 688 0 1467 DESIGN @f@a@d_main 1468 VIEW struct.bd 1469 GRAPHIC 376,0 689 0 1470 DESIGN @f@a@d_main 1471 VIEW struct.bd 1472 GRAPHIC 384,0 690 0 1473 DESIGN @f@a@d_main 1474 VIEW struct.bd 1475 GRAPHIC 392,0 691 0 1476 DESIGN @f@a@d_main 1477 VIEW struct.bd 1478 GRAPHIC 400,0 692 0 1479 DESIGN @f@a@d_main 1480 VIEW struct.bd 1481 GRAPHIC 408,0 693 0 1482 DESIGN @f@a@d_main 1483 VIEW struct.bd 1484 GRAPHIC 5222,0 694 0 1485 DESIGN @f@a@d_main 1486 VIEW struct.bd 1487 GRAPHIC 424,0 695 0 1488 DESIGN @f@a@d_main 1489 VIEW struct.bd 1490 GRAPHIC 432,0 696 0 1491 DESIGN @f@a@d_main 1492 VIEW struct.bd 1493 GRAPHIC 2482,0 697 0 1494 DESIGN @f@a@d_main 1495 VIEW struct.bd 1496 GRAPHIC 2488,0 698 0 1497 DESIGN @f@a@d_main 1498 VIEW struct.bd 1499 GRAPHIC 370,0 699 0 1500 DESIGN @f@a@d_main 1501 VIEW struct.bd 1502 GRAPHIC 364,0 700 0 1503 DESIGN @f@a@d_main 1504 VIEW struct.bd 1505 GRAPHIC 2476,0 701 0 1506 DESIGN @f@a@d_main 1507 VIEW struct.bd 1508 GRAPHIC 8416,0 702 0 1509 DESIGN @f@a@d_main 1510 VIEW struct.bd 1511 GRAPHIC 2470,0 703 0 1512 DESIGN @f@a@d_main 1513 VIEW struct.bd 1514 GRAPHIC 2506,0 704 0 1515 DESIGN @f@a@d_main 1516 VIEW struct.bd 1517 GRAPHIC 2500,0 705 0 1518 DESIGN @f@a@d_main 1519 VIEW struct.bd 1520 GRAPHIC 2494,0 706 0 1521 DESIGN @f@a@d_main 1522 VIEW struct.bd 1523 GRAPHIC 10266,0 707 0 1524 DESIGN @f@a@d_main 1525 VIEW struct.bd 1526 GRAPHIC 5950,0 708 0 1527 DESIGN @f@a@d_main 1528 VIEW struct.bd 1529 GRAPHIC 5962,0 709 0 1530 DESIGN @f@a@d_main 1531 VIEW struct.bd 1532 GRAPHIC 5090,0 710 0 1533 DESIGN @f@a@d_main 1534 VIEW struct.bd 1535 GRAPHIC 5114,0 711 0 1536 DESIGN @f@a@d_main 1537 VIEW struct.bd 1538 GRAPHIC 5122,0 712 0 1539 DESIGN @f@a@d_main 1540 VIEW struct.bd 1541 GRAPHIC 5130,0 713 0 1542 DESIGN @f@a@d_main 1543 VIEW struct.bd 1544 GRAPHIC 10194,0 714 0 1545 DESIGN @f@a@d_main 1546 VIEW struct.bd 1547 GRAPHIC 10202,0 715 0 1548 DESIGN @f@a@d_main 1549 VIEW struct.bd 1550 GRAPHIC 5106,0 716 0 1551 DESIGN @f@a@d_main 1552 VIEW struct.bd 1553 GRAPHIC 6362,0 717 0 1554 DESIGN @f@a@d_main 1555 VIEW struct.bd 1556 GRAPHIC 6452,0 718 0 1557 DESIGN @f@a@d_main 1558 VIEW struct.bd 1559 GRAPHIC 8752,0 719 0 1560 DESIGN @f@a@d_main 1561 VIEW struct.bd 1562 GRAPHIC 9233,0 720 0 1563 DESIGN @f@a@d_main 1564 VIEW struct.bd 1565 GRAPHIC 9241,0 721 0 1566 DESIGN @f@a@d_main 1567 VIEW struct.bd 1568 GRAPHIC 9943,0 722 0 1569 DESIGN @f@a@d_main 1570 VIEW struct.bd 1571 GRAPHIC 9951,0 723 0 1572 DESIGN @f@a@d_main 1573 VIEW struct.bd 1574 GRAPHIC 10637,0 724 0 1575 DESIGN @f@a@d_main 1576 VIEW struct.bd 1577 GRAPHIC 10629,0 725 0 1578 DESIGN @f@a@d_main 1579 VIEW struct.bd 1580 GRAPHIC 6276,0 729 0 1581 DESIGN @f@a@d_main 1582 VIEW struct.bd 1583 GRAPHIC 3888,0 730 0 1584 DESIGN @f@a@d_main 1585 VIEW struct.bd 1586 NO_GRAPHIC 732 -
firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib/hds/@f@a@d_@board/struct.bd
r10075 r10081 149 149 (vvPair 150 150 variable "date" 151 value "0 4.01.2011"151 value "05.01.2011" 152 152 ) 153 153 (vvPair 154 154 variable "day" 155 value " Di"155 value "Mi" 156 156 ) 157 157 (vvPair 158 158 variable "day_long" 159 value " Dienstag"159 value "Mittwoch" 160 160 ) 161 161 (vvPair 162 162 variable "dd" 163 value "0 4"163 value "05" 164 164 ) 165 165 (vvPair … … 297 297 (vvPair 298 298 variable "time" 299 value "1 8:14:31"299 value "17:34:20" 300 300 ) 301 301 (vvPair … … 2757 2757 ) 2758 2758 xt "39000,62400,67500,63200" 2759 st "SIGNAL board_id : std_logic_vector(3 downto 0) 2760 " 2759 st "SIGNAL board_id : std_logic_vector(3 downto 0)" 2761 2760 ) 2762 2761 ) … … 2776 2775 ) 2777 2776 xt "39000,63200,67500,64000" 2778 st "SIGNAL crate_id : std_logic_vector(1 downto 0) 2779 " 2777 st "SIGNAL crate_id : std_logic_vector(1 downto 0)" 2780 2778 ) 2781 2779 ) … … 3100 3098 ) 3101 3099 xt "39000,61600,63000,62400" 3102 st "SIGNAL adc_data_array : adc_data_array_type 3103 " 3100 st "SIGNAL adc_data_array : adc_data_array_type" 3104 3101 ) 3105 3102 ) … … 3119 3116 ) 3120 3117 xt "39000,35800,67500,36600" 3121 st "RSRLOAD : std_logic := '0' 3122 " 3118 st "RSRLOAD : std_logic := '0'" 3123 3119 ) 3124 3120 ) … … 3183 3179 ) 3184 3180 xt "39000,60000,71000,60800" 3185 st "SIGNAL SRCLK : std_logic := '0' 3186 " 3181 st "SIGNAL SRCLK : std_logic := '0'" 3187 3182 ) 3188 3183 ) … … 3202 3197 ) 3203 3198 xt "39000,66400,67500,67200" 3204 st "SIGNAL sensor_cs : std_logic_vector(3 DOWNTO 0) 3205 " 3199 st "SIGNAL sensor_cs : std_logic_vector(3 DOWNTO 0)" 3206 3200 ) 3207 3201 ) … … 3220 3214 ) 3221 3215 xt "39000,23000,54000,23800" 3222 st "DAC_CS : std_logic 3223 " 3216 st "DAC_CS : std_logic" 3224 3217 ) 3225 3218 ) … … 3285 3278 ) 3286 3279 xt "39000,15800,54000,16600" 3287 st "X_50M : STD_LOGIC 3288 " 3280 st "X_50M : STD_LOGIC" 3289 3281 ) 3290 3282 ) … … 3303 3295 ) 3304 3296 xt "39000,14200,54000,15000" 3305 st "TRG : STD_LOGIC 3306 " 3297 st "TRG : STD_LOGIC" 3307 3298 ) 3308 3299 ) … … 3413 3404 ) 3414 3405 xt "39000,19000,64000,19800" 3415 st "A_CLK : std_logic_vector(3 downto 0) 3416 " 3406 st "A_CLK : std_logic_vector(3 downto 0)" 3417 3407 ) 3418 3408 ) … … 3431 3421 ) 3432 3422 xt "39000,51200,57500,52000" 3433 st "SIGNAL CLK_25_PS : std_logic 3434 " 3423 st "SIGNAL CLK_25_PS : std_logic" 3435 3424 ) 3436 3425 ) … … 3496 3485 ) 3497 3486 xt "39000,30200,54000,31000" 3498 st "OE_ADC : STD_LOGIC 3499 " 3487 st "OE_ADC : STD_LOGIC" 3500 3488 ) 3501 3489 ) … … 3560 3548 ) 3561 3549 xt "39000,7000,64000,7800" 3562 st "A_OTR : std_logic_vector(3 DOWNTO 0) 3563 " 3550 st "A_OTR : std_logic_vector(3 DOWNTO 0)" 3564 3551 ) 3565 3552 ) … … 3850 3837 ) 3851 3838 xt "39000,3800,64500,4600" 3852 st "A0_D : std_logic_vector(11 DOWNTO 0) 3853 " 3839 st "A0_D : std_logic_vector(11 DOWNTO 0)" 3854 3840 ) 3855 3841 ) … … 3869 3855 ) 3870 3856 xt "39000,4600,64500,5400" 3871 st "A1_D : std_logic_vector(11 DOWNTO 0) 3872 " 3857 st "A1_D : std_logic_vector(11 DOWNTO 0)" 3873 3858 ) 3874 3859 ) … … 3888 3873 ) 3889 3874 xt "39000,5400,64500,6200" 3890 st "A2_D : std_logic_vector(11 DOWNTO 0) 3891 " 3875 st "A2_D : std_logic_vector(11 DOWNTO 0)" 3892 3876 ) 3893 3877 ) … … 3907 3891 ) 3908 3892 xt "39000,6200,64500,7000" 3909 st "A3_D : std_logic_vector(11 DOWNTO 0) 3910 " 3893 st "A3_D : std_logic_vector(11 DOWNTO 0)" 3911 3894 ) 3912 3895 ) … … 4016 3999 ) 4017 4000 xt "39000,19800,54000,20600" 4018 st "D0_SRCLK : STD_LOGIC 4019 " 4001 st "D0_SRCLK : STD_LOGIC" 4020 4002 ) 4021 4003 ) … … 4034 4016 ) 4035 4017 xt "39000,20600,54000,21400" 4036 st "D1_SRCLK : STD_LOGIC 4037 " 4018 st "D1_SRCLK : STD_LOGIC" 4038 4019 ) 4039 4020 ) … … 4052 4033 ) 4053 4034 xt "39000,21400,54000,22200" 4054 st "D2_SRCLK : STD_LOGIC 4055 " 4035 st "D2_SRCLK : STD_LOGIC" 4056 4036 ) 4057 4037 ) … … 4070 4050 ) 4071 4051 xt "39000,22200,54000,23000" 4072 st "D3_SRCLK : STD_LOGIC 4073 " 4052 st "D3_SRCLK : STD_LOGIC" 4074 4053 ) 4075 4054 ) … … 4268 4247 ) 4269 4248 xt "39000,7800,54000,8600" 4270 st "D0_SROUT : std_logic 4271 " 4249 st "D0_SROUT : std_logic" 4272 4250 ) 4273 4251 ) … … 4286 4264 ) 4287 4265 xt "39000,8600,54000,9400" 4288 st "D1_SROUT : std_logic 4289 " 4266 st "D1_SROUT : std_logic" 4290 4267 ) 4291 4268 ) … … 4304 4281 ) 4305 4282 xt "39000,9400,54000,10200" 4306 st "D2_SROUT : std_logic 4307 " 4283 st "D2_SROUT : std_logic" 4308 4284 ) 4309 4285 ) … … 4322 4298 ) 4323 4299 xt "39000,10200,54000,11000" 4324 st "D3_SROUT : std_logic 4325 " 4300 st "D3_SROUT : std_logic" 4326 4301 ) 4327 4302 ) … … 4387 4362 ) 4388 4363 xt "39000,25400,73500,26200" 4389 st "D_A : std_logic_vector(3 DOWNTO 0) := (others => '0') 4390 " 4364 st "D_A : std_logic_vector(3 DOWNTO 0) := (others => '0')" 4391 4365 ) 4392 4366 ) … … 4451 4425 ) 4452 4426 xt "39000,24600,67500,25400" 4453 st "DWRITE : std_logic := '0' 4454 " 4427 st "DWRITE : std_logic := '0'" 4455 4428 ) 4456 4429 ) … … 4780 4753 ) 4781 4754 xt "39000,38200,54000,39000" 4782 st "T0_CS : std_logic 4783 " 4755 st "T0_CS : std_logic" 4784 4756 ) 4785 4757 ) … … 4798 4770 ) 4799 4771 xt "39000,39000,54000,39800" 4800 st "T1_CS : std_logic 4801 " 4772 st "T1_CS : std_logic" 4802 4773 ) 4803 4774 ) … … 4816 4787 ) 4817 4788 xt "39000,39800,54000,40600" 4818 st "T2_CS : std_logic 4819 " 4789 st "T2_CS : std_logic" 4820 4790 ) 4821 4791 ) … … 4834 4804 ) 4835 4805 xt "39000,40600,54000,41400" 4836 st "T3_CS : std_logic 4837 " 4806 st "T3_CS : std_logic" 4838 4807 ) 4839 4808 ) … … 4896 4865 ) 4897 4866 xt "39000,37400,54000,38200" 4898 st "S_CLK : std_logic 4899 " 4867 st "S_CLK : std_logic" 4900 4868 ) 4901 4869 ) … … 4915 4883 ) 4916 4884 xt "39000,42200,64000,43000" 4917 st "W_A : std_logic_vector(9 DOWNTO 0) 4918 " 4885 st "W_A : std_logic_vector(9 DOWNTO 0)" 4919 4886 ) 4920 4887 ) … … 4934 4901 ) 4935 4902 xt "39000,47000,64500,47800" 4936 st "W_D : std_logic_vector(15 DOWNTO 0) 4937 " 4903 st "W_D : std_logic_vector(15 DOWNTO 0)" 4938 4904 ) 4939 4905 ) … … 4953 4919 ) 4954 4920 xt "39000,44600,67500,45400" 4955 st "W_RES : std_logic := '1' 4956 " 4921 st "W_RES : std_logic := '1'" 4957 4922 ) 4958 4923 ) … … 4972 4937 ) 4973 4938 xt "39000,43800,67500,44600" 4974 st "W_RD : std_logic := '1' 4975 " 4939 st "W_RD : std_logic := '1'" 4976 4940 ) 4977 4941 ) … … 4991 4955 ) 4992 4956 xt "39000,45400,67500,46200" 4993 st "W_WR : std_logic := '1' 4994 " 4957 st "W_WR : std_logic := '1'" 4995 4958 ) 4996 4959 ) … … 5009 4972 ) 5010 4973 xt "39000,15000,54000,15800" 5011 st "W_INT : std_logic 5012 " 4974 st "W_INT : std_logic" 5013 4975 ) 5014 4976 ) … … 5028 4990 ) 5029 4991 xt "39000,43000,67500,43800" 5030 st "W_CS : std_logic := '1' 5031 " 4992 st "W_CS : std_logic := '1'" 5032 4993 ) 5033 4994 ) … … 5089 5050 ) 5090 5051 xt "39000,29400,67500,30200" 5091 st "MOSI : std_logic := '0' 5092 " 5052 st "MOSI : std_logic := '0'" 5093 5053 ) 5094 5054 ) … … 5153 5113 ) 5154 5114 xt "39000,46200,54000,47000" 5155 st "MISO : std_logic 5156 " 5115 st "MISO : std_logic" 5157 5116 ) 5158 5117 ) … … 5580 5539 ) 5581 5540 xt "39000,41400,54000,42200" 5582 st "TRG_V : std_logic 5583 " 5541 st "TRG_V : std_logic" 5584 5542 ) 5585 5543 ) … … 5598 5556 ) 5599 5557 xt "39000,33400,54000,34200" 5600 st "RS485_C_RE : std_logic 5601 " 5558 st "RS485_C_RE : std_logic" 5602 5559 ) 5603 5560 ) … … 5616 5573 ) 5617 5574 xt "39000,31800,54000,32600" 5618 st "RS485_C_DE : std_logic 5619 " 5575 st "RS485_C_DE : std_logic" 5620 5576 ) 5621 5577 ) … … 5634 5590 ) 5635 5591 xt "39000,35000,54000,35800" 5636 st "RS485_E_RE : std_logic 5637 " 5592 st "RS485_E_RE : std_logic" 5638 5593 ) 5639 5594 ) … … 5652 5607 ) 5653 5608 xt "39000,34200,54000,35000" 5654 st "RS485_E_DE : std_logic 5655 " 5609 st "RS485_E_DE : std_logic" 5656 5610 ) 5657 5611 ) … … 5671 5625 ) 5672 5626 xt "39000,23800,67500,24600" 5673 st "DENABLE : std_logic := '0' 5674 " 5627 st "DENABLE : std_logic := '0'" 5675 5628 ) 5676 5629 ) … … 5689 5642 ) 5690 5643 xt "39000,27800,54000,28600" 5691 st "EE_CS : std_logic 5692 " 5644 st "EE_CS : std_logic" 5693 5645 ) 5694 5646 ) … … 5933 5885 ) 5934 5886 xt "39000,26200,73500,27000" 5935 st "D_T : std_logic_vector(7 DOWNTO 0) := (OTHERS => '0') 5936 " 5887 st "D_T : std_logic_vector(7 DOWNTO 0) := (OTHERS => '0')" 5937 5888 ) 5938 5889 ) … … 5997 5948 ) 5998 5949 xt "39000,11000,64000,11800" 5999 st "D_PLLLCK : std_logic_vector(3 DOWNTO 0) 6000 " 5950 st "D_PLLLCK : std_logic_vector(3 DOWNTO 0)" 6001 5951 ) 6002 5952 ) … … 6061 6011 ) 6062 6012 xt "39000,27000,73500,27800" 6063 st "D_T2 : std_logic_vector(3 DOWNTO 0) := (others => '0') 6064 " 6013 st "D_T2 : std_logic_vector(3 DOWNTO 0) := (others => '0')" 6065 6014 ) 6066 6015 ) … … 6301 6250 ) 6302 6251 xt "39000,17400,73500,18200" 6303 st "A1_T : std_logic_vector(7 DOWNTO 0) := (OTHERS => '0') 6304 " 6252 st "A1_T : std_logic_vector(7 DOWNTO 0) := (OTHERS => '0')" 6305 6253 ) 6306 6254 ) … … 6319 6267 ) 6320 6268 xt "39000,64800,57500,65600" 6321 st "SIGNAL dummy : std_logic 6322 " 6269 st "SIGNAL dummy : std_logic" 6323 6270 ) 6324 6271 ) … … 6656 6603 ) 6657 6604 xt "39000,64000,77000,64800" 6658 st "SIGNAL drs_channel_id : std_logic_vector(3 downto 0) := (others => '0') 6659 " 6605 st "SIGNAL drs_channel_id : std_logic_vector(3 downto 0) := (others => '0')" 6660 6606 ) 6661 6607 ) … … 6674 6620 ) 6675 6621 xt "39000,52800,57500,53600" 6676 st "SIGNAL CLK_50 : std_logic 6677 " 6622 st "SIGNAL CLK_50 : std_logic" 6678 6623 ) 6679 6624 ) … … 7059 7004 ) 7060 7005 xt "39000,52000,57500,52800" 7061 st "SIGNAL CLK_25_PS1 : std_logic 7062 " 7006 st "SIGNAL CLK_25_PS1 : std_logic" 7063 7007 ) 7064 7008 ) … … 7078 7022 ) 7079 7023 xt "39000,60800,71000,61600" 7080 st "SIGNAL adc_clk_en : std_logic := '0' 7081 " 7024 st "SIGNAL adc_clk_en : std_logic := '0'" 7082 7025 ) 7083 7026 ) … … 7142 7085 ) 7143 7086 xt "39000,16600,73500,17400" 7144 st "A0_T : std_logic_vector(7 DOWNTO 0) := (others => '0') 7145 " 7087 st "A0_T : std_logic_vector(7 DOWNTO 0) := (others => '0')" 7146 7088 ) 7147 7089 ) … … 7172 7114 st " 7173 7115 -- eb3 9 7174 A0_T(0) <= CLK50_OUT;7175 A0_T(1) <= CLK25_OUT;7116 A0_T(0) <= ready; 7117 A0_T(1) <= shifting; 7176 7118 A0_T(2) <= CLK25_PSOUT; 7177 7119 A0_T(3) <= PS_DIR_IN; … … 7181 7123 A0_T(7) <= DCM_locked; 7182 7124 7183 A1_T(0) <= ready; 7184 A1_T(1) <= shifting; 7185 A1_T(2) <= PSDONE_extraOUT; 7186 A1_T(3) <= PSCLK_OUT; 7187 A1_T(4) <= LOCKED_extraOUT; 7125 A1_T(0) <= SRIN; 7126 A1_T(1) <= PSDONE_extraOUT; 7127 A1_T(2) <= PSCLK_OUT; 7128 A1_T(3) <= LOCKED_extraOUT; 7188 7129 7189 A1_T(5) <= '0'; 7190 A1_T(6) <= '0'; 7191 A1_T(7) <= '0'; 7130 A1_T(4) <= drs_channel_id(0); 7131 A1_T(5) <= drs_channel_id(1); 7132 A1_T(6) <= drs_channel_id(2); 7133 A1_T(7) <= drs_channel_id(3); 7134 7192 7135 " 7193 7136 tm "HdlTextMgr" … … 7207 7150 lineWidth 2 7208 7151 ) 7209 xt "106000,122000,112000,13 6000"7152 xt "106000,122000,112000,137000" 7210 7153 ) 7211 7154 oxt "0,0,8000,10000" … … 7244 7187 fg "49152,49152,49152" 7245 7188 ) 7246 xt "106250,13 4250,107750,135750"7189 xt "106250,135250,107750,136750" 7247 7190 iconName "TextFile.png" 7248 7191 iconMaskName "TextFile.msk" … … 7265 7208 ) 7266 7209 xt "39000,50400,57500,51200" 7267 st "SIGNAL CLK50_OUT : std_logic 7268 " 7210 st "SIGNAL CLK50_OUT : std_logic" 7269 7211 ) 7270 7212 ) … … 7283 7225 ) 7284 7226 xt "39000,48800,57500,49600" 7285 st "SIGNAL CLK25_OUT : std_logic 7286 " 7227 st "SIGNAL CLK25_OUT : std_logic" 7287 7228 ) 7288 7229 ) … … 7301 7242 ) 7302 7243 xt "39000,49600,57500,50400" 7303 st "SIGNAL CLK25_PSOUT : std_logic 7304 " 7244 st "SIGNAL CLK25_PSOUT : std_logic" 7305 7245 ) 7306 7246 ) … … 7319 7259 ) 7320 7260 xt "39000,58400,57500,59200" 7321 st "SIGNAL PS_DIR_IN : std_logic 7322 " 7261 st "SIGNAL PS_DIR_IN : std_logic" 7323 7262 ) 7324 7263 ) … … 7337 7276 ) 7338 7277 xt "39000,59200,57500,60000" 7339 st "SIGNAL PS_DO_IN : std_logic 7340 " 7278 st "SIGNAL PS_DO_IN : std_logic" 7341 7279 ) 7342 7280 ) … … 7355 7293 ) 7356 7294 xt "39000,56800,57500,57600" 7357 st "SIGNAL PSEN_OUT : std_logic 7358 " 7295 st "SIGNAL PSEN_OUT : std_logic" 7359 7296 ) 7360 7297 ) … … 7373 7310 ) 7374 7311 xt "39000,57600,57500,58400" 7375 st "SIGNAL PSINCDEC_OUT : std_logic 7376 " 7312 st "SIGNAL PSINCDEC_OUT : std_logic" 7377 7313 ) 7378 7314 ) … … 7393 7329 ) 7394 7330 xt "39000,53600,57500,54400" 7395 st "SIGNAL DCM_locked : std_logic 7396 " 7331 st "SIGNAL DCM_locked : std_logic" 7397 7332 ) 7398 7333 ) … … 7414 7349 ) 7415 7350 xt "39000,65600,71000,66400" 7416 st "SIGNAL ready : std_logic := '0' 7417 " 7351 st "SIGNAL ready : std_logic := '0'" 7418 7352 ) 7419 7353 ) … … 7437 7371 xt "39000,67200,71000,68800" 7438 7372 st "-- status: 7439 SIGNAL shifting : std_logic := '0' 7440 " 7373 SIGNAL shifting : std_logic := '0'" 7441 7374 ) 7442 7375 ) … … 7455 7388 ) 7456 7389 xt "39000,56000,57500,56800" 7457 st "SIGNAL PSDONE_extraOUT : std_logic 7458 " 7390 st "SIGNAL PSDONE_extraOUT : std_logic" 7459 7391 ) 7460 7392 ) … … 7473 7405 ) 7474 7406 xt "39000,55200,57500,56000" 7475 st "SIGNAL PSCLK_OUT : std_logic 7476 " 7407 st "SIGNAL PSCLK_OUT : std_logic" 7477 7408 ) 7478 7409 ) … … 7491 7422 ) 7492 7423 xt "39000,54400,57500,55200" 7493 st "SIGNAL LOCKED_extraOUT : std_logic 7494 " 7424 st "SIGNAL LOCKED_extraOUT : std_logic" 7495 7425 ) 7496 7426 ) … … 7554 7484 ) 7555 7485 xt "39000,11800,54000,12600" 7556 st "RS485_C_DI : std_logic 7557 " 7486 st "RS485_C_DI : std_logic" 7558 7487 ) 7559 7488 ) … … 7616 7545 ) 7617 7546 xt "39000,32600,54000,33400" 7618 st "RS485_C_DO : std_logic 7619 " 7547 st "RS485_C_DO : std_logic" 7620 7548 ) 7621 7549 ) … … 7679 7607 ) 7680 7608 xt "39000,12600,54000,13400" 7681 st "RS485_E_DI : std_logic 7682 " 7609 st "RS485_E_DI : std_logic" 7683 7610 ) 7684 7611 ) … … 7697 7624 ) 7698 7625 xt "39000,13400,54000,14200" 7699 st "RS485_E_DO : std_logic 7700 " 7626 st "RS485_E_DO : std_logic" 7701 7627 ) 7702 7628 ) … … 7804 7730 ) 7805 7731 xt "39000,36600,67500,37400" 7806 st "SRIN : std_logic := '0' 7807 " 7732 st "SRIN : std_logic := '0'" 7808 7733 ) 7809 7734 ) … … 7954 7879 ) 7955 7880 xt "39000,18200,54000,19000" 7956 st "AMBER_LED : std_logic 7957 " 7881 st "AMBER_LED : std_logic" 7958 7882 ) 7959 7883 ) … … 7972 7896 ) 7973 7897 xt "39000,28600,54000,29400" 7974 st "GREEN_LED : std_logic 7975 " 7898 st "GREEN_LED : std_logic" 7976 7899 ) 7977 7900 ) … … 7990 7913 ) 7991 7914 xt "39000,31000,54000,31800" 7992 st "RED_LED : std_logic 7993 " 7915 st "RED_LED : std_logic" 7994 7916 ) 7995 7917 ) … … 11496 11418 ) 11497 11419 on &266 11420 ) 11421 *361 (Wire 11422 uid 13136,0 11423 shape (OrthoPolyLine 11424 uid 13137,0 11425 va (VaSet 11426 vasetType 3 11427 ) 11428 xt "96000,136000,106000,136000" 11429 pts [ 11430 "96000,136000" 11431 "106000,136000" 11432 ] 11433 ) 11434 end &234 11435 sat 16 11436 eat 1 11437 st 0 11438 sf 1 11439 si 0 11440 tg (WTG 11441 uid 13142,0 11442 ps "ConnStartEndStrategy" 11443 stg "STSignalDisplayStrategy" 11444 f (Text 11445 uid 13143,0 11446 va (VaSet 11447 ) 11448 xt "98000,135000,100300,136000" 11449 st "SRIN" 11450 blo "98000,135800" 11451 tm "WireNameMgr" 11452 ) 11453 ) 11454 on &260 11498 11455 ) 11499 11456 ] … … 11509 11466 color "26368,26368,26368" 11510 11467 ) 11511 packageList *36 1(PackageList11468 packageList *362 (PackageList 11512 11469 uid 41,0 11513 11470 stg "VerticalLayoutStrategy" 11514 11471 textVec [ 11515 *36 2(Text11472 *363 (Text 11516 11473 uid 42,0 11517 11474 va (VaSet … … 11522 11479 blo "0,800" 11523 11480 ) 11524 *36 3(MLText11481 *364 (MLText 11525 11482 uid 43,0 11526 11483 va (VaSet … … 11543 11500 stg "VerticalLayoutStrategy" 11544 11501 textVec [ 11545 *36 4(Text11502 *365 (Text 11546 11503 uid 45,0 11547 11504 va (VaSet … … 11553 11510 blo "20000,800" 11554 11511 ) 11555 *36 5(Text11512 *366 (Text 11556 11513 uid 46,0 11557 11514 va (VaSet … … 11563 11520 blo "20000,1800" 11564 11521 ) 11565 *36 6(MLText11522 *367 (MLText 11566 11523 uid 47,0 11567 11524 va (VaSet … … 11573 11530 tm "BdCompilerDirectivesTextMgr" 11574 11531 ) 11575 *36 7(Text11532 *368 (Text 11576 11533 uid 48,0 11577 11534 va (VaSet … … 11583 11540 blo "20000,4800" 11584 11541 ) 11585 *36 8(MLText11542 *369 (MLText 11586 11543 uid 49,0 11587 11544 va (VaSet … … 11591 11548 tm "BdCompilerDirectivesTextMgr" 11592 11549 ) 11593 *3 69(Text11550 *370 (Text 11594 11551 uid 50,0 11595 11552 va (VaSet … … 11601 11558 blo "20000,5800" 11602 11559 ) 11603 *37 0(MLText11560 *371 (MLText 11604 11561 uid 51,0 11605 11562 va (VaSet … … 11613 11570 ) 11614 11571 windowSize "0,22,1281,1024" 11615 viewArea " 35200,113200,119019,180587"11572 viewArea "52691,110515,136510,177902" 11616 11573 cachedDiagramExtent "0,0,699000,450107" 11617 11574 pageSetupInfo (PageSetupInfo … … 11626 11583 hasePageBreakOrigin 1 11627 11584 pageBreakOrigin "0,0" 11628 lastUid 1 2954,011585 lastUid 13328,0 11629 11586 defaultCommentText (CommentText 11630 11587 shape (Rectangle … … 11688 11645 stg "VerticalLayoutStrategy" 11689 11646 textVec [ 11690 *37 1(Text11647 *372 (Text 11691 11648 va (VaSet 11692 11649 font "Arial,8,1" … … 11697 11654 tm "BdLibraryNameMgr" 11698 11655 ) 11699 *37 2(Text11656 *373 (Text 11700 11657 va (VaSet 11701 11658 font "Arial,8,1" … … 11706 11663 tm "BlkNameMgr" 11707 11664 ) 11708 *37 3(Text11665 *374 (Text 11709 11666 va (VaSet 11710 11667 font "Arial,8,1" … … 11757 11714 stg "VerticalLayoutStrategy" 11758 11715 textVec [ 11759 *37 4(Text11716 *375 (Text 11760 11717 va (VaSet 11761 11718 font "Arial,8,1" … … 11765 11722 blo "550,4300" 11766 11723 ) 11767 *37 5(Text11724 *376 (Text 11768 11725 va (VaSet 11769 11726 font "Arial,8,1" … … 11773 11730 blo "550,5300" 11774 11731 ) 11775 *37 6(Text11732 *377 (Text 11776 11733 va (VaSet 11777 11734 font "Arial,8,1" … … 11822 11779 stg "VerticalLayoutStrategy" 11823 11780 textVec [ 11824 *37 7(Text11781 *378 (Text 11825 11782 va (VaSet 11826 11783 font "Arial,8,1" … … 11831 11788 tm "BdLibraryNameMgr" 11832 11789 ) 11833 *37 8(Text11790 *379 (Text 11834 11791 va (VaSet 11835 11792 font "Arial,8,1" … … 11840 11797 tm "CptNameMgr" 11841 11798 ) 11842 *3 79(Text11799 *380 (Text 11843 11800 va (VaSet 11844 11801 font "Arial,8,1" … … 11894 11851 stg "VerticalLayoutStrategy" 11895 11852 textVec [ 11896 *38 0(Text11853 *381 (Text 11897 11854 va (VaSet 11898 11855 font "Arial,8,1" … … 11902 11859 blo "500,4300" 11903 11860 ) 11904 *38 1(Text11861 *382 (Text 11905 11862 va (VaSet 11906 11863 font "Arial,8,1" … … 11910 11867 blo "500,5300" 11911 11868 ) 11912 *38 2(Text11869 *383 (Text 11913 11870 va (VaSet 11914 11871 font "Arial,8,1" … … 11955 11912 stg "VerticalLayoutStrategy" 11956 11913 textVec [ 11957 *38 3(Text11914 *384 (Text 11958 11915 va (VaSet 11959 11916 font "Arial,8,1" … … 11963 11920 blo "50,4300" 11964 11921 ) 11965 *38 4(Text11922 *385 (Text 11966 11923 va (VaSet 11967 11924 font "Arial,8,1" … … 11971 11928 blo "50,5300" 11972 11929 ) 11973 *38 5(Text11930 *386 (Text 11974 11931 va (VaSet 11975 11932 font "Arial,8,1" … … 12012 11969 stg "VerticalLayoutStrategy" 12013 11970 textVec [ 12014 *38 6(Text11971 *387 (Text 12015 11972 va (VaSet 12016 11973 font "Arial,8,1" … … 12021 11978 tm "HdlTextNameMgr" 12022 11979 ) 12023 *38 7(Text11980 *388 (Text 12024 11981 va (VaSet 12025 11982 font "Arial,8,1" … … 12424 12381 stg "VerticalLayoutStrategy" 12425 12382 textVec [ 12426 *38 8(Text12383 *389 (Text 12427 12384 va (VaSet 12428 12385 font "Arial,8,1" … … 12432 12389 blo "14100,20800" 12433 12390 ) 12434 *3 89(MLText12391 *390 (MLText 12435 12392 va (VaSet 12436 12393 ) … … 12484 12441 stg "VerticalLayoutStrategy" 12485 12442 textVec [ 12486 *39 0(Text12443 *391 (Text 12487 12444 va (VaSet 12488 12445 font "Arial,8,1" … … 12492 12449 blo "14100,20800" 12493 12450 ) 12494 *39 1(MLText12451 *392 (MLText 12495 12452 va (VaSet 12496 12453 ) … … 12638 12595 suid 209,0 12639 12596 usingSuid 1 12640 emptyRow *39 2(LEmptyRow12597 emptyRow *393 (LEmptyRow 12641 12598 ) 12642 12599 uid 54,0 12643 12600 optionalChildren [ 12644 *39 3(RefLabelRowHdr12645 ) 12646 *39 4(TitleRowHdr12647 ) 12648 *39 5(FilterRowHdr12649 ) 12650 *39 6(RefLabelColHdr12601 *394 (RefLabelRowHdr 12602 ) 12603 *395 (TitleRowHdr 12604 ) 12605 *396 (FilterRowHdr 12606 ) 12607 *397 (RefLabelColHdr 12651 12608 tm "RefLabelColHdrMgr" 12652 12609 ) 12653 *39 7(RowExpandColHdr12610 *398 (RowExpandColHdr 12654 12611 tm "RowExpandColHdrMgr" 12655 12612 ) 12656 *39 8(GroupColHdr12613 *399 (GroupColHdr 12657 12614 tm "GroupColHdrMgr" 12658 12615 ) 12659 * 399(NameColHdr12616 *400 (NameColHdr 12660 12617 tm "BlockDiagramNameColHdrMgr" 12661 12618 ) 12662 *40 0(ModeColHdr12619 *401 (ModeColHdr 12663 12620 tm "BlockDiagramModeColHdrMgr" 12664 12621 ) 12665 *40 1(TypeColHdr12622 *402 (TypeColHdr 12666 12623 tm "BlockDiagramTypeColHdrMgr" 12667 12624 ) 12668 *40 2(BoundsColHdr12625 *403 (BoundsColHdr 12669 12626 tm "BlockDiagramBoundsColHdrMgr" 12670 12627 ) 12671 *40 3(InitColHdr12628 *404 (InitColHdr 12672 12629 tm "BlockDiagramInitColHdrMgr" 12673 12630 ) 12674 *40 4(EolColHdr12631 *405 (EolColHdr 12675 12632 tm "BlockDiagramEolColHdrMgr" 12676 12633 ) 12677 *40 5(LeafLogPort12634 *406 (LeafLogPort 12678 12635 port (LogicalPort 12679 12636 m 4 … … 12690 12647 uid 327,0 12691 12648 ) 12692 *40 6(LeafLogPort12649 *407 (LeafLogPort 12693 12650 port (LogicalPort 12694 12651 m 4 … … 12703 12660 uid 329,0 12704 12661 ) 12705 *40 7(LeafLogPort12662 *408 (LeafLogPort 12706 12663 port (LogicalPort 12707 12664 m 4 … … 12715 12672 uid 1491,0 12716 12673 ) 12717 *40 8(LeafLogPort12674 *409 (LeafLogPort 12718 12675 port (LogicalPort 12719 12676 m 1 … … 12728 12685 uid 2435,0 12729 12686 ) 12730 *4 09(LeafLogPort12687 *410 (LeafLogPort 12731 12688 port (LogicalPort 12732 12689 m 4 … … 12741 12698 uid 2437,0 12742 12699 ) 12743 *41 0(LeafLogPort12700 *411 (LeafLogPort 12744 12701 port (LogicalPort 12745 12702 m 4 … … 12754 12711 uid 3037,0 12755 12712 ) 12756 *41 1(LeafLogPort12713 *412 (LeafLogPort 12757 12714 port (LogicalPort 12758 12715 m 1 … … 12766 12723 uid 3039,0 12767 12724 ) 12768 *41 2(LeafLogPort12725 *413 (LeafLogPort 12769 12726 port (LogicalPort 12770 12727 decl (Decl … … 12779 12736 uid 3276,0 12780 12737 ) 12781 *41 3(LeafLogPort12738 *414 (LeafLogPort 12782 12739 port (LogicalPort 12783 12740 decl (Decl … … 12790 12747 uid 3278,0 12791 12748 ) 12792 *41 4(LeafLogPort12749 *415 (LeafLogPort 12793 12750 port (LogicalPort 12794 12751 m 1 … … 12803 12760 uid 3280,0 12804 12761 ) 12805 *41 5(LeafLogPort12762 *416 (LeafLogPort 12806 12763 port (LogicalPort 12807 12764 m 4 … … 12815 12772 uid 3282,0 12816 12773 ) 12817 *41 6(LeafLogPort12774 *417 (LeafLogPort 12818 12775 port (LogicalPort 12819 12776 m 1 … … 12829 12786 uid 3382,0 12830 12787 ) 12831 *41 7(LeafLogPort12788 *418 (LeafLogPort 12832 12789 port (LogicalPort 12833 12790 decl (Decl … … 12841 12798 uid 3384,0 12842 12799 ) 12843 *41 8(LeafLogPort12800 *419 (LeafLogPort 12844 12801 port (LogicalPort 12845 12802 decl (Decl … … 12853 12810 uid 3386,0 12854 12811 ) 12855 *4 19(LeafLogPort12812 *420 (LeafLogPort 12856 12813 port (LogicalPort 12857 12814 decl (Decl … … 12865 12822 uid 3388,0 12866 12823 ) 12867 *42 0(LeafLogPort12824 *421 (LeafLogPort 12868 12825 port (LogicalPort 12869 12826 decl (Decl … … 12877 12834 uid 3390,0 12878 12835 ) 12879 *42 1(LeafLogPort12836 *422 (LeafLogPort 12880 12837 port (LogicalPort 12881 12838 decl (Decl … … 12889 12846 uid 3392,0 12890 12847 ) 12891 *42 2(LeafLogPort12848 *423 (LeafLogPort 12892 12849 port (LogicalPort 12893 12850 m 1 … … 12901 12858 uid 3468,0 12902 12859 ) 12903 *42 3(LeafLogPort12860 *424 (LeafLogPort 12904 12861 port (LogicalPort 12905 12862 m 1 … … 12913 12870 uid 3470,0 12914 12871 ) 12915 *42 4(LeafLogPort12872 *425 (LeafLogPort 12916 12873 port (LogicalPort 12917 12874 m 1 … … 12925 12882 uid 3472,0 12926 12883 ) 12927 *42 5(LeafLogPort12884 *426 (LeafLogPort 12928 12885 port (LogicalPort 12929 12886 m 1 … … 12937 12894 uid 3474,0 12938 12895 ) 12939 *42 6(LeafLogPort12896 *427 (LeafLogPort 12940 12897 port (LogicalPort 12941 12898 decl (Decl … … 12948 12905 uid 3524,0 12949 12906 ) 12950 *42 7(LeafLogPort12907 *428 (LeafLogPort 12951 12908 port (LogicalPort 12952 12909 decl (Decl … … 12959 12916 uid 3526,0 12960 12917 ) 12961 *42 8(LeafLogPort12918 *429 (LeafLogPort 12962 12919 port (LogicalPort 12963 12920 decl (Decl … … 12970 12927 uid 3528,0 12971 12928 ) 12972 *4 29(LeafLogPort12929 *430 (LeafLogPort 12973 12930 port (LogicalPort 12974 12931 decl (Decl … … 12981 12938 uid 3530,0 12982 12939 ) 12983 *43 0(LeafLogPort12940 *431 (LeafLogPort 12984 12941 port (LogicalPort 12985 12942 m 1 … … 12995 12952 uid 3532,0 12996 12953 ) 12997 *43 1(LeafLogPort12954 *432 (LeafLogPort 12998 12955 port (LogicalPort 12999 12956 m 1 … … 13008 12965 uid 3534,0 13009 12966 ) 13010 *432 (LeafLogPort13011 port (LogicalPort13012 m 113013 decl (Decl13014 n "T0_CS"13015 t "std_logic"13016 o 4413017 suid 101,013018 )13019 )13020 uid 3646,013021 )13022 12967 *433 (LeafLogPort 13023 12968 port (LogicalPort 13024 12969 m 1 13025 12970 decl (Decl 13026 n "T 1_CS"13027 t "std_logic" 13028 o 4 513029 suid 10 2,013030 ) 13031 ) 13032 uid 364 8,012971 n "T0_CS" 12972 t "std_logic" 12973 o 44 12974 suid 101,0 12975 ) 12976 ) 12977 uid 3646,0 13033 12978 ) 13034 12979 *434 (LeafLogPort … … 13036 12981 m 1 13037 12982 decl (Decl 13038 n "T 2_CS"13039 t "std_logic" 13040 o 4 613041 suid 10 3,013042 ) 13043 ) 13044 uid 36 50,012983 n "T1_CS" 12984 t "std_logic" 12985 o 45 12986 suid 102,0 12987 ) 12988 ) 12989 uid 3648,0 13045 12990 ) 13046 12991 *435 (LeafLogPort … … 13048 12993 m 1 13049 12994 decl (Decl 13050 n "T 3_CS"13051 t "std_logic" 13052 o 4 713053 suid 10 4,013054 ) 13055 ) 13056 uid 365 2,012995 n "T2_CS" 12996 t "std_logic" 12997 o 46 12998 suid 103,0 12999 ) 13000 ) 13001 uid 3650,0 13057 13002 ) 13058 13003 *436 (LeafLogPort … … 13060 13005 m 1 13061 13006 decl (Decl 13007 n "T3_CS" 13008 t "std_logic" 13009 o 47 13010 suid 104,0 13011 ) 13012 ) 13013 uid 3652,0 13014 ) 13015 *437 (LeafLogPort 13016 port (LogicalPort 13017 m 1 13018 decl (Decl 13062 13019 n "S_CLK" 13063 13020 t "std_logic" … … 13068 13025 uid 3654,0 13069 13026 ) 13070 *43 7(LeafLogPort13027 *438 (LeafLogPort 13071 13028 port (LogicalPort 13072 13029 m 1 … … 13081 13038 uid 3656,0 13082 13039 ) 13083 *43 8(LeafLogPort13040 *439 (LeafLogPort 13084 13041 port (LogicalPort 13085 13042 m 2 … … 13094 13051 uid 3658,0 13095 13052 ) 13096 *4 39(LeafLogPort13053 *440 (LeafLogPort 13097 13054 port (LogicalPort 13098 13055 m 1 … … 13107 13064 uid 3660,0 13108 13065 ) 13109 *44 0(LeafLogPort13066 *441 (LeafLogPort 13110 13067 port (LogicalPort 13111 13068 m 1 … … 13120 13077 uid 3662,0 13121 13078 ) 13122 *44 1(LeafLogPort13079 *442 (LeafLogPort 13123 13080 port (LogicalPort 13124 13081 m 1 … … 13133 13090 uid 3664,0 13134 13091 ) 13135 *44 2(LeafLogPort13092 *443 (LeafLogPort 13136 13093 port (LogicalPort 13137 13094 decl (Decl … … 13144 13101 uid 3666,0 13145 13102 ) 13146 *44 3(LeafLogPort13103 *444 (LeafLogPort 13147 13104 port (LogicalPort 13148 13105 m 1 … … 13157 13114 uid 3668,0 13158 13115 ) 13159 *44 4(LeafLogPort13116 *445 (LeafLogPort 13160 13117 port (LogicalPort 13161 13118 m 1 … … 13170 13127 uid 3696,0 13171 13128 ) 13172 *44 5(LeafLogPort13129 *446 (LeafLogPort 13173 13130 port (LogicalPort 13174 13131 m 2 … … 13184 13141 uid 3698,0 13185 13142 ) 13186 *446 (LeafLogPort13187 port (LogicalPort13188 m 113189 decl (Decl13190 n "TRG_V"13191 t "std_logic"13192 o 4813193 suid 126,013194 )13195 )13196 uid 3886,013197 )13198 13143 *447 (LeafLogPort 13199 13144 port (LogicalPort 13200 13145 m 1 13201 13146 decl (Decl 13202 n " RS485_C_RE"13203 t "std_logic" 13204 o 3813205 suid 12 7,013206 ) 13207 ) 13208 uid 388 8,013147 n "TRG_V" 13148 t "std_logic" 13149 o 48 13150 suid 126,0 13151 ) 13152 ) 13153 uid 3886,0 13209 13154 ) 13210 13155 *448 (LeafLogPort … … 13212 13157 m 1 13213 13158 decl (Decl 13214 n "RS485_C_ DE"13215 t "std_logic" 13216 o 3 613217 suid 12 8,013218 ) 13219 ) 13220 uid 38 90,013159 n "RS485_C_RE" 13160 t "std_logic" 13161 o 38 13162 suid 127,0 13163 ) 13164 ) 13165 uid 3888,0 13221 13166 ) 13222 13167 *449 (LeafLogPort … … 13224 13169 m 1 13225 13170 decl (Decl 13226 n "RS485_ E_RE"13227 t "std_logic" 13228 o 4013229 suid 12 9,013230 ) 13231 ) 13232 uid 389 2,013171 n "RS485_C_DE" 13172 t "std_logic" 13173 o 36 13174 suid 128,0 13175 ) 13176 ) 13177 uid 3890,0 13233 13178 ) 13234 13179 *450 (LeafLogPort … … 13236 13181 m 1 13237 13182 decl (Decl 13238 n "RS485_E_ DE"13239 t "std_logic" 13240 o 3913241 suid 1 30,013242 ) 13243 ) 13244 uid 389 4,013183 n "RS485_E_RE" 13184 t "std_logic" 13185 o 40 13186 suid 129,0 13187 ) 13188 ) 13189 uid 3892,0 13245 13190 ) 13246 13191 *451 (LeafLogPort … … 13248 13193 m 1 13249 13194 decl (Decl 13195 n "RS485_E_DE" 13196 t "std_logic" 13197 o 39 13198 suid 130,0 13199 ) 13200 ) 13201 uid 3894,0 13202 ) 13203 *452 (LeafLogPort 13204 port (LogicalPort 13205 m 1 13206 decl (Decl 13250 13207 n "DENABLE" 13251 13208 t "std_logic" … … 13257 13214 uid 3896,0 13258 13215 ) 13259 *45 2(LeafLogPort13216 *453 (LeafLogPort 13260 13217 port (LogicalPort 13261 13218 m 1 … … 13269 13226 uid 3900,0 13270 13227 ) 13271 *45 3(LeafLogPort13228 *454 (LeafLogPort 13272 13229 port (LogicalPort 13273 13230 m 1 … … 13283 13240 uid 5322,0 13284 13241 ) 13285 *45 4(LeafLogPort13242 *455 (LeafLogPort 13286 13243 port (LogicalPort 13287 13244 decl (Decl … … 13296 13253 scheme 0 13297 13254 ) 13298 *45 5(LeafLogPort13255 *456 (LeafLogPort 13299 13256 port (LogicalPort 13300 13257 m 1 … … 13311 13268 scheme 0 13312 13269 ) 13313 *45 6(LeafLogPort13270 *457 (LeafLogPort 13314 13271 port (LogicalPort 13315 13272 m 1 … … 13326 13283 scheme 0 13327 13284 ) 13328 *45 7(LeafLogPort13285 *458 (LeafLogPort 13329 13286 port (LogicalPort 13330 13287 m 4 … … 13339 13296 scheme 0 13340 13297 ) 13341 *45 8(LeafLogPort13298 *459 (LeafLogPort 13342 13299 port (LogicalPort 13343 13300 m 4 … … 13353 13310 uid 8875,0 13354 13311 ) 13355 *459 (LeafLogPort13356 port (LogicalPort13357 m 413358 decl (Decl13359 n "CLK_50"13360 t "std_logic"13361 o 6113362 suid 163,013363 )13364 )13365 uid 9516,013366 )13367 13312 *460 (LeafLogPort 13368 13313 port (LogicalPort 13369 13314 m 4 13370 13315 decl (Decl 13371 n "CLK_ 25_PS1"13372 t "std_logic" 13373 o 6 013374 suid 16 4,013375 ) 13376 ) 13377 uid 10056,013316 n "CLK_50" 13317 t "std_logic" 13318 o 61 13319 suid 163,0 13320 ) 13321 ) 13322 uid 9516,0 13378 13323 ) 13379 13324 *461 (LeafLogPort … … 13381 13326 m 4 13382 13327 decl (Decl 13328 n "CLK_25_PS1" 13329 t "std_logic" 13330 o 60 13331 suid 164,0 13332 ) 13333 ) 13334 uid 10056,0 13335 ) 13336 *462 (LeafLogPort 13337 port (LogicalPort 13338 m 4 13339 decl (Decl 13383 13340 n "adc_clk_en" 13384 13341 t "std_logic" … … 13390 13347 uid 10058,0 13391 13348 ) 13392 *46 2(LeafLogPort13349 *463 (LeafLogPort 13393 13350 port (LogicalPort 13394 13351 m 1 … … 13405 13362 scheme 0 13406 13363 ) 13407 *463 (LeafLogPort13408 port (LogicalPort13409 m 413410 decl (Decl13411 n "CLK50_OUT"13412 t "std_logic"13413 o 5813414 suid 184,013415 )13416 )13417 uid 10704,013418 )13419 13364 *464 (LeafLogPort 13420 13365 port (LogicalPort 13421 13366 m 4 13422 13367 decl (Decl 13423 n "CLK 25_OUT"13424 t "std_logic" 13425 o 5 613426 suid 18 5,013427 ) 13428 ) 13429 uid 1070 6,013368 n "CLK50_OUT" 13369 t "std_logic" 13370 o 58 13371 suid 184,0 13372 ) 13373 ) 13374 uid 10704,0 13430 13375 ) 13431 13376 *465 (LeafLogPort … … 13433 13378 m 4 13434 13379 decl (Decl 13435 n "CLK25_ PSOUT"13436 t "std_logic" 13437 o 5 713438 suid 18 6,013439 ) 13440 ) 13441 uid 1070 8,013380 n "CLK25_OUT" 13381 t "std_logic" 13382 o 56 13383 suid 185,0 13384 ) 13385 ) 13386 uid 10706,0 13442 13387 ) 13443 13388 *466 (LeafLogPort … … 13445 13390 m 4 13446 13391 decl (Decl 13447 n " PS_DIR_IN"13448 t "std_logic" 13449 o 6813450 suid 18 7,013451 ) 13452 ) 13453 uid 107 10,013392 n "CLK25_PSOUT" 13393 t "std_logic" 13394 o 57 13395 suid 186,0 13396 ) 13397 ) 13398 uid 10708,0 13454 13399 ) 13455 13400 *467 (LeafLogPort … … 13457 13402 m 4 13458 13403 decl (Decl 13459 n "PS_D O_IN"13460 t "std_logic" 13461 o 6 913462 suid 18 8,013463 ) 13464 ) 13465 uid 1071 2,013404 n "PS_DIR_IN" 13405 t "std_logic" 13406 o 68 13407 suid 187,0 13408 ) 13409 ) 13410 uid 10710,0 13466 13411 ) 13467 13412 *468 (LeafLogPort … … 13469 13414 m 4 13470 13415 decl (Decl 13471 n "PS EN_OUT"13472 t "std_logic" 13473 o 6 613474 suid 18 9,013475 ) 13476 ) 13477 uid 1071 4,013416 n "PS_DO_IN" 13417 t "std_logic" 13418 o 69 13419 suid 188,0 13420 ) 13421 ) 13422 uid 10712,0 13478 13423 ) 13479 13424 *469 (LeafLogPort … … 13481 13426 m 4 13482 13427 decl (Decl 13428 n "PSEN_OUT" 13429 t "std_logic" 13430 o 66 13431 suid 189,0 13432 ) 13433 ) 13434 uid 10714,0 13435 ) 13436 *470 (LeafLogPort 13437 port (LogicalPort 13438 m 4 13439 decl (Decl 13483 13440 n "PSINCDEC_OUT" 13484 13441 t "std_logic" … … 13489 13446 uid 10716,0 13490 13447 ) 13491 *47 0(LeafLogPort13448 *471 (LeafLogPort 13492 13449 port (LogicalPort 13493 13450 m 4 … … 13503 13460 uid 10718,0 13504 13461 ) 13505 *47 1(LeafLogPort13462 *472 (LeafLogPort 13506 13463 port (LogicalPort 13507 13464 m 4 … … 13518 13475 uid 10720,0 13519 13476 ) 13520 *47 2(LeafLogPort13477 *473 (LeafLogPort 13521 13478 port (LogicalPort 13522 13479 m 4 … … 13534 13491 uid 10722,0 13535 13492 ) 13536 *473 (LeafLogPort13537 port (LogicalPort13538 m 413539 decl (Decl13540 n "PSDONE_extraOUT"13541 t "std_logic"13542 o 6513543 suid 194,013544 )13545 )13546 uid 10724,013547 )13548 13493 *474 (LeafLogPort 13549 13494 port (LogicalPort 13550 13495 m 4 13551 13496 decl (Decl 13552 n "PS CLK_OUT"13553 t "std_logic" 13554 o 6 413555 suid 19 5,013556 ) 13557 ) 13558 uid 1072 6,013497 n "PSDONE_extraOUT" 13498 t "std_logic" 13499 o 65 13500 suid 194,0 13501 ) 13502 ) 13503 uid 10724,0 13559 13504 ) 13560 13505 *475 (LeafLogPort … … 13562 13507 m 4 13563 13508 decl (Decl 13509 n "PSCLK_OUT" 13510 t "std_logic" 13511 o 64 13512 suid 195,0 13513 ) 13514 ) 13515 uid 10726,0 13516 ) 13517 *476 (LeafLogPort 13518 port (LogicalPort 13519 m 4 13520 decl (Decl 13564 13521 n "LOCKED_extraOUT" 13565 13522 t "std_logic" … … 13570 13527 uid 10728,0 13571 13528 ) 13572 *47 6(LeafLogPort13529 *477 (LeafLogPort 13573 13530 port (LogicalPort 13574 13531 decl (Decl … … 13582 13539 scheme 0 13583 13540 ) 13584 *47 7(LeafLogPort13541 *478 (LeafLogPort 13585 13542 port (LogicalPort 13586 13543 m 1 … … 13595 13552 scheme 0 13596 13553 ) 13597 *47 8(LeafLogPort13554 *479 (LeafLogPort 13598 13555 port (LogicalPort 13599 13556 decl (Decl … … 13607 13564 scheme 0 13608 13565 ) 13609 *4 79(LeafLogPort13566 *480 (LeafLogPort 13610 13567 port (LogicalPort 13611 13568 decl (Decl … … 13619 13576 scheme 0 13620 13577 ) 13621 *48 0(LeafLogPort13578 *481 (LeafLogPort 13622 13579 port (LogicalPort 13623 13580 m 1 … … 13632 13589 uid 12336,0 13633 13590 ) 13634 *481 (LeafLogPort13635 port (LogicalPort13636 m 113637 decl (Decl13638 n "AMBER_LED"13639 t "std_logic"13640 o 3113641 suid 207,013642 )13643 )13644 uid 12768,013645 )13646 13591 *482 (LeafLogPort 13647 13592 port (LogicalPort 13648 13593 m 1 13649 13594 decl (Decl 13595 n "AMBER_LED" 13596 t "std_logic" 13597 o 31 13598 suid 207,0 13599 ) 13600 ) 13601 uid 12768,0 13602 ) 13603 *483 (LeafLogPort 13604 port (LogicalPort 13605 m 1 13606 decl (Decl 13650 13607 n "GREEN_LED" 13651 13608 t "std_logic" … … 13656 13613 uid 12770,0 13657 13614 ) 13658 *48 3(LeafLogPort13615 *484 (LeafLogPort 13659 13616 port (LogicalPort 13660 13617 m 1 … … 13675 13632 uid 67,0 13676 13633 optionalChildren [ 13677 *48 4(Sheet13634 *485 (Sheet 13678 13635 sheetRow (SheetRow 13679 13636 headerVa (MVa … … 13692 13649 font "Tahoma,10,0" 13693 13650 ) 13694 emptyMRCItem *48 5(MRCItem13695 litem &39 213651 emptyMRCItem *486 (MRCItem 13652 litem &393 13696 13653 pos 79 13697 13654 dimension 20 … … 13699 13656 uid 69,0 13700 13657 optionalChildren [ 13701 *48 6(MRCItem13702 litem &39 313658 *487 (MRCItem 13659 litem &394 13703 13660 pos 0 13704 13661 dimension 20 13705 13662 uid 70,0 13706 13663 ) 13707 *48 7(MRCItem13708 litem &39 413664 *488 (MRCItem 13665 litem &395 13709 13666 pos 1 13710 13667 dimension 23 13711 13668 uid 71,0 13712 13669 ) 13713 *48 8(MRCItem13714 litem &39 513670 *489 (MRCItem 13671 litem &396 13715 13672 pos 2 13716 13673 hidden 1 … … 13718 13675 uid 72,0 13719 13676 ) 13720 *4 89(MRCItem13721 litem &40 513677 *490 (MRCItem 13678 litem &406 13722 13679 pos 52 13723 13680 dimension 20 13724 13681 uid 328,0 13725 13682 ) 13726 *49 0(MRCItem13727 litem &40 613683 *491 (MRCItem 13684 litem &407 13728 13685 pos 53 13729 13686 dimension 20 13730 13687 uid 330,0 13731 13688 ) 13732 *49 1(MRCItem13733 litem &40 713689 *492 (MRCItem 13690 litem &408 13734 13691 pos 54 13735 13692 dimension 20 13736 13693 uid 1492,0 13737 13694 ) 13738 *49 2(MRCItem13739 litem &40 813695 *493 (MRCItem 13696 litem &409 13740 13697 pos 0 13741 13698 dimension 20 13742 13699 uid 2436,0 13743 13700 ) 13744 *49 3(MRCItem13745 litem &4 0913701 *494 (MRCItem 13702 litem &410 13746 13703 pos 55 13747 13704 dimension 20 13748 13705 uid 2438,0 13749 13706 ) 13750 *49 4(MRCItem13751 litem &41 013707 *495 (MRCItem 13708 litem &411 13752 13709 pos 56 13753 13710 dimension 20 13754 13711 uid 3038,0 13755 13712 ) 13756 *49 5(MRCItem13757 litem &41 113713 *496 (MRCItem 13714 litem &412 13758 13715 pos 1 13759 13716 dimension 20 13760 13717 uid 3040,0 13761 13718 ) 13762 *49 6(MRCItem13763 litem &41 213719 *497 (MRCItem 13720 litem &413 13764 13721 pos 2 13765 13722 dimension 20 13766 13723 uid 3277,0 13767 13724 ) 13768 *49 7(MRCItem13769 litem &41 313725 *498 (MRCItem 13726 litem &414 13770 13727 pos 3 13771 13728 dimension 20 13772 13729 uid 3279,0 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&434 13890 13847 pos 22 13891 13848 dimension 20 13892 13849 uid 3649,0 13893 13850 ) 13894 *51 8(MRCItem13895 litem &43 413851 *519 (MRCItem 13852 litem &435 13896 13853 pos 23 13897 13854 dimension 20 13898 13855 uid 3651,0 13899 13856 ) 13900 *5 19(MRCItem13901 litem &43 513857 *520 (MRCItem 13858 litem &436 13902 13859 pos 24 13903 13860 dimension 20 13904 13861 uid 3653,0 13905 13862 ) 13906 *52 0(MRCItem13907 litem &43 613863 *521 (MRCItem 13864 litem &437 13908 13865 pos 25 13909 13866 dimension 20 13910 13867 uid 3655,0 13911 13868 ) 13912 *52 1(MRCItem13913 litem &43 713869 *522 (MRCItem 13870 litem &438 13914 13871 pos 26 13915 13872 dimension 20 13916 13873 uid 3657,0 13917 13874 ) 13918 *52 2(MRCItem13919 litem &43 813875 *523 (MRCItem 13876 litem &439 13920 13877 pos 27 13921 13878 dimension 20 13922 13879 uid 3659,0 13923 13880 ) 13924 *52 3(MRCItem13925 litem &4 3913881 *524 (MRCItem 13882 litem &440 13926 13883 pos 28 13927 13884 dimension 20 13928 13885 uid 3661,0 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14041 uid 10709,0 14085 14042 ) 14086 *55 0(MRCItem14087 litem &46 614043 *551 (MRCItem 14044 litem &467 14088 14045 pos 66 14089 14046 dimension 20 14090 14047 uid 10711,0 14091 14048 ) 14092 *55 1(MRCItem14093 litem &46 714049 *552 (MRCItem 14050 litem &468 14094 14051 pos 67 14095 14052 dimension 20 14096 14053 uid 10713,0 14097 14054 ) 14098 *55 2(MRCItem14099 litem &46 814055 *553 (MRCItem 14056 litem &469 14100 14057 pos 68 14101 14058 dimension 20 14102 14059 uid 10715,0 14103 14060 ) 14104 *55 3(MRCItem14105 litem &4 6914061 *554 (MRCItem 14062 litem &470 14106 14063 pos 69 14107 14064 dimension 20 14108 14065 uid 10717,0 14109 14066 ) 14110 *55 4(MRCItem14111 litem &47 014067 *555 (MRCItem 14068 litem &471 14112 14069 pos 70 14113 14070 dimension 20 14114 14071 uid 10719,0 14115 14072 ) 14116 *55 5(MRCItem14117 litem &47 114073 *556 (MRCItem 14074 litem &472 14118 14075 pos 71 14119 14076 dimension 20 14120 14077 uid 10721,0 14121 14078 ) 14122 *55 6(MRCItem14123 litem &47 214079 *557 (MRCItem 14080 litem &473 14124 14081 pos 72 14125 14082 dimension 20 14126 14083 uid 10723,0 14127 14084 ) 14128 *55 7(MRCItem14129 litem &47 314085 *558 (MRCItem 14086 litem &474 14130 14087 pos 73 14131 14088 dimension 20 14132 14089 uid 10725,0 14133 14090 ) 14134 *55 8(MRCItem14135 litem &47 414091 *559 (MRCItem 14092 litem &475 14136 14093 pos 74 14137 14094 dimension 20 14138 14095 uid 10727,0 14139 14096 ) 14140 *5 59(MRCItem14141 litem &47 514097 *560 (MRCItem 14098 litem &476 14142 14099 pos 75 14143 14100 dimension 20 14144 14101 uid 10729,0 14145 14102 ) 14146 *56 0(MRCItem14147 litem &47 614103 *561 (MRCItem 14104 litem &477 14148 14105 pos 47 14149 14106 dimension 20 14150 14107 uid 11085,0 14151 14108 ) 14152 *56 1(MRCItem14153 litem &47 714109 *562 (MRCItem 14110 litem &478 14154 14111 pos 48 14155 14112 dimension 20 14156 14113 uid 11087,0 14157 14114 ) 14158 *56 2(MRCItem14159 litem &47 814115 *563 (MRCItem 14116 litem &479 14160 14117 pos 49 14161 14118 dimension 20 14162 14119 uid 11505,0 14163 14120 ) 14164 *56 3(MRCItem14165 litem &4 7914121 *564 (MRCItem 14122 litem &480 14166 14123 pos 50 14167 14124 dimension 20 14168 14125 uid 11507,0 14169 14126 ) 14170 *56 4(MRCItem14171 litem &48 014127 *565 (MRCItem 14128 litem &481 14172 14129 pos 51 14173 14130 dimension 20 14174 14131 uid 12337,0 14175 14132 ) 14176 *56 5(MRCItem14177 litem &48 114133 *566 (MRCItem 14134 litem &482 14178 14135 pos 76 14179 14136 dimension 20 14180 14137 uid 12769,0 14181 14138 ) 14182 *56 6(MRCItem14183 litem &48 214139 *567 (MRCItem 14140 litem &483 14184 14141 pos 77 14185 14142 dimension 20 14186 14143 uid 12771,0 14187 14144 ) 14188 *56 7(MRCItem14189 litem &48 314145 *568 (MRCItem 14146 litem &484 14190 14147 pos 78 14191 14148 dimension 20 … … 14203 14160 uid 73,0 14204 14161 optionalChildren [ 14205 *56 8(MRCItem14206 litem &39 614162 *569 (MRCItem 14163 litem &397 14207 14164 pos 0 14208 14165 dimension 20 14209 14166 uid 74,0 14210 14167 ) 14211 *5 69(MRCItem14212 litem &39 814168 *570 (MRCItem 14169 litem &399 14213 14170 pos 1 14214 14171 dimension 50 14215 14172 uid 75,0 14216 14173 ) 14217 *57 0(MRCItem14218 litem & 39914174 *571 (MRCItem 14175 litem &400 14219 14176 pos 2 14220 14177 dimension 100 14221 14178 uid 76,0 14222 14179 ) 14223 *57 1(MRCItem14224 litem &40 014180 *572 (MRCItem 14181 litem &401 14225 14182 pos 3 14226 14183 dimension 50 14227 14184 uid 77,0 14228 14185 ) 14229 *57 2(MRCItem14230 litem &40 114186 *573 (MRCItem 14187 litem &402 14231 14188 pos 4 14232 14189 dimension 100 14233 14190 uid 78,0 14234 14191 ) 14235 *57 3(MRCItem14236 litem &40 214192 *574 (MRCItem 14193 litem &403 14237 14194 pos 5 14238 14195 dimension 100 14239 14196 uid 79,0 14240 14197 ) 14241 *57 4(MRCItem14242 litem &40 314198 *575 (MRCItem 14199 litem &404 14243 14200 pos 6 14244 14201 dimension 92 14245 14202 uid 80,0 14246 14203 ) 14247 *57 5(MRCItem14248 litem &40 414204 *576 (MRCItem 14205 litem &405 14249 14206 pos 7 14250 14207 dimension 80 … … 14266 14223 genericsCommonDM (CommonDM 14267 14224 ldm (LogicalDM 14268 emptyRow *57 6(LEmptyRow14225 emptyRow *577 (LEmptyRow 14269 14226 ) 14270 14227 uid 83,0 14271 14228 optionalChildren [ 14272 *57 7(RefLabelRowHdr14273 ) 14274 *57 8(TitleRowHdr14275 ) 14276 *5 79(FilterRowHdr14277 ) 14278 *58 0(RefLabelColHdr14229 *578 (RefLabelRowHdr 14230 ) 14231 *579 (TitleRowHdr 14232 ) 14233 *580 (FilterRowHdr 14234 ) 14235 *581 (RefLabelColHdr 14279 14236 tm "RefLabelColHdrMgr" 14280 14237 ) 14281 *58 1(RowExpandColHdr14238 *582 (RowExpandColHdr 14282 14239 tm "RowExpandColHdrMgr" 14283 14240 ) 14284 *58 2(GroupColHdr14241 *583 (GroupColHdr 14285 14242 tm "GroupColHdrMgr" 14286 14243 ) 14287 *58 3(NameColHdr14244 *584 (NameColHdr 14288 14245 tm "GenericNameColHdrMgr" 14289 14246 ) 14290 *58 4(TypeColHdr14247 *585 (TypeColHdr 14291 14248 tm "GenericTypeColHdrMgr" 14292 14249 ) 14293 *58 5(InitColHdr14250 *586 (InitColHdr 14294 14251 tm "GenericValueColHdrMgr" 14295 14252 ) 14296 *58 6(PragmaColHdr14253 *587 (PragmaColHdr 14297 14254 tm "GenericPragmaColHdrMgr" 14298 14255 ) 14299 *58 7(EolColHdr14256 *588 (EolColHdr 14300 14257 tm "GenericEolColHdrMgr" 14301 14258 ) … … 14307 14264 uid 95,0 14308 14265 optionalChildren [ 14309 *58 8(Sheet14266 *589 (Sheet 14310 14267 sheetRow (SheetRow 14311 14268 headerVa (MVa … … 14324 14281 font "Tahoma,10,0" 14325 14282 ) 14326 emptyMRCItem *589 (MRCItem 14327 litem &576 14328 pos 0 14329 dimension 20 14330 ) 14331 uid 97,0 14332 optionalChildren [ 14333 *590 (MRCItem 14283 emptyMRCItem *590 (MRCItem 14334 14284 litem &577 14335 14285 pos 0 14336 14286 dimension 20 14337 uid 98,0 14338 ) 14287 ) 14288 uid 97,0 14289 optionalChildren [ 14339 14290 *591 (MRCItem 14340 14291 litem &578 14292 pos 0 14293 dimension 20 14294 uid 98,0 14295 ) 14296 *592 (MRCItem 14297 litem &579 14341 14298 pos 1 14342 14299 dimension 23 14343 14300 uid 99,0 14344 14301 ) 14345 *59 2(MRCItem14346 litem &5 7914302 *593 (MRCItem 14303 litem &580 14347 14304 pos 2 14348 14305 hidden 1 … … 14361 14318 uid 101,0 14362 14319 optionalChildren [ 14363 *59 3(MRCItem14364 litem &58 014320 *594 (MRCItem 14321 litem &581 14365 14322 pos 0 14366 14323 dimension 20 14367 14324 uid 102,0 14368 14325 ) 14369 *59 4(MRCItem14370 litem &58 214326 *595 (MRCItem 14327 litem &583 14371 14328 pos 1 14372 14329 dimension 50 14373 14330 uid 103,0 14374 14331 ) 14375 *59 5(MRCItem14376 litem &58 314332 *596 (MRCItem 14333 litem &584 14377 14334 pos 2 14378 14335 dimension 100 14379 14336 uid 104,0 14380 14337 ) 14381 *59 6(MRCItem14382 litem &58 414338 *597 (MRCItem 14339 litem &585 14383 14340 pos 3 14384 14341 dimension 100 14385 14342 uid 105,0 14386 14343 ) 14387 *59 7(MRCItem14388 litem &58 514344 *598 (MRCItem 14345 litem &586 14389 14346 pos 4 14390 14347 dimension 50 14391 14348 uid 106,0 14392 14349 ) 14393 *59 8(MRCItem14394 litem &58 614350 *599 (MRCItem 14351 litem &587 14395 14352 pos 5 14396 14353 dimension 50 14397 14354 uid 107,0 14398 14355 ) 14399 * 599(MRCItem14400 litem &58 714356 *600 (MRCItem 14357 litem &588 14401 14358 pos 6 14402 14359 dimension 80 -
firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib/hds/@f@a@d_@board/struct.bd.bak
r10075 r10081 149 149 (vvPair 150 150 variable "date" 151 value "0 4.01.2011"151 value "05.01.2011" 152 152 ) 153 153 (vvPair 154 154 variable "day" 155 value " Di"155 value "Mi" 156 156 ) 157 157 (vvPair 158 158 variable "day_long" 159 value " Dienstag"159 value "Mittwoch" 160 160 ) 161 161 (vvPair 162 162 variable "dd" 163 value "0 4"163 value "05" 164 164 ) 165 165 (vvPair … … 297 297 (vvPair 298 298 variable "time" 299 value "1 3:01:09"299 value "15:55:05" 300 300 ) 301 301 (vvPair … … 7129 7129 A1_T(4) <= LOCKED_extraOUT; 7130 7130 7131 A1_T(5) <= '0';7131 A1_T(5) <= SRIN; 7132 7132 A1_T(6) <= '0'; 7133 7133 A1_T(7) <= '0'; … … 7149 7149 lineWidth 2 7150 7150 ) 7151 xt "106000,122000,112000,13 6000"7151 xt "106000,122000,112000,137000" 7152 7152 ) 7153 7153 oxt "0,0,8000,10000" … … 7186 7186 fg "49152,49152,49152" 7187 7187 ) 7188 xt "106250,13 4250,107750,135750"7188 xt "106250,135250,107750,136750" 7189 7189 iconName "TextFile.png" 7190 7190 iconMaskName "TextFile.msk" … … 11351 11351 vasetType 3 11352 11352 ) 11353 xt "80750,142000,87000,14 2000"11354 pts [ 11355 "80750,14 2000"11353 xt "80750,142000,87000,143000" 11354 pts [ 11355 "80750,143000" 11356 11356 "87000,142000" 11357 11357 ] 11358 11358 ) 11359 start &6 111359 start &62 11360 11360 end &262 11361 ss 011362 11361 sat 32 11363 11362 eat 32 … … 11374 11373 isHidden 1 11375 11374 ) 11376 xt "83000,14 1000,88100,142000"11375 xt "83000,142000,88100,143000" 11377 11376 st "GREEN_LED" 11378 blo "83000,14 1800"11377 blo "83000,142800" 11379 11378 tm "WireNameMgr" 11380 11379 ) … … 11389 11388 vasetType 3 11390 11389 ) 11391 xt "80750,14 3000,87000,143000"11392 pts [ 11393 "80750,14 3000"11390 xt "80750,142000,87000,143000" 11391 pts [ 11392 "80750,142000" 11394 11393 "87000,143000" 11395 11394 ] 11396 11395 ) 11397 start &6 211396 start &61 11398 11397 end &263 11399 11398 sat 32 … … 11411 11410 isHidden 1 11412 11411 ) 11413 xt "83000,14 2000,87000,143000"11412 xt "83000,141000,87000,142000" 11414 11413 st "RED_LED" 11415 blo "83000,14 2800"11414 blo "83000,141800" 11416 11415 tm "WireNameMgr" 11417 11416 ) 11418 11417 ) 11419 11418 on &266 11419 ) 11420 *361 (Wire 11421 uid 13136,0 11422 shape (OrthoPolyLine 11423 uid 13137,0 11424 va (VaSet 11425 vasetType 3 11426 ) 11427 xt "96000,136000,106000,136000" 11428 pts [ 11429 "96000,136000" 11430 "106000,136000" 11431 ] 11432 ) 11433 end &234 11434 sat 16 11435 eat 1 11436 st 0 11437 sf 1 11438 si 0 11439 tg (WTG 11440 uid 13142,0 11441 ps "ConnStartEndStrategy" 11442 stg "STSignalDisplayStrategy" 11443 f (Text 11444 uid 13143,0 11445 va (VaSet 11446 ) 11447 xt "98000,135000,100300,136000" 11448 st "SRIN" 11449 blo "98000,135800" 11450 tm "WireNameMgr" 11451 ) 11452 ) 11453 on &260 11420 11454 ) 11421 11455 ] … … 11431 11465 color "26368,26368,26368" 11432 11466 ) 11433 packageList *36 1(PackageList11467 packageList *362 (PackageList 11434 11468 uid 41,0 11435 11469 stg "VerticalLayoutStrategy" 11436 11470 textVec [ 11437 *36 2(Text11471 *363 (Text 11438 11472 uid 42,0 11439 11473 va (VaSet … … 11444 11478 blo "0,800" 11445 11479 ) 11446 *36 3(MLText11480 *364 (MLText 11447 11481 uid 43,0 11448 11482 va (VaSet … … 11465 11499 stg "VerticalLayoutStrategy" 11466 11500 textVec [ 11467 *36 4(Text11501 *365 (Text 11468 11502 uid 45,0 11469 11503 va (VaSet … … 11475 11509 blo "20000,800" 11476 11510 ) 11477 *36 5(Text11511 *366 (Text 11478 11512 uid 46,0 11479 11513 va (VaSet … … 11485 11519 blo "20000,1800" 11486 11520 ) 11487 *36 6(MLText11521 *367 (MLText 11488 11522 uid 47,0 11489 11523 va (VaSet … … 11495 11529 tm "BdCompilerDirectivesTextMgr" 11496 11530 ) 11497 *36 7(Text11531 *368 (Text 11498 11532 uid 48,0 11499 11533 va (VaSet … … 11505 11539 blo "20000,4800" 11506 11540 ) 11507 *36 8(MLText11541 *369 (MLText 11508 11542 uid 49,0 11509 11543 va (VaSet … … 11513 11547 tm "BdCompilerDirectivesTextMgr" 11514 11548 ) 11515 *3 69(Text11549 *370 (Text 11516 11550 uid 50,0 11517 11551 va (VaSet … … 11523 11557 blo "20000,5800" 11524 11558 ) 11525 *37 0(MLText11559 *371 (MLText 11526 11560 uid 51,0 11527 11561 va (VaSet … … 11535 11569 ) 11536 11570 windowSize "0,22,1281,1024" 11537 viewArea " 35200,113200,119019,180587"11571 viewArea "58347,103799,142166,171186" 11538 11572 cachedDiagramExtent "0,0,699000,450107" 11539 11573 pageSetupInfo (PageSetupInfo … … 11548 11582 hasePageBreakOrigin 1 11549 11583 pageBreakOrigin "0,0" 11550 lastUid 1 2773,011584 lastUid 13143,0 11551 11585 defaultCommentText (CommentText 11552 11586 shape (Rectangle … … 11610 11644 stg "VerticalLayoutStrategy" 11611 11645 textVec [ 11612 *37 1(Text11646 *372 (Text 11613 11647 va (VaSet 11614 11648 font "Arial,8,1" … … 11619 11653 tm "BdLibraryNameMgr" 11620 11654 ) 11621 *37 2(Text11655 *373 (Text 11622 11656 va (VaSet 11623 11657 font "Arial,8,1" … … 11628 11662 tm "BlkNameMgr" 11629 11663 ) 11630 *37 3(Text11664 *374 (Text 11631 11665 va (VaSet 11632 11666 font "Arial,8,1" … … 11679 11713 stg "VerticalLayoutStrategy" 11680 11714 textVec [ 11681 *37 4(Text11715 *375 (Text 11682 11716 va (VaSet 11683 11717 font "Arial,8,1" … … 11687 11721 blo "550,4300" 11688 11722 ) 11689 *37 5(Text11723 *376 (Text 11690 11724 va (VaSet 11691 11725 font "Arial,8,1" … … 11695 11729 blo "550,5300" 11696 11730 ) 11697 *37 6(Text11731 *377 (Text 11698 11732 va (VaSet 11699 11733 font "Arial,8,1" … … 11744 11778 stg "VerticalLayoutStrategy" 11745 11779 textVec [ 11746 *37 7(Text11780 *378 (Text 11747 11781 va (VaSet 11748 11782 font "Arial,8,1" … … 11753 11787 tm "BdLibraryNameMgr" 11754 11788 ) 11755 *37 8(Text11789 *379 (Text 11756 11790 va (VaSet 11757 11791 font "Arial,8,1" … … 11762 11796 tm "CptNameMgr" 11763 11797 ) 11764 *3 79(Text11798 *380 (Text 11765 11799 va (VaSet 11766 11800 font "Arial,8,1" … … 11816 11850 stg "VerticalLayoutStrategy" 11817 11851 textVec [ 11818 *38 0(Text11852 *381 (Text 11819 11853 va (VaSet 11820 11854 font "Arial,8,1" … … 11824 11858 blo "500,4300" 11825 11859 ) 11826 *38 1(Text11860 *382 (Text 11827 11861 va (VaSet 11828 11862 font "Arial,8,1" … … 11832 11866 blo "500,5300" 11833 11867 ) 11834 *38 2(Text11868 *383 (Text 11835 11869 va (VaSet 11836 11870 font "Arial,8,1" … … 11877 11911 stg "VerticalLayoutStrategy" 11878 11912 textVec [ 11879 *38 3(Text11913 *384 (Text 11880 11914 va (VaSet 11881 11915 font "Arial,8,1" … … 11885 11919 blo "50,4300" 11886 11920 ) 11887 *38 4(Text11921 *385 (Text 11888 11922 va (VaSet 11889 11923 font "Arial,8,1" … … 11893 11927 blo "50,5300" 11894 11928 ) 11895 *38 5(Text11929 *386 (Text 11896 11930 va (VaSet 11897 11931 font "Arial,8,1" … … 11934 11968 stg "VerticalLayoutStrategy" 11935 11969 textVec [ 11936 *38 6(Text11970 *387 (Text 11937 11971 va (VaSet 11938 11972 font "Arial,8,1" … … 11943 11977 tm "HdlTextNameMgr" 11944 11978 ) 11945 *38 7(Text11979 *388 (Text 11946 11980 va (VaSet 11947 11981 font "Arial,8,1" … … 12346 12380 stg "VerticalLayoutStrategy" 12347 12381 textVec [ 12348 *38 8(Text12382 *389 (Text 12349 12383 va (VaSet 12350 12384 font "Arial,8,1" … … 12354 12388 blo "14100,20800" 12355 12389 ) 12356 *3 89(MLText12390 *390 (MLText 12357 12391 va (VaSet 12358 12392 ) … … 12406 12440 stg "VerticalLayoutStrategy" 12407 12441 textVec [ 12408 *39 0(Text12442 *391 (Text 12409 12443 va (VaSet 12410 12444 font "Arial,8,1" … … 12414 12448 blo "14100,20800" 12415 12449 ) 12416 *39 1(MLText12450 *392 (MLText 12417 12451 va (VaSet 12418 12452 ) … … 12560 12594 suid 209,0 12561 12595 usingSuid 1 12562 emptyRow *39 2(LEmptyRow12596 emptyRow *393 (LEmptyRow 12563 12597 ) 12564 12598 uid 54,0 12565 12599 optionalChildren [ 12566 *39 3(RefLabelRowHdr12567 ) 12568 *39 4(TitleRowHdr12569 ) 12570 *39 5(FilterRowHdr12571 ) 12572 *39 6(RefLabelColHdr12600 *394 (RefLabelRowHdr 12601 ) 12602 *395 (TitleRowHdr 12603 ) 12604 *396 (FilterRowHdr 12605 ) 12606 *397 (RefLabelColHdr 12573 12607 tm "RefLabelColHdrMgr" 12574 12608 ) 12575 *39 7(RowExpandColHdr12609 *398 (RowExpandColHdr 12576 12610 tm "RowExpandColHdrMgr" 12577 12611 ) 12578 *39 8(GroupColHdr12612 *399 (GroupColHdr 12579 12613 tm "GroupColHdrMgr" 12580 12614 ) 12581 * 399(NameColHdr12615 *400 (NameColHdr 12582 12616 tm "BlockDiagramNameColHdrMgr" 12583 12617 ) 12584 *40 0(ModeColHdr12618 *401 (ModeColHdr 12585 12619 tm "BlockDiagramModeColHdrMgr" 12586 12620 ) 12587 *40 1(TypeColHdr12621 *402 (TypeColHdr 12588 12622 tm "BlockDiagramTypeColHdrMgr" 12589 12623 ) 12590 *40 2(BoundsColHdr12624 *403 (BoundsColHdr 12591 12625 tm "BlockDiagramBoundsColHdrMgr" 12592 12626 ) 12593 *40 3(InitColHdr12627 *404 (InitColHdr 12594 12628 tm "BlockDiagramInitColHdrMgr" 12595 12629 ) 12596 *40 4(EolColHdr12630 *405 (EolColHdr 12597 12631 tm "BlockDiagramEolColHdrMgr" 12598 12632 ) 12599 *40 5(LeafLogPort12633 *406 (LeafLogPort 12600 12634 port (LogicalPort 12601 12635 m 4 … … 12612 12646 uid 327,0 12613 12647 ) 12614 *40 6(LeafLogPort12648 *407 (LeafLogPort 12615 12649 port (LogicalPort 12616 12650 m 4 … … 12625 12659 uid 329,0 12626 12660 ) 12627 *40 7(LeafLogPort12661 *408 (LeafLogPort 12628 12662 port (LogicalPort 12629 12663 m 4 … … 12637 12671 uid 1491,0 12638 12672 ) 12639 *40 8(LeafLogPort12673 *409 (LeafLogPort 12640 12674 port (LogicalPort 12641 12675 m 1 … … 12650 12684 uid 2435,0 12651 12685 ) 12652 *4 09(LeafLogPort12686 *410 (LeafLogPort 12653 12687 port (LogicalPort 12654 12688 m 4 … … 12663 12697 uid 2437,0 12664 12698 ) 12665 *41 0(LeafLogPort12699 *411 (LeafLogPort 12666 12700 port (LogicalPort 12667 12701 m 4 … … 12676 12710 uid 3037,0 12677 12711 ) 12678 *41 1(LeafLogPort12712 *412 (LeafLogPort 12679 12713 port (LogicalPort 12680 12714 m 1 … … 12688 12722 uid 3039,0 12689 12723 ) 12690 *41 2(LeafLogPort12724 *413 (LeafLogPort 12691 12725 port (LogicalPort 12692 12726 decl (Decl … … 12701 12735 uid 3276,0 12702 12736 ) 12703 *41 3(LeafLogPort12737 *414 (LeafLogPort 12704 12738 port (LogicalPort 12705 12739 decl (Decl … … 12712 12746 uid 3278,0 12713 12747 ) 12714 *41 4(LeafLogPort12748 *415 (LeafLogPort 12715 12749 port (LogicalPort 12716 12750 m 1 … … 12725 12759 uid 3280,0 12726 12760 ) 12727 *41 5(LeafLogPort12761 *416 (LeafLogPort 12728 12762 port (LogicalPort 12729 12763 m 4 … … 12737 12771 uid 3282,0 12738 12772 ) 12739 *41 6(LeafLogPort12773 *417 (LeafLogPort 12740 12774 port (LogicalPort 12741 12775 m 1 … … 12751 12785 uid 3382,0 12752 12786 ) 12753 *41 7(LeafLogPort12787 *418 (LeafLogPort 12754 12788 port (LogicalPort 12755 12789 decl (Decl … … 12763 12797 uid 3384,0 12764 12798 ) 12765 *41 8(LeafLogPort12799 *419 (LeafLogPort 12766 12800 port (LogicalPort 12767 12801 decl (Decl … … 12775 12809 uid 3386,0 12776 12810 ) 12777 *4 19(LeafLogPort12811 *420 (LeafLogPort 12778 12812 port (LogicalPort 12779 12813 decl (Decl … … 12787 12821 uid 3388,0 12788 12822 ) 12789 *42 0(LeafLogPort12823 *421 (LeafLogPort 12790 12824 port (LogicalPort 12791 12825 decl (Decl … … 12799 12833 uid 3390,0 12800 12834 ) 12801 *42 1(LeafLogPort12835 *422 (LeafLogPort 12802 12836 port (LogicalPort 12803 12837 decl (Decl … … 12811 12845 uid 3392,0 12812 12846 ) 12813 *42 2(LeafLogPort12847 *423 (LeafLogPort 12814 12848 port (LogicalPort 12815 12849 m 1 … … 12823 12857 uid 3468,0 12824 12858 ) 12825 *42 3(LeafLogPort12859 *424 (LeafLogPort 12826 12860 port (LogicalPort 12827 12861 m 1 … … 12835 12869 uid 3470,0 12836 12870 ) 12837 *42 4(LeafLogPort12871 *425 (LeafLogPort 12838 12872 port (LogicalPort 12839 12873 m 1 … … 12847 12881 uid 3472,0 12848 12882 ) 12849 *42 5(LeafLogPort12883 *426 (LeafLogPort 12850 12884 port (LogicalPort 12851 12885 m 1 … … 12859 12893 uid 3474,0 12860 12894 ) 12861 *42 6(LeafLogPort12895 *427 (LeafLogPort 12862 12896 port (LogicalPort 12863 12897 decl (Decl … … 12870 12904 uid 3524,0 12871 12905 ) 12872 *42 7(LeafLogPort12906 *428 (LeafLogPort 12873 12907 port (LogicalPort 12874 12908 decl (Decl … … 12881 12915 uid 3526,0 12882 12916 ) 12883 *42 8(LeafLogPort12917 *429 (LeafLogPort 12884 12918 port (LogicalPort 12885 12919 decl (Decl … … 12892 12926 uid 3528,0 12893 12927 ) 12894 *4 29(LeafLogPort12928 *430 (LeafLogPort 12895 12929 port (LogicalPort 12896 12930 decl (Decl … … 12903 12937 uid 3530,0 12904 12938 ) 12905 *43 0(LeafLogPort12939 *431 (LeafLogPort 12906 12940 port (LogicalPort 12907 12941 m 1 … … 12917 12951 uid 3532,0 12918 12952 ) 12919 *43 1(LeafLogPort12953 *432 (LeafLogPort 12920 12954 port (LogicalPort 12921 12955 m 1 … … 12930 12964 uid 3534,0 12931 12965 ) 12932 *432 (LeafLogPort12933 port (LogicalPort12934 m 112935 decl (Decl12936 n "T0_CS"12937 t "std_logic"12938 o 4412939 suid 101,012940 )12941 )12942 uid 3646,012943 )12944 12966 *433 (LeafLogPort 12945 12967 port (LogicalPort 12946 12968 m 1 12947 12969 decl (Decl 12948 n "T 1_CS"12949 t "std_logic" 12950 o 4 512951 suid 10 2,012952 ) 12953 ) 12954 uid 364 8,012970 n "T0_CS" 12971 t "std_logic" 12972 o 44 12973 suid 101,0 12974 ) 12975 ) 12976 uid 3646,0 12955 12977 ) 12956 12978 *434 (LeafLogPort … … 12958 12980 m 1 12959 12981 decl (Decl 12960 n "T 2_CS"12961 t "std_logic" 12962 o 4 612963 suid 10 3,012964 ) 12965 ) 12966 uid 36 50,012982 n "T1_CS" 12983 t "std_logic" 12984 o 45 12985 suid 102,0 12986 ) 12987 ) 12988 uid 3648,0 12967 12989 ) 12968 12990 *435 (LeafLogPort … … 12970 12992 m 1 12971 12993 decl (Decl 12972 n "T 3_CS"12973 t "std_logic" 12974 o 4 712975 suid 10 4,012976 ) 12977 ) 12978 uid 365 2,012994 n "T2_CS" 12995 t "std_logic" 12996 o 46 12997 suid 103,0 12998 ) 12999 ) 13000 uid 3650,0 12979 13001 ) 12980 13002 *436 (LeafLogPort … … 12982 13004 m 1 12983 13005 decl (Decl 13006 n "T3_CS" 13007 t "std_logic" 13008 o 47 13009 suid 104,0 13010 ) 13011 ) 13012 uid 3652,0 13013 ) 13014 *437 (LeafLogPort 13015 port (LogicalPort 13016 m 1 13017 decl (Decl 12984 13018 n "S_CLK" 12985 13019 t "std_logic" … … 12990 13024 uid 3654,0 12991 13025 ) 12992 *43 7(LeafLogPort13026 *438 (LeafLogPort 12993 13027 port (LogicalPort 12994 13028 m 1 … … 13003 13037 uid 3656,0 13004 13038 ) 13005 *43 8(LeafLogPort13039 *439 (LeafLogPort 13006 13040 port (LogicalPort 13007 13041 m 2 … … 13016 13050 uid 3658,0 13017 13051 ) 13018 *4 39(LeafLogPort13052 *440 (LeafLogPort 13019 13053 port (LogicalPort 13020 13054 m 1 … … 13029 13063 uid 3660,0 13030 13064 ) 13031 *44 0(LeafLogPort13065 *441 (LeafLogPort 13032 13066 port (LogicalPort 13033 13067 m 1 … … 13042 13076 uid 3662,0 13043 13077 ) 13044 *44 1(LeafLogPort13078 *442 (LeafLogPort 13045 13079 port (LogicalPort 13046 13080 m 1 … … 13055 13089 uid 3664,0 13056 13090 ) 13057 *44 2(LeafLogPort13091 *443 (LeafLogPort 13058 13092 port (LogicalPort 13059 13093 decl (Decl … … 13066 13100 uid 3666,0 13067 13101 ) 13068 *44 3(LeafLogPort13102 *444 (LeafLogPort 13069 13103 port (LogicalPort 13070 13104 m 1 … … 13079 13113 uid 3668,0 13080 13114 ) 13081 *44 4(LeafLogPort13115 *445 (LeafLogPort 13082 13116 port (LogicalPort 13083 13117 m 1 … … 13092 13126 uid 3696,0 13093 13127 ) 13094 *44 5(LeafLogPort13128 *446 (LeafLogPort 13095 13129 port (LogicalPort 13096 13130 m 2 … … 13106 13140 uid 3698,0 13107 13141 ) 13108 *446 (LeafLogPort13109 port (LogicalPort13110 m 113111 decl (Decl13112 n "TRG_V"13113 t "std_logic"13114 o 4813115 suid 126,013116 )13117 )13118 uid 3886,013119 )13120 13142 *447 (LeafLogPort 13121 13143 port (LogicalPort 13122 13144 m 1 13123 13145 decl (Decl 13124 n " RS485_C_RE"13125 t "std_logic" 13126 o 3813127 suid 12 7,013128 ) 13129 ) 13130 uid 388 8,013146 n "TRG_V" 13147 t "std_logic" 13148 o 48 13149 suid 126,0 13150 ) 13151 ) 13152 uid 3886,0 13131 13153 ) 13132 13154 *448 (LeafLogPort … … 13134 13156 m 1 13135 13157 decl (Decl 13136 n "RS485_C_ DE"13137 t "std_logic" 13138 o 3 613139 suid 12 8,013140 ) 13141 ) 13142 uid 38 90,013158 n "RS485_C_RE" 13159 t "std_logic" 13160 o 38 13161 suid 127,0 13162 ) 13163 ) 13164 uid 3888,0 13143 13165 ) 13144 13166 *449 (LeafLogPort … … 13146 13168 m 1 13147 13169 decl (Decl 13148 n "RS485_ E_RE"13149 t "std_logic" 13150 o 4013151 suid 12 9,013152 ) 13153 ) 13154 uid 389 2,013170 n "RS485_C_DE" 13171 t "std_logic" 13172 o 36 13173 suid 128,0 13174 ) 13175 ) 13176 uid 3890,0 13155 13177 ) 13156 13178 *450 (LeafLogPort … … 13158 13180 m 1 13159 13181 decl (Decl 13160 n "RS485_E_ DE"13161 t "std_logic" 13162 o 3913163 suid 1 30,013164 ) 13165 ) 13166 uid 389 4,013182 n "RS485_E_RE" 13183 t "std_logic" 13184 o 40 13185 suid 129,0 13186 ) 13187 ) 13188 uid 3892,0 13167 13189 ) 13168 13190 *451 (LeafLogPort … … 13170 13192 m 1 13171 13193 decl (Decl 13194 n "RS485_E_DE" 13195 t "std_logic" 13196 o 39 13197 suid 130,0 13198 ) 13199 ) 13200 uid 3894,0 13201 ) 13202 *452 (LeafLogPort 13203 port (LogicalPort 13204 m 1 13205 decl (Decl 13172 13206 n "DENABLE" 13173 13207 t "std_logic" … … 13179 13213 uid 3896,0 13180 13214 ) 13181 *45 2(LeafLogPort13215 *453 (LeafLogPort 13182 13216 port (LogicalPort 13183 13217 m 1 … … 13191 13225 uid 3900,0 13192 13226 ) 13193 *45 3(LeafLogPort13227 *454 (LeafLogPort 13194 13228 port (LogicalPort 13195 13229 m 1 … … 13205 13239 uid 5322,0 13206 13240 ) 13207 *45 4(LeafLogPort13241 *455 (LeafLogPort 13208 13242 port (LogicalPort 13209 13243 decl (Decl … … 13218 13252 scheme 0 13219 13253 ) 13220 *45 5(LeafLogPort13254 *456 (LeafLogPort 13221 13255 port (LogicalPort 13222 13256 m 1 … … 13233 13267 scheme 0 13234 13268 ) 13235 *45 6(LeafLogPort13269 *457 (LeafLogPort 13236 13270 port (LogicalPort 13237 13271 m 1 … … 13248 13282 scheme 0 13249 13283 ) 13250 *45 7(LeafLogPort13284 *458 (LeafLogPort 13251 13285 port (LogicalPort 13252 13286 m 4 … … 13261 13295 scheme 0 13262 13296 ) 13263 *45 8(LeafLogPort13297 *459 (LeafLogPort 13264 13298 port (LogicalPort 13265 13299 m 4 … … 13275 13309 uid 8875,0 13276 13310 ) 13277 *459 (LeafLogPort13278 port (LogicalPort13279 m 413280 decl (Decl13281 n "CLK_50"13282 t "std_logic"13283 o 6113284 suid 163,013285 )13286 )13287 uid 9516,013288 )13289 13311 *460 (LeafLogPort 13290 13312 port (LogicalPort 13291 13313 m 4 13292 13314 decl (Decl 13293 n "CLK_ 25_PS1"13294 t "std_logic" 13295 o 6 013296 suid 16 4,013297 ) 13298 ) 13299 uid 10056,013315 n "CLK_50" 13316 t "std_logic" 13317 o 61 13318 suid 163,0 13319 ) 13320 ) 13321 uid 9516,0 13300 13322 ) 13301 13323 *461 (LeafLogPort … … 13303 13325 m 4 13304 13326 decl (Decl 13327 n "CLK_25_PS1" 13328 t "std_logic" 13329 o 60 13330 suid 164,0 13331 ) 13332 ) 13333 uid 10056,0 13334 ) 13335 *462 (LeafLogPort 13336 port (LogicalPort 13337 m 4 13338 decl (Decl 13305 13339 n "adc_clk_en" 13306 13340 t "std_logic" … … 13312 13346 uid 10058,0 13313 13347 ) 13314 *46 2(LeafLogPort13348 *463 (LeafLogPort 13315 13349 port (LogicalPort 13316 13350 m 1 … … 13327 13361 scheme 0 13328 13362 ) 13329 *463 (LeafLogPort13330 port (LogicalPort13331 m 413332 decl (Decl13333 n "CLK50_OUT"13334 t "std_logic"13335 o 5813336 suid 184,013337 )13338 )13339 uid 10704,013340 )13341 13363 *464 (LeafLogPort 13342 13364 port (LogicalPort 13343 13365 m 4 13344 13366 decl (Decl 13345 n "CLK 25_OUT"13346 t "std_logic" 13347 o 5 613348 suid 18 5,013349 ) 13350 ) 13351 uid 1070 6,013367 n "CLK50_OUT" 13368 t "std_logic" 13369 o 58 13370 suid 184,0 13371 ) 13372 ) 13373 uid 10704,0 13352 13374 ) 13353 13375 *465 (LeafLogPort … … 13355 13377 m 4 13356 13378 decl (Decl 13357 n "CLK25_ PSOUT"13358 t "std_logic" 13359 o 5 713360 suid 18 6,013361 ) 13362 ) 13363 uid 1070 8,013379 n "CLK25_OUT" 13380 t "std_logic" 13381 o 56 13382 suid 185,0 13383 ) 13384 ) 13385 uid 10706,0 13364 13386 ) 13365 13387 *466 (LeafLogPort … … 13367 13389 m 4 13368 13390 decl (Decl 13369 n " PS_DIR_IN"13370 t "std_logic" 13371 o 6813372 suid 18 7,013373 ) 13374 ) 13375 uid 107 10,013391 n "CLK25_PSOUT" 13392 t "std_logic" 13393 o 57 13394 suid 186,0 13395 ) 13396 ) 13397 uid 10708,0 13376 13398 ) 13377 13399 *467 (LeafLogPort … … 13379 13401 m 4 13380 13402 decl (Decl 13381 n "PS_D O_IN"13382 t "std_logic" 13383 o 6 913384 suid 18 8,013385 ) 13386 ) 13387 uid 1071 2,013403 n "PS_DIR_IN" 13404 t "std_logic" 13405 o 68 13406 suid 187,0 13407 ) 13408 ) 13409 uid 10710,0 13388 13410 ) 13389 13411 *468 (LeafLogPort … … 13391 13413 m 4 13392 13414 decl (Decl 13393 n "PS EN_OUT"13394 t "std_logic" 13395 o 6 613396 suid 18 9,013397 ) 13398 ) 13399 uid 1071 4,013415 n "PS_DO_IN" 13416 t "std_logic" 13417 o 69 13418 suid 188,0 13419 ) 13420 ) 13421 uid 10712,0 13400 13422 ) 13401 13423 *469 (LeafLogPort … … 13403 13425 m 4 13404 13426 decl (Decl 13427 n "PSEN_OUT" 13428 t "std_logic" 13429 o 66 13430 suid 189,0 13431 ) 13432 ) 13433 uid 10714,0 13434 ) 13435 *470 (LeafLogPort 13436 port (LogicalPort 13437 m 4 13438 decl (Decl 13405 13439 n "PSINCDEC_OUT" 13406 13440 t "std_logic" … … 13411 13445 uid 10716,0 13412 13446 ) 13413 *47 0(LeafLogPort13447 *471 (LeafLogPort 13414 13448 port (LogicalPort 13415 13449 m 4 … … 13425 13459 uid 10718,0 13426 13460 ) 13427 *47 1(LeafLogPort13461 *472 (LeafLogPort 13428 13462 port (LogicalPort 13429 13463 m 4 … … 13440 13474 uid 10720,0 13441 13475 ) 13442 *47 2(LeafLogPort13476 *473 (LeafLogPort 13443 13477 port (LogicalPort 13444 13478 m 4 … … 13456 13490 uid 10722,0 13457 13491 ) 13458 *473 (LeafLogPort13459 port (LogicalPort13460 m 413461 decl (Decl13462 n "PSDONE_extraOUT"13463 t "std_logic"13464 o 6513465 suid 194,013466 )13467 )13468 uid 10724,013469 )13470 13492 *474 (LeafLogPort 13471 13493 port (LogicalPort 13472 13494 m 4 13473 13495 decl (Decl 13474 n "PS CLK_OUT"13475 t "std_logic" 13476 o 6 413477 suid 19 5,013478 ) 13479 ) 13480 uid 1072 6,013496 n "PSDONE_extraOUT" 13497 t "std_logic" 13498 o 65 13499 suid 194,0 13500 ) 13501 ) 13502 uid 10724,0 13481 13503 ) 13482 13504 *475 (LeafLogPort … … 13484 13506 m 4 13485 13507 decl (Decl 13508 n "PSCLK_OUT" 13509 t "std_logic" 13510 o 64 13511 suid 195,0 13512 ) 13513 ) 13514 uid 10726,0 13515 ) 13516 *476 (LeafLogPort 13517 port (LogicalPort 13518 m 4 13519 decl (Decl 13486 13520 n "LOCKED_extraOUT" 13487 13521 t "std_logic" … … 13492 13526 uid 10728,0 13493 13527 ) 13494 *47 6(LeafLogPort13528 *477 (LeafLogPort 13495 13529 port (LogicalPort 13496 13530 decl (Decl … … 13504 13538 scheme 0 13505 13539 ) 13506 *47 7(LeafLogPort13540 *478 (LeafLogPort 13507 13541 port (LogicalPort 13508 13542 m 1 … … 13517 13551 scheme 0 13518 13552 ) 13519 *47 8(LeafLogPort13553 *479 (LeafLogPort 13520 13554 port (LogicalPort 13521 13555 decl (Decl … … 13529 13563 scheme 0 13530 13564 ) 13531 *4 79(LeafLogPort13565 *480 (LeafLogPort 13532 13566 port (LogicalPort 13533 13567 decl (Decl … … 13541 13575 scheme 0 13542 13576 ) 13543 *48 0(LeafLogPort13577 *481 (LeafLogPort 13544 13578 port (LogicalPort 13545 13579 m 1 … … 13554 13588 uid 12336,0 13555 13589 ) 13556 *481 (LeafLogPort13557 port (LogicalPort13558 m 113559 decl (Decl13560 n "AMBER_LED"13561 t "std_logic"13562 o 3113563 suid 207,013564 )13565 )13566 uid 12768,013567 )13568 13590 *482 (LeafLogPort 13569 13591 port (LogicalPort 13570 13592 m 1 13571 13593 decl (Decl 13594 n "AMBER_LED" 13595 t "std_logic" 13596 o 31 13597 suid 207,0 13598 ) 13599 ) 13600 uid 12768,0 13601 ) 13602 *483 (LeafLogPort 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optionalChildren [ 14255 *590 (MRCItem 14282 emptyMRCItem *590 (MRCItem 14256 14283 litem &577 14257 14284 pos 0 14258 14285 dimension 20 14259 uid 98,0 14260 ) 14286 ) 14287 uid 97,0 14288 optionalChildren [ 14261 14289 *591 (MRCItem 14262 14290 litem &578 14291 pos 0 14292 dimension 20 14293 uid 98,0 14294 ) 14295 *592 (MRCItem 14296 litem &579 14263 14297 pos 1 14264 14298 dimension 23 14265 14299 uid 99,0 14266 14300 ) 14267 *59 2(MRCItem14268 litem &5 7914301 *593 (MRCItem 14302 litem &580 14269 14303 pos 2 14270 14304 hidden 1 … … 14283 14317 uid 101,0 14284 14318 optionalChildren [ 14285 *59 3(MRCItem14286 litem &58 014319 *594 (MRCItem 14320 litem &581 14287 14321 pos 0 14288 14322 dimension 20 14289 14323 uid 102,0 14290 14324 ) 14291 *59 4(MRCItem14292 litem &58 214325 *595 (MRCItem 14326 litem &583 14293 14327 pos 1 14294 14328 dimension 50 14295 14329 uid 103,0 14296 14330 ) 14297 *59 5(MRCItem14298 litem &58 314331 *596 (MRCItem 14332 litem &584 14299 14333 pos 2 14300 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firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib/hds/@f@a@d_@board/symbol.sb
r10075 r10081 1387 1387 (vvPair 1388 1388 variable "date" 1389 value "0 4.01.2011"1389 value "05.01.2011" 1390 1390 ) 1391 1391 (vvPair 1392 1392 variable "day" 1393 value " Di"1393 value "Mi" 1394 1394 ) 1395 1395 (vvPair 1396 1396 variable "day_long" 1397 value " Dienstag"1397 value "Mittwoch" 1398 1398 ) 1399 1399 (vvPair 1400 1400 variable "dd" 1401 value "0 4"1401 value "05" 1402 1402 ) 1403 1403 (vvPair … … 1535 1535 (vvPair 1536 1536 variable "time" 1537 value "1 8:14:31"1537 value "17:34:20" 1538 1538 ) 1539 1539 (vvPair … … 4852 4852 ) 4853 4853 ) 4854 lastUid 4 093,04854 lastUid 4139,0 4855 4855 activeModelName "Symbol:CDM" 4856 4856 ) -
firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib/hds/@f@a@d_main/struct.bd
r10075 r10081 314 314 (vvPair 315 315 variable "date" 316 value "0 4.01.2011"316 value "05.01.2011" 317 317 ) 318 318 (vvPair 319 319 variable "day" 320 value " Di"320 value "Mi" 321 321 ) 322 322 (vvPair 323 323 variable "day_long" 324 value " Dienstag"324 value "Mittwoch" 325 325 ) 326 326 (vvPair 327 327 variable "dd" 328 value "0 4"328 value "05" 329 329 ) 330 330 (vvPair … … 466 466 (vvPair 467 467 variable "time" 468 value "1 8:05:35"468 value "14:33:40" 469 469 ) 470 470 (vvPair … … 557 557 font "Courier New,8,0" 558 558 ) 559 xt "-103000,118600,-59500,119400" 560 st "SIGNAL write_ea : std_logic_vector(0 downto 0) := \"0\"" 559 xt "-103000,119400,-59500,120200" 560 st "SIGNAL write_ea : std_logic_vector(0 downto 0) := \"0\" 561 " 561 562 ) 562 563 ) … … 576 577 ) 577 578 xt "-103000,64200,-63000,65000" 578 st "SIGNAL addr_out : std_logic_vector(RAMADDRWIDTH64b-1 DOWNTO 0)" 579 st "SIGNAL addr_out : std_logic_vector(RAMADDRWIDTH64b-1 DOWNTO 0) 580 " 579 581 ) 580 582 ) … … 594 596 ) 595 597 xt "-103000,81800,-70500,82600" 596 st "SIGNAL data_out : std_logic_vector(63 DOWNTO 0)" 598 st "SIGNAL data_out : std_logic_vector(63 DOWNTO 0) 599 " 597 600 ) 598 601 ) … … 611 614 font "Courier New,8,0" 612 615 ) 613 xt "-103000,94600,-63000,95400" 614 st "SIGNAL ram_addr : std_logic_vector(RAMADDRWIDTH64b+1 DOWNTO 0)" 616 xt "-103000,95400,-63000,96200" 617 st "SIGNAL ram_addr : std_logic_vector(RAMADDRWIDTH64b+1 DOWNTO 0) 618 " 615 619 ) 616 620 ) … … 629 633 font "Courier New,8,0" 630 634 ) 631 xt "-103000,95400,-70500,96200" 632 st "SIGNAL ram_data : std_logic_vector(15 downto 0)" 635 xt "-103000,96200,-70500,97000" 636 st "SIGNAL ram_data : std_logic_vector(15 downto 0) 637 " 633 638 ) 634 639 ) … … 648 653 ) 649 654 xt "-103000,55800,-63000,56600" 650 st "wiz_reset : std_logic := '1'" 655 st "wiz_reset : std_logic := '1' 656 " 651 657 ) 652 658 ) … … 666 672 ) 667 673 xt "-103000,53400,-74500,54200" 668 st "wiz_addr : std_logic_vector(9 DOWNTO 0)" 674 st "wiz_addr : std_logic_vector(9 DOWNTO 0) 675 " 669 676 ) 670 677 ) … … 684 691 ) 685 692 xt "-103000,58200,-74000,59000" 686 st "wiz_data : std_logic_vector(15 DOWNTO 0)" 693 st "wiz_data : std_logic_vector(15 DOWNTO 0) 694 " 687 695 ) 688 696 ) … … 702 710 ) 703 711 xt "-103000,54200,-63000,55000" 704 st "wiz_cs : std_logic := '1'" 712 st "wiz_cs : std_logic := '1' 713 " 705 714 ) 706 715 ) … … 720 729 ) 721 730 xt "-103000,56600,-63000,57400" 722 st "wiz_wr : std_logic := '1'" 731 st "wiz_wr : std_logic := '1' 732 " 723 733 ) 724 734 ) … … 738 748 ) 739 749 xt "-103000,55000,-63000,55800" 740 st "wiz_rd : std_logic := '1'" 750 st "wiz_rd : std_logic := '1' 751 " 741 752 ) 742 753 ) … … 755 766 ) 756 767 xt "-103000,26200,-84500,27000" 757 st "wiz_int : std_logic" 768 st "wiz_int : std_logic 769 " 758 770 ) 759 771 ) … … 2665 2677 ) 2666 2678 ) 2679 *66 (CptPort 2680 uid 11385,0 2681 ps "OnEdgeStrategy" 2682 shape (Triangle 2683 uid 11386,0 2684 ro 90 2685 va (VaSet 2686 vasetType 1 2687 fg "0,65535,0" 2688 ) 2689 xt "40000,92625,40750,93375" 2690 ) 2691 tg (CPTG 2692 uid 11387,0 2693 ps "CptPortTextPlaceStrategy" 2694 stg "RightVerticalLayoutStrategy" 2695 f (Text 2696 uid 11388,0 2697 va (VaSet 2698 ) 2699 xt "31500,92500,39000,93500" 2700 st "drs_readout_started" 2701 ju 2 2702 blo "39000,93300" 2703 ) 2704 ) 2705 thePort (LogicalPort 2706 m 1 2707 decl (Decl 2708 n "drs_readout_started" 2709 t "std_logic" 2710 o 44 2711 suid 61,0 2712 ) 2713 ) 2714 ) 2667 2715 ] 2668 2716 shape (Rectangle … … 2674 2722 lineWidth 2 2675 2723 ) 2676 xt "19000,47000,40000,9 2000"2724 xt "19000,47000,40000,94000" 2677 2725 ) 2678 2726 oxt "37000,1000,51000,21000" … … 2682 2730 stg "VerticalLayoutStrategy" 2683 2731 textVec [ 2684 *6 6(Text2732 *67 (Text 2685 2733 uid 1402,0 2686 2734 va (VaSet 2687 2735 font "Arial,8,1" 2688 2736 ) 2689 xt "19300,9 1000,25500,92000"2737 xt "19300,94000,25500,95000" 2690 2738 st "FACT_FAD_lib" 2691 blo "19300,9 1800"2739 blo "19300,94800" 2692 2740 tm "BdLibraryNameMgr" 2693 2741 ) 2694 *6 7(Text2742 *68 (Text 2695 2743 uid 1403,0 2696 2744 va (VaSet 2697 2745 font "Arial,8,1" 2698 2746 ) 2699 xt "19300,9 2000,25700,93000"2747 xt "19300,95000,25700,96000" 2700 2748 st "data_generator" 2701 blo "19300,9 2800"2749 blo "19300,95800" 2702 2750 tm "CptNameMgr" 2703 2751 ) 2704 *6 8(Text2752 *69 (Text 2705 2753 uid 1404,0 2706 2754 va (VaSet 2707 2755 font "Arial,8,1" 2708 2756 ) 2709 xt "19300,9 3000,28900,94000"2757 xt "19300,96000,28900,97000" 2710 2758 st "I_main_data_generator" 2711 blo "19300,9 3800"2759 blo "19300,96800" 2712 2760 tm "InstanceNameMgr" 2713 2761 ) … … 2744 2792 fg "49152,49152,49152" 2745 2793 ) 2746 xt "19250,9 0250,20750,91750"2794 xt "19250,92250,20750,93750" 2747 2795 iconName "VhdlFileViewIcon.png" 2748 2796 iconMaskName "VhdlFileViewIcon.msk" … … 2755 2803 archFileType "UNKNOWN" 2756 2804 ) 2757 * 69(Net2805 *70 (Net 2758 2806 uid 1409,0 2759 2807 decl (Decl … … 2772 2820 ) 2773 2821 xt "-103000,23800,-74500,24600" 2774 st "board_id : std_logic_vector(3 downto 0)" 2775 ) 2776 ) 2777 *70 (Net 2822 st "board_id : std_logic_vector(3 downto 0) 2823 " 2824 ) 2825 ) 2826 *71 (Net 2778 2827 uid 1423,0 2779 2828 decl (Decl … … 2791 2840 ) 2792 2841 xt "-103000,25400,-84500,26200" 2793 st "trigger : std_logic" 2794 ) 2795 ) 2796 *71 (PortIoIn 2842 st "trigger : std_logic 2843 " 2844 ) 2845 ) 2846 *72 (PortIoIn 2797 2847 uid 1443,0 2798 2848 shape (CompositeShape … … 2839 2889 ) 2840 2890 ) 2841 *7 2(SaComponent2891 *73 (SaComponent 2842 2892 uid 1606,0 2843 2893 optionalChildren [ 2844 *7 3(CptPort2894 *74 (CptPort 2845 2895 uid 1542,0 2846 2896 ps "OnEdgeStrategy" … … 2878 2928 ) 2879 2929 ) 2880 *7 4(CptPort2930 *75 (CptPort 2881 2931 uid 1546,0 2882 2932 ps "OnEdgeStrategy" … … 2917 2967 ) 2918 2968 ) 2919 *7 5(CptPort2969 *76 (CptPort 2920 2970 uid 1550,0 2921 2971 ps "OnEdgeStrategy" … … 2956 3006 ) 2957 3007 ) 2958 *7 6(CptPort3008 *77 (CptPort 2959 3009 uid 1554,0 2960 3010 ps "OnEdgeStrategy" … … 2995 3045 ) 2996 3046 ) 2997 *7 7(CptPort3047 *78 (CptPort 2998 3048 uid 1558,0 2999 3049 ps "OnEdgeStrategy" … … 3034 3084 ) 3035 3085 ) 3036 *7 8(CptPort3086 *79 (CptPort 3037 3087 uid 1562,0 3038 3088 ps "OnEdgeStrategy" … … 3073 3123 ) 3074 3124 ) 3075 * 79(CptPort3125 *80 (CptPort 3076 3126 uid 1570,0 3077 3127 ps "OnEdgeStrategy" … … 3112 3162 ) 3113 3163 ) 3114 *8 0(CptPort3164 *81 (CptPort 3115 3165 uid 1574,0 3116 3166 ps "OnEdgeStrategy" … … 3149 3199 ) 3150 3200 ) 3151 *8 1(CptPort3201 *82 (CptPort 3152 3202 uid 1578,0 3153 3203 ps "OnEdgeStrategy" … … 3186 3236 ) 3187 3237 ) 3188 *8 2(CptPort3238 *83 (CptPort 3189 3239 uid 1582,0 3190 3240 ps "OnEdgeStrategy" … … 3223 3273 ) 3224 3274 ) 3225 *8 3(CptPort3275 *84 (CptPort 3226 3276 uid 1586,0 3227 3277 ps "OnEdgeStrategy" … … 3260 3310 ) 3261 3311 ) 3262 *8 4(CptPort3312 *85 (CptPort 3263 3313 uid 1590,0 3264 3314 ps "OnEdgeStrategy" … … 3298 3348 ) 3299 3349 ) 3300 *8 5(CptPort3350 *86 (CptPort 3301 3351 uid 1594,0 3302 3352 ps "OnEdgeStrategy" … … 3334 3384 ) 3335 3385 ) 3336 *8 6(CptPort3386 *87 (CptPort 3337 3387 uid 1598,0 3338 3388 ps "OnEdgeStrategy" … … 3372 3422 ) 3373 3423 ) 3374 *8 7(CptPort3424 *88 (CptPort 3375 3425 uid 2218,0 3376 3426 ps "OnEdgeStrategy" … … 3407 3457 ) 3408 3458 ) 3409 *8 8(CptPort3459 *89 (CptPort 3410 3460 uid 2222,0 3411 3461 ps "OnEdgeStrategy" … … 3441 3491 ) 3442 3492 ) 3443 * 89(CptPort3493 *90 (CptPort 3444 3494 uid 2226,0 3445 3495 ps "OnEdgeStrategy" … … 3475 3525 ) 3476 3526 ) 3477 *9 0(CptPort3527 *91 (CptPort 3478 3528 uid 5216,0 3479 3529 ps "OnEdgeStrategy" … … 3514 3564 ) 3515 3565 ) 3516 *9 1(CptPort3566 *92 (CptPort 3517 3567 uid 5275,0 3518 3568 ps "OnEdgeStrategy" … … 3550 3600 ) 3551 3601 ) 3552 *9 2(CptPort3602 *93 (CptPort 3553 3603 uid 5924,0 3554 3604 ps "OnEdgeStrategy" … … 3586 3636 ) 3587 3637 ) 3588 *9 3(CptPort3638 *94 (CptPort 3589 3639 uid 5928,0 3590 3640 ps "OnEdgeStrategy" … … 3622 3672 ) 3623 3673 ) 3624 *9 4(CptPort3674 *95 (CptPort 3625 3675 uid 5932,0 3626 3676 ps "OnEdgeStrategy" … … 3659 3709 ) 3660 3710 ) 3661 *9 5(CptPort3711 *96 (CptPort 3662 3712 uid 5936,0 3663 3713 ps "OnEdgeStrategy" … … 3693 3743 ) 3694 3744 ) 3695 *9 6(CptPort3745 *97 (CptPort 3696 3746 uid 5940,0 3697 3747 ps "OnEdgeStrategy" … … 3729 3779 ) 3730 3780 ) 3731 *9 7(CptPort3781 *98 (CptPort 3732 3782 uid 5944,0 3733 3783 ps "OnEdgeStrategy" … … 3765 3815 ) 3766 3816 ) 3767 *9 8(CptPort3817 *99 (CptPort 3768 3818 uid 5970,0 3769 3819 ps "OnEdgeStrategy" … … 3802 3852 ) 3803 3853 ) 3804 * 99(CptPort3854 *100 (CptPort 3805 3855 uid 6356,0 3806 3856 ps "OnEdgeStrategy" … … 3841 3891 ) 3842 3892 ) 3843 *10 0(CptPort3893 *101 (CptPort 3844 3894 uid 6446,0 3845 3895 ps "OnEdgeStrategy" … … 3881 3931 ) 3882 3932 ) 3883 *10 1(CptPort3933 *102 (CptPort 3884 3934 uid 8406,0 3885 3935 ps "OnEdgeStrategy" … … 3917 3967 ) 3918 3968 ) 3919 *10 2(CptPort3969 *103 (CptPort 3920 3970 uid 8748,0 3921 3971 ps "OnEdgeStrategy" … … 3956 4006 ) 3957 4007 ) 3958 *10 3(CptPort4008 *104 (CptPort 3959 4009 uid 9223,0 3960 4010 ps "OnEdgeStrategy" … … 3995 4045 ) 3996 4046 ) 3997 *10 4(CptPort4047 *105 (CptPort 3998 4048 uid 9227,0 3999 4049 ps "OnEdgeStrategy" … … 4035 4085 ) 4036 4086 ) 4037 *10 5(CptPort4087 *106 (CptPort 4038 4088 uid 9933,0 4039 4089 ps "OnEdgeStrategy" … … 4074 4124 ) 4075 4125 ) 4076 *10 6(CptPort4126 *107 (CptPort 4077 4127 uid 9937,0 4078 4128 ps "OnEdgeStrategy" … … 4113 4163 ) 4114 4164 ) 4115 *10 7(CptPort4165 *108 (CptPort 4116 4166 uid 10212,0 4117 4167 ps "OnEdgeStrategy" … … 4150 4200 ) 4151 4201 ) 4152 *10 8(CptPort4202 *109 (CptPort 4153 4203 uid 10216,0 4154 4204 ps "OnEdgeStrategy" … … 4187 4237 ) 4188 4238 ) 4189 *1 09(CptPort4239 *110 (CptPort 4190 4240 uid 10619,0 4191 4241 ps "OnEdgeStrategy" … … 4223 4273 ) 4224 4274 ) 4225 *11 0(CptPort4275 *111 (CptPort 4226 4276 uid 10623,0 4227 4277 ps "OnEdgeStrategy" … … 4276 4326 stg "VerticalLayoutStrategy" 4277 4327 textVec [ 4278 *11 1(Text4328 *112 (Text 4279 4329 uid 1609,0 4280 4330 va (VaSet … … 4286 4336 tm "BdLibraryNameMgr" 4287 4337 ) 4288 *11 2(Text4338 *113 (Text 4289 4339 uid 1610,0 4290 4340 va (VaSet … … 4296 4346 tm "CptNameMgr" 4297 4347 ) 4298 *11 3(Text4348 *114 (Text 4299 4349 uid 1611,0 4300 4350 va (VaSet … … 4349 4399 archFileType "UNKNOWN" 4350 4400 ) 4351 *11 4(Net4401 *115 (Net 4352 4402 uid 1680,0 4353 4403 decl (Decl … … 4364 4414 ) 4365 4415 xt "-103000,24600,-74500,25400" 4366 st "crate_id : std_logic_vector(1 downto 0)" 4367 ) 4368 ) 4369 *115 (SaComponent 4416 st "crate_id : std_logic_vector(1 downto 0) 4417 " 4418 ) 4419 ) 4420 *116 (SaComponent 4370 4421 uid 1768,0 4371 4422 optionalChildren [ 4372 *11 6(CptPort4423 *117 (CptPort 4373 4424 uid 1760,0 4374 4425 ps "OnEdgeStrategy" … … 4410 4461 ) 4411 4462 ) 4412 *11 7(CptPort4463 *118 (CptPort 4413 4464 uid 1764,0 4414 4465 ps "OnEdgeStrategy" … … 4447 4498 ) 4448 4499 ) 4449 *11 8(CptPort4500 *119 (CptPort 4450 4501 uid 6207,0 4451 4502 ps "OnEdgeStrategy" … … 4499 4550 stg "VerticalLayoutStrategy" 4500 4551 textVec [ 4501 *1 19(Text4552 *120 (Text 4502 4553 uid 1771,0 4503 4554 va (VaSet … … 4509 4560 tm "BdLibraryNameMgr" 4510 4561 ) 4511 *12 0(Text4562 *121 (Text 4512 4563 uid 1772,0 4513 4564 va (VaSet … … 4519 4570 tm "CptNameMgr" 4520 4571 ) 4521 *12 1(Text4572 *122 (Text 4522 4573 uid 1773,0 4523 4574 va (VaSet … … 4567 4618 archFileType "UNKNOWN" 4568 4619 ) 4569 *12 2(Net4620 *123 (Net 4570 4621 uid 1981,0 4571 4622 lang 2 … … 4584 4635 font "Courier New,8,0" 4585 4636 ) 4586 xt "-103000,110600,-70500,111400" 4587 st "SIGNAL trigger_id : std_logic_vector(47 downto 0)" 4588 ) 4589 ) 4590 *123 (Net 4637 xt "-103000,111400,-70500,112200" 4638 st "SIGNAL trigger_id : std_logic_vector(47 downto 0) 4639 " 4640 ) 4641 ) 4642 *124 (Net 4591 4643 uid 2297,0 4592 4644 decl (Decl … … 4604 4656 font "Courier New,8,0" 4605 4657 ) 4606 xt "-103000,96200,-63000,97000" 4607 st "SIGNAL ram_start_addr : std_logic_vector(RAMADDRWIDTH64b-1 DOWNTO 0)" 4608 ) 4609 ) 4610 *124 (SaComponent 4658 xt "-103000,97000,-63000,97800" 4659 st "SIGNAL ram_start_addr : std_logic_vector(RAMADDRWIDTH64b-1 DOWNTO 0) 4660 " 4661 ) 4662 ) 4663 *125 (SaComponent 4611 4664 uid 2311,0 4612 4665 optionalChildren [ 4613 *12 5(CptPort4666 *126 (CptPort 4614 4667 uid 2307,0 4615 4668 ps "OnEdgeStrategy" … … 4652 4705 ) 4653 4706 ) 4654 *12 6(CptPort4707 *127 (CptPort 4655 4708 uid 2351,0 4656 4709 ps "OnEdgeStrategy" … … 4688 4741 ) 4689 4742 ) 4690 *12 7(CptPort4743 *128 (CptPort 4691 4744 uid 2361,0 4692 4745 ps "OnEdgeStrategy" … … 4726 4779 ) 4727 4780 ) 4728 *12 8(CptPort4781 *129 (CptPort 4729 4782 uid 2365,0 4730 4783 ps "OnEdgeStrategy" … … 4762 4815 ) 4763 4816 ) 4764 *1 29(CptPort4817 *130 (CptPort 4765 4818 uid 2369,0 4766 4819 ps "OnEdgeStrategy" … … 4800 4853 ) 4801 4854 ) 4802 *13 0(CptPort4855 *131 (CptPort 4803 4856 uid 2373,0 4804 4857 ps "OnEdgeStrategy" … … 4837 4890 ) 4838 4891 ) 4839 *13 1(CptPort4892 *132 (CptPort 4840 4893 uid 2377,0 4841 4894 ps "OnEdgeStrategy" … … 4876 4929 ) 4877 4930 ) 4878 *13 2(CptPort4931 *133 (CptPort 4879 4932 uid 2381,0 4880 4933 ps "OnEdgeStrategy" … … 4913 4966 ) 4914 4967 ) 4915 *13 3(CptPort4968 *134 (CptPort 4916 4969 uid 2385,0 4917 4970 ps "OnEdgeStrategy" … … 4953 5006 ) 4954 5007 ) 4955 *13 4(CptPort5008 *135 (CptPort 4956 5009 uid 2389,0 4957 5010 ps "OnEdgeStrategy" … … 4994 5047 ) 4995 5048 ) 4996 *13 5(CptPort5049 *136 (CptPort 4997 5050 uid 2393,0 4998 5051 ps "OnEdgeStrategy" … … 5033 5086 ) 5034 5087 ) 5035 *13 6(CptPort5088 *137 (CptPort 5036 5089 uid 2397,0 5037 5090 ps "OnEdgeStrategy" … … 5072 5125 ) 5073 5126 ) 5074 *13 7(CptPort5127 *138 (CptPort 5075 5128 uid 2401,0 5076 5129 ps "OnEdgeStrategy" … … 5111 5164 ) 5112 5165 ) 5113 *13 8(CptPort5166 *139 (CptPort 5114 5167 uid 2405,0 5115 5168 ps "OnEdgeStrategy" … … 5151 5204 ) 5152 5205 ) 5153 *1 39(CptPort5206 *140 (CptPort 5154 5207 uid 2454,0 5155 5208 ps "OnEdgeStrategy" … … 5189 5242 ) 5190 5243 ) 5191 *14 0(CptPort5244 *141 (CptPort 5192 5245 uid 2628,0 5193 5246 ps "OnEdgeStrategy" … … 5228 5281 ) 5229 5282 ) 5230 *14 1(CptPort5283 *142 (CptPort 5231 5284 uid 5991,0 5232 5285 ps "OnEdgeStrategy" … … 5266 5319 ) 5267 5320 ) 5268 *14 2(CptPort5321 *143 (CptPort 5269 5322 uid 8410,0 5270 5323 ps "OnEdgeStrategy" … … 5303 5356 ) 5304 5357 ) 5305 *14 3(CptPort5358 *144 (CptPort 5306 5359 uid 10232,0 5307 5360 ps "OnEdgeStrategy" … … 5361 5414 stg "VerticalLayoutStrategy" 5362 5415 textVec [ 5363 *14 4(Text5416 *145 (Text 5364 5417 uid 2314,0 5365 5418 va (VaSet … … 5371 5424 tm "BdLibraryNameMgr" 5372 5425 ) 5373 *14 5(Text5426 *146 (Text 5374 5427 uid 2315,0 5375 5428 va (VaSet … … 5381 5434 tm "CptNameMgr" 5382 5435 ) 5383 *14 6(Text5436 *147 (Text 5384 5437 uid 2316,0 5385 5438 va (VaSet … … 5440 5493 archFileType "UNKNOWN" 5441 5494 ) 5442 *14 7(Net5495 *148 (Net 5443 5496 uid 2468,0 5444 5497 lang 2 … … 5454 5507 font "Courier New,8,0" 5455 5508 ) 5456 xt "-103000,113000,-80500,113800" 5457 st "SIGNAL wiz_busy : std_logic" 5458 ) 5459 ) 5460 *148 (Net 5509 xt "-103000,113800,-80500,114600" 5510 st "SIGNAL wiz_busy : std_logic 5511 " 5512 ) 5513 ) 5514 *149 (Net 5461 5515 uid 2474,0 5462 5516 lang 2 … … 5473 5527 font "Courier New,8,0" 5474 5528 ) 5475 xt "-103000,115400,-59500,116200" 5476 st "SIGNAL wiz_write_ea : std_logic := '0'" 5477 ) 5478 ) 5479 *149 (Net 5529 xt "-103000,116200,-59500,117000" 5530 st "SIGNAL wiz_write_ea : std_logic := '0' 5531 " 5532 ) 5533 ) 5534 *150 (Net 5480 5535 uid 2480,0 5481 5536 lang 2 … … 5493 5548 font "Courier New,8,0" 5494 5549 ) 5495 xt "-103000,117800,-53500,118600" 5496 st "SIGNAL wiz_write_length : std_logic_vector(16 downto 0) := (others => '0')" 5497 ) 5498 ) 5499 *150 (Net 5550 xt "-103000,118600,-53500,119400" 5551 st "SIGNAL wiz_write_length : std_logic_vector(16 downto 0) := (others => '0') 5552 " 5553 ) 5554 ) 5555 *151 (Net 5500 5556 uid 2486,0 5501 5557 lang 2 … … 5514 5570 font "Courier New,8,0" 5515 5571 ) 5516 xt "-103000,114600,-53500,115400" 5517 st "SIGNAL wiz_ram_start_addr : std_logic_vector(RAMADDRWIDTH64b+1 DOWNTO 0) := (others => '0')" 5518 ) 5519 ) 5520 *151 (Net 5572 xt "-103000,115400,-53500,116200" 5573 st "SIGNAL wiz_ram_start_addr : std_logic_vector(RAMADDRWIDTH64b+1 DOWNTO 0) := (others => '0') 5574 " 5575 ) 5576 ) 5577 *152 (Net 5521 5578 uid 2492,0 5522 5579 lang 2 … … 5534 5591 font "Courier New,8,0" 5535 5592 ) 5536 xt "-103000,113800,-53500,114600" 5537 st "SIGNAL wiz_number_of_channels : std_logic_vector(3 downto 0) := (others => '0')" 5538 ) 5539 ) 5540 *152 (Net 5593 xt "-103000,114600,-53500,115400" 5594 st "SIGNAL wiz_number_of_channels : std_logic_vector(3 downto 0) := (others => '0') 5595 " 5596 ) 5597 ) 5598 *153 (Net 5541 5599 uid 2498,0 5542 5600 lang 2 … … 5553 5611 font "Courier New,8,0" 5554 5612 ) 5555 xt "-103000,116200,-59500,117000" 5556 st "SIGNAL wiz_write_end : std_logic := '0'" 5557 ) 5558 ) 5559 *153 (Net 5613 xt "-103000,117000,-59500,117800" 5614 st "SIGNAL wiz_write_end : std_logic := '0' 5615 " 5616 ) 5617 ) 5618 *154 (Net 5560 5619 uid 2504,0 5561 5620 lang 2 … … 5572 5631 font "Courier New,8,0" 5573 5632 ) 5574 xt "-103000,117000,-59500,117800" 5575 st "SIGNAL wiz_write_header : std_logic := '0'" 5576 ) 5577 ) 5578 *154 (Net 5633 xt "-103000,117800,-59500,118600" 5634 st "SIGNAL wiz_write_header : std_logic := '0' 5635 " 5636 ) 5637 ) 5638 *155 (Net 5579 5639 uid 2574,0 5580 5640 decl (Decl … … 5589 5649 font "Courier New,8,0" 5590 5650 ) 5591 xt "-103000,97000,-80500,97800" 5592 st "SIGNAL ram_write_ea : std_logic" 5593 ) 5594 ) 5595 *155 (Net 5651 xt "-103000,97800,-80500,98600" 5652 st "SIGNAL ram_write_ea : std_logic 5653 " 5654 ) 5655 ) 5656 *156 (Net 5596 5657 uid 2580,0 5597 5658 decl (Decl … … 5607 5668 font "Courier New,8,0" 5608 5669 ) 5609 xt "-103000,97800,-59500,98600" 5610 st "SIGNAL ram_write_ready : std_logic := '0'" 5611 ) 5612 ) 5613 *156 (Net 5670 xt "-103000,98600,-59500,99400" 5671 st "SIGNAL ram_write_ready : std_logic := '0' 5672 " 5673 ) 5674 ) 5675 *157 (Net 5614 5676 uid 2586,0 5615 5677 decl (Decl … … 5626 5688 ) 5627 5689 xt "-103000,74600,-59500,75400" 5628 st "SIGNAL config_start : std_logic := '0'" 5629 ) 5630 ) 5631 *157 (Net 5690 st "SIGNAL config_start : std_logic := '0' 5691 " 5692 ) 5693 ) 5694 *158 (Net 5632 5695 uid 2592,0 5633 5696 decl (Decl … … 5643 5706 ) 5644 5707 xt "-103000,69000,-80500,69800" 5645 st "SIGNAL config_ready : std_logic" 5646 ) 5647 ) 5648 *158 (Net 5708 st "SIGNAL config_ready : std_logic 5709 " 5710 ) 5711 ) 5712 *159 (Net 5649 5713 uid 2598,0 5650 5714 decl (Decl … … 5659 5723 font "Courier New,8,0" 5660 5724 ) 5661 xt "-103000,101000,-79000,101800" 5662 st "SIGNAL roi_max : roi_max_type" 5663 ) 5664 ) 5665 *159 (Net 5725 xt "-103000,101800,-79000,102600" 5726 st "SIGNAL roi_max : roi_max_type 5727 " 5728 ) 5729 ) 5730 *160 (Net 5666 5731 uid 2640,0 5667 5732 decl (Decl … … 5677 5742 font "Courier New,8,0" 5678 5743 ) 5679 xt "-103000,91400,-70500,92200" 5680 st "SIGNAL package_length : std_logic_vector(15 downto 0)" 5681 ) 5682 ) 5683 *160 (Net 5744 xt "-103000,92200,-70500,93000" 5745 st "SIGNAL package_length : std_logic_vector(15 downto 0) 5746 " 5747 ) 5748 ) 5749 *161 (Net 5684 5750 uid 2776,0 5685 5751 decl (Decl … … 5696 5762 ) 5697 5763 xt "-103000,40600,-63000,41400" 5698 st "adc_oeb : std_logic := '1'" 5699 ) 5700 ) 5701 *161 (PortIoOut 5764 st "adc_oeb : std_logic := '1' 5765 " 5766 ) 5767 ) 5768 *162 (PortIoOut 5702 5769 uid 2798,0 5703 5770 shape (CompositeShape … … 5744 5811 ) 5745 5812 ) 5746 *16 2(PortIoIn5813 *163 (PortIoIn 5747 5814 uid 2804,0 5748 5815 shape (CompositeShape … … 5789 5856 ) 5790 5857 ) 5791 *16 3(Net5858 *164 (Net 5792 5859 uid 2924,0 5793 5860 decl (Decl … … 5802 5869 font "Courier New,8,0" 5803 5870 ) 5804 xt "-103000,100200,-78000,101000" 5805 st "SIGNAL roi_array : roi_array_type" 5806 ) 5807 ) 5808 *164 (PortIoIn 5871 xt "-103000,101000,-78000,101800" 5872 st "SIGNAL roi_array : roi_array_type 5873 " 5874 ) 5875 ) 5876 *165 (PortIoIn 5809 5877 uid 2950,0 5810 5878 shape (CompositeShape … … 5851 5919 ) 5852 5920 ) 5853 *16 5(PortIoIn5921 *166 (PortIoIn 5854 5922 uid 2956,0 5855 5923 shape (CompositeShape … … 5896 5964 ) 5897 5965 ) 5898 *16 6(Grouping5966 *167 (Grouping 5899 5967 uid 3137,0 5900 5968 optionalChildren [ 5901 *16 7(CommentText5969 *168 (CommentText 5902 5970 uid 3139,0 5903 5971 shape (Rectangle … … 5930 5998 titleBlock 1 5931 5999 ) 5932 *16 8(CommentText6000 *169 (CommentText 5933 6001 uid 3142,0 5934 6002 shape (Rectangle … … 5961 6029 titleBlock 1 5962 6030 ) 5963 *1 69(CommentText6031 *170 (CommentText 5964 6032 uid 3145,0 5965 6033 shape (Rectangle … … 5992 6060 titleBlock 1 5993 6061 ) 5994 *17 0(CommentText6062 *171 (CommentText 5995 6063 uid 3148,0 5996 6064 shape (Rectangle … … 6023 6091 titleBlock 1 6024 6092 ) 6025 *17 1(CommentText6093 *172 (CommentText 6026 6094 uid 3151,0 6027 6095 shape (Rectangle … … 6053 6121 titleBlock 1 6054 6122 ) 6055 *17 2(CommentText6123 *173 (CommentText 6056 6124 uid 3154,0 6057 6125 shape (Rectangle … … 6084 6152 titleBlock 1 6085 6153 ) 6086 *17 3(CommentText6154 *174 (CommentText 6087 6155 uid 3157,0 6088 6156 shape (Rectangle … … 6116 6184 titleBlock 1 6117 6185 ) 6118 *17 4(CommentText6186 *175 (CommentText 6119 6187 uid 3160,0 6120 6188 shape (Rectangle … … 6147 6215 titleBlock 1 6148 6216 ) 6149 *17 5(CommentText6217 *176 (CommentText 6150 6218 uid 3163,0 6151 6219 shape (Rectangle … … 6178 6246 titleBlock 1 6179 6247 ) 6180 *17 6(CommentText6248 *177 (CommentText 6181 6249 uid 3166,0 6182 6250 shape (Rectangle … … 6222 6290 oxt "14000,66000,55000,71000" 6223 6291 ) 6224 *17 7(Net6292 *178 (Net 6225 6293 uid 3894,0 6226 6294 decl (Decl … … 6236 6304 ) 6237 6305 xt "-103000,29400,-84500,30200" 6238 st "CLK_25_PS : std_logic" 6239 ) 6240 ) 6241 *178 (PortIoOut 6306 st "CLK_25_PS : std_logic 6307 " 6308 ) 6309 ) 6310 *179 (PortIoOut 6242 6311 uid 3978,0 6243 6312 shape (CompositeShape … … 6284 6353 ) 6285 6354 ) 6286 *1 79(Net6355 *180 (Net 6287 6356 uid 4068,0 6288 6357 decl (Decl … … 6298 6367 ) 6299 6368 xt "-103000,30200,-84500,31000" 6300 st "CLK_50 : std_logic" 6301 ) 6302 ) 6303 *180 (Net 6369 st "CLK_50 : std_logic 6370 " 6371 ) 6372 ) 6373 *181 (Net 6304 6374 uid 4204,0 6305 6375 decl (Decl … … 6315 6385 ) 6316 6386 xt "-103000,61000,-80500,61800" 6317 st "SIGNAL CLK_25 : std_logic" 6318 ) 6319 ) 6320 *181 (PortIoOut 6387 st "SIGNAL CLK_25 : std_logic 6388 " 6389 ) 6390 ) 6391 *182 (PortIoOut 6321 6392 uid 4220,0 6322 6393 shape (CompositeShape … … 6363 6434 ) 6364 6435 ) 6365 *18 2(Net6436 *183 (Net 6366 6437 uid 4232,0 6367 6438 decl (Decl … … 6377 6448 ) 6378 6449 xt "-103000,18200,-84500,19000" 6379 st "CLK : std_logic" 6380 ) 6381 ) 6382 *183 (Net 6450 st "CLK : std_logic 6451 " 6452 ) 6453 ) 6454 *184 (Net 6383 6455 uid 4260,0 6384 6456 decl (Decl … … 6395 6467 ) 6396 6468 xt "-103000,23000,-74500,23800" 6397 st "adc_otr_array : std_logic_vector(3 DOWNTO 0)" 6398 ) 6399 ) 6400 *184 (Net 6469 st "adc_otr_array : std_logic_vector(3 DOWNTO 0) 6470 " 6471 ) 6472 ) 6473 *185 (Net 6401 6474 uid 4270,0 6402 6475 decl (Decl … … 6412 6485 ) 6413 6486 xt "-103000,22200,-79000,23000" 6414 st "adc_data_array : adc_data_array_type" 6415 ) 6416 ) 6417 *185 (PortIoIn 6487 st "adc_data_array : adc_data_array_type 6488 " 6489 ) 6490 ) 6491 *186 (PortIoIn 6418 6492 uid 4307,0 6419 6493 shape (CompositeShape … … 6460 6534 ) 6461 6535 ) 6462 *18 6(Net6536 *187 (Net 6463 6537 uid 4399,0 6464 6538 decl (Decl … … 6475 6549 ) 6476 6550 xt "-103000,85000,-59500,85800" 6477 st "SIGNAL drs_clk_en : std_logic := '0'" 6478 ) 6479 ) 6480 *187 (Net 6551 st "SIGNAL drs_clk_en : std_logic := '0' 6552 " 6553 ) 6554 ) 6555 *188 (Net 6481 6556 uid 4405,0 6482 6557 decl (Decl … … 6491 6566 font "Courier New,8,0" 6492 6567 ) 6493 xt "-103000,87400,-74500,88200" 6494 st "SIGNAL drs_s_cell_array : drs_s_cell_array_type" 6495 ) 6496 ) 6497 *188 (Net 6568 xt "-103000,88200,-74500,89000" 6569 st "SIGNAL drs_s_cell_array : drs_s_cell_array_type 6570 " 6571 ) 6572 ) 6573 *189 (Net 6498 6574 uid 4417,0 6499 6575 decl (Decl … … 6510 6586 ) 6511 6587 xt "-103000,85800,-59500,86600" 6512 st "SIGNAL drs_read_s_cell : std_logic := '0'" 6513 ) 6514 ) 6515 *189 (Net 6588 st "SIGNAL drs_read_s_cell : std_logic := '0' 6589 " 6590 ) 6591 ) 6592 *190 (Net 6516 6593 uid 4535,0 6517 6594 decl (Decl … … 6529 6606 ) 6530 6607 xt "-103000,43800,-57000,44600" 6531 st "drs_channel_id : std_logic_vector(3 downto 0) := (others => '0')" 6532 ) 6533 ) 6534 *190 (Net 6608 st "drs_channel_id : std_logic_vector(3 downto 0) := (others => '0') 6609 " 6610 ) 6611 ) 6612 *191 (Net 6535 6613 uid 4543,0 6536 6614 decl (Decl … … 6547 6625 ) 6548 6626 xt "-103000,44600,-63000,45400" 6549 st "drs_dwrite : std_logic := '1'" 6550 ) 6551 ) 6552 *191 (PortIoOut 6627 st "drs_dwrite : std_logic := '1' 6628 " 6629 ) 6630 ) 6631 *192 (PortIoOut 6553 6632 uid 4551,0 6554 6633 shape (CompositeShape … … 6595 6674 ) 6596 6675 ) 6597 *19 2(PortIoOut6676 *193 (PortIoOut 6598 6677 uid 4557,0 6599 6678 shape (CompositeShape … … 6640 6719 ) 6641 6720 ) 6642 *19 3(Net6721 *194 (Net 6643 6722 uid 4669,0 6644 6723 decl (Decl … … 6654 6733 ) 6655 6734 xt "-103000,19000,-84500,19800" 6656 st "SROUT_in_0 : std_logic" 6657 ) 6658 ) 6659 *194 (Net 6735 st "SROUT_in_0 : std_logic 6736 " 6737 ) 6738 ) 6739 *195 (Net 6660 6740 uid 4677,0 6661 6741 decl (Decl … … 6671 6751 ) 6672 6752 xt "-103000,19800,-84500,20600" 6673 st "SROUT_in_1 : std_logic" 6674 ) 6675 ) 6676 *195 (Net 6753 st "SROUT_in_1 : std_logic 6754 " 6755 ) 6756 ) 6757 *196 (Net 6677 6758 uid 4685,0 6678 6759 decl (Decl … … 6688 6769 ) 6689 6770 xt "-103000,20600,-84500,21400" 6690 st "SROUT_in_2 : std_logic" 6691 ) 6692 ) 6693 *196 (Net 6771 st "SROUT_in_2 : std_logic 6772 " 6773 ) 6774 ) 6775 *197 (Net 6694 6776 uid 4693,0 6695 6777 decl (Decl … … 6705 6787 ) 6706 6788 xt "-103000,21400,-84500,22200" 6707 st "SROUT_in_3 : std_logic" 6708 ) 6709 ) 6710 *197 (PortIoIn 6789 st "SROUT_in_3 : std_logic 6790 " 6791 ) 6792 ) 6793 *198 (PortIoIn 6711 6794 uid 4701,0 6712 6795 shape (CompositeShape … … 6753 6836 ) 6754 6837 ) 6755 *19 8(PortIoIn6838 *199 (PortIoIn 6756 6839 uid 4707,0 6757 6840 shape (CompositeShape … … 6798 6881 ) 6799 6882 ) 6800 * 199(PortIoIn6883 *200 (PortIoIn 6801 6884 uid 4713,0 6802 6885 shape (CompositeShape … … 6843 6926 ) 6844 6927 ) 6845 *20 0(PortIoIn6928 *201 (PortIoIn 6846 6929 uid 4719,0 6847 6930 shape (CompositeShape … … 6888 6971 ) 6889 6972 ) 6890 *20 1(Net6973 *202 (Net 6891 6974 uid 4741,0 6892 6975 decl (Decl … … 6902 6985 ) 6903 6986 xt "-103000,86600,-80500,87400" 6904 st "SIGNAL drs_read_s_cell_ready : std_logic" 6905 ) 6906 ) 6907 *202 (SaComponent 6987 st "SIGNAL drs_read_s_cell_ready : std_logic 6988 " 6989 ) 6990 ) 6991 *203 (SaComponent 6908 6992 uid 4903,0 6909 6993 optionalChildren [ 6910 *20 3(CptPort6994 *204 (CptPort 6911 6995 uid 4867,0 6912 6996 ps "OnEdgeStrategy" … … 6941 7025 ) 6942 7026 ) 6943 *20 4(CptPort7027 *205 (CptPort 6944 7028 uid 4871,0 6945 7029 ps "OnEdgeStrategy" … … 6975 7059 ) 6976 7060 ) 6977 *20 5(CptPort7061 *206 (CptPort 6978 7062 uid 4875,0 6979 7063 ps "OnEdgeStrategy" … … 7009 7093 ) 7010 7094 ) 7011 *20 6(CptPort7095 *207 (CptPort 7012 7096 uid 4879,0 7013 7097 ps "OnEdgeStrategy" … … 7042 7126 ) 7043 7127 ) 7044 *20 7(CptPort7128 *208 (CptPort 7045 7129 uid 4883,0 7046 7130 ps "OnEdgeStrategy" … … 7075 7159 ) 7076 7160 ) 7077 *20 8(CptPort7161 *209 (CptPort 7078 7162 uid 4887,0 7079 7163 ps "OnEdgeStrategy" … … 7108 7192 ) 7109 7193 ) 7110 *2 09(CptPort7194 *210 (CptPort 7111 7195 uid 4891,0 7112 7196 ps "OnEdgeStrategy" … … 7141 7225 ) 7142 7226 ) 7143 *21 0(CptPort7227 *211 (CptPort 7144 7228 uid 4895,0 7145 7229 ps "OnEdgeStrategy" … … 7176 7260 ) 7177 7261 ) 7178 *21 1(CptPort7262 *212 (CptPort 7179 7263 uid 4899,0 7180 7264 ps "OnEdgeStrategy" … … 7212 7296 ) 7213 7297 ) 7214 *21 2(CptPort7298 *213 (CptPort 7215 7299 uid 4938,0 7216 7300 ps "OnEdgeStrategy" … … 7247 7331 ) 7248 7332 ) 7249 *21 3(CptPort7333 *214 (CptPort 7250 7334 uid 4942,0 7251 7335 ps "OnEdgeStrategy" … … 7282 7366 ) 7283 7367 ) 7284 *21 4(CptPort7368 *215 (CptPort 7285 7369 uid 10272,0 7286 7370 ps "OnEdgeStrategy" … … 7317 7401 ) 7318 7402 ) 7319 *21 5(CptPort7403 *216 (CptPort 7320 7404 uid 10276,0 7321 7405 ps "OnEdgeStrategy" … … 7352 7436 ) 7353 7437 ) 7354 *21 6(CptPort7438 *217 (CptPort 7355 7439 uid 10280,0 7356 7440 ps "OnEdgeStrategy" … … 7388 7472 ) 7389 7473 ) 7390 *21 7(CptPort7474 *218 (CptPort 7391 7475 uid 10284,0 7392 7476 ps "OnEdgeStrategy" … … 7424 7508 ) 7425 7509 ) 7426 *21 8(CptPort7510 *219 (CptPort 7427 7511 uid 10288,0 7428 7512 ps "OnEdgeStrategy" … … 7475 7559 stg "VerticalLayoutStrategy" 7476 7560 textVec [ 7477 *2 19(Text7561 *220 (Text 7478 7562 uid 4906,0 7479 7563 va (VaSet … … 7485 7569 tm "BdLibraryNameMgr" 7486 7570 ) 7487 *22 0(Text7571 *221 (Text 7488 7572 uid 4907,0 7489 7573 va (VaSet … … 7495 7579 tm "CptNameMgr" 7496 7580 ) 7497 *22 1(Text7581 *222 (Text 7498 7582 uid 4908,0 7499 7583 va (VaSet … … 7542 7626 archFileType "UNKNOWN" 7543 7627 ) 7544 *22 2(Net7628 *223 (Net 7545 7629 uid 4946,0 7546 7630 decl (Decl … … 7557 7641 ) 7558 7642 xt "-103000,37400,-63000,38200" 7559 st "RSRLOAD : std_logic := '0'" 7560 ) 7561 ) 7562 *223 (PortIoOut 7643 st "RSRLOAD : std_logic := '0' 7644 " 7645 ) 7646 ) 7647 *224 (PortIoOut 7563 7648 uid 4954,0 7564 7649 shape (CompositeShape … … 7605 7690 ) 7606 7691 ) 7607 *22 4(Net7692 *225 (Net 7608 7693 uid 4960,0 7609 7694 decl (Decl … … 7620 7705 ) 7621 7706 xt "-103000,38200,-63000,39000" 7622 st "SRCLK : std_logic := '0'" 7623 ) 7624 ) 7625 *225 (PortIoOut 7707 st "SRCLK : std_logic := '0' 7708 " 7709 ) 7710 ) 7711 *226 (PortIoOut 7626 7712 uid 4968,0 7627 7713 shape (CompositeShape … … 7668 7754 ) 7669 7755 ) 7670 *22 6(SaComponent7756 *227 (SaComponent 7671 7757 uid 5072,0 7672 7758 optionalChildren [ 7673 *22 7(CptPort7759 *228 (CptPort 7674 7760 uid 5028,0 7675 7761 ps "OnEdgeStrategy" … … 7705 7791 ) 7706 7792 ) 7707 *22 8(CptPort7793 *229 (CptPort 7708 7794 uid 5032,0 7709 7795 ps "OnEdgeStrategy" … … 7741 7827 ) 7742 7828 ) 7743 *2 29(CptPort7829 *230 (CptPort 7744 7830 uid 5036,0 7745 7831 ps "OnEdgeStrategy" … … 7777 7863 ) 7778 7864 ) 7779 *23 0(CptPort7865 *231 (CptPort 7780 7866 uid 5040,0 7781 7867 ps "OnEdgeStrategy" … … 7813 7899 ) 7814 7900 ) 7815 *23 1(CptPort7901 *232 (CptPort 7816 7902 uid 5044,0 7817 7903 ps "OnEdgeStrategy" … … 7850 7936 ) 7851 7937 ) 7852 *23 2(CptPort7938 *233 (CptPort 7853 7939 uid 5048,0 7854 7940 ps "OnEdgeStrategy" … … 7885 7971 ) 7886 7972 ) 7887 *23 3(CptPort7973 *234 (CptPort 7888 7974 uid 5052,0 7889 7975 ps "OnEdgeStrategy" … … 7920 8006 ) 7921 8007 ) 7922 *23 4(CptPort8008 *235 (CptPort 7923 8009 uid 5056,0 7924 8010 ps "OnEdgeStrategy" … … 7955 8041 ) 7956 8042 ) 7957 *23 5(CptPort8043 *236 (CptPort 7958 8044 uid 5060,0 7959 8045 ps "OnEdgeStrategy" … … 7990 8076 ) 7991 8077 ) 7992 *23 6(CptPort8078 *237 (CptPort 7993 8079 uid 5064,0 7994 8080 ps "OnEdgeStrategy" … … 8024 8110 ) 8025 8111 ) 8026 *23 7(CptPort8112 *238 (CptPort 8027 8113 uid 5068,0 8028 8114 ps "OnEdgeStrategy" … … 8059 8145 ) 8060 8146 ) 8061 *23 8(CptPort8147 *239 (CptPort 8062 8148 uid 5995,0 8063 8149 ps "OnEdgeStrategy" … … 8095 8181 ) 8096 8182 ) 8097 *2 39(CptPort8183 *240 (CptPort 8098 8184 uid 10184,0 8099 8185 ps "OnEdgeStrategy" … … 8135 8221 ) 8136 8222 ) 8137 *24 0(CptPort8223 *241 (CptPort 8138 8224 uid 10188,0 8139 8225 ps "OnEdgeStrategy" … … 8192 8278 stg "VerticalLayoutStrategy" 8193 8279 textVec [ 8194 *24 1(Text8280 *242 (Text 8195 8281 uid 5075,0 8196 8282 va (VaSet … … 8202 8288 tm "BdLibraryNameMgr" 8203 8289 ) 8204 *24 2(Text8290 *243 (Text 8205 8291 uid 5076,0 8206 8292 va (VaSet … … 8212 8298 tm "CptNameMgr" 8213 8299 ) 8214 *24 3(Text8300 *244 (Text 8215 8301 uid 5077,0 8216 8302 va (VaSet … … 8258 8344 archFileType "UNKNOWN" 8259 8345 ) 8260 *24 4(Net8346 *245 (Net 8261 8347 uid 5088,0 8262 8348 decl (Decl … … 8273 8359 ) 8274 8360 xt "-103000,65000,-71000,65800" 8275 st "SIGNAL config_addr : std_logic_vector(7 DOWNTO 0)" 8276 ) 8277 ) 8278 *245 (Net 8361 st "SIGNAL config_addr : std_logic_vector(7 DOWNTO 0) 8362 " 8363 ) 8364 ) 8365 *246 (Net 8279 8366 uid 5096,0 8280 8367 decl (Decl … … 8290 8377 ) 8291 8378 xt "-103000,67400,-80500,68200" 8292 st "SIGNAL config_data_valid : std_logic" 8293 ) 8294 ) 8295 *246 (Net 8379 st "SIGNAL config_data_valid : std_logic 8380 " 8381 ) 8382 ) 8383 *247 (Net 8296 8384 uid 5104,0 8297 8385 decl (Decl … … 8307 8395 ) 8308 8396 xt "-103000,65800,-80500,66600" 8309 st "SIGNAL config_busy : std_logic" 8310 ) 8311 ) 8312 *247 (Net 8397 st "SIGNAL config_busy : std_logic 8398 " 8399 ) 8400 ) 8401 *248 (Net 8313 8402 uid 5112,0 8314 8403 decl (Decl … … 8325 8414 ) 8326 8415 xt "-103000,66600,-70500,67400" 8327 st "SIGNAL config_data : std_logic_vector(15 DOWNTO 0)" 8328 ) 8329 ) 8330 *248 (Net 8416 st "SIGNAL config_data : std_logic_vector(15 DOWNTO 0) 8417 " 8418 ) 8419 ) 8420 *249 (Net 8331 8421 uid 5120,0 8332 8422 decl (Decl … … 8342 8432 ) 8343 8433 xt "-103000,80200,-80500,81000" 8344 st "SIGNAL config_wr_en : std_logic" 8345 ) 8346 ) 8347 *249 (Net 8434 st "SIGNAL config_wr_en : std_logic 8435 " 8436 ) 8437 ) 8438 *250 (Net 8348 8439 uid 5128,0 8349 8440 decl (Decl … … 8359 8450 ) 8360 8451 xt "-103000,68200,-80500,69000" 8361 st "SIGNAL config_rd_en : std_logic" 8362 ) 8363 ) 8364 *250 (Net 8452 st "SIGNAL config_rd_en : std_logic 8453 " 8454 ) 8455 ) 8456 *251 (Net 8365 8457 uid 5144,0 8366 8458 decl (Decl … … 8376 8468 ) 8377 8469 xt "-103000,81000,-78000,81800" 8378 st "SIGNAL dac_array : dac_array_type" 8379 ) 8380 ) 8381 *251 (Net 8470 st "SIGNAL dac_array : dac_array_type 8471 " 8472 ) 8473 ) 8474 *252 (Net 8382 8475 uid 5194,0 8383 8476 decl (Decl … … 8393 8486 ) 8394 8487 xt "-103000,75400,-80500,76200" 8395 st "SIGNAL config_start_cm : std_logic" 8396 ) 8397 ) 8398 *252 (Net 8488 st "SIGNAL config_start_cm : std_logic 8489 " 8490 ) 8491 ) 8492 *253 (Net 8399 8493 uid 5196,0 8400 8494 decl (Decl … … 8410 8504 ) 8411 8505 xt "-103000,69800,-80500,70600" 8412 st "SIGNAL config_ready_cm : std_logic" 8413 ) 8414 ) 8415 *253 (Net 8506 st "SIGNAL config_ready_cm : std_logic 8507 " 8508 ) 8509 ) 8510 *254 (Net 8416 8511 uid 5220,0 8417 8512 decl (Decl … … 8430 8525 ) 8431 8526 xt "-103000,46200,-57000,47000" 8432 st "led : std_logic_vector(7 DOWNTO 0) := (OTHERS => '0')" 8433 ) 8434 ) 8435 *254 (Net 8527 st "led : std_logic_vector(7 DOWNTO 0) := (OTHERS => '0') 8528 " 8529 ) 8530 ) 8531 *255 (Net 8436 8532 uid 5472,0 8437 8533 decl (Decl … … 8446 8542 font "Courier New,8,0" 8447 8543 ) 8448 xt "-103000,105000,-80500,105800" 8449 st "SIGNAL sensor_ready : std_logic" 8450 ) 8451 ) 8452 *255 (Net 8544 xt "-103000,105800,-80500,106600" 8545 st "SIGNAL sensor_ready : std_logic 8546 " 8547 ) 8548 ) 8549 *256 (Net 8453 8550 uid 5478,0 8454 8551 decl (Decl … … 8463 8560 font "Courier New,8,0" 8464 8561 ) 8465 xt "-103000,104200,-76500,105000" 8466 st "SIGNAL sensor_array : sensor_array_type" 8467 ) 8468 ) 8469 *256 (Net 8562 xt "-103000,105000,-76500,105800" 8563 st "SIGNAL sensor_array : sensor_array_type 8564 " 8565 ) 8566 ) 8567 *257 (Net 8470 8568 uid 5588,0 8471 8569 decl (Decl … … 8481 8579 ) 8482 8580 xt "-103000,70600,-80500,71400" 8483 st "SIGNAL config_ready_spi : std_logic" 8484 ) 8485 ) 8486 *257 (Net 8581 st "SIGNAL config_ready_spi : std_logic 8582 " 8583 ) 8584 ) 8585 *258 (Net 8487 8586 uid 5632,0 8488 8587 lang 10 … … 8500 8599 ) 8501 8600 xt "-103000,63400,-71000,64200" 8502 st "SIGNAL adc_otr : std_logic_vector(3 DOWNTO 0)" 8503 ) 8504 ) 8505 *258 (Net 8601 st "SIGNAL adc_otr : std_logic_vector(3 DOWNTO 0) 8602 " 8603 ) 8604 ) 8605 *259 (Net 8506 8606 uid 5640,0 8507 8607 decl (Decl … … 8517 8617 ) 8518 8618 xt "-103000,62600,-75500,63400" 8519 st "SIGNAL adc_data_array_int : adc_data_array_type" 8520 ) 8521 ) 8522 *259 (SaComponent 8619 st "SIGNAL adc_data_array_int : adc_data_array_type 8620 " 8621 ) 8622 ) 8623 *260 (SaComponent 8523 8624 uid 5678,0 8524 8625 optionalChildren [ 8525 *26 0(CptPort8626 *261 (CptPort 8526 8627 uid 5658,0 8527 8628 ps "OnEdgeStrategy" … … 8558 8659 ) 8559 8660 ) 8560 *26 1(CptPort8661 *262 (CptPort 8561 8662 uid 5662,0 8562 8663 ps "OnEdgeStrategy" … … 8595 8696 ) 8596 8697 ) 8597 *26 2(CptPort8698 *263 (CptPort 8598 8699 uid 5666,0 8599 8700 ps "OnEdgeStrategy" … … 8634 8735 ) 8635 8736 ) 8636 *26 3(CptPort8737 *264 (CptPort 8637 8738 uid 5670,0 8638 8739 ps "OnEdgeStrategy" … … 8670 8771 ) 8671 8772 ) 8672 *26 4(CptPort8773 *265 (CptPort 8673 8774 uid 5674,0 8674 8775 ps "OnEdgeStrategy" … … 8723 8824 stg "VerticalLayoutStrategy" 8724 8825 textVec [ 8725 *26 5(Text8826 *266 (Text 8726 8827 uid 5681,0 8727 8828 va (VaSet … … 8733 8834 tm "BdLibraryNameMgr" 8734 8835 ) 8735 *26 6(Text8836 *267 (Text 8736 8837 uid 5682,0 8737 8838 va (VaSet … … 8743 8844 tm "CptNameMgr" 8744 8845 ) 8745 *26 7(Text8846 *268 (Text 8746 8847 uid 5683,0 8747 8848 va (VaSet … … 8792 8893 archFileType "UNKNOWN" 8793 8894 ) 8794 *26 8(Net8895 *269 (Net 8795 8896 uid 5743,0 8796 8897 decl (Decl … … 8807 8908 ) 8808 8909 xt "-103000,76200,-59500,77000" 8809 st "SIGNAL config_start_spi : std_logic := '0'" 8810 ) 8811 ) 8812 *269 (SaComponent 8910 st "SIGNAL config_start_spi : std_logic := '0' 8911 " 8912 ) 8913 ) 8914 *270 (SaComponent 8813 8915 uid 5793,0 8814 8916 optionalChildren [ 8815 *27 0(CptPort8917 *271 (CptPort 8816 8918 uid 5753,0 8817 8919 ps "OnEdgeStrategy" … … 8848 8950 ) 8849 8951 ) 8850 *27 1(CptPort8952 *272 (CptPort 8851 8953 uid 5761,0 8852 8954 ps "OnEdgeStrategy" … … 8883 8985 ) 8884 8986 ) 8885 *27 2(CptPort8987 *273 (CptPort 8886 8988 uid 5765,0 8887 8989 ps "OnEdgeStrategy" … … 8919 9021 ) 8920 9022 ) 8921 *27 3(CptPort9023 *274 (CptPort 8922 9024 uid 5769,0 8923 9025 ps "OnEdgeStrategy" … … 8954 9056 ) 8955 9057 ) 8956 *27 4(CptPort9058 *275 (CptPort 8957 9059 uid 5773,0 8958 9060 ps "OnEdgeStrategy" … … 8990 9092 ) 8991 9093 ) 8992 *27 5(CptPort9094 *276 (CptPort 8993 9095 uid 5777,0 8994 9096 ps "OnEdgeStrategy" … … 9026 9128 ) 9027 9129 ) 9028 *27 6(CptPort9130 *277 (CptPort 9029 9131 uid 5781,0 9030 9132 ps "OnEdgeStrategy" … … 9061 9163 ) 9062 9164 ) 9063 *27 7(CptPort9165 *278 (CptPort 9064 9166 uid 5785,0 9065 9167 ps "OnEdgeStrategy" … … 9097 9199 ) 9098 9200 ) 9099 *27 8(CptPort9201 *279 (CptPort 9100 9202 uid 5789,0 9101 9203 ps "OnEdgeStrategy" … … 9133 9235 ) 9134 9236 ) 9135 *2 79(CptPort9237 *280 (CptPort 9136 9238 uid 5986,0 9137 9239 ps "OnEdgeStrategy" … … 9170 9272 ) 9171 9273 ) 9172 *28 0(CptPort9274 *281 (CptPort 9173 9275 uid 6154,0 9174 9276 ps "OnEdgeStrategy" … … 9206 9308 ) 9207 9309 ) 9208 *28 1(CptPort9310 *282 (CptPort 9209 9311 uid 6317,0 9210 9312 ps "OnEdgeStrategy" … … 9260 9362 stg "VerticalLayoutStrategy" 9261 9363 textVec [ 9262 *28 2(Text9364 *283 (Text 9263 9365 uid 5796,0 9264 9366 va (VaSet … … 9270 9372 tm "BdLibraryNameMgr" 9271 9373 ) 9272 *28 3(Text9374 *284 (Text 9273 9375 uid 5797,0 9274 9376 va (VaSet … … 9280 9382 tm "CptNameMgr" 9281 9383 ) 9282 *28 4(Text9384 *285 (Text 9283 9385 uid 5798,0 9284 9386 va (VaSet … … 9326 9428 archFileType "UNKNOWN" 9327 9429 ) 9328 *28 5(Net9430 *286 (Net 9329 9431 uid 5811,0 9330 9432 decl (Decl … … 9340 9442 ) 9341 9443 xt "-103000,50200,-84500,51000" 9342 st "sclk : std_logic" 9343 ) 9344 ) 9345 *286 (Net 9444 st "sclk : std_logic 9445 " 9446 ) 9447 ) 9448 *287 (Net 9346 9449 uid 5819,0 9347 9450 decl (Decl … … 9359 9462 ) 9360 9463 xt "-103000,57400,-84500,58200" 9361 st "sio : std_logic" 9362 ) 9363 ) 9364 *287 (Net 9464 st "sio : std_logic 9465 " 9466 ) 9467 ) 9468 *288 (Net 9365 9469 uid 5827,0 9366 9470 decl (Decl … … 9376 9480 ) 9377 9481 xt "-103000,42200,-84500,43000" 9378 st "dac_cs : std_logic" 9379 ) 9380 ) 9381 *288 (Net 9482 st "dac_cs : std_logic 9483 " 9484 ) 9485 ) 9486 *289 (Net 9382 9487 uid 5835,0 9383 9488 decl (Decl … … 9394 9499 ) 9395 9500 xt "-103000,51000,-74500,51800" 9396 st "sensor_cs : std_logic_vector(3 DOWNTO 0)" 9397 ) 9398 ) 9399 *289 (PortIoOut 9501 st "sensor_cs : std_logic_vector(3 DOWNTO 0) 9502 " 9503 ) 9504 ) 9505 *290 (PortIoOut 9400 9506 uid 5843,0 9401 9507 shape (CompositeShape … … 9442 9548 ) 9443 9549 ) 9444 *29 0(PortIoInOut9550 *291 (PortIoInOut 9445 9551 uid 5849,0 9446 9552 shape (CompositeShape … … 9487 9593 ) 9488 9594 ) 9489 *29 1(PortIoOut9595 *292 (PortIoOut 9490 9596 uid 5855,0 9491 9597 shape (CompositeShape … … 9532 9638 ) 9533 9639 ) 9534 *29 2(PortIoOut9640 *293 (PortIoOut 9535 9641 uid 5861,0 9536 9642 shape (CompositeShape … … 9577 9683 ) 9578 9684 ) 9579 *29 3(Net9685 *294 (Net 9580 9686 uid 5948,0 9581 9687 decl (Decl … … 9591 9697 font "Courier New,8,0" 9592 9698 ) 9593 xt "-103000,90600,-59500,91400" 9594 st "SIGNAL new_config : std_logic := '0'" 9595 ) 9596 ) 9597 *294 (Net 9699 xt "-103000,91400,-59500,92200" 9700 st "SIGNAL new_config : std_logic := '0' 9701 " 9702 ) 9703 ) 9704 *295 (Net 9598 9705 uid 5960,0 9599 9706 decl (Decl … … 9609 9716 ) 9610 9717 xt "-103000,77000,-80500,77800" 9611 st "SIGNAL config_started : std_logic" 9612 ) 9613 ) 9614 *295 (Net 9718 st "SIGNAL config_started : std_logic 9719 " 9720 ) 9721 ) 9722 *296 (Net 9615 9723 uid 6012,0 9616 9724 decl (Decl … … 9627 9735 ) 9628 9736 xt "-103000,79400,-59500,80200" 9629 st "SIGNAL config_started_spi : std_logic := '0'" 9630 ) 9631 ) 9632 *296 (Net 9737 st "SIGNAL config_started_spi : std_logic := '0' 9738 " 9739 ) 9740 ) 9741 *297 (Net 9633 9742 uid 6014,0 9634 9743 decl (Decl … … 9645 9754 ) 9646 9755 xt "-103000,77800,-59500,78600" 9647 st "SIGNAL config_started_cu : std_logic := '0'" 9648 ) 9649 ) 9650 *297 (Net 9756 st "SIGNAL config_started_cu : std_logic := '0' 9757 " 9758 ) 9759 ) 9760 *298 (Net 9651 9761 uid 6016,0 9652 9762 decl (Decl … … 9662 9772 ) 9663 9773 xt "-103000,78600,-80500,79400" 9664 st "SIGNAL config_started_mm : std_logic" 9665 ) 9666 ) 9667 *298 (Net 9774 st "SIGNAL config_started_mm : std_logic 9775 " 9776 ) 9777 ) 9778 *299 (Net 9668 9779 uid 6158,0 9669 9780 decl (Decl … … 9680 9791 ) 9681 9792 xt "-103000,47000,-63000,47800" 9682 st "mosi : std_logic := '0'" 9683 ) 9684 ) 9685 *299 (PortIoOut 9793 st "mosi : std_logic := '0' 9794 " 9795 ) 9796 ) 9797 *300 (PortIoOut 9686 9798 uid 6166,0 9687 9799 shape (CompositeShape … … 9728 9840 ) 9729 9841 ) 9730 *30 0(Net9842 *301 (Net 9731 9843 uid 6360,0 9732 9844 decl (Decl … … 9745 9857 ) 9746 9858 xt "-103000,43000,-49500,43800" 9747 st "denable : std_logic := '0' -- default domino wave off" 9748 ) 9749 ) 9750 *301 (PortIoOut 9859 st "denable : std_logic := '0' -- default domino wave off 9860 " 9861 ) 9862 ) 9863 *302 (PortIoOut 9751 9864 uid 6368,0 9752 9865 shape (CompositeShape … … 9792 9905 ) 9793 9906 ) 9794 *30 2(Net9907 *303 (Net 9795 9908 uid 6450,0 9796 9909 decl (Decl … … 9806 9919 font "Courier New,8,0" 9807 9920 ) 9808 xt "-103000,89800,-59500,90600" 9809 st "SIGNAL dwrite_enable : std_logic := '1'" 9810 ) 9811 ) 9812 *303 (MWC 9921 xt "-103000,90600,-59500,91400" 9922 st "SIGNAL dwrite_enable : std_logic := '1' 9923 " 9924 ) 9925 ) 9926 *304 (MWC 9813 9927 uid 6529,0 9814 9928 optionalChildren [ 9815 *30 4(CptPort9929 *305 (CptPort 9816 9930 uid 6501,0 9817 9931 optionalChildren [ 9818 *30 5(Line9932 *306 (Line 9819 9933 uid 6505,0 9820 9934 layer 5 … … 9829 9943 ] 9830 9944 ) 9831 *30 6(Property9945 *307 (Property 9832 9946 uid 6506,0 9833 9947 pclass "_MW_GEOM_" … … 9874 9988 ) 9875 9989 ) 9876 *30 7(CptPort9990 *308 (CptPort 9877 9991 uid 6507,0 9878 9992 optionalChildren [ 9879 *30 8(Line9993 *309 (Line 9880 9994 uid 6511,0 9881 9995 layer 5 … … 9929 10043 ) 9930 10044 ) 9931 *3 09(CptPort10045 *310 (CptPort 9932 10046 uid 6512,0 9933 10047 optionalChildren [ 9934 *31 0(Line10048 *311 (Line 9935 10049 uid 6516,0 9936 10050 layer 5 … … 9984 10098 ) 9985 10099 ) 9986 *31 1(CommentGraphic10100 *312 (CommentGraphic 9987 10101 uid 6517,0 9988 10102 optionalChildren [ 9989 *31 2(Property10103 *313 (Property 9990 10104 uid 6519,0 9991 10105 pclass "_MW_GEOM_" … … 10011 10125 oxt "11000,10000,11000,10000" 10012 10126 ) 10013 *31 3(CommentGraphic10127 *314 (CommentGraphic 10014 10128 uid 6520,0 10015 10129 optionalChildren [ 10016 *31 4(Property10130 *315 (Property 10017 10131 uid 6522,0 10018 10132 pclass "_MW_GEOM_" … … 10038 10152 oxt "11000,6000,11000,6000" 10039 10153 ) 10040 *31 5(Grouping10154 *316 (Grouping 10041 10155 uid 6523,0 10042 10156 optionalChildren [ 10043 *31 6(CommentGraphic10157 *317 (CommentGraphic 10044 10158 uid 6525,0 10045 10159 shape (PolyLine2D … … 10062 10176 oxt "9000,6000,11000,10000" 10063 10177 ) 10064 *31 7(CommentGraphic10178 *318 (CommentGraphic 10065 10179 uid 6527,0 10066 10180 shape (Arc2D … … 10115 10229 stg "VerticalLayoutStrategy" 10116 10230 textVec [ 10117 *31 8(Text10231 *319 (Text 10118 10232 uid 6532,0 10119 10233 va (VaSet … … 10125 10239 blo "3500,59300" 10126 10240 ) 10127 *3 19(Text10241 *320 (Text 10128 10242 uid 6533,0 10129 10243 va (VaSet … … 10134 10248 blo "3500,60300" 10135 10249 ) 10136 *32 0(Text10250 *321 (Text 10137 10251 uid 6534,0 10138 10252 va (VaSet … … 10179 10293 ) 10180 10294 ) 10181 *32 1(Net10295 *322 (Net 10182 10296 uid 6544,0 10183 10297 decl (Decl … … 10193 10307 font "Courier New,8,0" 10194 10308 ) 10195 xt "-103000,89000,-59500,89800" 10196 st "SIGNAL dwrite : std_logic := '1'" 10197 ) 10198 ) 10199 *322 (SaComponent 10309 xt "-103000,89800,-59500,90600" 10310 st "SIGNAL dwrite : std_logic := '1' 10311 " 10312 ) 10313 ) 10314 *323 (SaComponent 10200 10315 uid 8277,0 10201 10316 optionalChildren [ 10202 *32 3(CptPort10317 *324 (CptPort 10203 10318 uid 8246,0 10204 10319 ps "OnEdgeStrategy" … … 10237 10352 ) 10238 10353 ) 10239 *32 4(CptPort10354 *325 (CptPort 10240 10355 uid 8250,0 10241 10356 ps "OnEdgeStrategy" … … 10275 10390 ) 10276 10391 ) 10277 *32 5(CptPort10392 *326 (CptPort 10278 10393 uid 8254,0 10279 10394 ps "OnEdgeStrategy" … … 10313 10428 ) 10314 10429 ) 10315 *32 6(CptPort10430 *327 (CptPort 10316 10431 uid 8258,0 10317 10432 ps "OnEdgeStrategy" … … 10351 10466 ) 10352 10467 ) 10353 *32 7(CptPort10468 *328 (CptPort 10354 10469 uid 8262,0 10355 10470 ps "OnEdgeStrategy" … … 10389 10504 ) 10390 10505 ) 10391 *32 8(CptPort10506 *329 (CptPort 10392 10507 uid 8266,0 10393 10508 ps "OnEdgeStrategy" … … 10428 10543 ) 10429 10544 ) 10430 *3 29(CptPort10545 *330 (CptPort 10431 10546 uid 8270,0 10432 10547 ps "OnEdgeStrategy" … … 10485 10600 stg "VerticalLayoutStrategy" 10486 10601 textVec [ 10487 *33 0(Text10602 *331 (Text 10488 10603 uid 8280,0 10489 10604 va (VaSet … … 10495 10610 tm "BdLibraryNameMgr" 10496 10611 ) 10497 *33 1(Text10612 *332 (Text 10498 10613 uid 8281,0 10499 10614 va (VaSet … … 10505 10620 tm "CptNameMgr" 10506 10621 ) 10507 *33 2(Text10622 *333 (Text 10508 10623 uid 8282,0 10509 10624 va (VaSet … … 10553 10668 archFileType "UNKNOWN" 10554 10669 ) 10555 *33 3(Net10670 *334 (Net 10556 10671 uid 8414,0 10557 10672 lang 2 … … 10567 10682 font "Courier New,8,0" 10568 10683 ) 10569 xt "-103000,112200,-80500,113000" 10570 st "SIGNAL wiz_ack : std_logic" 10571 ) 10572 ) 10573 *334 (Net 10684 xt "-103000,113000,-80500,113800" 10685 st "SIGNAL wiz_ack : std_logic 10686 " 10687 ) 10688 ) 10689 *335 (Net 10574 10690 uid 8508,0 10575 10691 decl (Decl … … 10587 10703 ) 10588 10704 xt "-103000,82600,-53500,83400" 10589 st "SIGNAL drs_address : std_logic_vector(3 DOWNTO 0) := (others => '0')" 10590 ) 10591 ) 10592 *335 (Net 10705 st "SIGNAL drs_address : std_logic_vector(3 DOWNTO 0) := (others => '0') 10706 " 10707 ) 10708 ) 10709 *336 (Net 10593 10710 uid 8516,0 10594 10711 decl (Decl … … 10604 10721 ) 10605 10722 xt "-103000,83400,-80500,84200" 10606 st "SIGNAL drs_address_mode : std_logic" 10607 ) 10608 ) 10609 *336 (MWC 10723 st "SIGNAL drs_address_mode : std_logic 10724 " 10725 ) 10726 ) 10727 *337 (MWC 10610 10728 uid 8562,0 10611 10729 optionalChildren [ 10612 *33 7(CptPort10730 *338 (CptPort 10613 10731 uid 8524,0 10614 10732 optionalChildren [ 10615 *33 8(Line10733 *339 (Line 10616 10734 uid 8528,0 10617 10735 layer 5 … … 10677 10795 ) 10678 10796 ) 10679 *3 39(CptPort10797 *340 (CptPort 10680 10798 uid 8529,0 10681 10799 optionalChildren [ 10682 *34 0(Line10800 *341 (Line 10683 10801 uid 8533,0 10684 10802 layer 5 … … 10694 10812 ] 10695 10813 ) 10696 *34 1(Property10814 *342 (Property 10697 10815 uid 8534,0 10698 10816 pclass "_MW_GEOM_" … … 10749 10867 ) 10750 10868 ) 10751 *34 2(CptPort10869 *343 (CptPort 10752 10870 uid 8535,0 10753 10871 optionalChildren [ 10754 *34 3(Line10872 *344 (Line 10755 10873 uid 8539,0 10756 10874 layer 5 … … 10816 10934 ) 10817 10935 ) 10818 *34 4(CptPort10936 *345 (CptPort 10819 10937 uid 8540,0 10820 10938 optionalChildren [ 10821 *34 5(Line10939 *346 (Line 10822 10940 uid 8544,0 10823 10941 layer 5 … … 10879 10997 ) 10880 10998 ) 10881 *34 6(CommentGraphic10999 *347 (CommentGraphic 10882 11000 uid 8545,0 10883 11001 shape (CustomPolygon … … 10902 11020 oxt "7000,7000,9000,11000" 10903 11021 ) 10904 *34 7(CommentGraphic11022 *348 (CommentGraphic 10905 11023 uid 8547,0 10906 11024 optionalChildren [ 10907 *34 8(Property11025 *349 (Property 10908 11026 uid 8549,0 10909 11027 pclass "_MW_GEOM_" … … 10929 11047 oxt "9000,7000,9000,7000" 10930 11048 ) 10931 *3 49(CommentGraphic11049 *350 (CommentGraphic 10932 11050 uid 8550,0 10933 11051 optionalChildren [ 10934 *35 0(Property11052 *351 (Property 10935 11053 uid 8552,0 10936 11054 pclass "_MW_GEOM_" … … 10956 11074 oxt "9000,11000,9000,11000" 10957 11075 ) 10958 *35 1(CommentText11076 *352 (CommentText 10959 11077 uid 8553,0 10960 11078 shape (Rectangle … … 10987 11105 ) 10988 11106 ) 10989 *35 2(CommentText11107 *353 (CommentText 10990 11108 uid 8556,0 10991 11109 shape (Rectangle … … 11019 11137 ) 11020 11138 ) 11021 *35 3(CommentText11139 *354 (CommentText 11022 11140 uid 8559,0 11023 11141 shape (Rectangle … … 11070 11188 stg "VerticalLayoutStrategy" 11071 11189 textVec [ 11072 *35 4(Text11190 *355 (Text 11073 11191 uid 8565,0 11074 11192 va (VaSet … … 11080 11198 blo "-30650,102900" 11081 11199 ) 11082 *35 5(Text11200 *356 (Text 11083 11201 uid 8566,0 11084 11202 va (VaSet … … 11089 11207 blo "-30650,103900" 11090 11208 ) 11091 *35 6(Text11209 *357 (Text 11092 11210 uid 8567,0 11093 11211 va (VaSet … … 11135 11253 ) 11136 11254 ) 11137 *35 7(Net11255 *358 (Net 11138 11256 uid 8583,0 11139 11257 decl (Decl … … 11151 11269 ) 11152 11270 xt "-103000,84200,-53500,85000" 11153 st "SIGNAL drs_channel_internal : std_logic_vector(3 DOWNTO 0) := (others => '0')" 11154 ) 11155 ) 11156 *358 (MWC 11271 st "SIGNAL drs_channel_internal : std_logic_vector(3 DOWNTO 0) := (others => '0') 11272 " 11273 ) 11274 ) 11275 *359 (MWC 11157 11276 uid 8721,0 11158 11277 optionalChildren [ 11159 *3 59(CptPort11278 *360 (CptPort 11160 11279 uid 8693,0 11161 11280 optionalChildren [ 11162 *36 0(Line11281 *361 (Line 11163 11282 uid 8697,0 11164 11283 layer 5 … … 11173 11292 ] 11174 11293 ) 11175 *36 1(Property11294 *362 (Property 11176 11295 uid 8698,0 11177 11296 pclass "_MW_GEOM_" … … 11217 11336 ) 11218 11337 ) 11219 *36 2(CptPort11338 *363 (CptPort 11220 11339 uid 8699,0 11221 11340 optionalChildren [ 11222 *36 3(Line11341 *364 (Line 11223 11342 uid 8703,0 11224 11343 layer 5 … … 11271 11390 ) 11272 11391 ) 11273 *36 4(CptPort11392 *365 (CptPort 11274 11393 uid 8704,0 11275 11394 optionalChildren [ 11276 *36 5(Line11395 *366 (Line 11277 11396 uid 8708,0 11278 11397 layer 5 … … 11325 11444 ) 11326 11445 ) 11327 *36 6(CommentGraphic11446 *367 (CommentGraphic 11328 11447 uid 8709,0 11329 11448 optionalChildren [ 11330 *36 7(Property11449 *368 (Property 11331 11450 uid 8711,0 11332 11451 pclass "_MW_GEOM_" … … 11352 11471 oxt "11000,6000,11000,6000" 11353 11472 ) 11354 *36 8(CommentGraphic11473 *369 (CommentGraphic 11355 11474 uid 8712,0 11356 11475 optionalChildren [ 11357 *3 69(Property11476 *370 (Property 11358 11477 uid 8714,0 11359 11478 pclass "_MW_GEOM_" … … 11379 11498 oxt "11000,10000,11000,10000" 11380 11499 ) 11381 *37 0(Grouping11500 *371 (Grouping 11382 11501 uid 8715,0 11383 11502 optionalChildren [ 11384 *37 1(CommentGraphic11503 *372 (CommentGraphic 11385 11504 uid 8717,0 11386 11505 shape (PolyLine2D … … 11403 11522 oxt "9000,6000,11000,10000" 11404 11523 ) 11405 *37 2(CommentGraphic11524 *373 (CommentGraphic 11406 11525 uid 8719,0 11407 11526 shape (Arc2D … … 11456 11575 stg "VerticalLayoutStrategy" 11457 11576 textVec [ 11458 *37 3(Text11577 *374 (Text 11459 11578 uid 8724,0 11460 11579 va (VaSet … … 11466 11585 blo "-11500,113300" 11467 11586 ) 11468 *37 4(Text11587 *375 (Text 11469 11588 uid 8725,0 11470 11589 va (VaSet … … 11475 11594 blo "-11500,114300" 11476 11595 ) 11477 *37 5(Text11596 *376 (Text 11478 11597 uid 8726,0 11479 11598 va (VaSet … … 11520 11639 ) 11521 11640 ) 11522 *37 6(Net11641 *377 (Net 11523 11642 uid 8730,0 11524 11643 decl (Decl … … 11533 11652 font "Courier New,8,0" 11534 11653 ) 11535 xt "-103000,102600,-80500,103400" 11536 st "SIGNAL sclk1 : std_logic" 11537 ) 11538 ) 11539 *377 (Net 11654 xt "-103000,103400,-80500,104200" 11655 st "SIGNAL sclk1 : std_logic 11656 " 11657 ) 11658 ) 11659 *378 (Net 11540 11660 uid 8746,0 11541 11661 decl (Decl … … 11550 11670 font "Courier New,8,0" 11551 11671 ) 11552 xt "-103000,103400,-80500,104200" 11553 st "SIGNAL sclk_enable : std_logic" 11554 ) 11555 ) 11556 *378 (Net 11672 xt "-103000,104200,-80500,105000" 11673 st "SIGNAL sclk_enable : std_logic 11674 " 11675 ) 11676 ) 11677 *379 (Net 11557 11678 uid 9004,0 11558 11679 decl (Decl … … 11569 11690 ) 11570 11691 xt "-103000,39800,-63000,40600" 11571 st "adc_clk_en : std_logic := '0'" 11572 ) 11573 ) 11574 *379 (PortIoOut 11692 st "adc_clk_en : std_logic := '0' 11693 " 11694 ) 11695 ) 11696 *380 (PortIoOut 11575 11697 uid 9012,0 11576 11698 shape (CompositeShape … … 11617 11739 ) 11618 11740 ) 11619 *38 0(SaComponent11741 *381 (SaComponent 11620 11742 uid 9175,0 11621 11743 optionalChildren [ 11622 *38 1(CptPort11744 *382 (CptPort 11623 11745 uid 9120,0 11624 11746 ps "OnEdgeStrategy" … … 11657 11779 ) 11658 11780 ) 11659 *38 2(CptPort11781 *383 (CptPort 11660 11782 uid 9124,0 11661 11783 ps "OnEdgeStrategy" … … 11694 11816 ) 11695 11817 ) 11696 *38 3(CptPort11818 *384 (CptPort 11697 11819 uid 9128,0 11698 11820 ps "OnEdgeStrategy" … … 11729 11851 ) 11730 11852 ) 11731 *38 4(CptPort11853 *385 (CptPort 11732 11854 uid 9132,0 11733 11855 ps "OnEdgeStrategy" … … 11779 11901 ) 11780 11902 ) 11781 *38 5(CptPort11903 *386 (CptPort 11782 11904 uid 9137,0 11783 11905 ps "OnEdgeStrategy" … … 11830 11952 ) 11831 11953 ) 11832 *38 6(CptPort11954 *387 (CptPort 11833 11955 uid 9142,0 11834 11956 ps "OnEdgeStrategy" … … 11881 12003 ) 11882 12004 ) 11883 *38 7(CptPort12005 *388 (CptPort 11884 12006 uid 9147,0 11885 12007 ps "OnEdgeStrategy" … … 11920 12042 ) 11921 12043 ) 11922 *38 8(CptPort12044 *389 (CptPort 11923 12045 uid 9155,0 11924 12046 ps "OnEdgeStrategy" … … 11957 12079 ) 11958 12080 ) 11959 *3 89(CptPort12081 *390 (CptPort 11960 12082 uid 9159,0 11961 12083 ps "OnEdgeStrategy" … … 11994 12116 ) 11995 12117 ) 11996 *39 0(CptPort12118 *391 (CptPort 11997 12119 uid 9163,0 11998 12120 ps "OnEdgeStrategy" … … 12031 12153 ) 12032 12154 ) 12033 *39 1(CptPort12155 *392 (CptPort 12034 12156 uid 9167,0 12035 12157 ps "OnEdgeStrategy" … … 12068 12190 ) 12069 12191 ) 12070 *39 2(CptPort12192 *393 (CptPort 12071 12193 uid 9171,0 12072 12194 ps "OnEdgeStrategy" … … 12105 12227 ) 12106 12228 ) 12107 *39 3(CptPort12229 *394 (CptPort 12108 12230 uid 9211,0 12109 12231 ps "OnEdgeStrategy" … … 12142 12264 ) 12143 12265 ) 12144 *39 4(CptPort12266 *395 (CptPort 12145 12267 uid 9215,0 12146 12268 ps "OnEdgeStrategy" … … 12177 12299 ) 12178 12300 ) 12179 *39 5(CptPort12301 *396 (CptPort 12180 12302 uid 9219,0 12181 12303 ps "OnEdgeStrategy" … … 12212 12334 ) 12213 12335 ) 12214 *39 6(CptPort12336 *397 (CptPort 12215 12337 uid 10030,0 12216 12338 ps "OnEdgeStrategy" … … 12264 12386 stg "VerticalLayoutStrategy" 12265 12387 textVec [ 12266 *39 7(Text12388 *398 (Text 12267 12389 uid 9178,0 12268 12390 va (VaSet … … 12274 12396 tm "BdLibraryNameMgr" 12275 12397 ) 12276 *39 8(Text12398 *399 (Text 12277 12399 uid 9179,0 12278 12400 va (VaSet … … 12284 12406 tm "CptNameMgr" 12285 12407 ) 12286 * 399(Text12408 *400 (Text 12287 12409 uid 9180,0 12288 12410 va (VaSet … … 12331 12453 archFileType "UNKNOWN" 12332 12454 ) 12333 *40 0(Net12455 *401 (Net 12334 12456 uid 9231,0 12335 12457 decl (Decl … … 12347 12469 font "Courier New,8,0" 12348 12470 ) 12349 xt "-103000,92200,-44000,93000" 12350 st "SIGNAL ps_direction : std_logic := '1' -- default phase shift upwards" 12351 ) 12352 ) 12353 *401 (Net 12471 xt "-103000,93000,-44000,93800" 12472 st "SIGNAL ps_direction : std_logic := '1' -- default phase shift upwards 12473 " 12474 ) 12475 ) 12476 *402 (Net 12354 12477 uid 9239,0 12355 12478 decl (Decl … … 12368 12491 font "Courier New,8,0" 12369 12492 ) 12370 xt "-103000,93000,-43000,93800" 12371 st "SIGNAL ps_do_phase_shift : std_logic := '0' --pulse this to phase shift once" 12372 ) 12373 ) 12374 *402 (Net 12493 xt "-103000,93800,-43000,94600" 12494 st "SIGNAL ps_do_phase_shift : std_logic := '0' --pulse this to phase shift once 12495 " 12496 ) 12497 ) 12498 *403 (Net 12375 12499 uid 9267,0 12376 12500 decl (Decl … … 12386 12510 ) 12387 12511 xt "-103000,31800,-84500,32600" 12388 st "LOCKED_extraOUT : std_logic" 12389 ) 12390 ) 12391 *403 (PortIoOut 12512 st "LOCKED_extraOUT : std_logic 12513 " 12514 ) 12515 ) 12516 *404 (PortIoOut 12392 12517 uid 9275,0 12393 12518 shape (CompositeShape … … 12433 12558 ) 12434 12559 ) 12435 *40 4(Net12560 *405 (Net 12436 12561 uid 9281,0 12437 12562 decl (Decl … … 12447 12572 ) 12448 12573 xt "-103000,33400,-84500,34200" 12449 st "PSDONE_extraOUT : std_logic" 12450 ) 12451 ) 12452 *405 (PortIoOut 12574 st "PSDONE_extraOUT : std_logic 12575 " 12576 ) 12577 ) 12578 *406 (PortIoOut 12453 12579 uid 9289,0 12454 12580 shape (CompositeShape … … 12494 12620 ) 12495 12621 ) 12496 *40 6(Net12622 *407 (Net 12497 12623 uid 9295,0 12498 12624 decl (Decl … … 12508 12634 ) 12509 12635 xt "-103000,35000,-84500,35800" 12510 st "PSINCDEC_OUT : std_logic" 12511 ) 12512 ) 12513 *407 (PortIoOut 12636 st "PSINCDEC_OUT : std_logic 12637 " 12638 ) 12639 ) 12640 *408 (PortIoOut 12514 12641 uid 9303,0 12515 12642 shape (CompositeShape … … 12555 12682 ) 12556 12683 ) 12557 *40 8(Net12684 *409 (Net 12558 12685 uid 9309,0 12559 12686 decl (Decl … … 12569 12696 ) 12570 12697 xt "-103000,34200,-84500,35000" 12571 st "PSEN_OUT : std_logic" 12572 ) 12573 ) 12574 *409 (PortIoOut 12698 st "PSEN_OUT : std_logic 12699 " 12700 ) 12701 ) 12702 *410 (PortIoOut 12575 12703 uid 9317,0 12576 12704 shape (CompositeShape … … 12616 12744 ) 12617 12745 ) 12618 *41 0(Net12746 *411 (Net 12619 12747 uid 9323,0 12620 12748 decl (Decl … … 12630 12758 ) 12631 12759 xt "-103000,32600,-84500,33400" 12632 st "PSCLK_OUT : std_logic" 12633 ) 12634 ) 12635 *411 (PortIoOut 12760 st "PSCLK_OUT : std_logic 12761 " 12762 ) 12763 ) 12764 *412 (PortIoOut 12636 12765 uid 9331,0 12637 12766 shape (CompositeShape … … 12677 12806 ) 12678 12807 ) 12679 *41 2(Net12808 *413 (Net 12680 12809 uid 9351,0 12681 12810 decl (Decl … … 12693 12822 ) 12694 12823 xt "-103000,31000,-84500,31800" 12695 st "DCM_locked : std_logic" 12696 ) 12697 ) 12698 *413 (PortIoOut 12824 st "DCM_locked : std_logic 12825 " 12826 ) 12827 ) 12828 *414 (PortIoOut 12699 12829 uid 9359,0 12700 12830 shape (CompositeShape … … 12740 12870 ) 12741 12871 ) 12742 *41 4(Net12872 *415 (Net 12743 12873 uid 9365,0 12744 12874 decl (Decl … … 12758 12888 ) 12759 12889 xt "-103000,47800,-57000,48600" 12760 st "offset : std_logic_vector(7 downto 0) := (OTHERS => '0')" 12761 ) 12762 ) 12763 *415 (PortIoOut 12890 st "offset : std_logic_vector(7 downto 0) := (OTHERS => '0') 12891 " 12892 ) 12893 ) 12894 *416 (PortIoOut 12764 12895 uid 9374,0 12765 12896 shape (CompositeShape … … 12805 12936 ) 12806 12937 ) 12807 *41 6(Net12938 *417 (Net 12808 12939 uid 9380,0 12809 12940 decl (Decl … … 12824 12955 xt "-103000,51800,-63000,53400" 12825 12956 st "-- status: 12826 shifting : std_logic := '0'" 12827 ) 12828 ) 12829 *417 (PortIoOut 12957 shifting : std_logic := '0' 12958 " 12959 ) 12960 ) 12961 *418 (PortIoOut 12830 12962 uid 9389,0 12831 12963 shape (CompositeShape … … 12871 13003 ) 12872 13004 ) 12873 *41 8(Net13005 *419 (Net 12874 13006 uid 9395,0 12875 13007 decl (Decl … … 12888 13020 ) 12889 13021 xt "-103000,48600,-63000,49400" 12890 st "ready : std_logic := '0'" 12891 ) 12892 ) 12893 *419 (PortIoOut 13022 st "ready : std_logic := '0' 13023 " 13024 ) 13025 ) 13026 *420 (PortIoOut 12894 13027 uid 9404,0 12895 13028 shape (CompositeShape … … 12935 13068 ) 12936 13069 ) 12937 *42 0(MWC13070 *421 (MWC 12938 13071 uid 9430,0 12939 13072 optionalChildren [ 12940 *42 1(CptPort13073 *422 (CptPort 12941 13074 uid 9410,0 12942 13075 optionalChildren [ 12943 *42 2(Line13076 *423 (Line 12944 13077 uid 9414,0 12945 13078 layer 5 … … 13004 13137 ) 13005 13138 ) 13006 *42 3(CptPort13139 *424 (CptPort 13007 13140 uid 9415,0 13008 13141 optionalChildren [ 13009 *42 4(Line13142 *425 (Line 13010 13143 uid 9419,0 13011 13144 layer 5 … … 13069 13202 ) 13070 13203 ) 13071 *42 5(CommentGraphic13204 *426 (CommentGraphic 13072 13205 uid 9420,0 13073 13206 shape (PolyLine2D … … 13090 13223 oxt "6000,6000,7000,7000" 13091 13224 ) 13092 *42 6(CommentGraphic13225 *427 (CommentGraphic 13093 13226 uid 9422,0 13094 13227 shape (PolyLine2D … … 13111 13244 oxt "6000,7000,7000,8000" 13112 13245 ) 13113 *42 7(CommentGraphic13246 *428 (CommentGraphic 13114 13247 uid 9424,0 13115 13248 shape (PolyLine2D … … 13132 13265 oxt "6988,7329,7988,7329" 13133 13266 ) 13134 *42 8(CommentGraphic13267 *429 (CommentGraphic 13135 13268 uid 9426,0 13136 13269 shape (PolyLine2D … … 13151 13284 oxt "8000,7000,9000,7000" 13152 13285 ) 13153 *4 29(CommentGraphic13286 *430 (CommentGraphic 13154 13287 uid 9428,0 13155 13288 shape (PolyLine2D … … 13192 13325 stg "VerticalLayoutStrategy" 13193 13326 textVec [ 13194 *43 0(Text13327 *431 (Text 13195 13328 uid 9433,0 13196 13329 va (VaSet … … 13202 13335 blo "-2650,-11100" 13203 13336 ) 13204 *43 1(Text13337 *432 (Text 13205 13338 uid 9434,0 13206 13339 va (VaSet … … 13211 13344 blo "-2650,-10100" 13212 13345 ) 13213 *43 2(Text13346 *433 (Text 13214 13347 uid 9435,0 13215 13348 va (VaSet … … 13256 13389 ) 13257 13390 ) 13258 *43 3(MWC13391 *434 (MWC 13259 13392 uid 9472,0 13260 13393 optionalChildren [ 13261 *43 4(CptPort13394 *435 (CptPort 13262 13395 uid 9481,0 13263 13396 optionalChildren [ 13264 *43 5(Line13397 *436 (Line 13265 13398 uid 9486,0 13266 13399 layer 5 … … 13323 13456 ) 13324 13457 ) 13325 *43 6(CptPort13458 *437 (CptPort 13326 13459 uid 9487,0 13327 13460 optionalChildren [ 13328 *43 7(Line13461 *438 (Line 13329 13462 uid 9492,0 13330 13463 layer 5 … … 13387 13520 ) 13388 13521 ) 13389 *43 8(CommentGraphic13522 *439 (CommentGraphic 13390 13523 uid 9493,0 13391 13524 shape (PolyLine2D … … 13408 13541 oxt "6000,6000,7000,7000" 13409 13542 ) 13410 *4 39(CommentGraphic13543 *440 (CommentGraphic 13411 13544 uid 9495,0 13412 13545 shape (PolyLine2D … … 13429 13562 oxt "6000,7000,7000,8000" 13430 13563 ) 13431 *44 0(CommentGraphic13564 *441 (CommentGraphic 13432 13565 uid 9497,0 13433 13566 shape (PolyLine2D … … 13450 13583 oxt "6988,7329,7988,7329" 13451 13584 ) 13452 *44 1(CommentGraphic13585 *442 (CommentGraphic 13453 13586 uid 9499,0 13454 13587 shape (PolyLine2D … … 13469 13602 oxt "8000,7000,9000,7000" 13470 13603 ) 13471 *44 2(CommentGraphic13604 *443 (CommentGraphic 13472 13605 uid 9501,0 13473 13606 shape (PolyLine2D … … 13510 13643 stg "VerticalLayoutStrategy" 13511 13644 textVec [ 13512 *44 3(Text13645 *444 (Text 13513 13646 uid 9475,0 13514 13647 va (VaSet … … 13520 13653 blo "-2650,-7100" 13521 13654 ) 13522 *44 4(Text13655 *445 (Text 13523 13656 uid 9476,0 13524 13657 va (VaSet … … 13529 13662 blo "-2650,-6100" 13530 13663 ) 13531 *44 5(Text13664 *446 (Text 13532 13665 uid 9477,0 13533 13666 va (VaSet … … 13574 13707 ) 13575 13708 ) 13576 *44 6(PortIoOut13709 *447 (PortIoOut 13577 13710 uid 9523,0 13578 13711 shape (CompositeShape … … 13618 13751 ) 13619 13752 ) 13620 *44 7(PortIoOut13753 *448 (PortIoOut 13621 13754 uid 9545,0 13622 13755 shape (CompositeShape … … 13662 13795 ) 13663 13796 ) 13664 *44 8(Net13797 *449 (Net 13665 13798 uid 9551,0 13666 13799 decl (Decl … … 13676 13809 ) 13677 13810 xt "-103000,35800,-84500,36600" 13678 st "PS_DIR_IN : std_logic" 13679 ) 13680 ) 13681 *449 (Net 13811 st "PS_DIR_IN : std_logic 13812 " 13813 ) 13814 ) 13815 *450 (Net 13682 13816 uid 9553,0 13683 13817 decl (Decl … … 13693 13827 ) 13694 13828 xt "-103000,36600,-84500,37400" 13695 st "PS_DO_IN : std_logic" 13696 ) 13697 ) 13698 *450 (MWC 13829 st "PS_DO_IN : std_logic 13830 " 13831 ) 13832 ) 13833 *451 (MWC 13699 13834 uid 9662,0 13700 13835 optionalChildren [ 13701 *45 1(CptPort13836 *452 (CptPort 13702 13837 uid 9642,0 13703 13838 optionalChildren [ 13704 *45 2(Line13839 *453 (Line 13705 13840 uid 9646,0 13706 13841 layer 5 … … 13761 13896 ) 13762 13897 ) 13763 *45 3(CptPort13898 *454 (CptPort 13764 13899 uid 9647,0 13765 13900 optionalChildren [ 13766 *45 4(Line13901 *455 (Line 13767 13902 uid 9651,0 13768 13903 layer 5 … … 13826 13961 ) 13827 13962 ) 13828 *45 5(CommentGraphic13963 *456 (CommentGraphic 13829 13964 uid 9652,0 13830 13965 shape (PolyLine2D … … 13847 13982 oxt "6000,6000,7000,7000" 13848 13983 ) 13849 *45 6(CommentGraphic13984 *457 (CommentGraphic 13850 13985 uid 9654,0 13851 13986 shape (PolyLine2D … … 13868 14003 oxt "6000,7000,7000,8000" 13869 14004 ) 13870 *45 7(CommentGraphic14005 *458 (CommentGraphic 13871 14006 uid 9656,0 13872 14007 shape (PolyLine2D … … 13889 14024 oxt "6988,7329,7988,7329" 13890 14025 ) 13891 *45 8(CommentGraphic14026 *459 (CommentGraphic 13892 14027 uid 9658,0 13893 14028 shape (PolyLine2D … … 13908 14043 oxt "8000,7000,9000,7000" 13909 14044 ) 13910 *4 59(CommentGraphic14045 *460 (CommentGraphic 13911 14046 uid 9660,0 13912 14047 shape (PolyLine2D … … 13949 14084 stg "VerticalLayoutStrategy" 13950 14085 textVec [ 13951 *46 0(Text14086 *461 (Text 13952 14087 uid 9665,0 13953 14088 va (VaSet … … 13959 14094 blo "28350,900" 13960 14095 ) 13961 *46 1(Text14096 *462 (Text 13962 14097 uid 9666,0 13963 14098 va (VaSet … … 13968 14103 blo "28350,1900" 13969 14104 ) 13970 *46 2(Text14105 *463 (Text 13971 14106 uid 9667,0 13972 14107 va (VaSet … … 14013 14148 ) 14014 14149 ) 14015 *46 3(MWC14150 *464 (MWC 14016 14151 uid 9679,0 14017 14152 optionalChildren [ 14018 *46 4(CptPort14153 *465 (CptPort 14019 14154 uid 9688,0 14020 14155 optionalChildren [ 14021 *46 5(Line14156 *466 (Line 14022 14157 uid 9693,0 14023 14158 layer 5 … … 14077 14212 ) 14078 14213 ) 14079 *46 6(CptPort14214 *467 (CptPort 14080 14215 uid 9694,0 14081 14216 optionalChildren [ 14082 *46 7(Line14217 *468 (Line 14083 14218 uid 9699,0 14084 14219 layer 5 … … 14141 14276 ) 14142 14277 ) 14143 *46 8(CommentGraphic14278 *469 (CommentGraphic 14144 14279 uid 9700,0 14145 14280 shape (PolyLine2D … … 14162 14297 oxt "6000,6000,7000,7000" 14163 14298 ) 14164 *4 69(CommentGraphic14299 *470 (CommentGraphic 14165 14300 uid 9702,0 14166 14301 shape (PolyLine2D … … 14183 14318 oxt "6000,7000,7000,8000" 14184 14319 ) 14185 *47 0(CommentGraphic14320 *471 (CommentGraphic 14186 14321 uid 9704,0 14187 14322 shape (PolyLine2D … … 14204 14339 oxt "6988,7329,7988,7329" 14205 14340 ) 14206 *47 1(CommentGraphic14341 *472 (CommentGraphic 14207 14342 uid 9706,0 14208 14343 shape (PolyLine2D … … 14223 14358 oxt "8000,7000,9000,7000" 14224 14359 ) 14225 *47 2(CommentGraphic14360 *473 (CommentGraphic 14226 14361 uid 9708,0 14227 14362 shape (PolyLine2D … … 14264 14399 stg "VerticalLayoutStrategy" 14265 14400 textVec [ 14266 *47 3(Text14401 *474 (Text 14267 14402 uid 9682,0 14268 14403 va (VaSet … … 14274 14409 blo "28350,5900" 14275 14410 ) 14276 *47 4(Text14411 *475 (Text 14277 14412 uid 9683,0 14278 14413 va (VaSet … … 14283 14418 blo "28350,6900" 14284 14419 ) 14285 *47 5(Text14420 *476 (Text 14286 14421 uid 9684,0 14287 14422 va (VaSet … … 14328 14463 ) 14329 14464 ) 14330 *47 6(MWC14465 *477 (MWC 14331 14466 uid 9710,0 14332 14467 optionalChildren [ 14333 *47 7(CptPort14468 *478 (CptPort 14334 14469 uid 9719,0 14335 14470 optionalChildren [ 14336 *47 8(Line14471 *479 (Line 14337 14472 uid 9724,0 14338 14473 layer 5 … … 14392 14527 ) 14393 14528 ) 14394 *4 79(CptPort14529 *480 (CptPort 14395 14530 uid 9725,0 14396 14531 optionalChildren [ 14397 *48 0(Line14532 *481 (Line 14398 14533 uid 9730,0 14399 14534 layer 5 … … 14456 14591 ) 14457 14592 ) 14458 *48 1(CommentGraphic14593 *482 (CommentGraphic 14459 14594 uid 9731,0 14460 14595 shape (PolyLine2D … … 14477 14612 oxt "6000,6000,7000,7000" 14478 14613 ) 14479 *48 2(CommentGraphic14614 *483 (CommentGraphic 14480 14615 uid 9733,0 14481 14616 shape (PolyLine2D … … 14498 14633 oxt "6000,7000,7000,8000" 14499 14634 ) 14500 *48 3(CommentGraphic14635 *484 (CommentGraphic 14501 14636 uid 9735,0 14502 14637 shape (PolyLine2D … … 14519 14654 oxt "6988,7329,7988,7329" 14520 14655 ) 14521 *48 4(CommentGraphic14656 *485 (CommentGraphic 14522 14657 uid 9737,0 14523 14658 shape (PolyLine2D … … 14538 14673 oxt "8000,7000,9000,7000" 14539 14674 ) 14540 *48 5(CommentGraphic14675 *486 (CommentGraphic 14541 14676 uid 9739,0 14542 14677 shape (PolyLine2D … … 14579 14714 stg "VerticalLayoutStrategy" 14580 14715 textVec [ 14581 *48 6(Text14716 *487 (Text 14582 14717 uid 9713,0 14583 14718 va (VaSet … … 14589 14724 blo "28350,9900" 14590 14725 ) 14591 *48 7(Text14726 *488 (Text 14592 14727 uid 9714,0 14593 14728 va (VaSet … … 14598 14733 blo "28350,10900" 14599 14734 ) 14600 *48 8(Text14735 *489 (Text 14601 14736 uid 9715,0 14602 14737 va (VaSet … … 14643 14778 ) 14644 14779 ) 14645 *4 89(PortIoOut14780 *490 (PortIoOut 14646 14781 uid 9761,0 14647 14782 shape (CompositeShape … … 14687 14822 ) 14688 14823 ) 14689 *49 0(Net14824 *491 (Net 14690 14825 uid 9767,0 14691 14826 decl (Decl … … 14701 14836 ) 14702 14837 xt "-103000,28600,-84500,29400" 14703 st "CLK50_OUT : std_logic" 14704 ) 14705 ) 14706 *491 (PortIoOut 14838 st "CLK50_OUT : std_logic 14839 " 14840 ) 14841 ) 14842 *492 (PortIoOut 14707 14843 uid 9777,0 14708 14844 shape (CompositeShape … … 14748 14884 ) 14749 14885 ) 14750 *49 2(Net14886 *493 (Net 14751 14887 uid 9783,0 14752 14888 decl (Decl … … 14762 14898 ) 14763 14899 xt "-103000,27000,-84500,27800" 14764 st "CLK25_OUT : std_logic" 14765 ) 14766 ) 14767 *493 (PortIoOut 14900 st "CLK25_OUT : std_logic 14901 " 14902 ) 14903 ) 14904 *494 (PortIoOut 14768 14905 uid 9793,0 14769 14906 shape (CompositeShape … … 14809 14946 ) 14810 14947 ) 14811 *49 4(Net14948 *495 (Net 14812 14949 uid 9799,0 14813 14950 decl (Decl … … 14823 14960 ) 14824 14961 xt "-103000,27800,-84500,28600" 14825 st "CLK25_PSOUT : std_logic" 14826 ) 14827 ) 14828 *495 (Net 14962 st "CLK25_PSOUT : std_logic 14963 " 14964 ) 14965 ) 14966 *496 (Net 14829 14967 uid 9941,0 14830 14968 decl (Decl … … 14842 14980 font "Courier New,8,0" 14843 14981 ) 14844 xt "-103000,93800,-35500,94600" 14845 st "SIGNAL ps_reset : std_logic := '0' -- pulse this to reset the variable phase shift" 14846 ) 14847 ) 14848 *496 (Net 14982 xt "-103000,94600,-35500,95400" 14983 st "SIGNAL ps_reset : std_logic := '0' -- pulse this to reset the variable phase shift 14984 " 14985 ) 14986 ) 14987 *497 (Net 14849 14988 uid 9949,0 14850 14989 decl (Decl … … 14860 14999 font "Courier New,8,0" 14861 15000 ) 14862 xt "-103000,107400,-59500,108200" 14863 st "SIGNAL srclk_enable : std_logic := '0'" 14864 ) 14865 ) 14866 *497 (MWC 15001 xt "-103000,108200,-59500,109000" 15002 st "SIGNAL srclk_enable : std_logic := '0' 15003 " 15004 ) 15005 ) 15006 *498 (MWC 14867 15007 uid 9957,0 14868 15008 optionalChildren [ 14869 *49 8(CptPort15009 *499 (CptPort 14870 15010 uid 9966,0 14871 15011 optionalChildren [ 14872 * 499(Line15012 *500 (Line 14873 15013 uid 9970,0 14874 15014 layer 5 … … 14883 15023 ] 14884 15024 ) 14885 *50 0(Property15025 *501 (Property 14886 15026 uid 9971,0 14887 15027 pclass "_MW_GEOM_" … … 14927 15067 ) 14928 15068 ) 14929 *50 1(CptPort15069 *502 (CptPort 14930 15070 uid 9972,0 14931 15071 optionalChildren [ 14932 *50 2(Line15072 *503 (Line 14933 15073 uid 9976,0 14934 15074 layer 5 … … 14981 15121 ) 14982 15122 ) 14983 *50 3(CptPort15123 *504 (CptPort 14984 15124 uid 9977,0 14985 15125 optionalChildren [ 14986 *50 4(Line15126 *505 (Line 14987 15127 uid 9981,0 14988 15128 layer 5 … … 15035 15175 ) 15036 15176 ) 15037 *50 5(CommentGraphic15177 *506 (CommentGraphic 15038 15178 uid 9982,0 15039 15179 optionalChildren [ 15040 *50 6(Property15180 *507 (Property 15041 15181 uid 9984,0 15042 15182 pclass "_MW_GEOM_" … … 15062 15202 oxt "11000,10000,11000,10000" 15063 15203 ) 15064 *50 7(CommentGraphic15204 *508 (CommentGraphic 15065 15205 uid 9985,0 15066 15206 optionalChildren [ 15067 *50 8(Property15207 *509 (Property 15068 15208 uid 9987,0 15069 15209 pclass "_MW_GEOM_" … … 15089 15229 oxt "11000,6000,11000,6000" 15090 15230 ) 15091 *5 09(Grouping15231 *510 (Grouping 15092 15232 uid 9988,0 15093 15233 optionalChildren [ 15094 *51 0(CommentGraphic15234 *511 (CommentGraphic 15095 15235 uid 9990,0 15096 15236 shape (PolyLine2D … … 15113 15253 oxt "9000,6000,11000,10000" 15114 15254 ) 15115 *51 1(CommentGraphic15255 *512 (CommentGraphic 15116 15256 uid 9992,0 15117 15257 shape (Arc2D … … 15166 15306 stg "VerticalLayoutStrategy" 15167 15307 textVec [ 15168 *51 2(Text15308 *513 (Text 15169 15309 uid 9960,0 15170 15310 va (VaSet … … 15176 15316 blo "-29500,53300" 15177 15317 ) 15178 *51 3(Text15318 *514 (Text 15179 15319 uid 9961,0 15180 15320 va (VaSet … … 15185 15325 blo "-29500,54300" 15186 15326 ) 15187 *51 4(Text15327 *515 (Text 15188 15328 uid 9962,0 15189 15329 va (VaSet … … 15230 15370 ) 15231 15371 ) 15232 *51 5(Net15372 *516 (Net 15233 15373 uid 10008,0 15234 15374 decl (Decl … … 15245 15385 ) 15246 15386 xt "-103000,61800,-59500,62600" 15247 st "SIGNAL SRCLK1 : std_logic := '0'" 15248 ) 15249 ) 15250 *516 (Net 15387 st "SIGNAL SRCLK1 : std_logic := '0' 15388 " 15389 ) 15390 ) 15391 *517 (Net 15251 15392 uid 10192,0 15252 15393 decl (Decl … … 15267 15408 xt "-103000,71400,-59500,73000" 15268 15409 st "-- -- 15269 SIGNAL config_rw_ack : std_logic := '0'" 15270 ) 15271 ) 15272 *517 (Net 15410 SIGNAL config_rw_ack : std_logic := '0' 15411 " 15412 ) 15413 ) 15414 *518 (Net 15273 15415 uid 10200,0 15274 15416 decl (Decl … … 15289 15431 xt "-103000,73000,-59500,74600" 15290 15432 st "-- -- 15291 SIGNAL config_rw_ready : std_logic := '0'" 15292 ) 15293 ) 15294 *518 (Net 15433 SIGNAL config_rw_ready : std_logic := '0' 15434 " 15435 ) 15436 ) 15437 *519 (Net 15295 15438 uid 10264,0 15296 15439 decl (Decl … … 15305 15448 font "Courier New,8,0" 15306 15449 ) 15307 xt "-103000,101800,-80500,102600" 15308 st "SIGNAL s_trigger : std_logic" 15309 ) 15310 ) 15311 *519 (Net 15450 xt "-103000,102600,-80500,103400" 15451 st "SIGNAL s_trigger : std_logic 15452 " 15453 ) 15454 ) 15455 *520 (Net 15312 15456 uid 10296,0 15313 15457 decl (Decl … … 15322 15466 font "Courier New,8,0" 15323 15467 ) 15324 xt "-103000,109800,-80500,110600" 15325 st "SIGNAL start_srin_write_8b : std_logic" 15326 ) 15327 ) 15328 *520 (Net 15468 xt "-103000,110600,-80500,111400" 15469 st "SIGNAL start_srin_write_8b : std_logic 15470 " 15471 ) 15472 ) 15473 *521 (Net 15329 15474 uid 10302,0 15330 15475 decl (Decl … … 15340 15485 font "Courier New,8,0" 15341 15486 ) 15342 xt "-103000,108200,-59500,109000" 15343 st "SIGNAL srin_write_ack : std_logic := '0'" 15344 ) 15345 ) 15346 *521 (Net 15487 xt "-103000,109000,-59500,109800" 15488 st "SIGNAL srin_write_ack : std_logic := '0' 15489 " 15490 ) 15491 ) 15492 *522 (Net 15347 15493 uid 10308,0 15348 15494 decl (Decl … … 15358 15504 font "Courier New,8,0" 15359 15505 ) 15360 xt "-103000,109000,-59500,109800" 15361 st "SIGNAL srin_write_ready : std_logic := '0'" 15362 ) 15363 ) 15364 *522 (Net 15506 xt "-103000,109800,-59500,110600" 15507 st "SIGNAL srin_write_ready : std_logic := '0' 15508 " 15509 ) 15510 ) 15511 *523 (Net 15365 15512 uid 10314,0 15366 15513 decl (Decl … … 15377 15524 font "Courier New,8,0" 15378 15525 ) 15379 xt "-103000,88200,-53500,89000" 15380 st "SIGNAL drs_srin_data : std_logic_vector(7 downto 0) := (others => '0')" 15381 ) 15382 ) 15383 *523 (Net 15526 xt "-103000,89000,-53500,89800" 15527 st "SIGNAL drs_srin_data : std_logic_vector(7 downto 0) := (others => '0') 15528 " 15529 ) 15530 ) 15531 *524 (Net 15384 15532 uid 10320,0 15385 15533 decl (Decl … … 15396 15544 ) 15397 15545 xt "-103000,39000,-63000,39800" 15398 st "SRIN_out : std_logic := '0'" 15399 ) 15400 ) 15401 *524 (PortIoOut 15546 st "SRIN_out : std_logic := '0' 15547 " 15548 ) 15549 ) 15550 *525 (PortIoOut 15402 15551 uid 10328,0 15403 15552 shape (CompositeShape … … 15444 15593 ) 15445 15594 ) 15446 *52 5(MWC15595 *526 (MWC 15447 15596 uid 10380,0 15448 15597 optionalChildren [ 15449 *52 6(CptPort15598 *527 (CptPort 15450 15599 uid 10344,0 15451 15600 optionalChildren [ 15452 *52 7(Line15601 *528 (Line 15453 15602 uid 10348,0 15454 15603 layer 5 … … 15502 15651 ) 15503 15652 ) 15504 *52 8(CptPort15653 *529 (CptPort 15505 15654 uid 10349,0 15506 15655 optionalChildren [ 15507 *5 29(Property15656 *530 (Property 15508 15657 uid 10353,0 15509 15658 pclass "_MW_GEOM_" … … 15511 15660 ptn "String" 15512 15661 ) 15513 *53 0(Line15662 *531 (Line 15514 15663 uid 10354,0 15515 15664 layer 5 … … 15565 15714 ) 15566 15715 ) 15567 *53 1(CptPort15716 *532 (CptPort 15568 15717 uid 10355,0 15569 15718 optionalChildren [ 15570 *53 2(Line15719 *533 (Line 15571 15720 uid 10359,0 15572 15721 layer 5 … … 15618 15767 ) 15619 15768 ) 15620 *53 3(CommentGraphic15769 *534 (CommentGraphic 15621 15770 uid 10360,0 15622 15771 shape (Arc2D … … 15639 15788 oxt "7000,6003,11000,8000" 15640 15789 ) 15641 *53 4(CommentGraphic15790 *535 (CommentGraphic 15642 15791 uid 10362,0 15643 15792 shape (Arc2D … … 15660 15809 oxt "6996,8005,11000,10000" 15661 15810 ) 15662 *53 5(Grouping15811 *536 (Grouping 15663 15812 uid 10364,0 15664 15813 optionalChildren [ 15665 *53 6(CommentGraphic15814 *537 (CommentGraphic 15666 15815 uid 10366,0 15667 15816 optionalChildren [ 15668 *53 7(Property15817 *538 (Property 15669 15818 uid 10368,0 15670 15819 pclass "_MW_GEOM_" … … 15697 15846 oxt "7000,6000,11000,9998" 15698 15847 ) 15699 *53 8(CommentGraphic15848 *539 (CommentGraphic 15700 15849 uid 10369,0 15701 15850 optionalChildren [ 15702 *5 39(Property15851 *540 (Property 15703 15852 uid 10371,0 15704 15853 pclass "_MW_GEOM_" … … 15742 15891 oxt "7000,6000,11000,10000" 15743 15892 ) 15744 *54 0(CommentGraphic15893 *541 (CommentGraphic 15745 15894 uid 10372,0 15746 15895 shape (PolyLine2D … … 15761 15910 oxt "11000,8000,11000,8000" 15762 15911 ) 15763 *54 1(CommentGraphic15912 *542 (CommentGraphic 15764 15913 uid 10374,0 15765 15914 optionalChildren [ 15766 *54 2(Property15915 *543 (Property 15767 15916 uid 10376,0 15768 15917 pclass "_MW_GEOM_" … … 15788 15937 oxt "7000,6000,7000,6000" 15789 15938 ) 15790 *54 3(CommentGraphic15939 *544 (CommentGraphic 15791 15940 uid 10377,0 15792 15941 optionalChildren [ 15793 *54 4(Property15942 *545 (Property 15794 15943 uid 10379,0 15795 15944 pclass "_MW_GEOM_" … … 15834 15983 stg "VerticalLayoutStrategy" 15835 15984 textVec [ 15836 *54 5(Text15985 *546 (Text 15837 15986 uid 10383,0 15838 15987 va (VaSet … … 15844 15993 blo "-28500,70300" 15845 15994 ) 15846 *54 6(Text15995 *547 (Text 15847 15996 uid 10384,0 15848 15997 va (VaSet … … 15853 16002 blo "-28500,71300" 15854 16003 ) 15855 *54 7(Text16004 *548 (Text 15856 16005 uid 10385,0 15857 16006 va (VaSet … … 15898 16047 ) 15899 16048 ) 15900 *54 8(Net16049 *549 (Net 15901 16050 uid 10449,0 15902 16051 decl (Decl … … 15913 16062 font "Courier New,8,0" 15914 16063 ) 15915 xt "-103000,111400,-80500,112200" 15916 st "SIGNAL trigger_out : std_logic" 15917 ) 15918 ) 15919 *549 (Net 16064 xt "-103000,112200,-80500,113000" 16065 st "SIGNAL trigger_out : std_logic 16066 " 16067 ) 16068 ) 16069 *550 (Net 15920 16070 uid 10465,0 15921 16071 lang 2 … … 15935 16085 font "Courier New,8,0" 15936 16086 ) 15937 xt "-103000,9 8600,-59500,100200"16087 xt "-103000,99400,-59500,101000" 15938 16088 st "-- -- 15939 SIGNAL ram_write_ready_ack : std_logic := '0'" 15940 ) 15941 ) 15942 *550 (Net 16089 SIGNAL ram_write_ready_ack : std_logic := '0' 16090 " 16091 ) 16092 ) 16093 *551 (Net 15943 16094 uid 10627,0 15944 16095 decl (Decl … … 15953 16104 font "Courier New,8,0" 15954 16105 ) 15955 xt "-103000,105800,-80500,106600" 15956 st "SIGNAL socks_connected : std_logic" 15957 ) 15958 ) 15959 *551 (Net 16106 xt "-103000,106600,-80500,107400" 16107 st "SIGNAL socks_connected : std_logic 16108 " 16109 ) 16110 ) 16111 *552 (Net 15960 16112 uid 10635,0 15961 16113 decl (Decl … … 15970 16122 font "Courier New,8,0" 15971 16123 ) 15972 xt "-103000,106600,-80500,107400" 15973 st "SIGNAL socks_waiting : std_logic" 15974 ) 15975 ) 15976 *552 (Net 16124 xt "-103000,107400,-80500,108200" 16125 st "SIGNAL socks_waiting : std_logic 16126 " 16127 ) 16128 ) 16129 *553 (Net 15977 16130 uid 10721,0 15978 16131 decl (Decl … … 15988 16141 ) 15989 16142 xt "-103000,45400,-84500,46200" 15990 st "green : std_logic" 15991 ) 15992 ) 15993 *553 (PortIoOut 16143 st "green : std_logic 16144 " 16145 ) 16146 ) 16147 *554 (PortIoOut 15994 16148 uid 10729,0 15995 16149 shape (CompositeShape … … 16035 16189 ) 16036 16190 ) 16037 *55 4(Net16191 *555 (Net 16038 16192 uid 10735,0 16039 16193 decl (Decl … … 16049 16203 ) 16050 16204 xt "-103000,41400,-84500,42200" 16051 st "amber : std_logic" 16052 ) 16053 ) 16054 *555 (PortIoOut 16205 st "amber : std_logic 16206 " 16207 ) 16208 ) 16209 *556 (PortIoOut 16055 16210 uid 10743,0 16056 16211 shape (CompositeShape … … 16096 16251 ) 16097 16252 ) 16098 *55 6(Net16253 *557 (Net 16099 16254 uid 10749,0 16100 16255 decl (Decl … … 16110 16265 ) 16111 16266 xt "-103000,49400,-84500,50200" 16112 st "red : std_logic" 16113 ) 16114 ) 16115 *557 (PortIoOut 16267 st "red : std_logic 16268 " 16269 ) 16270 ) 16271 *558 (PortIoOut 16116 16272 uid 10757,0 16117 16273 shape (CompositeShape … … 16157 16313 ) 16158 16314 ) 16159 *55 8(SaComponent16315 *559 (SaComponent 16160 16316 uid 11209,0 16161 16317 optionalChildren [ 16162 *5 59(CptPort16318 *560 (CptPort 16163 16319 uid 11181,0 16164 16320 ps "OnEdgeStrategy" … … 16193 16349 ) 16194 16350 ) 16195 *56 0(CptPort16351 *561 (CptPort 16196 16352 uid 11185,0 16197 16353 ps "OnEdgeStrategy" … … 16228 16384 ) 16229 16385 ) 16230 *56 1(CptPort16386 *562 (CptPort 16231 16387 uid 11189,0 16232 16388 ps "OnEdgeStrategy" … … 16263 16419 ) 16264 16420 ) 16265 *56 2(CptPort16421 *563 (CptPort 16266 16422 uid 11193,0 16267 16423 ps "OnEdgeStrategy" … … 16298 16454 ) 16299 16455 ) 16300 *56 3(CptPort16456 *564 (CptPort 16301 16457 uid 11197,0 16302 16458 ps "OnEdgeStrategy" … … 16331 16487 ) 16332 16488 ) 16333 *56 4(CptPort16489 *565 (CptPort 16334 16490 uid 11201,0 16335 16491 ps "OnEdgeStrategy" … … 16364 16520 ) 16365 16521 ) 16366 *56 5(CptPort16522 *566 (CptPort 16367 16523 uid 11205,0 16368 16524 ps "OnEdgeStrategy" … … 16414 16570 stg "VerticalLayoutStrategy" 16415 16571 textVec [ 16416 *56 6(Text16572 *567 (Text 16417 16573 uid 11212,0 16418 16574 va (VaSet … … 16424 16580 tm "BdLibraryNameMgr" 16425 16581 ) 16426 *56 7(Text16582 *568 (Text 16427 16583 uid 11213,0 16428 16584 va (VaSet … … 16434 16590 tm "CptNameMgr" 16435 16591 ) 16436 *56 8(Text16592 *569 (Text 16437 16593 uid 11214,0 16438 16594 va (VaSet … … 16459 16615 st "HEARTBEAT_PWM_DIVIDER = 50000 ( integer ) -- 10kHz @ 50 MHz 16460 16616 MAX_DELAY = 100 ( integer ) 16461 WAITING_DIVIDER = 50000000 ( integer ) -- 1Hz @ 50 MHz 16462 " 16617 WAITING_DIVIDER = 50000000 ( integer ) -- 1Hz @ 50 MHz " 16463 16618 ) 16464 16619 header "" … … 16502 16657 archFileType "UNKNOWN" 16503 16658 ) 16504 *569 (Wire 16659 *570 (Net 16660 uid 11403,0 16661 decl (Decl 16662 n "drs_readout_started" 16663 t "std_logic" 16664 o 121 16665 suid 252,0 16666 ) 16667 declText (MLText 16668 uid 11404,0 16669 va (VaSet 16670 font "Courier New,8,0" 16671 ) 16672 xt "-103000,87400,-80500,88200" 16673 st "SIGNAL drs_readout_started : std_logic 16674 " 16675 ) 16676 ) 16677 *571 (Wire 16505 16678 uid 322,0 16506 16679 shape (OrthoPolyLine … … 16518 16691 ) 16519 16692 start &26 16520 end &32 616693 end &327 16521 16694 sat 32 16522 16695 eat 32 … … 16541 16714 on &2 16542 16715 ) 16543 *57 0(Wire16716 *572 (Wire 16544 16717 uid 328,0 16545 16718 shape (OrthoPolyLine … … 16557 16730 ) 16558 16731 start &25 16559 end &32 516732 end &326 16560 16733 sat 32 16561 16734 eat 32 … … 16580 16753 on &3 16581 16754 ) 16582 *57 1(Wire16755 *573 (Wire 16583 16756 uid 334,0 16584 16757 shape (OrthoPolyLine … … 16596 16769 ) 16597 16770 start &24 16598 end &32 416771 end &325 16599 16772 sat 32 16600 16773 eat 32 … … 16619 16792 on &4 16620 16793 ) 16621 *57 2(Wire16794 *574 (Wire 16622 16795 uid 364,0 16623 16796 shape (OrthoPolyLine … … 16635 16808 ] 16636 16809 ) 16637 start &8 416638 end &32 816810 start &85 16811 end &329 16639 16812 sat 32 16640 16813 eat 32 … … 16659 16832 on &5 16660 16833 ) 16661 *57 3(Wire16834 *575 (Wire 16662 16835 uid 370,0 16663 16836 shape (OrthoPolyLine … … 16675 16848 ] 16676 16849 ) 16677 start &8 316678 end &3 2916850 start &84 16851 end &330 16679 16852 sat 32 16680 16853 eat 32 … … 16699 16872 on &6 16700 16873 ) 16701 *57 4(Wire16874 *576 (Wire 16702 16875 uid 376,0 16703 16876 shape (OrthoPolyLine … … 16712 16885 ] 16713 16886 ) 16714 start &7 416887 start &75 16715 16888 end &14 16716 16889 sat 32 … … 16737 16910 on &7 16738 16911 ) 16739 *57 5(Wire16912 *577 (Wire 16740 16913 uid 384,0 16741 16914 shape (OrthoPolyLine … … 16751 16924 ] 16752 16925 ) 16753 start &7 516926 start &76 16754 16927 end &15 16755 16928 sat 32 … … 16777 16950 on &8 16778 16951 ) 16779 *57 6(Wire16952 *578 (Wire 16780 16953 uid 392,0 16781 16954 shape (OrthoPolyLine … … 16791 16964 ] 16792 16965 ) 16793 start &7 616966 start &77 16794 16967 end &16 16795 16968 sat 32 … … 16817 16990 on &9 16818 16991 ) 16819 *57 7(Wire16992 *579 (Wire 16820 16993 uid 400,0 16821 16994 shape (OrthoPolyLine … … 16830 17003 ] 16831 17004 ) 16832 start &7 717005 start &78 16833 17006 end &17 16834 17007 sat 32 … … 16855 17028 on &10 16856 17029 ) 16857 *5 78(Wire17030 *580 (Wire 16858 17031 uid 408,0 16859 17032 shape (OrthoPolyLine … … 16868 17041 ] 16869 17042 ) 16870 start &7 817043 start &79 16871 17044 end &18 16872 17045 sat 32 … … 16893 17066 on &11 16894 17067 ) 16895 *5 79(Wire17068 *581 (Wire 16896 17069 uid 424,0 16897 17070 shape (OrthoPolyLine … … 16906 17079 ] 16907 17080 ) 16908 start & 7917081 start &80 16909 17082 end &20 16910 17083 sat 32 … … 16931 17104 on &12 16932 17105 ) 16933 *58 0(Wire17106 *582 (Wire 16934 17107 uid 432,0 16935 17108 shape (OrthoPolyLine … … 16945 17118 ) 16946 17119 start &21 16947 end &8 017120 end &81 16948 17121 sat 32 16949 17122 eat 32 … … 16969 17142 on &13 16970 17143 ) 16971 *58 1(Wire17144 *583 (Wire 16972 17145 uid 1411,0 16973 17146 shape (OrthoPolyLine … … 16983 17156 ] 16984 17157 ) 16985 start &16 417158 start &165 16986 17159 end &28 16987 17160 sat 32 … … 17006 17179 ) 17007 17180 ) 17008 on & 6917009 ) 17010 *58 2(Wire17181 on &70 17182 ) 17183 *584 (Wire 17011 17184 uid 1425,0 17012 17185 shape (OrthoPolyLine … … 17021 17194 ] 17022 17195 ) 17023 start &7 117024 end &52 617196 start &72 17197 end &527 17025 17198 es 0 17026 17199 sat 32 … … 17045 17218 ) 17046 17219 ) 17047 on &7 017048 ) 17049 *58 3(Wire17220 on &71 17221 ) 17222 *585 (Wire 17050 17223 uid 1682,0 17051 17224 shape (OrthoPolyLine … … 17061 17234 ] 17062 17235 ) 17063 start &16 517236 start &166 17064 17237 end &31 17065 17238 sat 32 … … 17084 17257 ) 17085 17258 ) 17086 on &11 417087 ) 17088 *58 4(Wire17259 on &115 17260 ) 17261 *586 (Wire 17089 17262 uid 1983,0 17090 17263 shape (OrthoPolyLine … … 17102 17275 ] 17103 17276 ) 17104 start &11 617277 start &117 17105 17278 end &29 17106 17279 sat 32 … … 17123 17296 ) 17124 17297 ) 17125 on &12 217126 ) 17127 *58 5(Wire17298 on &123 17299 ) 17300 *587 (Wire 17128 17301 uid 2299,0 17129 17302 shape (OrthoPolyLine … … 17141 17314 ] 17142 17315 ) 17143 start &12 517316 start &126 17144 17317 end &27 17145 17318 sat 32 … … 17163 17336 ) 17164 17337 ) 17165 on &12 317166 ) 17167 *58 6(Wire17338 on &124 17339 ) 17340 *588 (Wire 17168 17341 uid 2470,0 17169 17342 shape (OrthoPolyLine … … 17178 17351 ] 17179 17352 ) 17180 start &13 217181 end &8 617353 start &133 17354 end &87 17182 17355 sat 32 17183 17356 eat 32 … … 17199 17372 ) 17200 17373 ) 17201 on &14 717202 ) 17203 *58 7(Wire17374 on &148 17375 ) 17376 *589 (Wire 17204 17377 uid 2476,0 17205 17378 shape (OrthoPolyLine … … 17214 17387 ] 17215 17388 ) 17216 start &13 517217 end &8 517389 start &136 17390 end &86 17218 17391 sat 32 17219 17392 eat 32 … … 17235 17408 ) 17236 17409 ) 17237 on &14 817238 ) 17239 *5 88(Wire17410 on &149 17411 ) 17412 *590 (Wire 17240 17413 uid 2482,0 17241 17414 shape (OrthoPolyLine … … 17251 17424 ] 17252 17425 ) 17253 start &13 817254 end &8 117426 start &139 17427 end &82 17255 17428 sat 32 17256 17429 eat 32 … … 17273 17446 ) 17274 17447 ) 17275 on &1 4917276 ) 17277 *5 89(Wire17448 on &150 17449 ) 17450 *591 (Wire 17278 17451 uid 2488,0 17279 17452 shape (OrthoPolyLine … … 17289 17462 ] 17290 17463 ) 17291 start &13 417292 end &8 217464 start &135 17465 end &83 17293 17466 sat 32 17294 17467 eat 32 … … 17311 17484 ) 17312 17485 ) 17313 on &15 017314 ) 17315 *59 0(Wire17486 on &151 17487 ) 17488 *592 (Wire 17316 17489 uid 2494,0 17317 17490 shape (OrthoPolyLine … … 17327 17500 ] 17328 17501 ) 17329 start &13 317330 end &8 717502 start &134 17503 end &88 17331 17504 sat 32 17332 17505 eat 32 … … 17349 17522 ) 17350 17523 ) 17351 on &15 117352 ) 17353 *59 1(Wire17524 on &152 17525 ) 17526 *593 (Wire 17354 17527 uid 2500,0 17355 17528 shape (OrthoPolyLine … … 17364 17537 ] 17365 17538 ) 17366 start &13 617367 end &8 817539 start &137 17540 end &89 17368 17541 sat 32 17369 17542 eat 32 … … 17385 17558 ) 17386 17559 ) 17387 on &15 217388 ) 17389 *59 2(Wire17560 on &153 17561 ) 17562 *594 (Wire 17390 17563 uid 2506,0 17391 17564 shape (OrthoPolyLine … … 17400 17573 ] 17401 17574 ) 17402 start &13 717403 end & 8917575 start &138 17576 end &90 17404 17577 sat 32 17405 17578 eat 32 … … 17421 17594 ) 17422 17595 ) 17423 on &15 317424 ) 17425 *59 3(Wire17596 on &154 17597 ) 17598 *595 (Wire 17426 17599 uid 2576,0 17427 17600 shape (OrthoPolyLine … … 17439 17612 ) 17440 17613 start &32 17441 end &1 2917614 end &130 17442 17615 sat 32 17443 17616 eat 32 … … 17459 17632 ) 17460 17633 ) 17461 on &15 417462 ) 17463 *59 4(Wire17634 on &155 17635 ) 17636 *596 (Wire 17464 17637 uid 2582,0 17465 17638 shape (OrthoPolyLine … … 17477 17650 ) 17478 17651 start &33 17479 end &13 017652 end &131 17480 17653 sat 32 17481 17654 eat 32 … … 17497 17670 ) 17498 17671 ) 17499 on &15 517500 ) 17501 *59 5(Wire17672 on &156 17673 ) 17674 *597 (Wire 17502 17675 uid 2588,0 17503 17676 shape (OrthoPolyLine … … 17515 17688 ) 17516 17689 start &52 17517 end &12 817690 end &129 17518 17691 ss 0 17519 17692 sat 32 … … 17536 17709 ) 17537 17710 ) 17538 on &15 617539 ) 17540 *59 6(Wire17711 on &157 17712 ) 17713 *598 (Wire 17541 17714 uid 2594,0 17542 17715 shape (OrthoPolyLine … … 17554 17727 ) 17555 17728 start &48 17556 end &12 717729 end &128 17557 17730 sat 32 17558 17731 eat 32 … … 17574 17747 ) 17575 17748 ) 17576 on &15 717577 ) 17578 *59 7(Wire17749 on &158 17750 ) 17751 *599 (Wire 17579 17752 uid 2600,0 17580 17753 shape (OrthoPolyLine … … 17592 17765 ) 17593 17766 start &34 17594 end &13 117767 end &132 17595 17768 sat 32 17596 17769 eat 32 … … 17612 17785 ) 17613 17786 ) 17614 on &15 817615 ) 17616 * 598(Wire17787 on &159 17788 ) 17789 *600 (Wire 17617 17790 uid 2642,0 17618 17791 shape (OrthoPolyLine … … 17631 17804 ) 17632 17805 start &36 17633 end &14 017806 end &141 17634 17807 sat 32 17635 17808 eat 32 … … 17652 17825 ) 17653 17826 ) 17654 on &1 5917655 ) 17656 * 599(Wire17827 on &160 17828 ) 17829 *601 (Wire 17657 17830 uid 2778,0 17658 17831 shape (OrthoPolyLine … … 17668 17841 ) 17669 17842 start &37 17670 end &16 117843 end &162 17671 17844 sat 32 17672 17845 eat 32 … … 17690 17863 ) 17691 17864 ) 17692 on &16 017693 ) 17694 *60 0(Wire17865 on &161 17866 ) 17867 *602 (Wire 17695 17868 uid 2786,0 17696 17869 shape (OrthoPolyLine … … 17706 17879 ] 17707 17880 ) 17708 start &16 217709 end &26 317881 start &163 17882 end &264 17710 17883 sat 32 17711 17884 eat 32 … … 17730 17903 ) 17731 17904 ) 17732 on &18 317733 ) 17734 *60 1(Wire17905 on &184 17906 ) 17907 *603 (Wire 17735 17908 uid 3888,0 17736 17909 optionalChildren [ 17737 *60 2(BdJunction17910 *604 (BdJunction 17738 17911 uid 4230,0 17739 17912 ps "OnConnectorStrategy" … … 17747 17920 ) 17748 17921 ) 17749 *60 3(BdJunction17922 *605 (BdJunction 17750 17923 uid 4244,0 17751 17924 ps "OnConnectorStrategy" … … 17759 17932 ) 17760 17933 ) 17761 *60 4(BdJunction17934 *606 (BdJunction 17762 17935 uid 9677,0 17763 17936 ps "OnConnectorStrategy" … … 17786 17959 ] 17787 17960 ) 17788 start &38 117789 end &7 317961 start &382 17962 end &74 17790 17963 sat 32 17791 17964 eat 32 … … 17808 17981 ) 17809 17982 ) 17810 on &1 7917811 ) 17812 *60 5(Wire17983 on &180 17984 ) 17985 *607 (Wire 17813 17986 uid 3984,0 17814 17987 optionalChildren [ 17815 *60 6(BdJunction17988 *608 (BdJunction 17816 17989 uid 9751,0 17817 17990 ps "OnConnectorStrategy" … … 17840 18013 ] 17841 18014 ) 17842 start &17 817843 end &39 318015 start &179 18016 end &394 17844 18017 sat 32 17845 18018 eat 32 … … 17863 18036 ) 17864 18037 ) 17865 on &17 717866 ) 17867 *60 7(Wire18038 on &178 18039 ) 18040 *609 (Wire 17868 18041 uid 4042,0 17869 18042 shape (OrthoPolyLine … … 17879 18052 ) 17880 18053 start &1 17881 end &38 318054 end &384 17882 18055 sat 32 17883 18056 eat 32 … … 17901 18074 ) 17902 18075 ) 17903 on &18 217904 ) 17905 *6 08(Wire18076 on &183 18077 ) 18078 *610 (Wire 17906 18079 uid 4226,0 17907 18080 shape (OrthoPolyLine … … 17918 18091 ] 17919 18092 ) 17920 start &18 117921 end &60 218093 start &182 18094 end &604 17922 18095 sat 32 17923 18096 eat 32 … … 17941 18114 ) 17942 18115 ) 17943 on &1 7917944 ) 17945 *6 09(Wire18116 on &180 18117 ) 18118 *611 (Wire 17946 18119 uid 4240,0 17947 18120 shape (OrthoPolyLine … … 17958 18131 ] 17959 18132 ) 17960 start &32 717961 end &60 318133 start &328 18134 end &605 17962 18135 sat 32 17963 18136 eat 32 … … 17980 18153 ) 17981 18154 ) 17982 on &1 7917983 ) 17984 *61 0(Wire18155 on &180 18156 ) 18157 *612 (Wire 17985 18158 uid 4272,0 17986 18159 shape (OrthoPolyLine … … 17995 18168 ] 17996 18169 ) 17997 start &18 517998 end &26 018170 start &186 18171 end &261 17999 18172 sat 32 18000 18173 eat 32 … … 18018 18191 ) 18019 18192 ) 18020 on &18 418021 ) 18022 *61 1(Wire18193 on &185 18194 ) 18195 *613 (Wire 18023 18196 uid 4401,0 18024 18197 shape (OrthoPolyLine … … 18036 18209 ) 18037 18210 start &40 18038 end &20 418211 end &205 18039 18212 sat 32 18040 18213 eat 32 … … 18056 18229 ) 18057 18230 ) 18058 on &18 618059 ) 18060 *61 2(Wire18231 on &187 18232 ) 18233 *614 (Wire 18061 18234 uid 4407,0 18062 18235 shape (OrthoPolyLine … … 18074 18247 ) 18075 18248 start &44 18076 end &21 018249 end &211 18077 18250 sat 32 18078 18251 eat 32 … … 18094 18267 ) 18095 18268 ) 18096 on &18 718097 ) 18098 *61 3(Wire18269 on &188 18270 ) 18271 *615 (Wire 18099 18272 uid 4419,0 18100 18273 shape (OrthoPolyLine … … 18112 18285 ) 18113 18286 start &42 18114 end &20 518287 end &206 18115 18288 sat 32 18116 18289 eat 32 … … 18132 18305 ) 18133 18306 ) 18134 on &18 818135 ) 18136 *61 4(Wire18307 on &189 18308 ) 18309 *616 (Wire 18137 18310 uid 4537,0 18138 18311 shape (OrthoPolyLine … … 18148 18321 ] 18149 18322 ) 18150 start &3 3918151 end &19 118323 start &340 18324 end &192 18152 18325 sat 32 18153 18326 eat 32 … … 18172 18345 ) 18173 18346 ) 18174 on &1 8918175 ) 18176 *61 5(Wire18347 on &190 18348 ) 18349 *617 (Wire 18177 18350 uid 4545,0 18178 18351 shape (OrthoPolyLine … … 18187 18360 ] 18188 18361 ) 18189 start &30 418190 end &19 218362 start &305 18363 end &193 18191 18364 sat 32 18192 18365 eat 32 … … 18209 18382 ) 18210 18383 ) 18211 on &19 018212 ) 18213 *61 6(Wire18384 on &191 18385 ) 18386 *618 (Wire 18214 18387 uid 4671,0 18215 18388 shape (OrthoPolyLine … … 18224 18397 ] 18225 18398 ) 18226 start &19 718227 end &20 618399 start &198 18400 end &207 18228 18401 sat 32 18229 18402 eat 32 … … 18247 18420 ) 18248 18421 ) 18249 on &19 318250 ) 18251 *61 7(Wire18422 on &194 18423 ) 18424 *619 (Wire 18252 18425 uid 4679,0 18253 18426 shape (OrthoPolyLine … … 18262 18435 ] 18263 18436 ) 18264 start &19 818265 end &20 718437 start &199 18438 end &208 18266 18439 sat 32 18267 18440 eat 32 … … 18285 18458 ) 18286 18459 ) 18287 on &19 418288 ) 18289 *6 18(Wire18460 on &195 18461 ) 18462 *620 (Wire 18290 18463 uid 4687,0 18291 18464 shape (OrthoPolyLine … … 18300 18473 ] 18301 18474 ) 18302 start & 19918303 end &20 818475 start &200 18476 end &209 18304 18477 sat 32 18305 18478 eat 32 … … 18323 18496 ) 18324 18497 ) 18325 on &19 518326 ) 18327 *6 19(Wire18498 on &196 18499 ) 18500 *621 (Wire 18328 18501 uid 4695,0 18329 18502 shape (OrthoPolyLine … … 18338 18511 ] 18339 18512 ) 18340 start &20 018341 end &2 0918513 start &201 18514 end &210 18342 18515 sat 32 18343 18516 eat 32 … … 18361 18534 ) 18362 18535 ) 18363 on &19 618364 ) 18365 *62 0(Wire18536 on &197 18537 ) 18538 *622 (Wire 18366 18539 uid 4743,0 18367 18540 shape (OrthoPolyLine … … 18378 18551 ] 18379 18552 ) 18380 start &21 118553 start &212 18381 18554 end &43 18382 18555 sat 32 … … 18399 18572 ) 18400 18573 ) 18401 on &20 118402 ) 18403 *62 1(Wire18574 on &202 18575 ) 18576 *623 (Wire 18404 18577 uid 4757,0 18405 18578 optionalChildren [ 18406 *62 2(BdJunction18579 *624 (BdJunction 18407 18580 uid 6076,0 18408 18581 ps "OnConnectorStrategy" … … 18431 18604 ] 18432 18605 ) 18433 start &20 318434 end *62 3(BdJunction18606 start &204 18607 end *625 (BdJunction 18435 18608 uid 6080,0 18436 18609 ps "OnConnectorStrategy" … … 18464 18637 ) 18465 18638 ) 18466 on &18 018467 ) 18468 *62 4(Wire18639 on &181 18640 ) 18641 *626 (Wire 18469 18642 uid 4948,0 18470 18643 shape (OrthoPolyLine … … 18479 18652 ] 18480 18653 ) 18481 start &21 218482 end &22 318654 start &213 18655 end &224 18483 18656 sat 32 18484 18657 eat 32 … … 18502 18675 ) 18503 18676 ) 18504 on &22 218505 ) 18506 *62 5(Wire18677 on &223 18678 ) 18679 *627 (Wire 18507 18680 uid 4962,0 18508 18681 shape (OrthoPolyLine … … 18517 18690 ] 18518 18691 ) 18519 start &49 818520 end &22 518692 start &499 18693 end &226 18521 18694 sat 32 18522 18695 eat 32 … … 18540 18713 ) 18541 18714 ) 18542 on &22 418543 ) 18544 *62 6(Wire18715 on &225 18716 ) 18717 *628 (Wire 18545 18718 uid 5090,0 18546 18719 shape (OrthoPolyLine … … 18558 18731 ] 18559 18732 ) 18560 start &9 218561 end &22 818733 start &93 18734 end &229 18562 18735 sat 32 18563 18736 eat 32 … … 18579 18752 ) 18580 18753 ) 18581 on &24 418582 ) 18583 *62 7(Wire18754 on &245 18755 ) 18756 *629 (Wire 18584 18757 uid 5098,0 18585 18758 shape (OrthoPolyLine … … 18594 18767 ] 18595 18768 ) 18596 start &2 2918769 start &230 18597 18770 sat 32 18598 18771 eat 16 … … 18613 18786 ) 18614 18787 ) 18615 on &24 518616 ) 18617 *6 28(Wire18788 on &246 18789 ) 18790 *630 (Wire 18618 18791 uid 5106,0 18619 18792 shape (OrthoPolyLine … … 18630 18803 ] 18631 18804 ) 18632 start &23 018633 end &9 318805 start &231 18806 end &94 18634 18807 sat 32 18635 18808 eat 32 … … 18650 18823 ) 18651 18824 ) 18652 on &24 618653 ) 18654 *6 29(Wire18825 on &247 18826 ) 18827 *631 (Wire 18655 18828 uid 5114,0 18656 18829 shape (OrthoPolyLine … … 18668 18841 ] 18669 18842 ) 18670 start &23 118671 end &9 418843 start &232 18844 end &95 18672 18845 sat 32 18673 18846 eat 32 … … 18689 18862 ) 18690 18863 ) 18691 on &24 718692 ) 18693 *63 0(Wire18864 on &248 18865 ) 18866 *632 (Wire 18694 18867 uid 5122,0 18695 18868 shape (OrthoPolyLine … … 18706 18879 ] 18707 18880 ) 18708 start &9 618709 end &23 318881 start &97 18882 end &234 18710 18883 sat 32 18711 18884 eat 32 … … 18726 18899 ) 18727 18900 ) 18728 on &24 818729 ) 18730 *63 1(Wire18901 on &249 18902 ) 18903 *633 (Wire 18731 18904 uid 5130,0 18732 18905 shape (OrthoPolyLine … … 18743 18916 ] 18744 18917 ) 18745 start &9 818746 end &23 518918 start &99 18919 end &236 18747 18920 sat 32 18748 18921 eat 32 … … 18763 18936 ) 18764 18937 ) 18765 on &2 4918766 ) 18767 *63 2(Wire18938 on &250 18939 ) 18940 *634 (Wire 18768 18941 uid 5138,0 18769 18942 optionalChildren [ 18770 *63 3(BdJunction18943 *635 (BdJunction 18771 18944 uid 5400,0 18772 18945 ps "OnConnectorStrategy" … … 18794 18967 ] 18795 18968 ) 18796 start &23 218969 start &233 18797 18970 end &35 18798 18971 ss 0 … … 18816 18989 ) 18817 18990 ) 18818 on &16 318819 ) 18820 *63 4(Wire18991 on &164 18992 ) 18993 *636 (Wire 18821 18994 uid 5146,0 18822 18995 shape (OrthoPolyLine … … 18831 19004 ] 18832 19005 ) 18833 start &23 418834 end &27 119006 start &235 19007 end &272 18835 19008 es 0 18836 19009 sat 32 … … 18852 19025 ) 18853 19026 ) 18854 on &25 018855 ) 18856 *63 5(Wire19027 on &251 19028 ) 19029 *637 (Wire 18857 19030 uid 5168,0 18858 19031 shape (OrthoPolyLine … … 18867 19040 ] 18868 19041 ) 18869 start &63 318870 end &1 3919042 start &635 19043 end &140 18871 19044 sat 32 18872 19045 eat 32 … … 18888 19061 ) 18889 19062 ) 18890 on &16 318891 ) 18892 *63 6(Wire19063 on &164 19064 ) 19065 *638 (Wire 18893 19066 uid 5184,0 18894 19067 shape (OrthoPolyLine … … 18905 19078 ] 18906 19079 ) 18907 start &23 619080 start &237 18908 19081 end &47 18909 19082 sat 32 … … 18925 19098 ) 18926 19099 ) 18927 on &25 118928 ) 18929 *63 7(Wire19100 on &252 19101 ) 19102 *639 (Wire 18930 19103 uid 5190,0 18931 19104 shape (OrthoPolyLine … … 18942 19115 ] 18943 19116 ) 18944 start &23 719117 start &238 18945 19118 end &46 18946 19119 sat 32 … … 18962 19135 ) 18963 19136 ) 18964 on &25 218965 ) 18966 *6 38(Wire19137 on &253 19138 ) 19139 *640 (Wire 18967 19140 uid 5222,0 18968 19141 shape (OrthoPolyLine … … 18978 19151 ] 18979 19152 ) 18980 start &9 019153 start &91 18981 19154 end &19 18982 19155 sat 32 … … 19002 19175 ) 19003 19176 ) 19004 on &25 319005 ) 19006 *6 39(Wire19177 on &254 19178 ) 19179 *641 (Wire 19007 19180 uid 5404,0 19008 19181 shape (OrthoPolyLine … … 19019 19192 ] 19020 19193 ) 19021 start &27 219194 start &273 19022 19195 end &49 19023 19196 sat 32 … … 19039 19212 ) 19040 19213 ) 19041 on &25 619042 ) 19043 *64 0(Wire19214 on &257 19215 ) 19216 *642 (Wire 19044 19217 uid 5474,0 19045 19218 shape (OrthoPolyLine … … 19056 19229 ] 19057 19230 ) 19058 start &27 519231 start &276 19059 19232 end &51 19060 19233 sat 32 … … 19076 19249 ) 19077 19250 ) 19078 on &25 419079 ) 19080 *64 1(Wire19251 on &255 19252 ) 19253 *643 (Wire 19081 19254 uid 5480,0 19082 19255 shape (OrthoPolyLine … … 19093 19266 ] 19094 19267 ) 19095 start &27 419268 start &275 19096 19269 end &50 19097 19270 sat 32 … … 19113 19286 ) 19114 19287 ) 19115 on &25 519116 ) 19117 *64 2(Wire19288 on &256 19289 ) 19290 *644 (Wire 19118 19291 uid 5582,0 19119 19292 shape (OrthoPolyLine … … 19129 19302 ] 19130 19303 ) 19131 end &22 719304 end &228 19132 19305 sat 16 19133 19306 eat 32 … … 19148 19321 ) 19149 19322 ) 19150 on &1 7919151 ) 19152 *64 3(Wire19323 on &180 19324 ) 19325 *645 (Wire 19153 19326 uid 5602,0 19154 19327 optionalChildren [ 19155 &62 319156 *64 4(BdJunction19328 &625 19329 *646 (BdJunction 19157 19330 uid 6086,0 19158 19331 ps "OnConnectorStrategy" … … 19184 19357 ) 19185 19358 start &23 19186 end &32 319359 end &324 19187 19360 sat 32 19188 19361 eat 32 … … 19205 19378 ) 19206 19379 ) 19207 on &18 019208 ) 19209 *64 5(Wire19380 on &181 19381 ) 19382 *647 (Wire 19210 19383 uid 5626,0 19211 19384 shape (OrthoPolyLine … … 19221 19394 ) 19222 19395 start &45 19223 end &26 119396 end &262 19224 19397 sat 32 19225 19398 eat 32 … … 19241 19414 ) 19242 19415 ) 19243 on &25 819244 ) 19245 *64 6(Wire19416 on &259 19417 ) 19418 *648 (Wire 19246 19419 uid 5634,0 19247 19420 shape (OrthoPolyLine … … 19258 19431 ) 19259 19432 start &38 19260 end &26 219433 end &263 19261 19434 sat 32 19262 19435 eat 32 … … 19279 19452 ) 19280 19453 ) 19281 on &25 719282 ) 19283 *64 7(Wire19454 on &258 19455 ) 19456 *649 (Wire 19284 19457 uid 5646,0 19285 19458 shape (OrthoPolyLine … … 19295 19468 ] 19296 19469 ) 19297 end &26 419470 end &265 19298 19471 sat 16 19299 19472 eat 32 … … 19315 19488 ) 19316 19489 ) 19317 on &17 719318 ) 19319 *6 48(Wire19490 on &178 19491 ) 19492 *650 (Wire 19320 19493 uid 5745,0 19321 19494 shape (OrthoPolyLine … … 19333 19506 ) 19334 19507 start &53 19335 end &27 319508 end &274 19336 19509 sat 32 19337 19510 eat 32 … … 19353 19526 ) 19354 19527 ) 19355 on &26 819356 ) 19357 *6 49(Wire19528 on &269 19529 ) 19530 *651 (Wire 19358 19531 uid 5805,0 19359 19532 shape (OrthoPolyLine … … 19368 19541 ] 19369 19542 ) 19370 end &27 819543 end &279 19371 19544 sat 16 19372 19545 eat 32 … … 19387 19560 ) 19388 19561 ) 19389 on &1 7919390 ) 19391 *65 0(Wire19562 on &180 19563 ) 19564 *652 (Wire 19392 19565 uid 5813,0 19393 19566 shape (OrthoPolyLine … … 19402 19575 ] 19403 19576 ) 19404 start &3 5919405 end &2 8919577 start &360 19578 end &290 19406 19579 sat 32 19407 19580 eat 32 … … 19425 19598 ) 19426 19599 ) 19427 on &28 519428 ) 19429 *65 1(Wire19600 on &286 19601 ) 19602 *653 (Wire 19430 19603 uid 5821,0 19431 19604 shape (OrthoPolyLine … … 19440 19613 ] 19441 19614 ) 19442 start &28 119443 end &29 019615 start &282 19616 end &291 19444 19617 sat 32 19445 19618 eat 32 … … 19463 19636 ) 19464 19637 ) 19465 on &28 619466 ) 19467 *65 2(Wire19638 on &287 19639 ) 19640 *654 (Wire 19468 19641 uid 5829,0 19469 19642 shape (OrthoPolyLine … … 19478 19651 ] 19479 19652 ) 19480 start &27 619481 end &29 119653 start &277 19654 end &292 19482 19655 sat 32 19483 19656 eat 32 … … 19501 19674 ) 19502 19675 ) 19503 on &28 719504 ) 19505 *65 3(Wire19676 on &288 19677 ) 19678 *655 (Wire 19506 19679 uid 5837,0 19507 19680 shape (OrthoPolyLine … … 19517 19690 ] 19518 19691 ) 19519 start &27 719520 end &29 219692 start &278 19693 end &293 19521 19694 sat 32 19522 19695 eat 32 … … 19541 19714 ) 19542 19715 ) 19543 on &28 819544 ) 19545 *65 4(Wire19716 on &289 19717 ) 19718 *656 (Wire 19546 19719 uid 5950,0 19547 19720 shape (OrthoPolyLine … … 19558 19731 ] 19559 19732 ) 19560 start &9 719733 start &98 19561 19734 end &55 19562 19735 sat 32 … … 19579 19752 ) 19580 19753 ) 19581 on &29 319582 ) 19583 *65 5(Wire19754 on &294 19755 ) 19756 *657 (Wire 19584 19757 uid 5962,0 19585 19758 shape (OrthoPolyLine … … 19596 19769 ] 19597 19770 ) 19598 start &9 519771 start &96 19599 19772 end &54 19600 19773 sat 32 … … 19617 19790 ) 19618 19791 ) 19619 on &29 419620 ) 19621 *65 6(Wire19792 on &295 19793 ) 19794 *658 (Wire 19622 19795 uid 6002,0 19623 19796 shape (OrthoPolyLine … … 19634 19807 ] 19635 19808 ) 19636 start &23 819809 start &239 19637 19810 end &56 19638 19811 sat 32 … … 19655 19828 ) 19656 19829 ) 19657 on &29 619658 ) 19659 *65 7(Wire19830 on &297 19831 ) 19832 *659 (Wire 19660 19833 uid 6008,0 19661 19834 shape (OrthoPolyLine … … 19672 19845 ] 19673 19846 ) 19674 start &2 7919847 start &280 19675 19848 end &58 19676 19849 sat 32 … … 19693 19866 ) 19694 19867 ) 19695 on &29 519696 ) 19697 *6 58(Wire19868 on &296 19869 ) 19870 *660 (Wire 19698 19871 uid 6018,0 19699 19872 shape (OrthoPolyLine … … 19711 19884 ) 19712 19885 start &57 19713 end &14 119886 end &142 19714 19887 sat 32 19715 19888 eat 32 … … 19731 19904 ) 19732 19905 ) 19733 on &29 719734 ) 19735 *6 59(Wire19906 on &298 19907 ) 19908 *661 (Wire 19736 19909 uid 6064,0 19737 19910 shape (OrthoPolyLine … … 19766 19939 ) 19767 19940 ) 19768 on &25 019769 ) 19770 *66 0(Wire19941 on &251 19942 ) 19943 *662 (Wire 19771 19944 uid 6072,0 19772 19945 optionalChildren [ 19773 *66 1(BdJunction19946 *663 (BdJunction 19774 19947 uid 9745,0 19775 19948 ps "OnConnectorStrategy" … … 19797 19970 ] 19798 19971 ) 19799 start &38 219800 end &62 219972 start &383 19973 end &624 19801 19974 sat 32 19802 19975 eat 32 … … 19819 19992 ) 19820 19993 ) 19821 on &18 019822 ) 19823 *66 2(Wire19994 on &181 19995 ) 19996 *664 (Wire 19824 19997 uid 6082,0 19825 19998 shape (OrthoPolyLine … … 19836 20009 ] 19837 20010 ) 19838 start &12 619839 end &64 420011 start &127 20012 end &646 19840 20013 sat 32 19841 20014 eat 32 … … 19858 20031 ) 19859 20032 ) 19860 on &18 019861 ) 19862 *66 3(Wire20033 on &181 20034 ) 20035 *665 (Wire 19863 20036 uid 6160,0 19864 20037 shape (OrthoPolyLine … … 19873 20046 ] 19874 20047 ) 19875 start &28 019876 end & 29920048 start &281 20049 end &300 19877 20050 sat 32 19878 20051 eat 32 … … 19896 20069 ) 19897 20070 ) 19898 on &29 819899 ) 19900 *66 4(Wire20071 on &299 20072 ) 20073 *666 (Wire 19901 20074 uid 6276,0 19902 20075 shape (OrthoPolyLine … … 19911 20084 ] 19912 20085 ) 19913 end &11 820086 end &119 19914 20087 sat 16 19915 20088 eat 32 … … 19930 20103 ) 19931 20104 ) 19932 on &17 719933 ) 19934 *66 5(Wire20105 on &178 20106 ) 20107 *667 (Wire 19935 20108 uid 6362,0 19936 20109 shape (OrthoPolyLine … … 19945 20118 ] 19946 20119 ) 19947 start & 9919948 end &30 120120 start &100 20121 end &302 19949 20122 sat 32 19950 20123 eat 32 … … 19968 20141 ) 19969 20142 ) 19970 on &30 019971 ) 19972 *66 6(Wire20143 on &301 20144 ) 20145 *668 (Wire 19973 20146 uid 6452,0 19974 20147 shape (OrthoPolyLine … … 19983 20156 ] 19984 20157 ) 19985 start &10 020158 start &101 19986 20159 sat 32 19987 20160 eat 16 … … 20004 20177 ) 20005 20178 ) 20006 on &30 220007 ) 20008 *66 7(Wire20179 on &303 20180 ) 20181 *669 (Wire 20009 20182 uid 6540,0 20010 20183 shape (OrthoPolyLine … … 20019 20192 ] 20020 20193 ) 20021 start &30 720194 start &308 20022 20195 end &41 20023 20196 sat 32 … … 20041 20214 ) 20042 20215 ) 20043 on &32 120044 ) 20045 *6 68(Wire20216 on &322 20217 ) 20218 *670 (Wire 20046 20219 uid 6548,0 20047 20220 shape (OrthoPolyLine … … 20056 20229 ] 20057 20230 ) 20058 end &3 0920231 end &310 20059 20232 ss 0 20060 20233 es 0 … … 20079 20252 ) 20080 20253 ) 20081 on &30 220082 ) 20083 *6 69(Wire20254 on &303 20255 ) 20256 *671 (Wire 20084 20257 uid 8416,0 20085 20258 shape (OrthoPolyLine … … 20094 20267 ] 20095 20268 ) 20096 start &14 220097 end &10 120269 start &143 20270 end &102 20098 20271 sat 32 20099 20272 eat 32 … … 20115 20288 ) 20116 20289 ) 20117 on &33 320118 ) 20119 *67 0(Wire20290 on &334 20291 ) 20292 *672 (Wire 20120 20293 uid 8577,0 20121 20294 shape (OrthoPolyLine … … 20153 20326 ) 20154 20327 ) 20155 on &35 720156 ) 20157 *67 1(Wire20328 on &358 20329 ) 20330 *673 (Wire 20158 20331 uid 8587,0 20159 20332 shape (OrthoPolyLine … … 20169 20342 ] 20170 20343 ) 20171 end &33 720344 end &338 20172 20345 sat 16 20173 20346 eat 32 … … 20191 20364 ) 20192 20365 ) 20193 on &35 720194 ) 20195 *67 2(Wire20366 on &358 20367 ) 20368 *674 (Wire 20196 20369 uid 8595,0 20197 20370 shape (OrthoPolyLine … … 20207 20380 ] 20208 20381 ) 20209 end &34 220382 end &343 20210 20383 sat 16 20211 20384 eat 32 … … 20229 20402 ) 20230 20403 ) 20231 on &33 420232 ) 20233 *67 3(Wire20404 on &335 20405 ) 20406 *675 (Wire 20234 20407 uid 8603,0 20235 20408 shape (OrthoPolyLine … … 20245 20418 ] 20246 20419 ) 20247 end &34 420420 end &345 20248 20421 sat 16 20249 20422 eat 32 … … 20266 20439 ) 20267 20440 ) 20268 on &33 520269 ) 20270 *67 4(Wire20441 on &336 20442 ) 20443 *676 (Wire 20271 20444 uid 8732,0 20272 20445 shape (OrthoPolyLine … … 20283 20456 ] 20284 20457 ) 20285 start &27 020286 end &36 420458 start &271 20459 end &365 20287 20460 sat 32 20288 20461 eat 32 … … 20304 20477 ) 20305 20478 ) 20306 on &37 620307 ) 20308 *67 5(Wire20479 on &377 20480 ) 20481 *677 (Wire 20309 20482 uid 8738,0 20310 20483 shape (OrthoPolyLine … … 20319 20492 ] 20320 20493 ) 20321 end &36 220494 end &363 20322 20495 sat 16 20323 20496 eat 32 … … 20340 20513 ) 20341 20514 ) 20342 on &37 720343 ) 20344 *67 6(Wire20515 on &378 20516 ) 20517 *678 (Wire 20345 20518 uid 8752,0 20346 20519 shape (OrthoPolyLine … … 20355 20528 ] 20356 20529 ) 20357 start &10 220530 start &103 20358 20531 sat 32 20359 20532 eat 16 … … 20375 20548 ) 20376 20549 ) 20377 on &37 720378 ) 20379 *67 7(Wire20550 on &378 20551 ) 20552 *679 (Wire 20380 20553 uid 9006,0 20381 20554 shape (OrthoPolyLine … … 20391 20564 ) 20392 20565 start &60 20393 end &3 7920566 end &380 20394 20567 sat 32 20395 20568 eat 32 … … 20413 20586 ) 20414 20587 ) 20415 on &37 820416 ) 20417 *6 78(Wire20588 on &379 20589 ) 20590 *680 (Wire 20418 20591 uid 9233,0 20419 20592 shape (OrthoPolyLine … … 20428 20601 ] 20429 20602 ) 20430 start &10 320603 start &104 20431 20604 sat 32 20432 20605 eat 16 … … 20448 20621 ) 20449 20622 ) 20450 on &40 020451 ) 20452 *6 79(Wire20623 on &401 20624 ) 20625 *681 (Wire 20453 20626 uid 9241,0 20454 20627 shape (OrthoPolyLine … … 20463 20636 ] 20464 20637 ) 20465 start &10 420638 start &105 20466 20639 sat 32 20467 20640 eat 16 … … 20483 20656 ) 20484 20657 ) 20485 on &40 120486 ) 20487 *68 0(Wire20658 on &402 20659 ) 20660 *682 (Wire 20488 20661 uid 9253,0 20489 20662 optionalChildren [ 20490 *68 1(BdJunction20663 *683 (BdJunction 20491 20664 uid 9507,0 20492 20665 ps "OnConnectorStrategy" … … 20512 20685 ] 20513 20686 ) 20514 end &39 420687 end &395 20515 20688 sat 16 20516 20689 eat 32 … … 20531 20704 ) 20532 20705 ) 20533 on &40 020534 ) 20535 *68 2(Wire20706 on &401 20707 ) 20708 *684 (Wire 20536 20709 uid 9261,0 20537 20710 optionalChildren [ 20538 *68 3(BdJunction20711 *685 (BdJunction 20539 20712 uid 9513,0 20540 20713 ps "OnConnectorStrategy" … … 20560 20733 ] 20561 20734 ) 20562 end &39 520735 end &396 20563 20736 sat 16 20564 20737 eat 32 … … 20579 20752 ) 20580 20753 ) 20581 on &40 120582 ) 20583 *68 4(Wire20754 on &402 20755 ) 20756 *686 (Wire 20584 20757 uid 9269,0 20585 20758 shape (OrthoPolyLine … … 20594 20767 ] 20595 20768 ) 20596 start &39 220597 end &40 320769 start &393 20770 end &404 20598 20771 sat 32 20599 20772 eat 32 … … 20617 20790 ) 20618 20791 ) 20619 on &40 220620 ) 20621 *68 5(Wire20792 on &403 20793 ) 20794 *687 (Wire 20622 20795 uid 9283,0 20623 20796 shape (OrthoPolyLine … … 20632 20805 ] 20633 20806 ) 20634 start &39 120635 end &40 520807 start &392 20808 end &406 20636 20809 sat 32 20637 20810 eat 32 … … 20655 20828 ) 20656 20829 ) 20657 on &40 420658 ) 20659 *68 6(Wire20830 on &405 20831 ) 20832 *688 (Wire 20660 20833 uid 9297,0 20661 20834 shape (OrthoPolyLine … … 20670 20843 ] 20671 20844 ) 20672 start &39 020673 end &40 720845 start &391 20846 end &408 20674 20847 sat 32 20675 20848 eat 32 … … 20693 20866 ) 20694 20867 ) 20695 on &40 620696 ) 20697 *68 7(Wire20868 on &407 20869 ) 20870 *689 (Wire 20698 20871 uid 9311,0 20699 20872 shape (OrthoPolyLine … … 20708 20881 ] 20709 20882 ) 20710 start &3 8920711 end &4 0920883 start &390 20884 end &410 20712 20885 sat 32 20713 20886 eat 32 … … 20731 20904 ) 20732 20905 ) 20733 on &40 820734 ) 20735 *6 88(Wire20906 on &409 20907 ) 20908 *690 (Wire 20736 20909 uid 9325,0 20737 20910 shape (OrthoPolyLine … … 20746 20919 ] 20747 20920 ) 20748 start &38 820749 end &41 120921 start &389 20922 end &412 20750 20923 sat 32 20751 20924 eat 32 … … 20769 20942 ) 20770 20943 ) 20771 on &41 020772 ) 20773 *6 89(Wire20944 on &411 20945 ) 20946 *691 (Wire 20774 20947 uid 9353,0 20775 20948 shape (OrthoPolyLine … … 20784 20957 ] 20785 20958 ) 20786 start &38 720787 end &41 320959 start &388 20960 end &414 20788 20961 sat 32 20789 20962 eat 32 … … 20807 20980 ) 20808 20981 ) 20809 on &41 220810 ) 20811 *69 0(Wire20982 on &413 20983 ) 20984 *692 (Wire 20812 20985 uid 9367,0 20813 20986 shape (OrthoPolyLine … … 20823 20996 ] 20824 20997 ) 20825 start &38 620826 end &41 520998 start &387 20999 end &416 20827 21000 sat 32 20828 21001 eat 32 … … 20847 21020 ) 20848 21021 ) 20849 on &41 420850 ) 20851 *69 1(Wire21022 on &415 21023 ) 21024 *693 (Wire 20852 21025 uid 9382,0 20853 21026 shape (OrthoPolyLine … … 20862 21035 ] 20863 21036 ) 20864 start &38 520865 end &41 721037 start &386 21038 end &418 20866 21039 sat 32 20867 21040 eat 32 … … 20885 21058 ) 20886 21059 ) 20887 on &41 620888 ) 20889 *69 2(Wire21060 on &417 21061 ) 21062 *694 (Wire 20890 21063 uid 9397,0 20891 21064 shape (OrthoPolyLine … … 20900 21073 ] 20901 21074 ) 20902 start &38 420903 end &4 1921075 start &385 21076 end &420 20904 21077 sat 32 20905 21078 eat 32 … … 20923 21096 ) 20924 21097 ) 20925 on &41 820926 ) 20927 *69 3(Wire21098 on &419 21099 ) 21100 *695 (Wire 20928 21101 uid 9503,0 20929 21102 shape (OrthoPolyLine … … 20939 21112 ] 20940 21113 ) 20941 start &68 120942 end &43 421114 start &683 21115 end &435 20943 21116 sat 32 20944 21117 eat 32 … … 20961 21134 ) 20962 21135 ) 20963 on &40 020964 ) 20965 *69 4(Wire21136 on &401 21137 ) 21138 *696 (Wire 20966 21139 uid 9509,0 20967 21140 shape (OrthoPolyLine … … 20977 21150 ] 20978 21151 ) 20979 start &68 320980 end &42 121152 start &685 21153 end &422 20981 21154 sat 32 20982 21155 eat 32 … … 20999 21172 ) 21000 21173 ) 21001 on &40 121002 ) 21003 *69 5(Wire21174 on &402 21175 ) 21176 *697 (Wire 21004 21177 uid 9517,0 21005 21178 shape (OrthoPolyLine … … 21016 21189 ] 21017 21190 ) 21018 start &42 321019 end &44 621191 start &424 21192 end &447 21020 21193 sat 32 21021 21194 eat 32 … … 21039 21212 ) 21040 21213 ) 21041 on &4 4921042 ) 21043 *69 6(Wire21214 on &450 21215 ) 21216 *698 (Wire 21044 21217 uid 9539,0 21045 21218 shape (OrthoPolyLine … … 21056 21229 ] 21057 21230 ) 21058 start &43 621059 end &44 721231 start &437 21232 end &448 21060 21233 sat 32 21061 21234 eat 32 … … 21079 21252 ) 21080 21253 ) 21081 on &44 821082 ) 21083 *69 7(Wire21254 on &449 21255 ) 21256 *699 (Wire 21084 21257 uid 9673,0 21085 21258 shape (OrthoPolyLine … … 21095 21268 ] 21096 21269 ) 21097 start &60 421098 end &45 121270 start &606 21271 end &452 21099 21272 sat 32 21100 21273 eat 32 … … 21117 21290 ) 21118 21291 ) 21119 on &1 7921120 ) 21121 * 698(Wire21292 on &180 21293 ) 21294 *700 (Wire 21122 21295 uid 9741,0 21123 21296 shape (OrthoPolyLine … … 21134 21307 ] 21135 21308 ) 21136 start &66 121137 end &46 421309 start &663 21310 end &465 21138 21311 sat 32 21139 21312 eat 32 … … 21156 21329 ) 21157 21330 ) 21158 on &18 021159 ) 21160 * 699(Wire21331 on &181 21332 ) 21333 *701 (Wire 21161 21334 uid 9747,0 21162 21335 shape (OrthoPolyLine … … 21173 21346 ] 21174 21347 ) 21175 start &60 621176 end &47 721348 start &608 21349 end &478 21177 21350 sat 32 21178 21351 eat 32 … … 21195 21368 ) 21196 21369 ) 21197 on &17 721198 ) 21199 *70 0(Wire21370 on &178 21371 ) 21372 *702 (Wire 21200 21373 uid 9755,0 21201 21374 shape (OrthoPolyLine … … 21210 21383 ] 21211 21384 ) 21212 start &45 321213 end &4 8921385 start &454 21386 end &490 21214 21387 sat 32 21215 21388 eat 32 … … 21233 21406 ) 21234 21407 ) 21235 on &49 021236 ) 21237 *70 1(Wire21408 on &491 21409 ) 21410 *703 (Wire 21238 21411 uid 9771,0 21239 21412 shape (OrthoPolyLine … … 21248 21421 ] 21249 21422 ) 21250 start &46 621251 end &49 121423 start &467 21424 end &492 21252 21425 sat 32 21253 21426 eat 32 … … 21271 21444 ) 21272 21445 ) 21273 on &49 221274 ) 21275 *70 2(Wire21446 on &493 21447 ) 21448 *704 (Wire 21276 21449 uid 9787,0 21277 21450 shape (OrthoPolyLine … … 21286 21459 ] 21287 21460 ) 21288 start &4 7921289 end &49 321461 start &480 21462 end &494 21290 21463 sat 32 21291 21464 eat 32 … … 21309 21482 ) 21310 21483 ) 21311 on &49 421312 ) 21313 *70 3(Wire21484 on &495 21485 ) 21486 *705 (Wire 21314 21487 uid 9943,0 21315 21488 shape (OrthoPolyLine … … 21324 21497 ] 21325 21498 ) 21326 start &10 521499 start &106 21327 21500 sat 32 21328 21501 eat 16 … … 21344 21517 ) 21345 21518 ) 21346 on &49 521347 ) 21348 *70 4(Wire21519 on &496 21520 ) 21521 *706 (Wire 21349 21522 uid 9951,0 21350 21523 shape (OrthoPolyLine … … 21359 21532 ] 21360 21533 ) 21361 start &10 621534 start &107 21362 21535 sat 32 21363 21536 eat 16 … … 21379 21552 ) 21380 21553 ) 21381 on &49 621382 ) 21383 *70 5(Wire21554 on &497 21555 ) 21556 *707 (Wire 21384 21557 uid 10010,0 21385 21558 shape (OrthoPolyLine … … 21396 21569 ] 21397 21570 ) 21398 start &21 321399 end &50 121571 start &214 21572 end &502 21400 21573 sat 32 21401 21574 eat 32 … … 21417 21590 ) 21418 21591 ) 21419 on &51 521420 ) 21421 *70 6(Wire21592 on &516 21593 ) 21594 *708 (Wire 21422 21595 uid 10018,0 21423 21596 shape (OrthoPolyLine … … 21432 21605 ] 21433 21606 ) 21434 end &50 321607 end &504 21435 21608 sat 16 21436 21609 eat 32 … … 21453 21626 ) 21454 21627 ) 21455 on &49 621456 ) 21457 *70 7(Wire21628 on &497 21629 ) 21630 *709 (Wire 21458 21631 uid 10036,0 21459 21632 shape (OrthoPolyLine … … 21468 21641 ] 21469 21642 ) 21470 end &39 621643 end &397 21471 21644 sat 16 21472 21645 eat 32 … … 21487 21660 ) 21488 21661 ) 21489 on &49 521490 ) 21491 *7 08(Wire21662 on &496 21663 ) 21664 *710 (Wire 21492 21665 uid 10194,0 21493 21666 shape (OrthoPolyLine … … 21504 21677 ] 21505 21678 ) 21506 start &2 3921507 end &10 721679 start &240 21680 end &108 21508 21681 ss 0 21509 21682 es 0 … … 21527 21700 ) 21528 21701 ) 21529 on &51 621530 ) 21531 *7 09(Wire21702 on &517 21703 ) 21704 *711 (Wire 21532 21705 uid 10202,0 21533 21706 shape (OrthoPolyLine … … 21544 21717 ] 21545 21718 ) 21546 start &24 021547 end &10 821719 start &241 21720 end &109 21548 21721 sat 32 21549 21722 eat 32 … … 21565 21738 ) 21566 21739 ) 21567 on &51 721568 ) 21569 *71 0(Wire21740 on &518 21741 ) 21742 *712 (Wire 21570 21743 uid 10266,0 21571 21744 shape (OrthoPolyLine … … 21581 21754 ] 21582 21755 ) 21583 start &9 121756 start &92 21584 21757 sat 32 21585 21758 eat 16 … … 21601 21774 ) 21602 21775 ) 21603 on &51 821604 ) 21605 *71 1(Wire21776 on &519 21777 ) 21778 *713 (Wire 21606 21779 uid 10298,0 21607 21780 shape (OrthoPolyLine … … 21616 21789 ] 21617 21790 ) 21618 start &21 821791 start &219 21619 21792 end &62 21620 21793 sat 32 … … 21637 21810 ) 21638 21811 ) 21639 on &5 1921640 ) 21641 *71 2(Wire21812 on &520 21813 ) 21814 *714 (Wire 21642 21815 uid 10304,0 21643 21816 shape (OrthoPolyLine … … 21652 21825 ] 21653 21826 ) 21654 start &21 621827 start &217 21655 21828 end &63 21656 21829 sat 32 … … 21673 21846 ) 21674 21847 ) 21675 on &52 021676 ) 21677 *71 3(Wire21848 on &521 21849 ) 21850 *715 (Wire 21678 21851 uid 10310,0 21679 21852 shape (OrthoPolyLine … … 21688 21861 ] 21689 21862 ) 21690 start &21 721863 start &218 21691 21864 end &64 21692 21865 sat 32 … … 21709 21882 ) 21710 21883 ) 21711 on &52 121712 ) 21713 *71 4(Wire21884 on &522 21885 ) 21886 *716 (Wire 21714 21887 uid 10316,0 21715 21888 shape (OrthoPolyLine … … 21726 21899 ) 21727 21900 start &61 21728 end &21 421901 end &215 21729 21902 sat 32 21730 21903 eat 32 … … 21747 21920 ) 21748 21921 ) 21749 on &52 221750 ) 21751 *71 5(Wire21922 on &523 21923 ) 21924 *717 (Wire 21752 21925 uid 10322,0 21753 21926 shape (OrthoPolyLine … … 21762 21935 ] 21763 21936 ) 21764 start &21 521765 end &52 421937 start &216 21938 end &525 21766 21939 sat 32 21767 21940 eat 32 … … 21785 21958 ) 21786 21959 ) 21787 on &52 321788 ) 21789 *71 6(Wire21960 on &524 21961 ) 21962 *718 (Wire 21790 21963 uid 10431,0 21791 21964 shape (OrthoPolyLine … … 21800 21973 ] 21801 21974 ) 21802 end &53 121975 end &532 21803 21976 sat 16 21804 21977 eat 32 … … 21821 21994 ) 21822 21995 ) 21823 on &51 821824 ) 21825 *71 7(Wire21996 on &519 21997 ) 21998 *719 (Wire 21826 21999 uid 10439,0 21827 22000 optionalChildren [ 21828 *7 18(BdJunction22001 *720 (BdJunction 21829 22002 uid 10447,0 21830 22003 ps "OnConnectorStrategy" … … 21851 22024 ) 21852 22025 start &30 21853 end &52 822026 end &529 21854 22027 sat 32 21855 22028 eat 32 … … 21871 22044 ) 21872 22045 ) 21873 on &54 821874 ) 21875 *7 19(Wire22046 on &549 22047 ) 22048 *721 (Wire 21876 22049 uid 10443,0 21877 22050 shape (OrthoPolyLine … … 21887 22060 ] 21888 22061 ) 21889 start &11 721890 end &7 1822062 start &118 22063 end &720 21891 22064 sat 32 21892 22065 eat 32 … … 21909 22082 ) 21910 22083 ) 21911 on &54 821912 ) 21913 *72 0(Wire22084 on &549 22085 ) 22086 *722 (Wire 21914 22087 uid 10467,0 21915 22088 shape (OrthoPolyLine … … 21926 22099 ] 21927 22100 ) 21928 start &14 322101 start &144 21929 22102 end &65 21930 22103 es 0 … … 21948 22121 ) 21949 22122 ) 21950 on &5 4921951 ) 21952 *72 1(Wire22123 on &550 22124 ) 22125 *723 (Wire 21953 22126 uid 10629,0 21954 22127 shape (OrthoPolyLine … … 21963 22136 ] 21964 22137 ) 21965 start &1 0922138 start &110 21966 22139 sat 32 21967 22140 eat 16 … … 21983 22156 ) 21984 22157 ) 21985 on &55 021986 ) 21987 *72 2(Wire22158 on &551 22159 ) 22160 *724 (Wire 21988 22161 uid 10637,0 21989 22162 shape (OrthoPolyLine … … 21998 22171 ] 21999 22172 ) 22000 start &11 022173 start &111 22001 22174 sat 32 22002 22175 eat 16 … … 22018 22191 ) 22019 22192 ) 22020 on &55 122021 ) 22022 *72 3(Wire22193 on &552 22194 ) 22195 *725 (Wire 22023 22196 uid 10685,0 22024 22197 shape (OrthoPolyLine … … 22033 22206 ] 22034 22207 ) 22035 end &56 422208 end &565 22036 22209 sat 16 22037 22210 eat 32 … … 22053 22226 ) 22054 22227 ) 22055 on &55 122056 ) 22057 *72 4(Wire22228 on &552 22229 ) 22230 *726 (Wire 22058 22231 uid 10691,0 22059 22232 shape (OrthoPolyLine … … 22068 22241 ] 22069 22242 ) 22070 end &56 522243 end &566 22071 22244 sat 16 22072 22245 eat 32 … … 22088 22261 ) 22089 22262 ) 22090 on &55 022091 ) 22092 *72 5(Wire22263 on &551 22264 ) 22265 *727 (Wire 22093 22266 uid 10699,0 22094 22267 shape (OrthoPolyLine … … 22104 22277 ] 22105 22278 ) 22106 end &5 5922279 end &560 22107 22280 sat 16 22108 22281 eat 32 … … 22124 22297 ) 22125 22298 ) 22126 on &1 7922127 ) 22128 *72 6(Wire22299 on &180 22300 ) 22301 *728 (Wire 22129 22302 uid 10707,0 22130 22303 shape (OrthoPolyLine … … 22139 22312 ] 22140 22313 ) 22141 end &56 322314 end &564 22142 22315 sat 16 22143 22316 eat 32 … … 22153 22326 va (VaSet 22154 22327 ) 22155 xt "110000,126000,11 4600,127000"22156 st " trigger_out"22328 xt "110000,126000,117500,127000" 22329 st "drs_readout_started" 22157 22330 blo "110000,126800" 22158 22331 tm "WireNameMgr" 22159 22332 ) 22160 22333 ) 22161 on &5 4822162 ) 22163 *72 7(Wire22334 on &570 22335 ) 22336 *729 (Wire 22164 22337 uid 10723,0 22165 22338 shape (OrthoPolyLine … … 22174 22347 ] 22175 22348 ) 22176 start &56 022177 end &55 322349 start &561 22350 end &554 22178 22351 sat 32 22179 22352 eat 32 … … 22197 22370 ) 22198 22371 ) 22199 on &55 222200 ) 22201 *7 28(Wire22372 on &553 22373 ) 22374 *730 (Wire 22202 22375 uid 10737,0 22203 22376 shape (OrthoPolyLine … … 22212 22385 ] 22213 22386 ) 22214 start &56 122215 end &55 522387 start &562 22388 end &556 22216 22389 sat 32 22217 22390 eat 32 … … 22235 22408 ) 22236 22409 ) 22237 on &55 422238 ) 22239 *7 29(Wire22410 on &555 22411 ) 22412 *731 (Wire 22240 22413 uid 10751,0 22241 22414 shape (OrthoPolyLine … … 22250 22423 ] 22251 22424 ) 22252 start &56 222253 end &55 722425 start &563 22426 end &558 22254 22427 sat 32 22255 22428 eat 32 … … 22273 22446 ) 22274 22447 ) 22275 on &556 22448 on &557 22449 ) 22450 *732 (Wire 22451 uid 11405,0 22452 shape (OrthoPolyLine 22453 uid 11406,0 22454 va (VaSet 22455 vasetType 3 22456 ) 22457 xt "40750,93000,43000,96000" 22458 pts [ 22459 "40750,93000" 22460 "43000,93000" 22461 "43000,96000" 22462 ] 22463 ) 22464 start &66 22465 sat 32 22466 eat 16 22467 st 0 22468 sf 1 22469 si 0 22470 tg (WTG 22471 uid 11409,0 22472 ps "ConnStartEndStrategy" 22473 stg "STSignalDisplayStrategy" 22474 f (Text 22475 uid 11410,0 22476 va (VaSet 22477 ) 22478 xt "35000,95000,42500,96000" 22479 st "drs_readout_started" 22480 blo "35000,95800" 22481 tm "WireNameMgr" 22482 ) 22483 ) 22484 on &570 22276 22485 ) 22277 22486 ] … … 22287 22496 color "26368,26368,26368" 22288 22497 ) 22289 packageList *73 0(PackageList22498 packageList *733 (PackageList 22290 22499 uid 41,0 22291 22500 stg "VerticalLayoutStrategy" 22292 22501 textVec [ 22293 *73 1(Text22502 *734 (Text 22294 22503 uid 42,0 22295 22504 va (VaSet … … 22300 22509 blo "-87000,1800" 22301 22510 ) 22302 *73 2(MLText22511 *735 (MLText 22303 22512 uid 43,0 22304 22513 va (VaSet … … 22325 22534 stg "VerticalLayoutStrategy" 22326 22535 textVec [ 22327 *73 3(Text22536 *736 (Text 22328 22537 uid 45,0 22329 22538 va (VaSet … … 22335 22544 blo "20000,800" 22336 22545 ) 22337 *73 4(Text22546 *737 (Text 22338 22547 uid 46,0 22339 22548 va (VaSet … … 22345 22554 blo "20000,1800" 22346 22555 ) 22347 *73 5(MLText22556 *738 (MLText 22348 22557 uid 47,0 22349 22558 va (VaSet … … 22355 22564 tm "BdCompilerDirectivesTextMgr" 22356 22565 ) 22357 *73 6(Text22566 *739 (Text 22358 22567 uid 48,0 22359 22568 va (VaSet … … 22365 22574 blo "20000,4800" 22366 22575 ) 22367 *7 37(MLText22576 *740 (MLText 22368 22577 uid 49,0 22369 22578 va (VaSet … … 22373 22582 tm "BdCompilerDirectivesTextMgr" 22374 22583 ) 22375 *7 38(Text22584 *741 (Text 22376 22585 uid 50,0 22377 22586 va (VaSet … … 22383 22592 blo "20000,5800" 22384 22593 ) 22385 *7 39(MLText22594 *742 (MLText 22386 22595 uid 51,0 22387 22596 va (VaSet … … 22395 22604 ) 22396 22605 windowSize "1280,0,2561,1024" 22397 viewArea " 107600,77300,192480,147300"22606 viewArea "65920,84260,150800,154260" 22398 22607 cachedDiagramExtent "-105000,-60500,164000,343294" 22399 22608 pageSetupInfo (PageSetupInfo … … 22421 22630 hasePageBreakOrigin 1 22422 22631 pageBreakOrigin "-73000,0" 22423 lastUid 11 301,022632 lastUid 11412,0 22424 22633 defaultCommentText (CommentText 22425 22634 shape (Rectangle … … 22483 22692 stg "VerticalLayoutStrategy" 22484 22693 textVec [ 22485 *74 0(Text22694 *743 (Text 22486 22695 va (VaSet 22487 22696 font "Arial,8,1" … … 22492 22701 tm "BdLibraryNameMgr" 22493 22702 ) 22494 *74 1(Text22703 *744 (Text 22495 22704 va (VaSet 22496 22705 font "Arial,8,1" … … 22501 22710 tm "BlkNameMgr" 22502 22711 ) 22503 *74 2(Text22712 *745 (Text 22504 22713 va (VaSet 22505 22714 font "Arial,8,1" … … 22539 22748 ) 22540 22749 defaultMWComponent (MWC 22541 shape (Rectangle22542 va (VaSet22543 vasetType 122544 fg "0,65535,0"22545 lineColor "0,32896,0"22546 lineWidth 222547 )22548 xt "0,0,8000,10000"22549 )22550 ttg (MlTextGroup22551 ps "CenterOffsetStrategy"22552 stg "VerticalLayoutStrategy"22553 textVec [22554 *743 (Text22555 va (VaSet22556 font "Arial,8,1"22557 )22558 xt "550,3500,3450,4500"22559 st "Library"22560 blo "550,4300"22561 )22562 *744 (Text22563 va (VaSet22564 font "Arial,8,1"22565 )22566 xt "550,4500,7450,5500"22567 st "MWComponent"22568 blo "550,5300"22569 )22570 *745 (Text22571 va (VaSet22572 font "Arial,8,1"22573 )22574 xt "550,5500,2350,6500"22575 st "U_0"22576 blo "550,6300"22577 tm "InstanceNameMgr"22578 )22579 ]22580 )22581 ga (GenericAssociation22582 ps "EdgeToEdgeStrategy"22583 matrix (Matrix22584 text (MLText22585 va (VaSet22586 font "Courier New,8,0"22587 )22588 xt "-6450,1500,-6450,1500"22589 )22590 header ""22591 )22592 elements [22593 ]22594 )22595 portVis (PortSigDisplay22596 )22597 prms (Property22598 pclass "params"22599 pname "params"22600 ptn "String"22601 )22602 visOptions (mwParamsVisibilityOptions22603 )22604 )22605 defaultSaComponent (SaComponent22606 22750 shape (Rectangle 22607 22751 va (VaSet … … 22621 22765 font "Arial,8,1" 22622 22766 ) 22623 xt " 900,3500,3800,4500"22767 xt "550,3500,3450,4500" 22624 22768 st "Library" 22625 blo "900,4300" 22626 tm "BdLibraryNameMgr" 22769 blo "550,4300" 22627 22770 ) 22628 22771 *747 (Text … … 22630 22773 font "Arial,8,1" 22631 22774 ) 22632 xt "900,4500,7100,5500" 22633 st "SaComponent" 22634 blo "900,5300" 22635 tm "CptNameMgr" 22775 xt "550,4500,7450,5500" 22776 st "MWComponent" 22777 blo "550,5300" 22636 22778 ) 22637 22779 *748 (Text … … 22639 22781 font "Arial,8,1" 22640 22782 ) 22641 xt " 900,5500,2700,6500"22783 xt "550,5500,2350,6500" 22642 22784 st "U_0" 22643 blo " 900,6300"22785 blo "550,6300" 22644 22786 tm "InstanceNameMgr" 22645 22787 ) … … 22653 22795 font "Courier New,8,0" 22654 22796 ) 22655 xt "-6 100,1500,-6100,1500"22797 xt "-6450,1500,-6450,1500" 22656 22798 ) 22657 22799 header "" … … 22660 22802 ] 22661 22803 ) 22662 viewicon (ZoomableIcon22663 sl 022664 va (VaSet22665 vasetType 122666 fg "49152,49152,49152"22667 )22668 xt "0,0,1500,1500"22669 iconName "UnknownFile.png"22670 iconMaskName "UnknownFile.msk"22671 )22672 viewiconposition 022673 22804 portVis (PortSigDisplay 22674 22805 ) 22675 archFileType "UNKNOWN" 22676 ) 22677 defaultVhdlComponent (VhdlComponent 22806 prms (Property 22807 pclass "params" 22808 pname "params" 22809 ptn "String" 22810 ) 22811 visOptions (mwParamsVisibilityOptions 22812 ) 22813 ) 22814 defaultSaComponent (SaComponent 22678 22815 shape (Rectangle 22679 22816 va (VaSet … … 22693 22830 font "Arial,8,1" 22694 22831 ) 22695 xt " 500,3500,3400,4500"22832 xt "900,3500,3800,4500" 22696 22833 st "Library" 22697 blo "500,4300" 22834 blo "900,4300" 22835 tm "BdLibraryNameMgr" 22698 22836 ) 22699 22837 *750 (Text … … 22701 22839 font "Arial,8,1" 22702 22840 ) 22703 xt "500,4500,7500,5500" 22704 st "VhdlComponent" 22705 blo "500,5300" 22841 xt "900,4500,7100,5500" 22842 st "SaComponent" 22843 blo "900,5300" 22844 tm "CptNameMgr" 22706 22845 ) 22707 22846 *751 (Text … … 22709 22848 font "Arial,8,1" 22710 22849 ) 22711 xt " 500,5500,2300,6500"22850 xt "900,5500,2700,6500" 22712 22851 st "U_0" 22713 blo " 500,6300"22852 blo "900,6300" 22714 22853 tm "InstanceNameMgr" 22715 22854 ) … … 22723 22862 font "Courier New,8,0" 22724 22863 ) 22725 xt "-6 500,1500,-6500,1500"22864 xt "-6100,1500,-6100,1500" 22726 22865 ) 22727 22866 header "" … … 22730 22869 ] 22731 22870 ) 22871 viewicon (ZoomableIcon 22872 sl 0 22873 va (VaSet 22874 vasetType 1 22875 fg "49152,49152,49152" 22876 ) 22877 xt "0,0,1500,1500" 22878 iconName "UnknownFile.png" 22879 iconMaskName "UnknownFile.msk" 22880 ) 22881 viewiconposition 0 22732 22882 portVis (PortSigDisplay 22733 22883 ) 22734 entityPath "" 22735 archName "" 22736 archPath "" 22737 ) 22738 defaultVerilogComponent (VerilogComponent 22884 archFileType "UNKNOWN" 22885 ) 22886 defaultVhdlComponent (VhdlComponent 22739 22887 shape (Rectangle 22740 22888 va (VaSet … … 22744 22892 lineWidth 2 22745 22893 ) 22746 xt " -450,0,8450,10000"22894 xt "0,0,8000,10000" 22747 22895 ) 22748 22896 ttg (MlTextGroup … … 22754 22902 font "Arial,8,1" 22755 22903 ) 22756 xt "50 ,3500,2950,4500"22904 xt "500,3500,3400,4500" 22757 22905 st "Library" 22758 blo "50 ,4300"22906 blo "500,4300" 22759 22907 ) 22760 22908 *753 (Text … … 22762 22910 font "Arial,8,1" 22763 22911 ) 22764 xt "50 ,4500,7950,5500"22765 st "V erilogComponent"22766 blo "50 ,5300"22912 xt "500,4500,7500,5500" 22913 st "VhdlComponent" 22914 blo "500,5300" 22767 22915 ) 22768 22916 *754 (Text … … 22770 22918 font "Arial,8,1" 22771 22919 ) 22772 xt "50 ,5500,1850,6500"22920 xt "500,5500,2300,6500" 22773 22921 st "U_0" 22774 blo "50 ,6300"22922 blo "500,6300" 22775 22923 tm "InstanceNameMgr" 22776 22924 ) … … 22784 22932 font "Courier New,8,0" 22785 22933 ) 22786 xt "-6 950,1500,-6950,1500"22934 xt "-6500,1500,-6500,1500" 22787 22935 ) 22788 22936 header "" … … 22791 22939 ] 22792 22940 ) 22941 portVis (PortSigDisplay 22942 ) 22793 22943 entityPath "" 22794 ) 22795 defaultHdlText (HdlText 22944 archName "" 22945 archPath "" 22946 ) 22947 defaultVerilogComponent (VerilogComponent 22796 22948 shape (Rectangle 22797 22949 va (VaSet 22798 22950 vasetType 1 22799 fg " 65535,65535,37120"22800 lineColor "0, 0,32768"22951 fg "0,65535,0" 22952 lineColor "0,32896,0" 22801 22953 lineWidth 2 22802 22954 ) 22803 xt " 0,0,8000,10000"22955 xt "-450,0,8450,10000" 22804 22956 ) 22805 22957 ttg (MlTextGroup … … 22811 22963 font "Arial,8,1" 22812 22964 ) 22965 xt "50,3500,2950,4500" 22966 st "Library" 22967 blo "50,4300" 22968 ) 22969 *756 (Text 22970 va (VaSet 22971 font "Arial,8,1" 22972 ) 22973 xt "50,4500,7950,5500" 22974 st "VerilogComponent" 22975 blo "50,5300" 22976 ) 22977 *757 (Text 22978 va (VaSet 22979 font "Arial,8,1" 22980 ) 22981 xt "50,5500,1850,6500" 22982 st "U_0" 22983 blo "50,6300" 22984 tm "InstanceNameMgr" 22985 ) 22986 ] 22987 ) 22988 ga (GenericAssociation 22989 ps "EdgeToEdgeStrategy" 22990 matrix (Matrix 22991 text (MLText 22992 va (VaSet 22993 font "Courier New,8,0" 22994 ) 22995 xt "-6950,1500,-6950,1500" 22996 ) 22997 header "" 22998 ) 22999 elements [ 23000 ] 23001 ) 23002 entityPath "" 23003 ) 23004 defaultHdlText (HdlText 23005 shape (Rectangle 23006 va (VaSet 23007 vasetType 1 23008 fg "65535,65535,37120" 23009 lineColor "0,0,32768" 23010 lineWidth 2 23011 ) 23012 xt "0,0,8000,10000" 23013 ) 23014 ttg (MlTextGroup 23015 ps "CenterOffsetStrategy" 23016 stg "VerticalLayoutStrategy" 23017 textVec [ 23018 *758 (Text 23019 va (VaSet 23020 font "Arial,8,1" 23021 ) 22813 23022 xt "3150,4000,4850,5000" 22814 23023 st "eb1" … … 22816 23025 tm "HdlTextNameMgr" 22817 23026 ) 22818 *75 6(Text23027 *759 (Text 22819 23028 va (VaSet 22820 23029 font "Arial,8,1" … … 23219 23428 stg "VerticalLayoutStrategy" 23220 23429 textVec [ 23221 *7 57(Text23430 *760 (Text 23222 23431 va (VaSet 23223 23432 font "Arial,8,1" … … 23227 23436 blo "14100,20800" 23228 23437 ) 23229 *7 58(MLText23438 *761 (MLText 23230 23439 va (VaSet 23231 23440 ) … … 23279 23488 stg "VerticalLayoutStrategy" 23280 23489 textVec [ 23281 *7 59(Text23490 *762 (Text 23282 23491 va (VaSet 23283 23492 font "Arial,8,1" … … 23287 23496 blo "14100,20800" 23288 23497 ) 23289 *76 0(MLText23498 *763 (MLText 23290 23499 va (VaSet 23291 23500 ) … … 23412 23621 font "Arial,8,1" 23413 23622 ) 23414 xt "-105000,1 19400,-100300,120400"23623 xt "-105000,120200,-100300,121200" 23415 23624 st "Post User:" 23416 blo "-105000,12 0200"23625 blo "-105000,121000" 23417 23626 ) 23418 23627 postUserText (MLText … … 23427 23636 commonDM (CommonDM 23428 23637 ldm (LogicalDM 23429 suid 25 0,023638 suid 252,0 23430 23639 usingSuid 1 23431 emptyRow *76 1(LEmptyRow23640 emptyRow *764 (LEmptyRow 23432 23641 ) 23433 23642 uid 54,0 23434 23643 optionalChildren [ 23435 *76 2(RefLabelRowHdr23436 ) 23437 *76 3(TitleRowHdr23438 ) 23439 *76 4(FilterRowHdr23440 ) 23441 *76 5(RefLabelColHdr23644 *765 (RefLabelRowHdr 23645 ) 23646 *766 (TitleRowHdr 23647 ) 23648 *767 (FilterRowHdr 23649 ) 23650 *768 (RefLabelColHdr 23442 23651 tm "RefLabelColHdrMgr" 23443 23652 ) 23444 *76 6(RowExpandColHdr23653 *769 (RowExpandColHdr 23445 23654 tm "RowExpandColHdrMgr" 23446 23655 ) 23447 *7 67(GroupColHdr23656 *770 (GroupColHdr 23448 23657 tm "GroupColHdrMgr" 23449 23658 ) 23450 *7 68(NameColHdr23659 *771 (NameColHdr 23451 23660 tm "BlockDiagramNameColHdrMgr" 23452 23661 ) 23453 *7 69(ModeColHdr23662 *772 (ModeColHdr 23454 23663 tm "BlockDiagramModeColHdrMgr" 23455 23664 ) 23456 *77 0(TypeColHdr23665 *773 (TypeColHdr 23457 23666 tm "BlockDiagramTypeColHdrMgr" 23458 23667 ) 23459 *77 1(BoundsColHdr23668 *774 (BoundsColHdr 23460 23669 tm "BlockDiagramBoundsColHdrMgr" 23461 23670 ) 23462 *77 2(InitColHdr23671 *775 (InitColHdr 23463 23672 tm "BlockDiagramInitColHdrMgr" 23464 23673 ) 23465 *77 3(EolColHdr23674 *776 (EolColHdr 23466 23675 tm "BlockDiagramEolColHdrMgr" 23467 23676 ) 23468 *77 4(LeafLogPort23677 *777 (LeafLogPort 23469 23678 port (LogicalPort 23470 23679 m 4 … … 23480 23689 uid 516,0 23481 23690 ) 23482 *77 5(LeafLogPort23691 *778 (LeafLogPort 23483 23692 port (LogicalPort 23484 23693 m 4 … … 23493 23702 uid 518,0 23494 23703 ) 23495 *77 6(LeafLogPort23704 *779 (LeafLogPort 23496 23705 port (LogicalPort 23497 23706 m 4 … … 23506 23715 uid 520,0 23507 23716 ) 23508 *7 77(LeafLogPort23717 *780 (LeafLogPort 23509 23718 port (LogicalPort 23510 23719 m 4 … … 23519 23728 uid 530,0 23520 23729 ) 23521 *7 78(LeafLogPort23730 *781 (LeafLogPort 23522 23731 port (LogicalPort 23523 23732 m 4 … … 23532 23741 uid 532,0 23533 23742 ) 23534 *7 79(LeafLogPort23743 *782 (LeafLogPort 23535 23744 port (LogicalPort 23536 23745 m 1 … … 23545 23754 uid 534,0 23546 23755 ) 23547 *78 0(LeafLogPort23756 *783 (LeafLogPort 23548 23757 port (LogicalPort 23549 23758 m 1 … … 23558 23767 uid 536,0 23559 23768 ) 23560 *78 1(LeafLogPort23769 *784 (LeafLogPort 23561 23770 port (LogicalPort 23562 23771 m 2 … … 23571 23780 uid 538,0 23572 23781 ) 23573 *78 2(LeafLogPort23782 *785 (LeafLogPort 23574 23783 port (LogicalPort 23575 23784 m 1 … … 23584 23793 uid 540,0 23585 23794 ) 23586 *78 3(LeafLogPort23795 *786 (LeafLogPort 23587 23796 port (LogicalPort 23588 23797 m 1 … … 23597 23806 uid 542,0 23598 23807 ) 23599 *78 4(LeafLogPort23808 *787 (LeafLogPort 23600 23809 port (LogicalPort 23601 23810 m 1 … … 23610 23819 uid 546,0 23611 23820 ) 23612 *78 5(LeafLogPort23821 *788 (LeafLogPort 23613 23822 port (LogicalPort 23614 23823 decl (Decl … … 23621 23830 uid 548,0 23622 23831 ) 23623 *78 6(LeafLogPort23832 *789 (LeafLogPort 23624 23833 port (LogicalPort 23625 23834 decl (Decl … … 23635 23844 uid 1455,0 23636 23845 ) 23637 *7 87(LeafLogPort23846 *790 (LeafLogPort 23638 23847 port (LogicalPort 23639 23848 decl (Decl … … 23648 23857 uid 1457,0 23649 23858 ) 23650 *7 88(LeafLogPort23859 *791 (LeafLogPort 23651 23860 port (LogicalPort 23652 23861 decl (Decl … … 23660 23869 uid 1694,0 23661 23870 ) 23662 *7 89(LeafLogPort23871 *792 (LeafLogPort 23663 23872 port (LogicalPort 23664 23873 lang 2 … … 23676 23885 uid 1993,0 23677 23886 ) 23678 *79 0(LeafLogPort23887 *793 (LeafLogPort 23679 23888 port (LogicalPort 23680 23889 m 4 … … 23691 23900 uid 2305,0 23692 23901 ) 23693 *79 1(LeafLogPort23902 *794 (LeafLogPort 23694 23903 port (LogicalPort 23695 23904 lang 2 … … 23704 23913 uid 2510,0 23705 23914 ) 23706 *79 2(LeafLogPort23915 *795 (LeafLogPort 23707 23916 port (LogicalPort 23708 23917 lang 2 … … 23718 23927 uid 2512,0 23719 23928 ) 23720 *79 3(LeafLogPort23929 *796 (LeafLogPort 23721 23930 port (LogicalPort 23722 23931 lang 2 … … 23733 23942 uid 2514,0 23734 23943 ) 23735 *79 4(LeafLogPort23944 *797 (LeafLogPort 23736 23945 port (LogicalPort 23737 23946 lang 2 … … 23749 23958 uid 2516,0 23750 23959 ) 23751 *79 5(LeafLogPort23960 *798 (LeafLogPort 23752 23961 port (LogicalPort 23753 23962 lang 2 … … 23764 23973 uid 2518,0 23765 23974 ) 23766 *79 6(LeafLogPort23975 *799 (LeafLogPort 23767 23976 port (LogicalPort 23768 23977 lang 2 … … 23778 23987 uid 2520,0 23779 23988 ) 23780 * 797(LeafLogPort23989 *800 (LeafLogPort 23781 23990 port (LogicalPort 23782 23991 lang 2 … … 23792 24001 uid 2522,0 23793 24002 ) 23794 * 798(LeafLogPort24003 *801 (LeafLogPort 23795 24004 port (LogicalPort 23796 24005 m 4 … … 23804 24013 uid 2604,0 23805 24014 ) 23806 * 799(LeafLogPort24015 *802 (LeafLogPort 23807 24016 port (LogicalPort 23808 24017 m 4 … … 23817 24026 uid 2606,0 23818 24027 ) 23819 *80 0(LeafLogPort24028 *803 (LeafLogPort 23820 24029 port (LogicalPort 23821 24030 m 4 … … 23830 24039 uid 2608,0 23831 24040 ) 23832 *80 1(LeafLogPort24041 *804 (LeafLogPort 23833 24042 port (LogicalPort 23834 24043 m 4 … … 23842 24051 uid 2610,0 23843 24052 ) 23844 *80 2(LeafLogPort24053 *805 (LeafLogPort 23845 24054 port (LogicalPort 23846 24055 m 4 … … 23854 24063 uid 2612,0 23855 24064 ) 23856 *80 3(LeafLogPort24065 *806 (LeafLogPort 23857 24066 port (LogicalPort 23858 24067 m 4 … … 23867 24076 uid 2646,0 23868 24077 ) 23869 *80 4(LeafLogPort24078 *807 (LeafLogPort 23870 24079 port (LogicalPort 23871 24080 m 1 … … 23880 24089 uid 2812,0 23881 24090 ) 23882 *80 5(LeafLogPort24091 *808 (LeafLogPort 23883 24092 port (LogicalPort 23884 24093 m 4 … … 23892 24101 uid 2962,0 23893 24102 ) 23894 *80 6(LeafLogPort24103 *809 (LeafLogPort 23895 24104 port (LogicalPort 23896 24105 m 1 … … 23904 24113 uid 3902,0 23905 24114 ) 23906 *8 07(LeafLogPort24115 *810 (LeafLogPort 23907 24116 port (LogicalPort 23908 24117 m 1 … … 23916 24125 uid 4070,0 23917 24126 ) 23918 *8 08(LeafLogPort24127 *811 (LeafLogPort 23919 24128 port (LogicalPort 23920 24129 m 4 … … 23928 24137 uid 4212,0 23929 24138 ) 23930 *8 09(LeafLogPort24139 *812 (LeafLogPort 23931 24140 port (LogicalPort 23932 24141 decl (Decl … … 23939 24148 uid 4234,0 23940 24149 ) 23941 *81 0(LeafLogPort24150 *813 (LeafLogPort 23942 24151 port (LogicalPort 23943 24152 decl (Decl … … 23951 24160 uid 4262,0 23952 24161 ) 23953 *81 1(LeafLogPort24162 *814 (LeafLogPort 23954 24163 port (LogicalPort 23955 24164 decl (Decl … … 23962 24171 uid 4276,0 23963 24172 ) 23964 *81 2(LeafLogPort24173 *815 (LeafLogPort 23965 24174 port (LogicalPort 23966 24175 m 4 … … 23975 24184 uid 4563,0 23976 24185 ) 23977 *81 3(LeafLogPort24186 *816 (LeafLogPort 23978 24187 port (LogicalPort 23979 24188 m 4 … … 23987 24196 uid 4565,0 23988 24197 ) 23989 *81 4(LeafLogPort24198 *817 (LeafLogPort 23990 24199 port (LogicalPort 23991 24200 m 4 … … 24000 24209 uid 4569,0 24001 24210 ) 24002 *81 5(LeafLogPort24211 *818 (LeafLogPort 24003 24212 port (LogicalPort 24004 24213 m 1 … … 24014 24223 uid 4585,0 24015 24224 ) 24016 *81 6(LeafLogPort24225 *819 (LeafLogPort 24017 24226 port (LogicalPort 24018 24227 m 1 … … 24027 24236 uid 4587,0 24028 24237 ) 24029 *8 17(LeafLogPort24238 *820 (LeafLogPort 24030 24239 port (LogicalPort 24031 24240 decl (Decl … … 24038 24247 uid 4733,0 24039 24248 ) 24040 *8 18(LeafLogPort24249 *821 (LeafLogPort 24041 24250 port (LogicalPort 24042 24251 decl (Decl … … 24049 24258 uid 4735,0 24050 24259 ) 24051 *8 19(LeafLogPort24260 *822 (LeafLogPort 24052 24261 port (LogicalPort 24053 24262 decl (Decl … … 24060 24269 uid 4737,0 24061 24270 ) 24062 *82 0(LeafLogPort24271 *823 (LeafLogPort 24063 24272 port (LogicalPort 24064 24273 decl (Decl … … 24071 24280 uid 4739,0 24072 24281 ) 24073 *82 1(LeafLogPort24282 *824 (LeafLogPort 24074 24283 port (LogicalPort 24075 24284 m 4 … … 24083 24292 uid 4749,0 24084 24293 ) 24085 *82 2(LeafLogPort24294 *825 (LeafLogPort 24086 24295 port (LogicalPort 24087 24296 m 1 … … 24096 24305 uid 4974,0 24097 24306 ) 24098 *82 3(LeafLogPort24307 *826 (LeafLogPort 24099 24308 port (LogicalPort 24100 24309 m 1 … … 24109 24318 uid 4976,0 24110 24319 ) 24111 *82 4(LeafLogPort24320 *827 (LeafLogPort 24112 24321 port (LogicalPort 24113 24322 m 4 … … 24122 24331 uid 5198,0 24123 24332 ) 24124 *82 5(LeafLogPort24333 *828 (LeafLogPort 24125 24334 port (LogicalPort 24126 24335 m 4 … … 24134 24343 uid 5200,0 24135 24344 ) 24136 *82 6(LeafLogPort24345 *829 (LeafLogPort 24137 24346 port (LogicalPort 24138 24347 m 4 … … 24146 24355 uid 5202,0 24147 24356 ) 24148 *8 27(LeafLogPort24357 *830 (LeafLogPort 24149 24358 port (LogicalPort 24150 24359 m 4 … … 24159 24368 uid 5204,0 24160 24369 ) 24161 *8 28(LeafLogPort24370 *831 (LeafLogPort 24162 24371 port (LogicalPort 24163 24372 m 4 … … 24171 24380 uid 5206,0 24172 24381 ) 24173 *8 29(LeafLogPort24382 *832 (LeafLogPort 24174 24383 port (LogicalPort 24175 24384 m 4 … … 24183 24392 uid 5208,0 24184 24393 ) 24185 *83 0(LeafLogPort24394 *833 (LeafLogPort 24186 24395 port (LogicalPort 24187 24396 m 4 … … 24195 24404 uid 5210,0 24196 24405 ) 24197 *83 1(LeafLogPort24406 *834 (LeafLogPort 24198 24407 port (LogicalPort 24199 24408 m 4 … … 24207 24416 uid 5212,0 24208 24417 ) 24209 *83 2(LeafLogPort24418 *835 (LeafLogPort 24210 24419 port (LogicalPort 24211 24420 m 4 … … 24219 24428 uid 5214,0 24220 24429 ) 24221 *83 3(LeafLogPort24430 *836 (LeafLogPort 24222 24431 port (LogicalPort 24223 24432 m 1 … … 24234 24443 uid 5226,0 24235 24444 ) 24236 *83 4(LeafLogPort24445 *837 (LeafLogPort 24237 24446 port (LogicalPort 24238 24447 m 4 … … 24246 24455 uid 5502,0 24247 24456 ) 24248 *83 5(LeafLogPort24457 *838 (LeafLogPort 24249 24458 port (LogicalPort 24250 24459 m 4 … … 24258 24467 uid 5504,0 24259 24468 ) 24260 *83 6(LeafLogPort24469 *839 (LeafLogPort 24261 24470 port (LogicalPort 24262 24471 m 4 … … 24270 24479 uid 5600,0 24271 24480 ) 24272 *8 37(LeafLogPort24481 *840 (LeafLogPort 24273 24482 port (LogicalPort 24274 24483 lang 10 … … 24284 24493 uid 5642,0 24285 24494 ) 24286 *8 38(LeafLogPort24495 *841 (LeafLogPort 24287 24496 port (LogicalPort 24288 24497 m 4 … … 24296 24505 uid 5644,0 24297 24506 ) 24298 *8 39(LeafLogPort24507 *842 (LeafLogPort 24299 24508 port (LogicalPort 24300 24509 m 4 … … 24309 24518 uid 5751,0 24310 24519 ) 24311 *84 0(LeafLogPort24520 *843 (LeafLogPort 24312 24521 port (LogicalPort 24313 24522 m 1 … … 24321 24530 uid 5867,0 24322 24531 ) 24323 *84 1(LeafLogPort24532 *844 (LeafLogPort 24324 24533 port (LogicalPort 24325 24534 m 2 … … 24335 24544 uid 5869,0 24336 24545 ) 24337 *84 2(LeafLogPort24546 *845 (LeafLogPort 24338 24547 port (LogicalPort 24339 24548 m 1 … … 24347 24556 uid 5871,0 24348 24557 ) 24349 *84 3(LeafLogPort24558 *846 (LeafLogPort 24350 24559 port (LogicalPort 24351 24560 m 1 … … 24360 24569 uid 5873,0 24361 24570 ) 24362 *84 4(LeafLogPort24571 *847 (LeafLogPort 24363 24572 port (LogicalPort 24364 24573 m 4 … … 24373 24582 uid 5966,0 24374 24583 ) 24375 *84 5(LeafLogPort24584 *848 (LeafLogPort 24376 24585 port (LogicalPort 24377 24586 m 4 … … 24385 24594 uid 5968,0 24386 24595 ) 24387 *84 6(LeafLogPort24596 *849 (LeafLogPort 24388 24597 port (LogicalPort 24389 24598 m 4 … … 24398 24607 uid 6022,0 24399 24608 ) 24400 *8 47(LeafLogPort24609 *850 (LeafLogPort 24401 24610 port (LogicalPort 24402 24611 m 4 … … 24411 24620 uid 6024,0 24412 24621 ) 24413 *8 48(LeafLogPort24622 *851 (LeafLogPort 24414 24623 port (LogicalPort 24415 24624 m 4 … … 24423 24632 uid 6026,0 24424 24633 ) 24425 *8 49(LeafLogPort24634 *852 (LeafLogPort 24426 24635 port (LogicalPort 24427 24636 m 1 … … 24436 24645 uid 6172,0 24437 24646 ) 24438 *85 0(LeafLogPort24647 *853 (LeafLogPort 24439 24648 port (LogicalPort 24440 24649 m 1 … … 24451 24660 uid 6374,0 24452 24661 ) 24453 *85 1(LeafLogPort24662 *854 (LeafLogPort 24454 24663 port (LogicalPort 24455 24664 m 4 … … 24464 24673 uid 6464,0 24465 24674 ) 24466 *85 2(LeafLogPort24675 *855 (LeafLogPort 24467 24676 port (LogicalPort 24468 24677 m 4 … … 24477 24686 uid 6554,0 24478 24687 ) 24479 *85 3(LeafLogPort24688 *856 (LeafLogPort 24480 24689 port (LogicalPort 24481 24690 lang 2 … … 24490 24699 uid 8420,0 24491 24700 ) 24492 *85 4(LeafLogPort24701 *857 (LeafLogPort 24493 24702 port (LogicalPort 24494 24703 m 4 … … 24504 24713 uid 8609,0 24505 24714 ) 24506 *85 5(LeafLogPort24715 *858 (LeafLogPort 24507 24716 port (LogicalPort 24508 24717 m 4 … … 24516 24725 uid 8611,0 24517 24726 ) 24518 *85 6(LeafLogPort24727 *859 (LeafLogPort 24519 24728 port (LogicalPort 24520 24729 m 4 … … 24530 24739 uid 8613,0 24531 24740 ) 24532 *8 57(LeafLogPort24741 *860 (LeafLogPort 24533 24742 port (LogicalPort 24534 24743 m 4 … … 24542 24751 uid 8758,0 24543 24752 ) 24544 *8 58(LeafLogPort24753 *861 (LeafLogPort 24545 24754 port (LogicalPort 24546 24755 m 4 … … 24554 24763 uid 8760,0 24555 24764 ) 24556 *8 59(LeafLogPort24765 *862 (LeafLogPort 24557 24766 port (LogicalPort 24558 24767 m 1 … … 24567 24776 uid 9018,0 24568 24777 ) 24569 *86 0(LeafLogPort24778 *863 (LeafLogPort 24570 24779 port (LogicalPort 24571 24780 m 4 … … 24582 24791 uid 9247,0 24583 24792 ) 24584 *86 1(LeafLogPort24793 *864 (LeafLogPort 24585 24794 port (LogicalPort 24586 24795 m 4 … … 24598 24807 uid 9249,0 24599 24808 ) 24600 *862 (LeafLogPort24601 port (LogicalPort24602 m 124603 decl (Decl24604 n "LOCKED_extraOUT"24605 t "std_logic"24606 o 9024607 suid 200,024608 )24609 )24610 uid 9555,024611 )24612 *863 (LeafLogPort24613 port (LogicalPort24614 m 124615 decl (Decl24616 n "PSDONE_extraOUT"24617 t "std_logic"24618 o 9124619 suid 201,024620 )24621 )24622 uid 9557,024623 )24624 *864 (LeafLogPort24625 port (LogicalPort24626 m 124627 decl (Decl24628 n "PSINCDEC_OUT"24629 t "std_logic"24630 o 9224631 suid 202,024632 )24633 )24634 uid 9559,024635 )24636 24809 *865 (LeafLogPort 24637 24810 port (LogicalPort 24638 24811 m 1 24639 24812 decl (Decl 24640 n " PSEN_OUT"24641 t "std_logic" 24642 o 9 324643 suid 20 3,024644 ) 24645 ) 24646 uid 95 61,024813 n "LOCKED_extraOUT" 24814 t "std_logic" 24815 o 90 24816 suid 200,0 24817 ) 24818 ) 24819 uid 9555,0 24647 24820 ) 24648 24821 *866 (LeafLogPort … … 24650 24823 m 1 24651 24824 decl (Decl 24825 n "PSDONE_extraOUT" 24826 t "std_logic" 24827 o 91 24828 suid 201,0 24829 ) 24830 ) 24831 uid 9557,0 24832 ) 24833 *867 (LeafLogPort 24834 port (LogicalPort 24835 m 1 24836 decl (Decl 24837 n "PSINCDEC_OUT" 24838 t "std_logic" 24839 o 92 24840 suid 202,0 24841 ) 24842 ) 24843 uid 9559,0 24844 ) 24845 *868 (LeafLogPort 24846 port (LogicalPort 24847 m 1 24848 decl (Decl 24849 n "PSEN_OUT" 24850 t "std_logic" 24851 o 93 24852 suid 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(MRCItem 26233 litem &1042 26007 26234 pos 5 26008 26235 dimension 50 26009 26236 uid 107,0 26010 26237 ) 26011 *105 2(MRCItem26012 litem &10 3826238 *1057 (MRCItem 26239 litem &1043 26013 26240 pos 6 26014 26241 dimension 80 -
firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib/hds/@f@a@d_main/struct.bd.bak
r10075 r10081 241 241 name "HEARTBEAT_PWM_DIVIDER" 242 242 type "integer" 243 value "500 "243 value "50000" 244 244 e "-- 10kHz @ 50 MHz" 245 245 ) … … 466 466 (vvPair 467 467 variable "time" 468 value "1 7:54:26"468 value "18:05:35" 469 469 ) 470 470 (vvPair … … 16457 16457 ) 16458 16458 xt "129000,122600,164000,125000" 16459 st "HEARTBEAT_PWM_DIVIDER = 500 16459 st "HEARTBEAT_PWM_DIVIDER = 50000 ( integer ) -- 10kHz @ 50 MHz 16460 16460 MAX_DELAY = 100 ( integer ) 16461 16461 WAITING_DIVIDER = 50000000 ( integer ) -- 1Hz @ 50 MHz … … 16468 16468 name "HEARTBEAT_PWM_DIVIDER" 16469 16469 type "integer" 16470 value "500 "16470 value "50000" 16471 16471 e "-- 10kHz @ 50 MHz" 16472 16472 ) … … 22421 22421 hasePageBreakOrigin 1 22422 22422 pageBreakOrigin "-73000,0" 22423 lastUid 11 218,022423 lastUid 11301,0 22424 22424 defaultCommentText (CommentText 22425 22425 shape (Rectangle -
firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib/hds/@f@a@d_main/symbol.sb
r10075 r10081 1331 1331 (vvPair 1332 1332 variable "date" 1333 value "0 4.01.2011"1333 value "05.01.2011" 1334 1334 ) 1335 1335 (vvPair 1336 1336 variable "day" 1337 value " Di"1337 value "Mi" 1338 1338 ) 1339 1339 (vvPair 1340 1340 variable "day_long" 1341 value " Dienstag"1341 value "Mittwoch" 1342 1342 ) 1343 1343 (vvPair 1344 1344 variable "dd" 1345 value "0 4"1345 value "05" 1346 1346 ) 1347 1347 (vvPair … … 1483 1483 (vvPair 1484 1484 variable "time" 1485 value "1 8:05:35"1485 value "14:33:40" 1486 1486 ) 1487 1487 (vvPair … … 4457 4457 ) 4458 4458 ) 4459 lastUid 5 081,04459 lastUid 5104,0 4460 4460 okToSyncOnLoad 1 4461 4461 OkToSyncGenericsOnLoad 1 -
firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib/hds/data_generator/symbol.sb
r10073 r10081 34 34 ldm (LogicalDM 35 35 ordering 1 36 suid 6 0,036 suid 61,0 37 37 usingSuid 1 38 38 emptyRow *1 (LEmptyRow … … 618 618 uid 1492,0 619 619 ) 620 *57 (LogPort 621 port (LogicalPort 622 m 1 623 decl (Decl 624 n "drs_readout_started" 625 t "std_logic" 626 o 44 627 suid 61,0 628 ) 629 ) 630 uid 1524,0 631 ) 620 632 ] 621 633 ) … … 625 637 uid 149,0 626 638 optionalChildren [ 627 *5 7(Sheet639 *58 (Sheet 628 640 sheetRow (SheetRow 629 641 headerVa (MVa … … 642 654 font "Tahoma,10,0" 643 655 ) 644 emptyMRCItem *5 8(MRCItem656 emptyMRCItem *59 (MRCItem 645 657 litem &1 646 658 pos 3 … … 649 661 uid 151,0 650 662 optionalChildren [ 651 * 59(MRCItem663 *60 (MRCItem 652 664 litem &2 653 665 pos 0 … … 655 667 uid 152,0 656 668 ) 657 *6 0(MRCItem669 *61 (MRCItem 658 670 litem &3 659 671 pos 1 … … 661 673 uid 153,0 662 674 ) 663 *6 1(MRCItem675 *62 (MRCItem 664 676 litem &4 665 677 pos 2 … … 668 680 uid 154,0 669 681 ) 670 *6 2(MRCItem682 *63 (MRCItem 671 683 litem &14 672 684 pos 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*94 (MRCItem 857 869 litem &45 858 870 pos 31 … … 860 872 uid 1172,0 861 873 ) 862 *9 4(MRCItem874 *95 (MRCItem 863 875 litem &46 864 876 pos 32 … … 866 878 uid 1212,0 867 879 ) 868 *9 5(MRCItem880 *96 (MRCItem 869 881 litem &47 870 882 pos 33 … … 872 884 uid 1214,0 873 885 ) 874 *9 6(MRCItem886 *97 (MRCItem 875 887 litem &48 876 888 pos 34 … … 878 890 uid 1216,0 879 891 ) 880 *9 7(MRCItem892 *98 (MRCItem 881 893 litem &49 882 894 pos 35 … … 884 896 uid 1246,0 885 897 ) 886 *9 8(MRCItem898 *99 (MRCItem 887 899 litem &50 888 900 pos 36 … … 890 902 uid 1401,0 891 903 ) 892 * 99(MRCItem904 *100 (MRCItem 893 905 litem &51 894 906 pos 37 … … 896 908 uid 1433,0 897 909 ) 898 *10 0(MRCItem910 *101 (MRCItem 899 911 litem &52 900 912 pos 38 … … 902 914 uid 1485,0 903 915 ) 904 *10 1(MRCItem916 *102 (MRCItem 905 917 litem &53 906 918 pos 39 … … 908 920 uid 1487,0 909 921 ) 910 *10 2(MRCItem922 *103 (MRCItem 911 923 litem &54 912 924 pos 40 … … 914 926 uid 1489,0 915 927 ) 916 *10 3(MRCItem928 *104 (MRCItem 917 929 litem &55 918 930 pos 41 … … 920 932 uid 1491,0 921 933 ) 922 *10 4(MRCItem934 *105 (MRCItem 923 935 litem &56 924 936 pos 42 925 937 dimension 20 926 938 uid 1493,0 939 ) 940 *106 (MRCItem 941 litem &57 942 pos 43 943 dimension 20 944 uid 1525,0 927 945 ) 928 946 ] … … 937 955 uid 155,0 938 956 optionalChildren [ 939 *10 5(MRCItem957 *107 (MRCItem 940 958 litem &5 941 959 pos 0 … … 943 961 uid 156,0 944 962 ) 945 *10 6(MRCItem963 *108 (MRCItem 946 964 litem &7 947 965 pos 1 … … 949 967 uid 157,0 950 968 ) 951 *10 7(MRCItem969 *109 (MRCItem 952 970 litem &8 953 971 pos 2 … … 955 973 uid 158,0 956 974 ) 957 *1 08(MRCItem975 *110 (MRCItem 958 976 litem &9 959 977 pos 3 … … 961 979 uid 159,0 962 980 ) 963 *1 09(MRCItem981 *111 (MRCItem 964 982 litem &10 965 983 pos 4 … … 967 985 uid 160,0 968 986 ) 969 *11 0(MRCItem987 *112 (MRCItem 970 988 litem &11 971 989 pos 5 … … 973 991 uid 161,0 974 992 ) 975 *11 1(MRCItem993 *113 (MRCItem 976 994 litem &12 977 995 pos 6 … … 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"GenericValueColHdrMgr" 1029 1047 ) 1030 *12 3(PragmaColHdr1048 *125 (PragmaColHdr 1031 1049 tm "GenericPragmaColHdrMgr" 1032 1050 ) 1033 *12 4(EolColHdr1051 *126 (EolColHdr 1034 1052 tm "GenericEolColHdrMgr" 1035 1053 ) 1036 *12 5(LogGeneric1054 *127 (LogGeneric 1037 1055 generic (GiElement 1038 1056 name "RAM_ADDR_WIDTH" … … 1040 1058 value "12" 1041 1059 ) 1042 uid 1 494,01060 uid 1526,0 1043 1061 ) 1044 1062 ] … … 1049 1067 uid 177,0 1050 1068 optionalChildren [ 1051 *12 6(Sheet1069 *128 (Sheet 1052 1070 sheetRow (SheetRow 1053 1071 headerVa (MVa … … 1066 1084 font "Tahoma,10,0" 1067 1085 ) 1068 emptyMRCItem *12 7(MRCItem1069 litem &11 31086 emptyMRCItem *129 (MRCItem 1087 litem &115 1070 1088 pos 3 1071 1089 dimension 20 … … 1073 1091 uid 179,0 1074 1092 optionalChildren [ 1075 *1 28(MRCItem1076 litem &11 41093 *130 (MRCItem 1094 litem &116 1077 1095 pos 0 1078 1096 dimension 20 1079 1097 uid 180,0 1080 1098 ) 1081 *1 29(MRCItem1082 litem &11 51099 *131 (MRCItem 1100 litem &117 1083 1101 pos 1 1084 1102 dimension 23 1085 1103 uid 181,0 1086 1104 ) 1087 *13 0(MRCItem1088 litem &11 61105 *132 (MRCItem 1106 litem &118 1089 1107 pos 2 1090 1108 hidden 1 … … 1092 1110 uid 182,0 1093 1111 ) 1094 *13 1(MRCItem1095 litem &12 51112 *133 (MRCItem 1113 litem &127 1096 1114 pos 0 1097 1115 dimension 20 1098 uid 1 495,01116 uid 1527,0 1099 1117 ) 1100 1118 ] … … 1109 1127 uid 183,0 1110 1128 optionalChildren [ 1111 *13 2(MRCItem1112 litem &11 71129 *134 (MRCItem 1130 litem &119 1113 1131 pos 0 1114 1132 dimension 20 1115 1133 uid 184,0 1116 1134 ) 1117 *13 3(MRCItem1118 litem &1 191135 *135 (MRCItem 1136 litem &121 1119 1137 pos 1 1120 1138 dimension 50 1121 1139 uid 185,0 1122 1140 ) 1123 *13 4(MRCItem1124 litem &12 01141 *136 (MRCItem 1142 litem &122 1125 1143 pos 2 1126 1144 dimension 100 1127 1145 uid 186,0 1128 1146 ) 1129 *13 5(MRCItem1130 litem &12 11147 *137 (MRCItem 1148 litem &123 1131 1149 pos 3 1132 1150 dimension 100 1133 1151 uid 187,0 1134 1152 ) 1135 *13 6(MRCItem1136 litem &12 21153 *138 (MRCItem 1154 litem &124 1137 1155 pos 4 1138 1156 dimension 50 1139 1157 uid 188,0 1140 1158 ) 1141 *13 7(MRCItem1142 litem &12 31159 *139 (MRCItem 1160 litem &125 1143 1161 pos 5 1144 1162 dimension 50 1145 1163 uid 189,0 1146 1164 ) 1147 *1 38(MRCItem1148 litem &12 41165 *140 (MRCItem 1166 litem &126 1149 1167 pos 6 1150 1168 dimension 80 … … 1209 1227 (vvPair 1210 1228 variable "date" 1211 value "0 3.01.2011"1229 value "05.01.2011" 1212 1230 ) 1213 1231 (vvPair 1214 1232 variable "day" 1215 value "M o"1233 value "Mi" 1216 1234 ) 1217 1235 (vvPair 1218 1236 variable "day_long" 1219 value "M ontag"1237 value "Mittwoch" 1220 1238 ) 1221 1239 (vvPair 1222 1240 variable "dd" 1223 value "0 3"1241 value "05" 1224 1242 ) 1225 1243 (vvPair … … 1361 1379 (vvPair 1362 1380 variable "time" 1363 value "1 6:31:49"1381 value "14:32:19" 1364 1382 ) 1365 1383 (vvPair … … 1392 1410 uid 134,0 1393 1411 optionalChildren [ 1394 *1 39(SymbolBody1412 *141 (SymbolBody 1395 1413 uid 8,0 1396 1414 optionalChildren [ 1397 *14 0(CptPort1415 *142 (CptPort 1398 1416 uid 48,0 1399 1417 ps "OnEdgeStrategy" … … 1443 1461 ) 1444 1462 ) 1445 *14 1(CptPort1463 *143 (CptPort 1446 1464 uid 53,0 1447 1465 ps "OnEdgeStrategy" … … 1492 1510 ) 1493 1511 ) 1494 *14 2(CptPort1512 *144 (CptPort 1495 1513 uid 58,0 1496 1514 ps "OnEdgeStrategy" … … 1541 1559 ) 1542 1560 ) 1543 *14 3(CptPort1561 *145 (CptPort 1544 1562 uid 73,0 1545 1563 ps "OnEdgeStrategy" … … 1591 1609 ) 1592 1610 ) 1593 *14 4(CptPort1611 *146 (CptPort 1594 1612 uid 78,0 1595 1613 ps "OnEdgeStrategy" … … 1639 1657 ) 1640 1658 ) 1641 *14 5(CptPort1659 *147 (CptPort 1642 1660 uid 88,0 1643 1661 ps "OnEdgeStrategy" … … 1686 1704 ) 1687 1705 ) 1688 *14 6(CptPort1706 *148 (CptPort 1689 1707 uid 93,0 1690 1708 ps "OnEdgeStrategy" … … 1733 1751 ) 1734 1752 ) 1735 *14 7(CptPort1753 *149 (CptPort 1736 1754 uid 98,0 1737 1755 ps "OnEdgeStrategy" … … 1779 1797 ) 1780 1798 ) 1781 *1 48(CommentText1799 *150 (CommentText 1782 1800 uid 106,0 1783 1801 ps "EdgeToEdgeStrategy" … … 1813 1831 excludeCommentLeader 1 1814 1832 ) 1815 *1 49(CptPort1833 *151 (CptPort 1816 1834 uid 285,0 1817 1835 ps "OnEdgeStrategy" … … 1858 1876 ) 1859 1877 ) 1860 *15 0(CptPort1878 *152 (CptPort 1861 1879 uid 402,0 1862 1880 ps "OnEdgeStrategy" … … 1902 1920 ) 1903 1921 ) 1904 *15 1(CptPort1922 *153 (CptPort 1905 1923 uid 407,0 1906 1924 ps "OnEdgeStrategy" … … 1950 1968 ) 1951 1969 ) 1952 *15 2(CptPort1970 *154 (CptPort 1953 1971 uid 412,0 1954 1972 ps "OnEdgeStrategy" … … 1994 2012 ) 1995 2013 ) 1996 *15 3(CptPort2014 *155 (CptPort 1997 2015 uid 473,0 1998 2016 ps "OnEdgeStrategy" … … 2038 2056 ) 2039 2057 ) 2040 *15 4(CptPort2058 *156 (CptPort 2041 2059 uid 526,0 2042 2060 ps "OnEdgeStrategy" … … 2083 2101 ) 2084 2102 ) 2085 *15 5(CptPort2103 *157 (CptPort 2086 2104 uid 637,0 2087 2105 ps "OnEdgeStrategy" … … 2130 2148 ) 2131 2149 ) 2132 *15 6(CptPort2150 *158 (CptPort 2133 2151 uid 676,0 2134 2152 ps "OnEdgeStrategy" … … 2178 2196 ) 2179 2197 ) 2180 *15 7(CptPort2198 *159 (CptPort 2181 2199 uid 681,0 2182 2200 ps "OnEdgeStrategy" … … 2225 2243 ) 2226 2244 ) 2227 *1 58(CptPort2245 *160 (CptPort 2228 2246 uid 801,0 2229 2247 ps "OnEdgeStrategy" … … 2272 2290 ) 2273 2291 ) 2274 *1 59(CptPort2292 *161 (CptPort 2275 2293 uid 806,0 2276 2294 ps "OnEdgeStrategy" … … 2316 2334 ) 2317 2335 ) 2318 *16 0(CptPort2336 *162 (CptPort 2319 2337 uid 811,0 2320 2338 ps "OnEdgeStrategy" … … 2347 2365 font "Courier New,8,0" 2348 2366 ) 2349 xt "2000,50400,3 0500,51200"2350 st "drs_s_cell_array : IN drs_s_cell_array_type 2367 xt "2000,50400,31500,51200" 2368 st "drs_s_cell_array : IN drs_s_cell_array_type ; 2351 2369 " 2352 2370 ) … … 2360 2378 ) 2361 2379 ) 2362 *16 1(CptPort2380 *163 (CptPort 2363 2381 uid 845,0 2364 2382 ps "OnEdgeStrategy" … … 2407 2425 ) 2408 2426 ) 2409 *16 2(CptPort2427 *164 (CptPort 2410 2428 uid 898,0 2411 2429 ps "OnEdgeStrategy" … … 2451 2469 ) 2452 2470 ) 2453 *16 3(CptPort2471 *165 (CptPort 2454 2472 uid 958,0 2455 2473 ps "OnEdgeStrategy" … … 2495 2513 ) 2496 2514 ) 2497 *16 4(CptPort2515 *166 (CptPort 2498 2516 uid 963,0 2499 2517 ps "OnEdgeStrategy" … … 2546 2564 ) 2547 2565 ) 2548 *16 5(CptPort2566 *167 (CptPort 2549 2567 uid 1048,0 2550 2568 ps "OnEdgeStrategy" … … 2590 2608 ) 2591 2609 ) 2592 *16 6(CptPort2610 *168 (CptPort 2593 2611 uid 1053,0 2594 2612 ps "OnEdgeStrategy" … … 2634 2652 ) 2635 2653 ) 2636 *16 7(CptPort2654 *169 (CptPort 2637 2655 uid 1085,0 2638 2656 ps "OnEdgeStrategy" … … 2678 2696 ) 2679 2697 ) 2680 *1 68(CptPort2698 *170 (CptPort 2681 2699 uid 1090,0 2682 2700 ps "OnEdgeStrategy" … … 2722 2740 ) 2723 2741 ) 2724 *1 69(CptPort2742 *171 (CptPort 2725 2743 uid 1122,0 2726 2744 ps "OnEdgeStrategy" … … 2773 2791 ) 2774 2792 ) 2775 *17 0(CptPort2793 *172 (CptPort 2776 2794 uid 1127,0 2777 2795 ps "OnEdgeStrategy" … … 2823 2841 ) 2824 2842 ) 2825 *17 1(CptPort2843 *173 (CptPort 2826 2844 uid 1159,0 2827 2845 ps "OnEdgeStrategy" … … 2870 2888 ) 2871 2889 ) 2872 *17 2(CptPort2890 *174 (CptPort 2873 2891 uid 1164,0 2874 2892 ps "OnEdgeStrategy" … … 2917 2935 ) 2918 2936 ) 2919 *17 3(CptPort2937 *175 (CptPort 2920 2938 uid 1196,0 2921 2939 ps "OnEdgeStrategy" … … 2961 2979 ) 2962 2980 ) 2963 *17 4(CptPort2981 *176 (CptPort 2964 2982 uid 1201,0 2965 2983 ps "OnEdgeStrategy" … … 3005 3023 ) 3006 3024 ) 3007 *17 5(CptPort3025 *177 (CptPort 3008 3026 uid 1206,0 3009 3027 ps "OnEdgeStrategy" … … 3049 3067 ) 3050 3068 ) 3051 *17 6(CptPort3069 *178 (CptPort 3052 3070 uid 1240,0 3053 3071 ps "OnEdgeStrategy" … … 3093 3111 ) 3094 3112 ) 3095 *17 7(CptPort3113 *179 (CptPort 3096 3114 uid 1395,0 3097 3115 ps "OnEdgeStrategy" … … 3140 3158 ) 3141 3159 ) 3142 *1 78(CptPort3160 *180 (CptPort 3143 3161 uid 1427,0 3144 3162 ps "OnEdgeStrategy" … … 3185 3203 ) 3186 3204 ) 3187 *1 79(CptPort3205 *181 (CptPort 3188 3206 uid 1459,0 3189 3207 ps "OnEdgeStrategy" … … 3233 3251 ) 3234 3252 ) 3235 *18 0(CptPort3253 *182 (CptPort 3236 3254 uid 1464,0 3237 3255 ps "OnEdgeStrategy" … … 3280 3298 ) 3281 3299 ) 3282 *18 1(CptPort3300 *183 (CptPort 3283 3301 uid 1469,0 3284 3302 ps "OnEdgeStrategy" … … 3324 3342 ) 3325 3343 ) 3326 *18 2(CptPort3344 *184 (CptPort 3327 3345 uid 1474,0 3328 3346 ps "OnEdgeStrategy" … … 3368 3386 ) 3369 3387 ) 3370 *18 3(CptPort3388 *185 (CptPort 3371 3389 uid 1479,0 3372 3390 ps "OnEdgeStrategy" … … 3413 3431 o 8 3414 3432 suid 60,0 3433 ) 3434 ) 3435 ) 3436 *186 (CptPort 3437 uid 1519,0 3438 ps "OnEdgeStrategy" 3439 shape (Triangle 3440 uid 1520,0 3441 ro 90 3442 va (VaSet 3443 vasetType 1 3444 fg "0,65535,0" 3445 ) 3446 xt "67000,34625,67750,35375" 3447 ) 3448 tg (CPTG 3449 uid 1521,0 3450 ps "CptPortTextPlaceStrategy" 3451 stg "RightVerticalLayoutStrategy" 3452 f (Text 3453 uid 1522,0 3454 va (VaSet 3455 ) 3456 xt "58500,34500,66000,35500" 3457 st "drs_readout_started" 3458 ju 2 3459 blo "66000,35300" 3460 tm "CptPortNameMgr" 3461 ) 3462 ) 3463 dt (MLText 3464 uid 1523,0 3465 va (VaSet 3466 font "Courier New,8,0" 3467 ) 3468 xt "2000,51200,24500,52000" 3469 st "drs_readout_started : OUT std_logic 3470 " 3471 ) 3472 thePort (LogicalPort 3473 m 1 3474 decl (Decl 3475 n "drs_readout_started" 3476 t "std_logic" 3477 o 44 3478 suid 61,0 3415 3479 ) 3416 3480 ) … … 3451 3515 ) 3452 3516 ) 3453 gi *18 4(GenericInterface3517 gi *187 (GenericInterface 3454 3518 uid 13,0 3455 3519 ps "CenterOffsetStrategy" … … 3484 3548 ) 3485 3549 ) 3486 *18 5(Grouping3550 *188 (Grouping 3487 3551 uid 16,0 3488 3552 optionalChildren [ 3489 *18 6(CommentText3553 *189 (CommentText 3490 3554 uid 18,0 3491 3555 shape (Rectangle … … 3505 3569 bg "0,0,32768" 3506 3570 ) 3507 xt "41200,29000,50 900,30000"3571 xt "41200,29000,50700,30000" 3508 3572 st " 3509 3573 by %user on %dd %month %year … … 3518 3582 titleBlock 1 3519 3583 ) 3520 *1 87(CommentText3584 *190 (CommentText 3521 3585 uid 21,0 3522 3586 shape (Rectangle … … 3549 3613 titleBlock 1 3550 3614 ) 3551 *1 88(CommentText3615 *191 (CommentText 3552 3616 uid 24,0 3553 3617 shape (Rectangle … … 3580 3644 titleBlock 1 3581 3645 ) 3582 *1 89(CommentText3646 *192 (CommentText 3583 3647 uid 27,0 3584 3648 shape (Rectangle … … 3611 3675 titleBlock 1 3612 3676 ) 3613 *19 0(CommentText3677 *193 (CommentText 3614 3678 uid 30,0 3615 3679 shape (Rectangle … … 3641 3705 titleBlock 1 3642 3706 ) 3643 *19 1(CommentText3707 *194 (CommentText 3644 3708 uid 33,0 3645 3709 shape (Rectangle … … 3672 3736 titleBlock 1 3673 3737 ) 3674 *19 2(CommentText3738 *195 (CommentText 3675 3739 uid 36,0 3676 3740 shape (Rectangle … … 3703 3767 titleBlock 1 3704 3768 ) 3705 *19 3(CommentText3769 *196 (CommentText 3706 3770 uid 39,0 3707 3771 shape (Rectangle … … 3734 3798 titleBlock 1 3735 3799 ) 3736 *19 4(CommentText3800 *197 (CommentText 3737 3801 uid 42,0 3738 3802 shape (Rectangle … … 3765 3829 titleBlock 1 3766 3830 ) 3767 *19 5(CommentText3831 *198 (CommentText 3768 3832 uid 45,0 3769 3833 shape (Rectangle … … 3809 3873 oxt "14000,66000,55000,71000" 3810 3874 ) 3811 *19 6(CommentText3875 *199 (CommentText 3812 3876 uid 103,0 3813 3877 shape (Rectangle … … 3852 3916 color "26368,26368,26368" 3853 3917 ) 3854 packageList * 197(PackageList3918 packageList *200 (PackageList 3855 3919 uid 131,0 3856 3920 stg "VerticalLayoutStrategy" 3857 3921 textVec [ 3858 * 198(Text3922 *201 (Text 3859 3923 uid 132,0 3860 3924 va (VaSet … … 3865 3929 blo "0,1800" 3866 3930 ) 3867 * 199(MLText3931 *202 (MLText 3868 3932 uid 133,0 3869 3933 va (VaSet … … 3966 4030 ) 3967 4031 ) 3968 gi *20 0(GenericInterface4032 gi *203 (GenericInterface 3969 4033 ps "CenterOffsetStrategy" 3970 4034 matrix (Matrix … … 4063 4127 ) 4064 4128 ) 4065 DeclarativeBlock *20 1(SymDeclBlock4129 DeclarativeBlock *204 (SymDeclBlock 4066 4130 uid 1,0 4067 4131 stg "SymDeclLayoutStrategy" … … 4089 4153 font "Arial,8,1" 4090 4154 ) 4091 xt "0,5 1200,2400,52200"4155 xt "0,52000,2400,53000" 4092 4156 st "User:" 4093 blo "0,52 000"4157 blo "0,52800" 4094 4158 ) 4095 4159 internalLabel (Text … … 4108 4172 font "Courier New,8,0" 4109 4173 ) 4110 xt "2000,5 2200,2000,52200"4174 xt "2000,53000,2000,53000" 4111 4175 tm "SyDeclarativeTextMgr" 4112 4176 ) … … 4121 4185 ) 4122 4186 ) 4123 lastUid 1 495,04187 lastUid 1527,0 4124 4188 activeModelName "Symbol:CDM" 4125 4189 )
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