Ignore:
Timestamp:
01/05/11 17:19:13 (14 years ago)
Author:
neise
Message:
DRS write shift register & write config register
Location:
firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib
Files:
17 edited

Legend:

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  • firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib/hdl/data_generator.vhd

    r10073 r10081  
    6767
    6868      drs_read_s_cell_ready : in std_logic;
    69       drs_s_cell_array : in drs_s_cell_array_type
     69      drs_s_cell_array : in drs_s_cell_array_type;
     70     
     71      drs_readout_started : out std_logic
    7072      );
    7173end data_generator ;
     
    7375architecture Behavioral of data_generator is
    7476
    75 type state_generate_type is (INIT, CONFIG, CONFIG1, CONFIG2,CONFIG3, CONFIG4, CONFIG5, CONFIG6, WRITE_HEADER, WRITE_EXTERNAL_TRIGGER, WRITE_INTERNAL_TRIGGER, WRITE_BOARD_ID, WRITE_TEMPERATURES,
     77type state_generate_type is (INIT, CONFIG, CONFIG1, CONFIG2,CONFIG3, CONFIG4, CONFIG5, CONFIG6, CONFIG7, WRITE_HEADER, WRITE_EXTERNAL_TRIGGER, WRITE_INTERNAL_TRIGGER, WRITE_BOARD_ID, WRITE_TEMPERATURES,
    7678                             WRITE_DAC1, WRITE_DAC2, WRITE_CHANNEL_ID, WRITE_START_CELL, WRITE_ROI, WRITE_ADC_DATA, WRITE_DATA_END, WRITE_DATA_END_WAIT,
    7779                             WRITE_END_FLAG, WRITE_DATA_STOP,
     
    9395signal roi_max_int : roi_max_type;
    9496
     97signal sig_drs_readout_started : std_logic := '0';
     98
    9599begin
    96100 
     101  drs_readout_started <= sig_drs_readout_started;
    97102 
    98103        generate_data : process (clk)
     
    151156          if (drs_srin_write_ready = '1') then
    152157            roi_max_int <= roi_max;
    153             state_generate <= WRITE_DATA_IDLE;
    154           end if;
     158            state_generate <= CONFIG6;
     159          end if;
     160          when CONFIG6 =>
     161            drs_channel_id <= DRS_WRITE_CONFIG_REG;
     162            drs_srin_data <= "11111111";
     163            drs_srin_write_8b <= '1';
     164            if (drs_srin_write_ack = '1') then
     165              drs_srin_write_8b <= '0';
     166              state_generate <= CONFIG7;
     167            end if;
     168          when CONFIG7 =>
     169            if (drs_srin_write_ready = '1') then
     170              roi_max_int <= roi_max;
     171              state_generate <= WRITE_DATA_IDLE;
     172            end if;
    155173        -- end configure DRS
    156174
     
    161179--          if (ram_write_ea = '1' and (trigger_flag = '1' or s_trigger = '1')) then
    162180          if (ram_write_ea = '1' and trigger_flag = '1') then
     181            sig_drs_readout_started <= '1'; -- is set to '0' in state WRITE_DAC1
    163182            -- stop drs, dwrite low
    164183            drs_dwrite <= '0';
     
    193212
    194213        when WRITE_DAC1 =>
     214          sig_drs_readout_started <= '0'; -- is set to '1' in state WRITE_DATA_IDLE
    195215          data_out <= conv_std_logic_vector (dac_array (3), 16)
    196216                    & conv_std_logic_vector (dac_array (2), 16)
     
    256276                      & "000" & adc_otr(1) & adc_data_array(1)
    257277                      & "000" & adc_otr(0) & adc_data_array(0);
    258 --              data_out <= "00000" & conv_std_logic_vector (data_cntr, 11)
     278 --             data_out <= "00000" & conv_std_logic_vector (data_cntr, 11)
    259279--                          & "00010" & conv_std_logic_vector (data_cntr, 11)
    260280--                          & "00100" & conv_std_logic_vector (data_cntr, 11)
  • firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib/hdl/data_generator.vhd.bak

    r10073 r10081  
    6767
    6868      drs_read_s_cell_ready : in std_logic;
    69       drs_s_cell_array : in drs_s_cell_array_type
     69      drs_s_cell_array : in drs_s_cell_array_type;
     70     
     71      drs_readout_started : out std_logic
    7072      );
    7173end data_generator ;
     
    7375architecture Behavioral of data_generator is
    7476
    75 type state_generate_type is (INIT, CONFIG, CONFIG1, CONFIG2,CONFIG3, CONFIG4, CONFIG5, CONFIG6, WRITE_HEADER, WRITE_EXTERNAL_TRIGGER, WRITE_INTERNAL_TRIGGER, WRITE_BOARD_ID, WRITE_TEMPERATURES,
     77type state_generate_type is (INIT, CONFIG, CONFIG1, CONFIG2,CONFIG3, CONFIG4, CONFIG5, CONFIG6, CONFIG7, WRITE_HEADER, WRITE_EXTERNAL_TRIGGER, WRITE_INTERNAL_TRIGGER, WRITE_BOARD_ID, WRITE_TEMPERATURES,
    7678                             WRITE_DAC1, WRITE_DAC2, WRITE_CHANNEL_ID, WRITE_START_CELL, WRITE_ROI, WRITE_ADC_DATA, WRITE_DATA_END, WRITE_DATA_END_WAIT,
    7779                             WRITE_END_FLAG, WRITE_DATA_STOP,
     
    9395signal roi_max_int : roi_max_type;
    9496
     97signal sig_drs_readout_started : std_logic := '0';
     98
    9599begin
    96100 
     101  drs_readout_started <= sig_drs_readout_started;
    97102 
    98103        generate_data : process (clk)
     
    142147        when CONFIG4 =>
    143148          drs_channel_id <= DRS_WRITE_SHIFT_REG;
    144           drs_srin_data <= "10101010";
     149          drs_srin_data <= "11111111";
    145150          drs_srin_write_8b <= '1';
    146151          if (drs_srin_write_ack = '1') then
     
    151156          if (drs_srin_write_ready = '1') then
    152157            roi_max_int <= roi_max;
    153             state_generate <= WRITE_DATA_IDLE;
    154           end if;
     158            state_generate <= CONFIG6;
     159          end if;
     160          when CONFIG6 =>
     161            drs_channel_id <= DRS_WRITE_CONFIG_REG;
     162            drs_srin_data <= "11111111";
     163            drs_srin_write_8b <= '1';
     164            if (drs_srin_write_ack = '1') then
     165              drs_srin_write_8b <= '0';
     166              state_generate <= CONFIG7;
     167            end if;
     168          when CONFIG7 =>
     169            if (drs_srin_write_ready = '1') then
     170              roi_max_int <= roi_max;
     171              state_generate <= WRITE_DATA_IDLE;
     172            end if;
    155173        -- end configure DRS
    156174
     
    161179--          if (ram_write_ea = '1' and (trigger_flag = '1' or s_trigger = '1')) then
    162180          if (ram_write_ea = '1' and trigger_flag = '1') then
     181            sig_drs_readout_started <= '1'; -- is set to '0' in state WRITE_DAC1
    163182            -- stop drs, dwrite low
    164183            drs_dwrite <= '0';
     
    193212
    194213        when WRITE_DAC1 =>
     214          sig_drs_readout_started <= '0'; -- is set to '1' in state WRITE_DATA_IDLE
    195215          data_out <= conv_std_logic_vector (dac_array (3), 16)
    196216                    & conv_std_logic_vector (dac_array (2), 16)
     
    252272        when WRITE_ADC_DATA =>
    253273          if (data_cntr < roi_max (channel_id)) then
    254             data_out <= "000" & adc_otr(3) & adc_data_array(3)
    255                       & "000" & adc_otr(2) & adc_data_array(2)
    256                       & "000" & adc_otr(1) & adc_data_array(1)
    257                       & "000" & adc_otr(0) & adc_data_array(0);
    258 --              data_out <= "00000" & conv_std_logic_vector (data_cntr, 11)
    259 --                          & "00010" & conv_std_logic_vector (data_cntr, 11)
    260 --                          & "00100" & conv_std_logic_vector (data_cntr, 11)
    261 --                          & "00110" & conv_std_logic_vector (data_cntr, 11) ;
     274--            data_out <= "000" & adc_otr(3) & adc_data_array(3)
     275--                      & "000" & adc_otr(2) & adc_data_array(2)
     276--                      & "000" & adc_otr(1) & adc_data_array(1)
     277--                      & "000" & adc_otr(0) & adc_data_array(0);
     278              data_out <= "00000" & conv_std_logic_vector (data_cntr, 11)
     279                          & "00010" & conv_std_logic_vector (data_cntr, 11)
     280                          & "00100" & conv_std_logic_vector (data_cntr, 11)
     281                          & "00110" & conv_std_logic_vector (data_cntr, 11) ;
    262282            addr_cntr <= addr_cntr + 1;
    263283            state_generate <= WRITE_ADC_DATA;
  • firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib/hdl/drs_pulser_dummy.vhd

    r10072 r10081  
    6161            srin_write_ack <= '1';
    6262            srin_cntr <= 0;
    63             SRCLK_EN <= '1';
     63            --SRCLK_EN <= '1';
    6464            state_main <= SRIN_WRITE_8B;
    6565          end if;
     
    7575       
    7676        when SRIN_WRITE_8B =>
     77          SRCLK_EN <= '1';
    7778          srin_out <= srin_data (7 - srin_cntr);
    7879          if (srin_cntr = 7) then
    79             SRCLK_EN <= '0';
     80            --SRCLK_EN <= '0';
    8081            state_main <= SRIN_WRITE_END;
    8182          else
     
    8384          end if;
    8485        when SRIN_WRITE_END =>
    85           srin_out <= '0';
     86          SRCLK_EN <= '0';
     87          srin_out <= '1';
    8688          srin_write_ready <= '1';
    8789          srin_write_ack <= '0';
  • firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib/hdl/fad_board_struct.vhd

    r10078 r10081  
    33-- Created:
    44--          by - dneise.UNKNOWN (E5B-LABOR6)
    5 --          at - 12:19:07 05.01.2011
     5--          at - 17:46:34 05.01.2011
    66--
    77-- Generated by Mentor Graphics' HDL Designer(TM) 2009.2 (Build 10)
     
    7979-- Created:
    8080--          by - dneise.UNKNOWN (E5B-LABOR6)
    81 --          at - 12:19:08 05.01.2011
     81--          at - 17:46:35 05.01.2011
    8282--
    8383-- Generated by Mentor Graphics' HDL Designer(TM) 2009.2 (Build 10)
     
    124124   -- status:
    125125   SIGNAL shifting        : std_logic                    := '0';
     126
     127   -- Implicit buffer signal declarations
     128   SIGNAL SRIN_internal : std_logic;
    126129
    127130
     
    253256   -- HDL Embedded Text Block 9 eb3
    254257   -- eb3 9                         
    255    A0_T(0) <= CLK50_OUT;
    256    A0_T(1)  <= CLK25_OUT;
     258   A0_T(0) <= ready;
     259   A0_T(1) <= shifting;
    257260   A0_T(2) <= CLK25_PSOUT;
    258261   A0_T(3) <= PS_DIR_IN;
     
    262265   A0_T(7) <= DCM_locked;
    263266   
    264    A1_T(0) <= ready;
    265    A1_T(1) <= shifting;
    266    A1_T(2) <= PSDONE_extraOUT;
    267    A1_T(3) <= PSCLK_OUT;
    268    A1_T(4) <= LOCKED_extraOUT;
    269    
    270    A1_T(5) <= '0';
    271    A1_T(6) <= '0';
    272    A1_T(7) <= '0';
     267   A1_T(0) <= SRIN_internal;
     268   A1_T(1) <= PSDONE_extraOUT;
     269   A1_T(2) <= PSCLK_OUT;
     270   A1_T(3) <= LOCKED_extraOUT;
     271   
     272   A1_T(4) <= drs_channel_id(0);
     273   A1_T(5) <= drs_channel_id(1);
     274   A1_T(6) <= drs_channel_id(2);
     275   A1_T(7) <= drs_channel_id(3);
    273276
    274277
     
    311314         RSRLOAD         => RSRLOAD,
    312315         SRCLK           => SRCLK,
    313          SRIN_out        => SRIN,
     316         SRIN_out        => SRIN_internal,
    314317         adc_clk_en      => adc_clk_en,
    315318         adc_oeb         => OE_ADC,
     
    337340      );
    338341
     342   -- Implicit buffered output assignments
     343   SRIN <= SRIN_internal;
     344
    339345END struct;
  • firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib/hdl/fad_definitions.vhd

    r10072 r10081  
    140140constant CMD_PS_RESET : std_logic_vector     := X"17";
    141141-- DRS Registers
     142  constant DRS_CONFIG_REG : std_logic_vector := "1100"; 
    142143  constant DRS_WRITE_SHIFT_REG : std_logic_vector := "1101"; 
    143  
     144  constant DRS_WRITE_CONFIG_REG : std_logic_vector := "1110"; 
     145  constant DRS_DISABLE_ALL_OUTS : std_logic_vector := "1111"; 
    144146 
    145147-- Declare functions and procedure
  • firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib/hdl/fad_definitions.vhd.bak

    r9912 r10081  
    2323 
    2424  -- @ ETH zurich
    25     constant NETMASK : ip_type := (255, 255, 248, 0);
    26     constant IP_ADDRESS : ip_type := (192, 33, 99, 225);
    27     constant GATEWAY : ip_type := (192, 33, 96, 1);
     25--    constant NETMASK : ip_type := (255, 255, 248, 0);
     26--    constant IP_ADDRESS : ip_type := (192, 33, 99, 225);
     27--    constant GATEWAY : ip_type := (192, 33, 96, 1);
    2828
    2929  -- @ TU Dortmund
    30 --  constant NETMASK : ip_type := (255, 255, 255, 0);
    31 --  constant IP_ADDRESS : ip_type := (129, 217, 160, 119);
    32 --  constant GATEWAY : ip_type := (129, 217, 160, 1);
     30  constant NETMASK : ip_type := (255, 255, 255, 0);
     31  constant IP_ADDRESS : ip_type := (129, 217, 160, 119);
     32  constant GATEWAY : ip_type := (129, 217, 160, 1);
    3333
    3434  constant FIRST_PORT : integer := 5000;
     
    7979
    8080--
    81   constant W5300_TX_FIFO_SIZE : integer := (15360 / 2); -- Socket TX FIFO-Size in 16 Bit Words
     81  constant W5300_TX_FIFO_SIZE_8B : integer := 15360; -- Socket TX FIFO-Size in Bytes
     82  constant W5300_TX_FIFO_SIZE : integer := (W5300_TX_FIFO_SIZE_8B / 2); -- Socket TX FIFO-Size in 16 Bit Words
    8283
    8384  constant LOG2_OF_RAM_SIZE_64B : integer := 15;
     
    119120  constant CMD_READ : std_logic_vector        := X"0A";
    120121  constant CMD_WRITE : std_logic_vector       := X"05";
     122-- Config-RAM
     123  constant BADDR_ROI : std_logic_vector := X"00"; -- Baseaddress ROI-Values
     124  constant BADDR_DAC : std_logic_vector := X"24"; -- Baseaddress DAC-Values
    121125
    122126  constant CMD_DENABLE : std_logic_vector     := X"06";
     
    135139
    136140constant CMD_PS_RESET : std_logic_vector     := X"17";
    137 
     141-- DRS Registers
     142  constant DRS_WRITE_SHIFT_REG : std_logic_vector := "1101"; 
    138143 
    139144 
  • firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib/hdl/fad_main_struct.vhd

    r10078 r10081  
    33-- Created:
    44--          by - dneise.UNKNOWN (E5B-LABOR6)
    5 --          at - 12:19:06 05.01.2011
     5--          at - 17:46:33 05.01.2011
    66--
    77-- Generated by Mentor Graphics' HDL Designer(TM) 2009.2 (Build 10)
     
    8080-- Created:
    8181--          by - dneise.UNKNOWN (E5B-LABOR6)
    82 --          at - 12:19:07 05.01.2011
     82--          at - 17:46:34 05.01.2011
    8383--
    8484-- Generated by Mentor Graphics' HDL Designer(TM) 2009.2 (Build 10)
     
    137137   SIGNAL drs_read_s_cell        : std_logic                                    := '0';
    138138   SIGNAL drs_read_s_cell_ready  : std_logic;
     139   SIGNAL drs_readout_started    : std_logic;
    139140   SIGNAL drs_s_cell_array       : drs_s_cell_array_type;
    140141   SIGNAL drs_srin_data          : std_logic_vector(7 DOWNTO 0)                 := (others => '0');
     
    298299      drs_srin_write_ready  : IN     std_logic ;
    299300      drs_read_s_cell_ready : IN     std_logic ;
    300       drs_s_cell_array      : IN     drs_s_cell_array_type
     301      drs_s_cell_array      : IN     drs_s_cell_array_type ;
     302      drs_readout_started   : OUT    std_logic
    301303   );
    302304   END COMPONENT;
     
    596598         drs_srin_write_ready  => srin_write_ready,
    597599         drs_read_s_cell_ready => drs_read_s_cell_ready,
    598          drs_s_cell_array      => drs_s_cell_array
     600         drs_s_cell_array      => drs_s_cell_array,
     601         drs_readout_started   => drs_readout_started
    599602      );
    600603   I_main_drs_pulser : drs_pulser
     
    628631         amber           => amber,
    629632         red             => red,
    630          trigger         => trigger_out,
     633         trigger         => drs_readout_started,
    631634         socks_waiting   => socks_waiting,
    632635         socks_connected => socks_connected
  • firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib/hds/.xrf/fad_board_struct.xrf

    r10075 r10081  
    265265DESIGN @f@a@d_@board
    266266VIEW struct.bd
    267 NO_GRAPHIC 126
     267GRAPHIC 13136,0 127 0
     268DESIGN @f@a@d_@board
     269VIEW struct.bd
     270NO_GRAPHIC 129
    268271LIBRARY FACT_FAD_lib
    269272DESIGN @f@a@d_main
    270273VIEW struct
    271 GRAPHIC 169,0 128 0
    272 DESIGN @f@a@d_main
    273 VIEW symbol.sb
    274 GRAPHIC 14,0 129 1
    275 DESIGN @f@a@d_main
    276 VIEW symbol.sb
    277 GRAPHIC 1755,0 133 0
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    279 VIEW symbol.sb
    280 GRAPHIC 2710,0 134 0
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    294 VIEW symbol.sb
    295 GRAPHIC 1976,0 139 0
    296 DESIGN @f@a@d_main
    297 VIEW symbol.sb
    298 GRAPHIC 923,0 140 0
    299 DESIGN @f@a@d_main
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    308 DESIGN @f@a@d_main
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    310 GRAPHIC 4584,0 144 0
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    313 GRAPHIC 4589,0 145 0
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    316 GRAPHIC 4579,0 146 0
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    318 VIEW symbol.sb
    319 GRAPHIC 1389,0 147 0
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    321 VIEW symbol.sb
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  • firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib/hds/.xrf/fad_main_struct.xrf

    r10075 r10081  
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     359VIEW struct.bd
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     362VIEW struct.bd
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     365VIEW struct.bd
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     368VIEW struct.bd
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     371VIEW struct.bd
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     374VIEW struct.bd
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     377VIEW struct.bd
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     382DESIGN @f@a@d_main
     383VIEW struct.bd
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     398VIEW struct.bd
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     400DESIGN @f@a@d_main
     401VIEW struct.bd
     402NO_GRAPHIC 184
    400403LIBRARY FACT_FAD_lib
    401404DESIGN adc_buffer
    402405VIEW beha
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    404 DESIGN @f@a@d_main
    405 VIEW struct.bd
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     408VIEW struct.bd
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     411VIEW struct.bd
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    410413DESIGN clock_generator_var_ps
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     415GRAPHIC 168,0 197 0
    413416DESIGN clock_generator_var_ps
    414417VIEW symbol.sb
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     418GRAPHIC 848,0 198 0
    416419DESIGN clock_generator_var_ps
    417420VIEW symbol.sb
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     421GRAPHIC 703,0 199 0
    419422DESIGN clock_generator_var_ps
    420423VIEW symbol.sb
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     424GRAPHIC 698,0 200 0
    422425DESIGN clock_generator_var_ps
    423426VIEW symbol.sb
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     427GRAPHIC 126,0 201 0
    425428DESIGN clock_generator_var_ps
    426429VIEW symbol.sb
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     430GRAPHIC 643,0 202 0
    428431DESIGN clock_generator_var_ps
    429432VIEW symbol.sb
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     433GRAPHIC 121,0 203 0
    431434DESIGN clock_generator_var_ps
    432435VIEW symbol.sb
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     436GRAPHIC 481,0 204 0
    434437DESIGN clock_generator_var_ps
    435438VIEW symbol.sb
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     439GRAPHIC 544,0 205 0
    437440DESIGN clock_generator_var_ps
    438441VIEW symbol.sb
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     442GRAPHIC 524,0 206 0
    440443DESIGN clock_generator_var_ps
    441444VIEW symbol.sb
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     445GRAPHIC 539,0 207 0
    443446DESIGN clock_generator_var_ps
    444447VIEW symbol.sb
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     448GRAPHIC 529,0 208 0
    446449DESIGN clock_generator_var_ps
    447450VIEW symbol.sb
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     451GRAPHIC 534,0 209 0
    449452DESIGN clock_generator_var_ps
    450453VIEW symbol.sb
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     454GRAPHIC 475,0 210 0
    452455DESIGN clock_generator_var_ps
    453456VIEW symbol.sb
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     457GRAPHIC 463,0 211 0
    455458DESIGN clock_generator_var_ps
    456459VIEW symbol.sb
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    458 DESIGN @f@a@d_main
    459 VIEW struct.bd
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     461DESIGN @f@a@d_main
     462VIEW struct.bd
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    461464DESIGN control_unit
    462465VIEW symbol.sb
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     466GRAPHIC 130,0 218 0
    464467DESIGN control_unit
    465468VIEW symbol.sb
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     469GRAPHIC 135,0 219 0
    467470DESIGN control_unit
    468471VIEW symbol.sb
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     472GRAPHIC 170,0 220 0
    470473DESIGN control_unit
    471474VIEW symbol.sb
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     475GRAPHIC 175,0 221 0
    473476DESIGN control_unit
    474477VIEW symbol.sb
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     478GRAPHIC 160,0 222 0
    476479DESIGN control_unit
    477480VIEW symbol.sb
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     481GRAPHIC 145,0 223 0
    479482DESIGN control_unit
    480483VIEW symbol.sb
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     484GRAPHIC 140,0 224 0
    482485DESIGN control_unit
    483486VIEW symbol.sb
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     487GRAPHIC 180,0 225 0
    485488DESIGN control_unit
    486489VIEW symbol.sb
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     490GRAPHIC 558,0 226 0
    488491DESIGN control_unit
    489492VIEW symbol.sb
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    491494DESIGN control_unit
    492495VIEW symbol.sb
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    494497DESIGN control_unit
    495498VIEW symbol.sb
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     499GRAPHIC 165,0 231 0
    497500DESIGN control_unit
    498501VIEW symbol.sb
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     502GRAPHIC 155,0 232 0
    500503DESIGN control_unit
    501504VIEW symbol.sb
    502 GRAPHIC 150,0 232 0
    503 DESIGN @f@a@d_main
    504 VIEW struct.bd
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     506DESIGN @f@a@d_main
     507VIEW struct.bd
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    506509DESIGN data@r@a@m_64b_16b_width14_5
    507510VIEW data@r@a@m_64b_16b_width14_5_a
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    509512DESIGN data@r@a@m_64b_16b_width14_5
    510513VIEW data@r@a@m_64b_16b_width14_5_a
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     514GRAPHIC 53,0 239 0
    512515DESIGN data@r@a@m_64b_16b_width14_5
    513516VIEW data@r@a@m_64b_16b_width14_5_a
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     517GRAPHIC 58,0 240 0
    515518DESIGN data@r@a@m_64b_16b_width14_5
    516519VIEW data@r@a@m_64b_16b_width14_5_a
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     520GRAPHIC 63,0 241 0
    518521DESIGN data@r@a@m_64b_16b_width14_5
    519522VIEW data@r@a@m_64b_16b_width14_5_a
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    521524DESIGN data@r@a@m_64b_16b_width14_5
    522525VIEW data@r@a@m_64b_16b_width14_5_a
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    525528VIEW data@r@a@m_64b_16b_width14_5_a
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    528 VIEW struct.bd
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    530 DESIGN data_generator
    531 VIEW symbol.sb
    532 GRAPHIC 14,0 247 1
    533 DESIGN data_generator
    534 VIEW @behavioral
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    536 DESIGN data_generator
    537 VIEW @behavioral
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    539 DESIGN data_generator
    540 VIEW @behavioral
    541 GRAPHIC 58,0 254 0
    542 DESIGN data_generator
    543 VIEW @behavioral
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    545 DESIGN data_generator
    546 VIEW @behavioral
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    548 DESIGN data_generator
    549 VIEW @behavioral
    550 GRAPHIC 402,0 257 0
    551 DESIGN data_generator
    552 VIEW @behavioral
    553 GRAPHIC 407,0 258 0
    554 DESIGN data_generator
    555 VIEW @behavioral
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    557 DESIGN data_generator
    558 VIEW @behavioral
    559 GRAPHIC 1122,0 261 0
    560 DESIGN data_generator
    561 VIEW @behavioral
    562 GRAPHIC 963,0 263 0
    563 DESIGN data_generator
    564 VIEW @behavioral
    565 GRAPHIC 1127,0 265 0
    566 DESIGN data_generator
    567 VIEW @behavioral
    568 GRAPHIC 1048,0 267 0
    569 DESIGN data_generator
    570 VIEW @behavioral
    571 GRAPHIC 958,0 268 0
    572 DESIGN data_generator
    573 VIEW @behavioral
    574 GRAPHIC 1053,0 269 0
    575 DESIGN data_generator
    576 VIEW @behavioral
    577 GRAPHIC 1201,0 270 0
    578 DESIGN data_generator
    579 VIEW @behavioral
    580 GRAPHIC 1196,0 271 0
    581 DESIGN data_generator
    582 VIEW @behavioral
    583 GRAPHIC 1206,0 272 0
    584 DESIGN data_generator
    585 VIEW @behavioral
    586 GRAPHIC 473,0 273 0
    587 DESIGN data_generator
    588 VIEW @behavioral
    589 GRAPHIC 412,0 274 0
    590 DESIGN data_generator
    591 VIEW @behavioral
    592 GRAPHIC 1085,0 275 0
    593 DESIGN data_generator
    594 VIEW @behavioral
    595 GRAPHIC 1090,0 276 0
    596 DESIGN data_generator
    597 VIEW @behavioral
    598 GRAPHIC 1240,0 277 0
    599 DESIGN data_generator
    600 VIEW @behavioral
    601 GRAPHIC 526,0 278 0
    602 DESIGN data_generator
    603 VIEW @behavioral
    604 GRAPHIC 88,0 279 0
    605 DESIGN data_generator
    606 VIEW @behavioral
    607 GRAPHIC 285,0 280 0
    608 DESIGN data_generator
    609 VIEW @behavioral
    610 GRAPHIC 93,0 281 0
    611 DESIGN data_generator
    612 VIEW @behavioral
    613 GRAPHIC 98,0 282 0
    614 DESIGN data_generator
    615 VIEW @behavioral
    616 GRAPHIC 1164,0 283 0
    617 DESIGN data_generator
    618 VIEW @behavioral
    619 GRAPHIC 1159,0 285 0
    620 DESIGN data_generator
    621 VIEW @behavioral
    622 GRAPHIC 898,0 286 0
    623 DESIGN data_generator
    624 VIEW @behavioral
    625 GRAPHIC 637,0 287 0
    626 DESIGN data_generator
    627 VIEW @behavioral
    628 GRAPHIC 1395,0 288 0
    629 DESIGN data_generator
    630 VIEW @behavioral
    631 GRAPHIC 1427,0 289 0
    632 DESIGN data_generator
    633 VIEW @behavioral
    634 GRAPHIC 676,0 290 0
    635 DESIGN data_generator
    636 VIEW @behavioral
    637 GRAPHIC 845,0 291 0
    638 DESIGN data_generator
    639 VIEW @behavioral
    640 GRAPHIC 681,0 292 0
    641 DESIGN data_generator
    642 VIEW @behavioral
    643 GRAPHIC 801,0 293 0
    644 DESIGN data_generator
    645 VIEW @behavioral
    646 GRAPHIC 1464,0 294 0
    647 DESIGN data_generator
    648 VIEW @behavioral
    649 GRAPHIC 1469,0 295 0
    650 DESIGN data_generator
    651 VIEW @behavioral
    652 GRAPHIC 1459,0 296 0
    653 DESIGN data_generator
    654 VIEW @behavioral
    655 GRAPHIC 1474,0 297 0
    656 DESIGN data_generator
    657 VIEW @behavioral
    658 GRAPHIC 806,0 298 0
    659 DESIGN data_generator
    660 VIEW @behavioral
    661 GRAPHIC 811,0 299 0
    662 DESIGN @f@a@d_main
    663 VIEW struct.bd
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    665 DESIGN @f@a@d_main
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     1535GRAPHIC 5114,0 711 0
     1536DESIGN @f@a@d_main
     1537VIEW struct.bd
     1538GRAPHIC 5122,0 712 0
     1539DESIGN @f@a@d_main
     1540VIEW struct.bd
     1541GRAPHIC 5130,0 713 0
     1542DESIGN @f@a@d_main
     1543VIEW struct.bd
     1544GRAPHIC 10194,0 714 0
     1545DESIGN @f@a@d_main
     1546VIEW struct.bd
     1547GRAPHIC 10202,0 715 0
     1548DESIGN @f@a@d_main
     1549VIEW struct.bd
     1550GRAPHIC 5106,0 716 0
     1551DESIGN @f@a@d_main
     1552VIEW struct.bd
     1553GRAPHIC 6362,0 717 0
     1554DESIGN @f@a@d_main
     1555VIEW struct.bd
     1556GRAPHIC 6452,0 718 0
     1557DESIGN @f@a@d_main
     1558VIEW struct.bd
     1559GRAPHIC 8752,0 719 0
     1560DESIGN @f@a@d_main
     1561VIEW struct.bd
     1562GRAPHIC 9233,0 720 0
     1563DESIGN @f@a@d_main
     1564VIEW struct.bd
     1565GRAPHIC 9241,0 721 0
     1566DESIGN @f@a@d_main
     1567VIEW struct.bd
     1568GRAPHIC 9943,0 722 0
     1569DESIGN @f@a@d_main
     1570VIEW struct.bd
     1571GRAPHIC 9951,0 723 0
     1572DESIGN @f@a@d_main
     1573VIEW struct.bd
     1574GRAPHIC 10637,0 724 0
     1575DESIGN @f@a@d_main
     1576VIEW struct.bd
     1577GRAPHIC 10629,0 725 0
     1578DESIGN @f@a@d_main
     1579VIEW struct.bd
     1580GRAPHIC 6276,0 729 0
     1581DESIGN @f@a@d_main
     1582VIEW struct.bd
     1583GRAPHIC 3888,0 730 0
     1584DESIGN @f@a@d_main
     1585VIEW struct.bd
     1586NO_GRAPHIC 732
  • firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib/hds/@f@a@d_@board/struct.bd

    r10075 r10081  
    149149(vvPair
    150150variable "date"
    151 value "04.01.2011"
     151value "05.01.2011"
    152152)
    153153(vvPair
    154154variable "day"
    155 value "Di"
     155value "Mi"
    156156)
    157157(vvPair
    158158variable "day_long"
    159 value "Dienstag"
     159value "Mittwoch"
    160160)
    161161(vvPair
    162162variable "dd"
    163 value "04"
     163value "05"
    164164)
    165165(vvPair
     
    297297(vvPair
    298298variable "time"
    299 value "18:14:31"
     299value "17:34:20"
    300300)
    301301(vvPair
     
    27572757)
    27582758xt "39000,62400,67500,63200"
    2759 st "SIGNAL board_id        : std_logic_vector(3 downto 0)
    2760 "
     2759st "SIGNAL board_id        : std_logic_vector(3 downto 0)"
    27612760)
    27622761)
     
    27762775)
    27772776xt "39000,63200,67500,64000"
    2778 st "SIGNAL crate_id        : std_logic_vector(1 downto 0)
    2779 "
     2777st "SIGNAL crate_id        : std_logic_vector(1 downto 0)"
    27802778)
    27812779)
     
    31003098)
    31013099xt "39000,61600,63000,62400"
    3102 st "SIGNAL adc_data_array  : adc_data_array_type
    3103 "
     3100st "SIGNAL adc_data_array  : adc_data_array_type"
    31043101)
    31053102)
     
    31193116)
    31203117xt "39000,35800,67500,36600"
    3121 st "RSRLOAD         : std_logic                    := '0'
    3122 "
     3118st "RSRLOAD         : std_logic                    := '0'"
    31233119)
    31243120)
     
    31833179)
    31843180xt "39000,60000,71000,60800"
    3185 st "SIGNAL SRCLK           : std_logic                    := '0'
    3186 "
     3181st "SIGNAL SRCLK           : std_logic                    := '0'"
    31873182)
    31883183)
     
    32023197)
    32033198xt "39000,66400,67500,67200"
    3204 st "SIGNAL sensor_cs       : std_logic_vector(3 DOWNTO 0)
    3205 "
     3199st "SIGNAL sensor_cs       : std_logic_vector(3 DOWNTO 0)"
    32063200)
    32073201)
     
    32203214)
    32213215xt "39000,23000,54000,23800"
    3222 st "DAC_CS          : std_logic
    3223 "
     3216st "DAC_CS          : std_logic"
    32243217)
    32253218)
     
    32853278)
    32863279xt "39000,15800,54000,16600"
    3287 st "X_50M           : STD_LOGIC
    3288 "
     3280st "X_50M           : STD_LOGIC"
    32893281)
    32903282)
     
    33033295)
    33043296xt "39000,14200,54000,15000"
    3305 st "TRG             : STD_LOGIC
    3306 "
     3297st "TRG             : STD_LOGIC"
    33073298)
    33083299)
     
    34133404)
    34143405xt "39000,19000,64000,19800"
    3415 st "A_CLK           : std_logic_vector(3 downto 0)
    3416 "
     3406st "A_CLK           : std_logic_vector(3 downto 0)"
    34173407)
    34183408)
     
    34313421)
    34323422xt "39000,51200,57500,52000"
    3433 st "SIGNAL CLK_25_PS       : std_logic
    3434 "
     3423st "SIGNAL CLK_25_PS       : std_logic"
    34353424)
    34363425)
     
    34963485)
    34973486xt "39000,30200,54000,31000"
    3498 st "OE_ADC          : STD_LOGIC
    3499 "
     3487st "OE_ADC          : STD_LOGIC"
    35003488)
    35013489)
     
    35603548)
    35613549xt "39000,7000,64000,7800"
    3562 st "A_OTR           : std_logic_vector(3 DOWNTO 0)
    3563 "
     3550st "A_OTR           : std_logic_vector(3 DOWNTO 0)"
    35643551)
    35653552)
     
    38503837)
    38513838xt "39000,3800,64500,4600"
    3852 st "A0_D            : std_logic_vector(11 DOWNTO 0)
    3853 "
     3839st "A0_D            : std_logic_vector(11 DOWNTO 0)"
    38543840)
    38553841)
     
    38693855)
    38703856xt "39000,4600,64500,5400"
    3871 st "A1_D            : std_logic_vector(11 DOWNTO 0)
    3872 "
     3857st "A1_D            : std_logic_vector(11 DOWNTO 0)"
    38733858)
    38743859)
     
    38883873)
    38893874xt "39000,5400,64500,6200"
    3890 st "A2_D            : std_logic_vector(11 DOWNTO 0)
    3891 "
     3875st "A2_D            : std_logic_vector(11 DOWNTO 0)"
    38923876)
    38933877)
     
    39073891)
    39083892xt "39000,6200,64500,7000"
    3909 st "A3_D            : std_logic_vector(11 DOWNTO 0)
    3910 "
     3893st "A3_D            : std_logic_vector(11 DOWNTO 0)"
    39113894)
    39123895)
     
    40163999)
    40174000xt "39000,19800,54000,20600"
    4018 st "D0_SRCLK        : STD_LOGIC
    4019 "
     4001st "D0_SRCLK        : STD_LOGIC"
    40204002)
    40214003)
     
    40344016)
    40354017xt "39000,20600,54000,21400"
    4036 st "D1_SRCLK        : STD_LOGIC
    4037 "
     4018st "D1_SRCLK        : STD_LOGIC"
    40384019)
    40394020)
     
    40524033)
    40534034xt "39000,21400,54000,22200"
    4054 st "D2_SRCLK        : STD_LOGIC
    4055 "
     4035st "D2_SRCLK        : STD_LOGIC"
    40564036)
    40574037)
     
    40704050)
    40714051xt "39000,22200,54000,23000"
    4072 st "D3_SRCLK        : STD_LOGIC
    4073 "
     4052st "D3_SRCLK        : STD_LOGIC"
    40744053)
    40754054)
     
    42684247)
    42694248xt "39000,7800,54000,8600"
    4270 st "D0_SROUT        : std_logic
    4271 "
     4249st "D0_SROUT        : std_logic"
    42724250)
    42734251)
     
    42864264)
    42874265xt "39000,8600,54000,9400"
    4288 st "D1_SROUT        : std_logic
    4289 "
     4266st "D1_SROUT        : std_logic"
    42904267)
    42914268)
     
    43044281)
    43054282xt "39000,9400,54000,10200"
    4306 st "D2_SROUT        : std_logic
    4307 "
     4283st "D2_SROUT        : std_logic"
    43084284)
    43094285)
     
    43224298)
    43234299xt "39000,10200,54000,11000"
    4324 st "D3_SROUT        : std_logic
    4325 "
     4300st "D3_SROUT        : std_logic"
    43264301)
    43274302)
     
    43874362)
    43884363xt "39000,25400,73500,26200"
    4389 st "D_A             : std_logic_vector(3 DOWNTO 0) := (others => '0')
    4390 "
     4364st "D_A             : std_logic_vector(3 DOWNTO 0) := (others => '0')"
    43914365)
    43924366)
     
    44514425)
    44524426xt "39000,24600,67500,25400"
    4453 st "DWRITE          : std_logic                    := '0'
    4454 "
     4427st "DWRITE          : std_logic                    := '0'"
    44554428)
    44564429)
     
    47804753)
    47814754xt "39000,38200,54000,39000"
    4782 st "T0_CS           : std_logic
    4783 "
     4755st "T0_CS           : std_logic"
    47844756)
    47854757)
     
    47984770)
    47994771xt "39000,39000,54000,39800"
    4800 st "T1_CS           : std_logic
    4801 "
     4772st "T1_CS           : std_logic"
    48024773)
    48034774)
     
    48164787)
    48174788xt "39000,39800,54000,40600"
    4818 st "T2_CS           : std_logic
    4819 "
     4789st "T2_CS           : std_logic"
    48204790)
    48214791)
     
    48344804)
    48354805xt "39000,40600,54000,41400"
    4836 st "T3_CS           : std_logic
    4837 "
     4806st "T3_CS           : std_logic"
    48384807)
    48394808)
     
    48964865)
    48974866xt "39000,37400,54000,38200"
    4898 st "S_CLK           : std_logic
    4899 "
     4867st "S_CLK           : std_logic"
    49004868)
    49014869)
     
    49154883)
    49164884xt "39000,42200,64000,43000"
    4917 st "W_A             : std_logic_vector(9 DOWNTO 0)
    4918 "
     4885st "W_A             : std_logic_vector(9 DOWNTO 0)"
    49194886)
    49204887)
     
    49344901)
    49354902xt "39000,47000,64500,47800"
    4936 st "W_D             : std_logic_vector(15 DOWNTO 0)
    4937 "
     4903st "W_D             : std_logic_vector(15 DOWNTO 0)"
    49384904)
    49394905)
     
    49534919)
    49544920xt "39000,44600,67500,45400"
    4955 st "W_RES           : std_logic                    := '1'
    4956 "
     4921st "W_RES           : std_logic                    := '1'"
    49574922)
    49584923)
     
    49724937)
    49734938xt "39000,43800,67500,44600"
    4974 st "W_RD            : std_logic                    := '1'
    4975 "
     4939st "W_RD            : std_logic                    := '1'"
    49764940)
    49774941)
     
    49914955)
    49924956xt "39000,45400,67500,46200"
    4993 st "W_WR            : std_logic                    := '1'
    4994 "
     4957st "W_WR            : std_logic                    := '1'"
    49954958)
    49964959)
     
    50094972)
    50104973xt "39000,15000,54000,15800"
    5011 st "W_INT           : std_logic
    5012 "
     4974st "W_INT           : std_logic"
    50134975)
    50144976)
     
    50284990)
    50294991xt "39000,43000,67500,43800"
    5030 st "W_CS            : std_logic                    := '1'
    5031 "
     4992st "W_CS            : std_logic                    := '1'"
    50324993)
    50334994)
     
    50895050)
    50905051xt "39000,29400,67500,30200"
    5091 st "MOSI            : std_logic                    := '0'
    5092 "
     5052st "MOSI            : std_logic                    := '0'"
    50935053)
    50945054)
     
    51535113)
    51545114xt "39000,46200,54000,47000"
    5155 st "MISO            : std_logic
    5156 "
     5115st "MISO            : std_logic"
    51575116)
    51585117)
     
    55805539)
    55815540xt "39000,41400,54000,42200"
    5582 st "TRG_V           : std_logic
    5583 "
     5541st "TRG_V           : std_logic"
    55845542)
    55855543)
     
    55985556)
    55995557xt "39000,33400,54000,34200"
    5600 st "RS485_C_RE      : std_logic
    5601 "
     5558st "RS485_C_RE      : std_logic"
    56025559)
    56035560)
     
    56165573)
    56175574xt "39000,31800,54000,32600"
    5618 st "RS485_C_DE      : std_logic
    5619 "
     5575st "RS485_C_DE      : std_logic"
    56205576)
    56215577)
     
    56345590)
    56355591xt "39000,35000,54000,35800"
    5636 st "RS485_E_RE      : std_logic
    5637 "
     5592st "RS485_E_RE      : std_logic"
    56385593)
    56395594)
     
    56525607)
    56535608xt "39000,34200,54000,35000"
    5654 st "RS485_E_DE      : std_logic
    5655 "
     5609st "RS485_E_DE      : std_logic"
    56565610)
    56575611)
     
    56715625)
    56725626xt "39000,23800,67500,24600"
    5673 st "DENABLE         : std_logic                    := '0'
    5674 "
     5627st "DENABLE         : std_logic                    := '0'"
    56755628)
    56765629)
     
    56895642)
    56905643xt "39000,27800,54000,28600"
    5691 st "EE_CS           : std_logic
    5692 "
     5644st "EE_CS           : std_logic"
    56935645)
    56945646)
     
    59335885)
    59345886xt "39000,26200,73500,27000"
    5935 st "D_T             : std_logic_vector(7 DOWNTO 0) := (OTHERS => '0')
    5936 "
     5887st "D_T             : std_logic_vector(7 DOWNTO 0) := (OTHERS => '0')"
    59375888)
    59385889)
     
    59975948)
    59985949xt "39000,11000,64000,11800"
    5999 st "D_PLLLCK        : std_logic_vector(3 DOWNTO 0)
    6000 "
     5950st "D_PLLLCK        : std_logic_vector(3 DOWNTO 0)"
    60015951)
    60025952)
     
    60616011)
    60626012xt "39000,27000,73500,27800"
    6063 st "D_T2            : std_logic_vector(3 DOWNTO 0) := (others => '0')
    6064 "
     6013st "D_T2            : std_logic_vector(3 DOWNTO 0) := (others => '0')"
    60656014)
    60666015)
     
    63016250)
    63026251xt "39000,17400,73500,18200"
    6303 st "A1_T            : std_logic_vector(7 DOWNTO 0) := (OTHERS => '0')
    6304 "
     6252st "A1_T            : std_logic_vector(7 DOWNTO 0) := (OTHERS => '0')"
    63056253)
    63066254)
     
    63196267)
    63206268xt "39000,64800,57500,65600"
    6321 st "SIGNAL dummy           : std_logic
    6322 "
     6269st "SIGNAL dummy           : std_logic"
    63236270)
    63246271)
     
    66566603)
    66576604xt "39000,64000,77000,64800"
    6658 st "SIGNAL drs_channel_id  : std_logic_vector(3 downto 0) := (others => '0')
    6659 "
     6605st "SIGNAL drs_channel_id  : std_logic_vector(3 downto 0) := (others => '0')"
    66606606)
    66616607)
     
    66746620)
    66756621xt "39000,52800,57500,53600"
    6676 st "SIGNAL CLK_50          : std_logic
    6677 "
     6622st "SIGNAL CLK_50          : std_logic"
    66786623)
    66796624)
     
    70597004)
    70607005xt "39000,52000,57500,52800"
    7061 st "SIGNAL CLK_25_PS1      : std_logic
    7062 "
     7006st "SIGNAL CLK_25_PS1      : std_logic"
    70637007)
    70647008)
     
    70787022)
    70797023xt "39000,60800,71000,61600"
    7080 st "SIGNAL adc_clk_en      : std_logic                    := '0'
    7081 "
     7024st "SIGNAL adc_clk_en      : std_logic                    := '0'"
    70827025)
    70837026)
     
    71427085)
    71437086xt "39000,16600,73500,17400"
    7144 st "A0_T            : std_logic_vector(7 DOWNTO 0) := (others => '0')
    7145 "
     7087st "A0_T            : std_logic_vector(7 DOWNTO 0) := (others => '0')"
    71467088)
    71477089)
     
    71727114st "
    71737115-- eb3 9                         
    7174 A0_T(0) <= CLK50_OUT;
    7175 A0_T(1)  <= CLK25_OUT;
     7116A0_T(0) <= ready;
     7117A0_T(1) <= shifting;
    71767118A0_T(2) <= CLK25_PSOUT;
    71777119A0_T(3) <= PS_DIR_IN;
     
    71817123A0_T(7) <= DCM_locked;
    71827124
    7183 A1_T(0) <= ready;
    7184 A1_T(1) <= shifting;
    7185 A1_T(2) <= PSDONE_extraOUT;
    7186 A1_T(3) <= PSCLK_OUT;
    7187 A1_T(4) <= LOCKED_extraOUT;
     7125A1_T(0) <= SRIN;
     7126A1_T(1) <= PSDONE_extraOUT;
     7127A1_T(2) <= PSCLK_OUT;
     7128A1_T(3) <= LOCKED_extraOUT;
    71887129
    7189 A1_T(5) <= '0';
    7190 A1_T(6) <= '0';
    7191 A1_T(7) <= '0';
     7130A1_T(4) <= drs_channel_id(0);
     7131A1_T(5) <= drs_channel_id(1);
     7132A1_T(6) <= drs_channel_id(2);
     7133A1_T(7) <= drs_channel_id(3);
     7134
    71927135"
    71937136tm "HdlTextMgr"
     
    72077150lineWidth 2
    72087151)
    7209 xt "106000,122000,112000,136000"
     7152xt "106000,122000,112000,137000"
    72107153)
    72117154oxt "0,0,8000,10000"
     
    72447187fg "49152,49152,49152"
    72457188)
    7246 xt "106250,134250,107750,135750"
     7189xt "106250,135250,107750,136750"
    72477190iconName "TextFile.png"
    72487191iconMaskName "TextFile.msk"
     
    72657208)
    72667209xt "39000,50400,57500,51200"
    7267 st "SIGNAL CLK50_OUT       : std_logic
    7268 "
     7210st "SIGNAL CLK50_OUT       : std_logic"
    72697211)
    72707212)
     
    72837225)
    72847226xt "39000,48800,57500,49600"
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    72877228)
    72887229)
     
    73017242)
    73027243xt "39000,49600,57500,50400"
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    73057245)
    73067246)
     
    73197259)
    73207260xt "39000,58400,57500,59200"
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    73237262)
    73247263)
     
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     7278st "SIGNAL PS_DO_IN        : std_logic"
    73417279)
    73427280)
     
    73557293)
    73567294xt "39000,56800,57500,57600"
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    7358 "
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    73597296)
    73607297)
     
    73737310)
    73747311xt "39000,57600,57500,58400"
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     7312st "SIGNAL PSINCDEC_OUT    : std_logic"
    73777313)
    73787314)
     
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    73987333)
     
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    74197353)
     
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     7373SIGNAL shifting        : std_logic                    := '0'"
    74417374)
    74427375)
     
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    74597391)
    74607392)
     
    74737405)
    74747406xt "39000,55200,57500,56000"
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    74787409)
     
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    75597488)
     
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    76217549)
     
    76797607)
    76807608xt "39000,12600,54000,13400"
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     7609st "RS485_E_DI      : std_logic"
    76837610)
    76847611)
     
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    76987625xt "39000,13400,54000,14200"
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    7700 "
     7626st "RS485_E_DO      : std_logic"
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    77027628)
     
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    78097734)
     
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    79587882)
    79597883)
     
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    79737897xt "39000,28600,54000,29400"
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    7975 "
     7898st "GREEN_LED       : std_logic"
    79767899)
    79777900)
     
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    79917914xt "39000,31000,54000,31800"
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    79957917)
     
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     13018decl (Decl
    1306213019n "S_CLK"
    1306313020t "std_logic"
     
    1306813025uid 3654,0
    1306913026)
    13070 *437 (LeafLogPort
     13027*438 (LeafLogPort
    1307113028port (LogicalPort
    1307213029m 1
     
    1308113038uid 3656,0
    1308213039)
    13083 *438 (LeafLogPort
     13040*439 (LeafLogPort
    1308413041port (LogicalPort
    1308513042m 2
     
    1309413051uid 3658,0
    1309513052)
    13096 *439 (LeafLogPort
     13053*440 (LeafLogPort
    1309713054port (LogicalPort
    1309813055m 1
     
    1310713064uid 3660,0
    1310813065)
    13109 *440 (LeafLogPort
     13066*441 (LeafLogPort
    1311013067port (LogicalPort
    1311113068m 1
     
    1312013077uid 3662,0
    1312113078)
    13122 *441 (LeafLogPort
     13079*442 (LeafLogPort
    1312313080port (LogicalPort
    1312413081m 1
     
    1313313090uid 3664,0
    1313413091)
    13135 *442 (LeafLogPort
     13092*443 (LeafLogPort
    1313613093port (LogicalPort
    1313713094decl (Decl
     
    1314413101uid 3666,0
    1314513102)
    13146 *443 (LeafLogPort
     13103*444 (LeafLogPort
    1314713104port (LogicalPort
    1314813105m 1
     
    1315713114uid 3668,0
    1315813115)
    13159 *444 (LeafLogPort
     13116*445 (LeafLogPort
    1316013117port (LogicalPort
    1316113118m 1
     
    1317013127uid 3696,0
    1317113128)
    13172 *445 (LeafLogPort
     13129*446 (LeafLogPort
    1317313130port (LogicalPort
    1317413131m 2
     
    1318413141uid 3698,0
    1318513142)
    13186 *446 (LeafLogPort
    13187 port (LogicalPort
    13188 m 1
    13189 decl (Decl
    13190 n "TRG_V"
    13191 t "std_logic"
    13192 o 48
    13193 suid 126,0
    13194 )
    13195 )
    13196 uid 3886,0
    13197 )
    1319813143*447 (LeafLogPort
    1319913144port (LogicalPort
    1320013145m 1
    1320113146decl (Decl
    13202 n "RS485_C_RE"
    13203 t "std_logic"
    13204 o 38
    13205 suid 127,0
    13206 )
    13207 )
    13208 uid 3888,0
     13147n "TRG_V"
     13148t "std_logic"
     13149o 48
     13150suid 126,0
     13151)
     13152)
     13153uid 3886,0
    1320913154)
    1321013155*448 (LeafLogPort
     
    1321213157m 1
    1321313158decl (Decl
    13214 n "RS485_C_DE"
    13215 t "std_logic"
    13216 o 36
    13217 suid 128,0
    13218 )
    13219 )
    13220 uid 3890,0
     13159n "RS485_C_RE"
     13160t "std_logic"
     13161o 38
     13162suid 127,0
     13163)
     13164)
     13165uid 3888,0
    1322113166)
    1322213167*449 (LeafLogPort
     
    1322413169m 1
    1322513170decl (Decl
    13226 n "RS485_E_RE"
    13227 t "std_logic"
    13228 o 40
    13229 suid 129,0
    13230 )
    13231 )
    13232 uid 3892,0
     13171n "RS485_C_DE"
     13172t "std_logic"
     13173o 36
     13174suid 128,0
     13175)
     13176)
     13177uid 3890,0
    1323313178)
    1323413179*450 (LeafLogPort
     
    1323613181m 1
    1323713182decl (Decl
    13238 n "RS485_E_DE"
    13239 t "std_logic"
    13240 o 39
    13241 suid 130,0
    13242 )
    13243 )
    13244 uid 3894,0
     13183n "RS485_E_RE"
     13184t "std_logic"
     13185o 40
     13186suid 129,0
     13187)
     13188)
     13189uid 3892,0
    1324513190)
    1324613191*451 (LeafLogPort
     
    1324813193m 1
    1324913194decl (Decl
     13195n "RS485_E_DE"
     13196t "std_logic"
     13197o 39
     13198suid 130,0
     13199)
     13200)
     13201uid 3894,0
     13202)
     13203*452 (LeafLogPort
     13204port (LogicalPort
     13205m 1
     13206decl (Decl
    1325013207n "DENABLE"
    1325113208t "std_logic"
     
    1325713214uid 3896,0
    1325813215)
    13259 *452 (LeafLogPort
     13216*453 (LeafLogPort
    1326013217port (LogicalPort
    1326113218m 1
     
    1326913226uid 3900,0
    1327013227)
    13271 *453 (LeafLogPort
     13228*454 (LeafLogPort
    1327213229port (LogicalPort
    1327313230m 1
     
    1328313240uid 5322,0
    1328413241)
    13285 *454 (LeafLogPort
     13242*455 (LeafLogPort
    1328613243port (LogicalPort
    1328713244decl (Decl
     
    1329613253scheme 0
    1329713254)
    13298 *455 (LeafLogPort
     13255*456 (LeafLogPort
    1329913256port (LogicalPort
    1330013257m 1
     
    1331113268scheme 0
    1331213269)
    13313 *456 (LeafLogPort
     13270*457 (LeafLogPort
    1331413271port (LogicalPort
    1331513272m 1
     
    1332613283scheme 0
    1332713284)
    13328 *457 (LeafLogPort
     13285*458 (LeafLogPort
    1332913286port (LogicalPort
    1333013287m 4
     
    1333913296scheme 0
    1334013297)
    13341 *458 (LeafLogPort
     13298*459 (LeafLogPort
    1334213299port (LogicalPort
    1334313300m 4
     
    1335313310uid 8875,0
    1335413311)
    13355 *459 (LeafLogPort
    13356 port (LogicalPort
    13357 m 4
    13358 decl (Decl
    13359 n "CLK_50"
    13360 t "std_logic"
    13361 o 61
    13362 suid 163,0
    13363 )
    13364 )
    13365 uid 9516,0
    13366 )
    1336713312*460 (LeafLogPort
    1336813313port (LogicalPort
    1336913314m 4
    1337013315decl (Decl
    13371 n "CLK_25_PS1"
    13372 t "std_logic"
    13373 o 60
    13374 suid 164,0
    13375 )
    13376 )
    13377 uid 10056,0
     13316n "CLK_50"
     13317t "std_logic"
     13318o 61
     13319suid 163,0
     13320)
     13321)
     13322uid 9516,0
    1337813323)
    1337913324*461 (LeafLogPort
     
    1338113326m 4
    1338213327decl (Decl
     13328n "CLK_25_PS1"
     13329t "std_logic"
     13330o 60
     13331suid 164,0
     13332)
     13333)
     13334uid 10056,0
     13335)
     13336*462 (LeafLogPort
     13337port (LogicalPort
     13338m 4
     13339decl (Decl
    1338313340n "adc_clk_en"
    1338413341t "std_logic"
     
    1339013347uid 10058,0
    1339113348)
    13392 *462 (LeafLogPort
     13349*463 (LeafLogPort
    1339313350port (LogicalPort
    1339413351m 1
     
    1340513362scheme 0
    1340613363)
    13407 *463 (LeafLogPort
    13408 port (LogicalPort
    13409 m 4
    13410 decl (Decl
    13411 n "CLK50_OUT"
    13412 t "std_logic"
    13413 o 58
    13414 suid 184,0
    13415 )
    13416 )
    13417 uid 10704,0
    13418 )
    1341913364*464 (LeafLogPort
    1342013365port (LogicalPort
    1342113366m 4
    1342213367decl (Decl
    13423 n "CLK25_OUT"
    13424 t "std_logic"
    13425 o 56
    13426 suid 185,0
    13427 )
    13428 )
    13429 uid 10706,0
     13368n "CLK50_OUT"
     13369t "std_logic"
     13370o 58
     13371suid 184,0
     13372)
     13373)
     13374uid 10704,0
    1343013375)
    1343113376*465 (LeafLogPort
     
    1343313378m 4
    1343413379decl (Decl
    13435 n "CLK25_PSOUT"
    13436 t "std_logic"
    13437 o 57
    13438 suid 186,0
    13439 )
    13440 )
    13441 uid 10708,0
     13380n "CLK25_OUT"
     13381t "std_logic"
     13382o 56
     13383suid 185,0
     13384)
     13385)
     13386uid 10706,0
    1344213387)
    1344313388*466 (LeafLogPort
     
    1344513390m 4
    1344613391decl (Decl
    13447 n "PS_DIR_IN"
    13448 t "std_logic"
    13449 o 68
    13450 suid 187,0
    13451 )
    13452 )
    13453 uid 10710,0
     13392n "CLK25_PSOUT"
     13393t "std_logic"
     13394o 57
     13395suid 186,0
     13396)
     13397)
     13398uid 10708,0
    1345413399)
    1345513400*467 (LeafLogPort
     
    1345713402m 4
    1345813403decl (Decl
    13459 n "PS_DO_IN"
    13460 t "std_logic"
    13461 o 69
    13462 suid 188,0
    13463 )
    13464 )
    13465 uid 10712,0
     13404n "PS_DIR_IN"
     13405t "std_logic"
     13406o 68
     13407suid 187,0
     13408)
     13409)
     13410uid 10710,0
    1346613411)
    1346713412*468 (LeafLogPort
     
    1346913414m 4
    1347013415decl (Decl
    13471 n "PSEN_OUT"
    13472 t "std_logic"
    13473 o 66
    13474 suid 189,0
    13475 )
    13476 )
    13477 uid 10714,0
     13416n "PS_DO_IN"
     13417t "std_logic"
     13418o 69
     13419suid 188,0
     13420)
     13421)
     13422uid 10712,0
    1347813423)
    1347913424*469 (LeafLogPort
     
    1348113426m 4
    1348213427decl (Decl
     13428n "PSEN_OUT"
     13429t "std_logic"
     13430o 66
     13431suid 189,0
     13432)
     13433)
     13434uid 10714,0
     13435)
     13436*470 (LeafLogPort
     13437port (LogicalPort
     13438m 4
     13439decl (Decl
    1348313440n "PSINCDEC_OUT"
    1348413441t "std_logic"
     
    1348913446uid 10716,0
    1349013447)
    13491 *470 (LeafLogPort
     13448*471 (LeafLogPort
    1349213449port (LogicalPort
    1349313450m 4
     
    1350313460uid 10718,0
    1350413461)
    13505 *471 (LeafLogPort
     13462*472 (LeafLogPort
    1350613463port (LogicalPort
    1350713464m 4
     
    1351813475uid 10720,0
    1351913476)
    13520 *472 (LeafLogPort
     13477*473 (LeafLogPort
    1352113478port (LogicalPort
    1352213479m 4
     
    1353413491uid 10722,0
    1353513492)
    13536 *473 (LeafLogPort
    13537 port (LogicalPort
    13538 m 4
    13539 decl (Decl
    13540 n "PSDONE_extraOUT"
    13541 t "std_logic"
    13542 o 65
    13543 suid 194,0
    13544 )
    13545 )
    13546 uid 10724,0
    13547 )
    1354813493*474 (LeafLogPort
    1354913494port (LogicalPort
    1355013495m 4
    1355113496decl (Decl
    13552 n "PSCLK_OUT"
    13553 t "std_logic"
    13554 o 64
    13555 suid 195,0
    13556 )
    13557 )
    13558 uid 10726,0
     13497n "PSDONE_extraOUT"
     13498t "std_logic"
     13499o 65
     13500suid 194,0
     13501)
     13502)
     13503uid 10724,0
    1355913504)
    1356013505*475 (LeafLogPort
     
    1356213507m 4
    1356313508decl (Decl
     13509n "PSCLK_OUT"
     13510t "std_logic"
     13511o 64
     13512suid 195,0
     13513)
     13514)
     13515uid 10726,0
     13516)
     13517*476 (LeafLogPort
     13518port (LogicalPort
     13519m 4
     13520decl (Decl
    1356413521n "LOCKED_extraOUT"
    1356513522t "std_logic"
     
    1357013527uid 10728,0
    1357113528)
    13572 *476 (LeafLogPort
     13529*477 (LeafLogPort
    1357313530port (LogicalPort
    1357413531decl (Decl
     
    1358213539scheme 0
    1358313540)
    13584 *477 (LeafLogPort
     13541*478 (LeafLogPort
    1358513542port (LogicalPort
    1358613543m 1
     
    1359513552scheme 0
    1359613553)
    13597 *478 (LeafLogPort
     13554*479 (LeafLogPort
    1359813555port (LogicalPort
    1359913556decl (Decl
     
    1360713564scheme 0
    1360813565)
    13609 *479 (LeafLogPort
     13566*480 (LeafLogPort
    1361013567port (LogicalPort
    1361113568decl (Decl
     
    1361913576scheme 0
    1362013577)
    13621 *480 (LeafLogPort
     13578*481 (LeafLogPort
    1362213579port (LogicalPort
    1362313580m 1
     
    1363213589uid 12336,0
    1363313590)
    13634 *481 (LeafLogPort
    13635 port (LogicalPort
    13636 m 1
    13637 decl (Decl
    13638 n "AMBER_LED"
    13639 t "std_logic"
    13640 o 31
    13641 suid 207,0
    13642 )
    13643 )
    13644 uid 12768,0
    13645 )
    1364613591*482 (LeafLogPort
    1364713592port (LogicalPort
    1364813593m 1
    1364913594decl (Decl
     13595n "AMBER_LED"
     13596t "std_logic"
     13597o 31
     13598suid 207,0
     13599)
     13600)
     13601uid 12768,0
     13602)
     13603*483 (LeafLogPort
     13604port (LogicalPort
     13605m 1
     13606decl (Decl
    1365013607n "GREEN_LED"
    1365113608t "std_logic"
     
    1365613613uid 12770,0
    1365713614)
    13658 *483 (LeafLogPort
     13615*484 (LeafLogPort
    1365913616port (LogicalPort
    1366013617m 1
     
    1367513632uid 67,0
    1367613633optionalChildren [
    13677 *484 (Sheet
     13634*485 (Sheet
    1367813635sheetRow (SheetRow
    1367913636headerVa (MVa
     
    1369213649font "Tahoma,10,0"
    1369313650)
    13694 emptyMRCItem *485 (MRCItem
    13695 litem &392
     13651emptyMRCItem *486 (MRCItem
     13652litem &393
    1369613653pos 79
    1369713654dimension 20
     
    1369913656uid 69,0
    1370013657optionalChildren [
    13701 *486 (MRCItem
    13702 litem &393
     13658*487 (MRCItem
     13659litem &394
    1370313660pos 0
    1370413661dimension 20
    1370513662uid 70,0
    1370613663)
    13707 *487 (MRCItem
    13708 litem &394
     13664*488 (MRCItem
     13665litem &395
    1370913666pos 1
    1371013667dimension 23
    1371113668uid 71,0
    1371213669)
    13713 *488 (MRCItem
    13714 litem &395
     13670*489 (MRCItem
     13671litem &396
    1371513672pos 2
    1371613673hidden 1
     
    1371813675uid 72,0
    1371913676)
    13720 *489 (MRCItem
    13721 litem &405
     13677*490 (MRCItem
     13678litem &406
    1372213679pos 52
    1372313680dimension 20
    1372413681uid 328,0
    1372513682)
    13726 *490 (MRCItem
    13727 litem &406
     13683*491 (MRCItem
     13684litem &407
    1372813685pos 53
    1372913686dimension 20
    1373013687uid 330,0
    1373113688)
    13732 *491 (MRCItem
    13733 litem &407
     13689*492 (MRCItem
     13690litem &408
    1373413691pos 54
    1373513692dimension 20
    1373613693uid 1492,0
    1373713694)
    13738 *492 (MRCItem
    13739 litem &408
     13695*493 (MRCItem
     13696litem &409
    1374013697pos 0
    1374113698dimension 20
    1374213699uid 2436,0
    1374313700)
    13744 *493 (MRCItem
    13745 litem &409
     13701*494 (MRCItem
     13702litem &410
    1374613703pos 55
    1374713704dimension 20
    1374813705uid 2438,0
    1374913706)
    13750 *494 (MRCItem
    13751 litem &410
     13707*495 (MRCItem
     13708litem &411
    1375213709pos 56
    1375313710dimension 20
    1375413711uid 3038,0
    1375513712)
    13756 *495 (MRCItem
    13757 litem &411
     13713*496 (MRCItem
     13714litem &412
    1375813715pos 1
    1375913716dimension 20
    1376013717uid 3040,0
    1376113718)
    13762 *496 (MRCItem
    13763 litem &412
     13719*497 (MRCItem
     13720litem &413
    1376413721pos 2
    1376513722dimension 20
    1376613723uid 3277,0
    1376713724)
    13768 *497 (MRCItem
    13769 litem &413
     13725*498 (MRCItem
     13726litem &414
    1377013727pos 3
    1377113728dimension 20
    1377213729uid 3279,0
    1377313730)
    13774 *498 (MRCItem
    13775 litem &414
     13731*499 (MRCItem
     13732litem &415
    1377613733pos 4
    1377713734dimension 20
    1377813735uid 3281,0
    1377913736)
    13780 *499 (MRCItem
    13781 litem &415
     13737*500 (MRCItem
     13738litem &416
    1378213739pos 57
    1378313740dimension 20
    1378413741uid 3283,0
    1378513742)
    13786 *500 (MRCItem
    13787 litem &416
     13743*501 (MRCItem
     13744litem &417
    1378813745pos 5
    1378913746dimension 20
    1379013747uid 3383,0
    1379113748)
    13792 *501 (MRCItem
    13793 litem &417
     13749*502 (MRCItem
     13750litem &418
    1379413751pos 6
    1379513752dimension 20
    1379613753uid 3385,0
    1379713754)
    13798 *502 (MRCItem
    13799 litem &418
     13755*503 (MRCItem
     13756litem &419
    1380013757pos 7
    1380113758dimension 20
    1380213759uid 3387,0
    1380313760)
    13804 *503 (MRCItem
    13805 litem &419
     13761*504 (MRCItem
     13762litem &420
    1380613763pos 8
    1380713764dimension 20
    1380813765uid 3389,0
    1380913766)
    13810 *504 (MRCItem
    13811 litem &420
     13767*505 (MRCItem
     13768litem &421
    1381213769pos 9
    1381313770dimension 20
    1381413771uid 3391,0
    1381513772)
    13816 *505 (MRCItem
    13817 litem &421
     13773*506 (MRCItem
     13774litem &422
    1381813775pos 10
    1381913776dimension 20
    1382013777uid 3393,0
    1382113778)
    13822 *506 (MRCItem
    13823 litem &422
     13779*507 (MRCItem
     13780litem &423
    1382413781pos 11
    1382513782dimension 20
    1382613783uid 3469,0
    1382713784)
    13828 *507 (MRCItem
    13829 litem &423
     13785*508 (MRCItem
     13786litem &424
    1383013787pos 12
    1383113788dimension 20
    1383213789uid 3471,0
    1383313790)
    13834 *508 (MRCItem
    13835 litem &424
     13791*509 (MRCItem
     13792litem &425
    1383613793pos 13
    1383713794dimension 20
    1383813795uid 3473,0
    1383913796)
    13840 *509 (MRCItem
    13841 litem &425
     13797*510 (MRCItem
     13798litem &426
    1384213799pos 14
    1384313800dimension 20
    1384413801uid 3475,0
    1384513802)
    13846 *510 (MRCItem
    13847 litem &426
     13803*511 (MRCItem
     13804litem &427
    1384813805pos 15
    1384913806dimension 20
    1385013807uid 3525,0
    1385113808)
    13852 *511 (MRCItem
    13853 litem &427
     13809*512 (MRCItem
     13810litem &428
    1385413811pos 16
    1385513812dimension 20
    1385613813uid 3527,0
    1385713814)
    13858 *512 (MRCItem
    13859 litem &428
     13815*513 (MRCItem
     13816litem &429
    1386013817pos 17
    1386113818dimension 20
    1386213819uid 3529,0
    1386313820)
    13864 *513 (MRCItem
    13865 litem &429
     13821*514 (MRCItem
     13822litem &430
    1386613823pos 18
    1386713824dimension 20
    1386813825uid 3531,0
    1386913826)
    13870 *514 (MRCItem
    13871 litem &430
     13827*515 (MRCItem
     13828litem &431
    1387213829pos 19
    1387313830dimension 20
    1387413831uid 3533,0
    1387513832)
    13876 *515 (MRCItem
    13877 litem &431
     13833*516 (MRCItem
     13834litem &432
    1387813835pos 20
    1387913836dimension 20
    1388013837uid 3535,0
    1388113838)
    13882 *516 (MRCItem
    13883 litem &432
     13839*517 (MRCItem
     13840litem &433
    1388413841pos 21
    1388513842dimension 20
    1388613843uid 3647,0
    1388713844)
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    13889 litem &433
     13845*518 (MRCItem
     13846litem &434
    1389013847pos 22
    1389113848dimension 20
    1389213849uid 3649,0
    1389313850)
    13894 *518 (MRCItem
    13895 litem &434
     13851*519 (MRCItem
     13852litem &435
    1389613853pos 23
    1389713854dimension 20
    1389813855uid 3651,0
    1389913856)
    13900 *519 (MRCItem
    13901 litem &435
     13857*520 (MRCItem
     13858litem &436
    1390213859pos 24
    1390313860dimension 20
    1390413861uid 3653,0
    1390513862)
    13906 *520 (MRCItem
    13907 litem &436
     13863*521 (MRCItem
     13864litem &437
    1390813865pos 25
    1390913866dimension 20
    1391013867uid 3655,0
    1391113868)
    13912 *521 (MRCItem
    13913 litem &437
     13869*522 (MRCItem
     13870litem &438
    1391413871pos 26
    1391513872dimension 20
    1391613873uid 3657,0
    1391713874)
    13918 *522 (MRCItem
    13919 litem &438
     13875*523 (MRCItem
     13876litem &439
    1392013877pos 27
    1392113878dimension 20
    1392213879uid 3659,0
    1392313880)
    13924 *523 (MRCItem
    13925 litem &439
     13881*524 (MRCItem
     13882litem &440
    1392613883pos 28
    1392713884dimension 20
    1392813885uid 3661,0
    1392913886)
    13930 *524 (MRCItem
    13931 litem &440
     13887*525 (MRCItem
     13888litem &441
    1393213889pos 29
    1393313890dimension 20
    1393413891uid 3663,0
    1393513892)
    13936 *525 (MRCItem
    13937 litem &441
     13893*526 (MRCItem
     13894litem &442
    1393813895pos 30
    1393913896dimension 20
    1394013897uid 3665,0
    1394113898)
    13942 *526 (MRCItem
    13943 litem &442
     13899*527 (MRCItem
     13900litem &443
    1394413901pos 31
    1394513902dimension 20
    1394613903uid 3667,0
    1394713904)
    13948 *527 (MRCItem
    13949 litem &443
     13905*528 (MRCItem
     13906litem &444
    1395013907pos 32
    1395113908dimension 20
    1395213909uid 3669,0
    1395313910)
    13954 *528 (MRCItem
    13955 litem &444
     13911*529 (MRCItem
     13912litem &445
    1395613913pos 33
    1395713914dimension 20
    1395813915uid 3697,0
    1395913916)
    13960 *529 (MRCItem
    13961 litem &445
     13917*530 (MRCItem
     13918litem &446
    1396213919pos 34
    1396313920dimension 20
    1396413921uid 3699,0
    1396513922)
    13966 *530 (MRCItem
    13967 litem &446
     13923*531 (MRCItem
     13924litem &447
    1396813925pos 35
    1396913926dimension 20
    1397013927uid 3887,0
    1397113928)
    13972 *531 (MRCItem
    13973 litem &447
     13929*532 (MRCItem
     13930litem &448
    1397413931pos 36
    1397513932dimension 20
    1397613933uid 3889,0
    1397713934)
    13978 *532 (MRCItem
    13979 litem &448
     13935*533 (MRCItem
     13936litem &449
    1398013937pos 37
    1398113938dimension 20
    1398213939uid 3891,0
    1398313940)
    13984 *533 (MRCItem
    13985 litem &449
     13941*534 (MRCItem
     13942litem &450
    1398613943pos 38
    1398713944dimension 20
    1398813945uid 3893,0
    1398913946)
    13990 *534 (MRCItem
    13991 litem &450
     13947*535 (MRCItem
     13948litem &451
    1399213949pos 39
    1399313950dimension 20
    1399413951uid 3895,0
    1399513952)
    13996 *535 (MRCItem
    13997 litem &451
     13953*536 (MRCItem
     13954litem &452
    1399813955pos 40
    1399913956dimension 20
    1400013957uid 3897,0
    1400113958)
    14002 *536 (MRCItem
    14003 litem &452
     13959*537 (MRCItem
     13960litem &453
    1400413961pos 41
    1400513962dimension 20
    1400613963uid 3901,0
    1400713964)
    14008 *537 (MRCItem
    14009 litem &453
     13965*538 (MRCItem
     13966litem &454
    1401013967pos 42
    1401113968dimension 20
    1401213969uid 5323,0
    1401313970)
    14014 *538 (MRCItem
    14015 litem &454
     13971*539 (MRCItem
     13972litem &455
    1401613973pos 43
    1401713974dimension 20
    1401813975uid 6778,0
    1401913976)
    14020 *539 (MRCItem
    14021 litem &455
     13977*540 (MRCItem
     13978litem &456
    1402213979pos 44
    1402313980dimension 20
    1402413981uid 6873,0
    1402513982)
    14026 *540 (MRCItem
    14027 litem &456
     13983*541 (MRCItem
     13984litem &457
    1402813985pos 45
    1402913986dimension 20
    1403013987uid 7135,0
    1403113988)
    14032 *541 (MRCItem
    14033 litem &457
     13989*542 (MRCItem
     13990litem &458
    1403413991pos 58
    1403513992dimension 20
    1403613993uid 7474,0
    1403713994)
    14038 *542 (MRCItem
    14039 litem &458
     13995*543 (MRCItem
     13996litem &459
    1404013997pos 59
    1404113998dimension 20
    1404213999uid 8876,0
    1404314000)
    14044 *543 (MRCItem
    14045 litem &459
     14001*544 (MRCItem
     14002litem &460
    1404614003pos 60
    1404714004dimension 20
    1404814005uid 9517,0
    1404914006)
    14050 *544 (MRCItem
    14051 litem &460
     14007*545 (MRCItem
     14008litem &461
    1405214009pos 61
    1405314010dimension 20
    1405414011uid 10057,0
    1405514012)
    14056 *545 (MRCItem
    14057 litem &461
     14013*546 (MRCItem
     14014litem &462
    1405814015pos 62
    1405914016dimension 20
    1406014017uid 10059,0
    1406114018)
    14062 *546 (MRCItem
    14063 litem &462
     14019*547 (MRCItem
     14020litem &463
    1406414021pos 46
    1406514022dimension 20
    1406614023uid 10295,0
    1406714024)
    14068 *547 (MRCItem
    14069 litem &463
     14025*548 (MRCItem
     14026litem &464
    1407014027pos 63
    1407114028dimension 20
    1407214029uid 10705,0
    1407314030)
    14074 *548 (MRCItem
    14075 litem &464
     14031*549 (MRCItem
     14032litem &465
    1407614033pos 64
    1407714034dimension 20
    1407814035uid 10707,0
    1407914036)
    14080 *549 (MRCItem
    14081 litem &465
     14037*550 (MRCItem
     14038litem &466
    1408214039pos 65
    1408314040dimension 20
    1408414041uid 10709,0
    1408514042)
    14086 *550 (MRCItem
    14087 litem &466
     14043*551 (MRCItem
     14044litem &467
    1408814045pos 66
    1408914046dimension 20
    1409014047uid 10711,0
    1409114048)
    14092 *551 (MRCItem
    14093 litem &467
     14049*552 (MRCItem
     14050litem &468
    1409414051pos 67
    1409514052dimension 20
    1409614053uid 10713,0
    1409714054)
    14098 *552 (MRCItem
    14099 litem &468
     14055*553 (MRCItem
     14056litem &469
    1410014057pos 68
    1410114058dimension 20
    1410214059uid 10715,0
    1410314060)
    14104 *553 (MRCItem
    14105 litem &469
     14061*554 (MRCItem
     14062litem &470
    1410614063pos 69
    1410714064dimension 20
    1410814065uid 10717,0
    1410914066)
    14110 *554 (MRCItem
    14111 litem &470
     14067*555 (MRCItem
     14068litem &471
    1411214069pos 70
    1411314070dimension 20
    1411414071uid 10719,0
    1411514072)
    14116 *555 (MRCItem
    14117 litem &471
     14073*556 (MRCItem
     14074litem &472
    1411814075pos 71
    1411914076dimension 20
    1412014077uid 10721,0
    1412114078)
    14122 *556 (MRCItem
    14123 litem &472
     14079*557 (MRCItem
     14080litem &473
    1412414081pos 72
    1412514082dimension 20
    1412614083uid 10723,0
    1412714084)
    14128 *557 (MRCItem
    14129 litem &473
     14085*558 (MRCItem
     14086litem &474
    1413014087pos 73
    1413114088dimension 20
    1413214089uid 10725,0
    1413314090)
    14134 *558 (MRCItem
    14135 litem &474
     14091*559 (MRCItem
     14092litem &475
    1413614093pos 74
    1413714094dimension 20
    1413814095uid 10727,0
    1413914096)
    14140 *559 (MRCItem
    14141 litem &475
     14097*560 (MRCItem
     14098litem &476
    1414214099pos 75
    1414314100dimension 20
    1414414101uid 10729,0
    1414514102)
    14146 *560 (MRCItem
    14147 litem &476
     14103*561 (MRCItem
     14104litem &477
    1414814105pos 47
    1414914106dimension 20
    1415014107uid 11085,0
    1415114108)
    14152 *561 (MRCItem
    14153 litem &477
     14109*562 (MRCItem
     14110litem &478
    1415414111pos 48
    1415514112dimension 20
    1415614113uid 11087,0
    1415714114)
    14158 *562 (MRCItem
    14159 litem &478
     14115*563 (MRCItem
     14116litem &479
    1416014117pos 49
    1416114118dimension 20
    1416214119uid 11505,0
    1416314120)
    14164 *563 (MRCItem
    14165 litem &479
     14121*564 (MRCItem
     14122litem &480
    1416614123pos 50
    1416714124dimension 20
    1416814125uid 11507,0
    1416914126)
    14170 *564 (MRCItem
    14171 litem &480
     14127*565 (MRCItem
     14128litem &481
    1417214129pos 51
    1417314130dimension 20
    1417414131uid 12337,0
    1417514132)
    14176 *565 (MRCItem
    14177 litem &481
     14133*566 (MRCItem
     14134litem &482
    1417814135pos 76
    1417914136dimension 20
    1418014137uid 12769,0
    1418114138)
    14182 *566 (MRCItem
    14183 litem &482
     14139*567 (MRCItem
     14140litem &483
    1418414141pos 77
    1418514142dimension 20
    1418614143uid 12771,0
    1418714144)
    14188 *567 (MRCItem
    14189 litem &483
     14145*568 (MRCItem
     14146litem &484
    1419014147pos 78
    1419114148dimension 20
     
    1420314160uid 73,0
    1420414161optionalChildren [
    14205 *568 (MRCItem
    14206 litem &396
     14162*569 (MRCItem
     14163litem &397
    1420714164pos 0
    1420814165dimension 20
    1420914166uid 74,0
    1421014167)
    14211 *569 (MRCItem
    14212 litem &398
     14168*570 (MRCItem
     14169litem &399
    1421314170pos 1
    1421414171dimension 50
    1421514172uid 75,0
    1421614173)
    14217 *570 (MRCItem
    14218 litem &399
     14174*571 (MRCItem
     14175litem &400
    1421914176pos 2
    1422014177dimension 100
    1422114178uid 76,0
    1422214179)
    14223 *571 (MRCItem
    14224 litem &400
     14180*572 (MRCItem
     14181litem &401
    1422514182pos 3
    1422614183dimension 50
    1422714184uid 77,0
    1422814185)
    14229 *572 (MRCItem
    14230 litem &401
     14186*573 (MRCItem
     14187litem &402
    1423114188pos 4
    1423214189dimension 100
    1423314190uid 78,0
    1423414191)
    14235 *573 (MRCItem
    14236 litem &402
     14192*574 (MRCItem
     14193litem &403
    1423714194pos 5
    1423814195dimension 100
    1423914196uid 79,0
    1424014197)
    14241 *574 (MRCItem
    14242 litem &403
     14198*575 (MRCItem
     14199litem &404
    1424314200pos 6
    1424414201dimension 92
    1424514202uid 80,0
    1424614203)
    14247 *575 (MRCItem
    14248 litem &404
     14204*576 (MRCItem
     14205litem &405
    1424914206pos 7
    1425014207dimension 80
     
    1426614223genericsCommonDM (CommonDM
    1426714224ldm (LogicalDM
    14268 emptyRow *576 (LEmptyRow
     14225emptyRow *577 (LEmptyRow
    1426914226)
    1427014227uid 83,0
    1427114228optionalChildren [
    14272 *577 (RefLabelRowHdr
    14273 )
    14274 *578 (TitleRowHdr
    14275 )
    14276 *579 (FilterRowHdr
    14277 )
    14278 *580 (RefLabelColHdr
     14229*578 (RefLabelRowHdr
     14230)
     14231*579 (TitleRowHdr
     14232)
     14233*580 (FilterRowHdr
     14234)
     14235*581 (RefLabelColHdr
    1427914236tm "RefLabelColHdrMgr"
    1428014237)
    14281 *581 (RowExpandColHdr
     14238*582 (RowExpandColHdr
    1428214239tm "RowExpandColHdrMgr"
    1428314240)
    14284 *582 (GroupColHdr
     14241*583 (GroupColHdr
    1428514242tm "GroupColHdrMgr"
    1428614243)
    14287 *583 (NameColHdr
     14244*584 (NameColHdr
    1428814245tm "GenericNameColHdrMgr"
    1428914246)
    14290 *584 (TypeColHdr
     14247*585 (TypeColHdr
    1429114248tm "GenericTypeColHdrMgr"
    1429214249)
    14293 *585 (InitColHdr
     14250*586 (InitColHdr
    1429414251tm "GenericValueColHdrMgr"
    1429514252)
    14296 *586 (PragmaColHdr
     14253*587 (PragmaColHdr
    1429714254tm "GenericPragmaColHdrMgr"
    1429814255)
    14299 *587 (EolColHdr
     14256*588 (EolColHdr
    1430014257tm "GenericEolColHdrMgr"
    1430114258)
     
    1430714264uid 95,0
    1430814265optionalChildren [
    14309 *588 (Sheet
     14266*589 (Sheet
    1431014267sheetRow (SheetRow
    1431114268headerVa (MVa
     
    1432414281font "Tahoma,10,0"
    1432514282)
    14326 emptyMRCItem *589 (MRCItem
    14327 litem &576
    14328 pos 0
    14329 dimension 20
    14330 )
    14331 uid 97,0
    14332 optionalChildren [
    14333 *590 (MRCItem
     14283emptyMRCItem *590 (MRCItem
    1433414284litem &577
    1433514285pos 0
    1433614286dimension 20
    14337 uid 98,0
    14338 )
     14287)
     14288uid 97,0
     14289optionalChildren [
    1433914290*591 (MRCItem
    1434014291litem &578
     14292pos 0
     14293dimension 20
     14294uid 98,0
     14295)
     14296*592 (MRCItem
     14297litem &579
    1434114298pos 1
    1434214299dimension 23
    1434314300uid 99,0
    1434414301)
    14345 *592 (MRCItem
    14346 litem &579
     14302*593 (MRCItem
     14303litem &580
    1434714304pos 2
    1434814305hidden 1
     
    1436114318uid 101,0
    1436214319optionalChildren [
    14363 *593 (MRCItem
    14364 litem &580
     14320*594 (MRCItem
     14321litem &581
    1436514322pos 0
    1436614323dimension 20
    1436714324uid 102,0
    1436814325)
    14369 *594 (MRCItem
    14370 litem &582
     14326*595 (MRCItem
     14327litem &583
    1437114328pos 1
    1437214329dimension 50
    1437314330uid 103,0
    1437414331)
    14375 *595 (MRCItem
    14376 litem &583
     14332*596 (MRCItem
     14333litem &584
    1437714334pos 2
    1437814335dimension 100
    1437914336uid 104,0
    1438014337)
    14381 *596 (MRCItem
    14382 litem &584
     14338*597 (MRCItem
     14339litem &585
    1438314340pos 3
    1438414341dimension 100
    1438514342uid 105,0
    1438614343)
    14387 *597 (MRCItem
    14388 litem &585
     14344*598 (MRCItem
     14345litem &586
    1438914346pos 4
    1439014347dimension 50
    1439114348uid 106,0
    1439214349)
    14393 *598 (MRCItem
    14394 litem &586
     14350*599 (MRCItem
     14351litem &587
    1439514352pos 5
    1439614353dimension 50
    1439714354uid 107,0
    1439814355)
    14399 *599 (MRCItem
    14400 litem &587
     14356*600 (MRCItem
     14357litem &588
    1440114358pos 6
    1440214359dimension 80
  • firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib/hds/@f@a@d_@board/struct.bd.bak

    r10075 r10081  
    149149(vvPair
    150150variable "date"
    151 value "04.01.2011"
     151value "05.01.2011"
    152152)
    153153(vvPair
    154154variable "day"
    155 value "Di"
     155value "Mi"
    156156)
    157157(vvPair
    158158variable "day_long"
    159 value "Dienstag"
     159value "Mittwoch"
    160160)
    161161(vvPair
    162162variable "dd"
    163 value "04"
     163value "05"
    164164)
    165165(vvPair
     
    297297(vvPair
    298298variable "time"
    299 value "13:01:09"
     299value "15:55:05"
    300300)
    301301(vvPair
     
    71297129A1_T(4) <= LOCKED_extraOUT;
    71307130
    7131 A1_T(5) <= '0';
     7131A1_T(5) <= SRIN;
    71327132A1_T(6) <= '0';
    71337133A1_T(7) <= '0';
     
    71497149lineWidth 2
    71507150)
    7151 xt "106000,122000,112000,136000"
     7151xt "106000,122000,112000,137000"
    71527152)
    71537153oxt "0,0,8000,10000"
     
    71867186fg "49152,49152,49152"
    71877187)
    7188 xt "106250,134250,107750,135750"
     7188xt "106250,135250,107750,136750"
    71897189iconName "TextFile.png"
    71907190iconMaskName "TextFile.msk"
     
    1135111351vasetType 3
    1135211352)
    11353 xt "80750,142000,87000,142000"
    11354 pts [
    11355 "80750,142000"
     11353xt "80750,142000,87000,143000"
     11354pts [
     11355"80750,143000"
    1135611356"87000,142000"
    1135711357]
    1135811358)
    11359 start &61
     11359start &62
    1136011360end &262
    11361 ss 0
    1136211361sat 32
    1136311362eat 32
     
    1137411373isHidden 1
    1137511374)
    11376 xt "83000,141000,88100,142000"
     11375xt "83000,142000,88100,143000"
    1137711376st "GREEN_LED"
    11378 blo "83000,141800"
     11377blo "83000,142800"
    1137911378tm "WireNameMgr"
    1138011379)
     
    1138911388vasetType 3
    1139011389)
    11391 xt "80750,143000,87000,143000"
    11392 pts [
    11393 "80750,143000"
     11390xt "80750,142000,87000,143000"
     11391pts [
     11392"80750,142000"
    1139411393"87000,143000"
    1139511394]
    1139611395)
    11397 start &62
     11396start &61
    1139811397end &263
    1139911398sat 32
     
    1141111410isHidden 1
    1141211411)
    11413 xt "83000,142000,87000,143000"
     11412xt "83000,141000,87000,142000"
    1141411413st "RED_LED"
    11415 blo "83000,142800"
     11414blo "83000,141800"
    1141611415tm "WireNameMgr"
    1141711416)
    1141811417)
    1141911418on &266
     11419)
     11420*361 (Wire
     11421uid 13136,0
     11422shape (OrthoPolyLine
     11423uid 13137,0
     11424va (VaSet
     11425vasetType 3
     11426)
     11427xt "96000,136000,106000,136000"
     11428pts [
     11429"96000,136000"
     11430"106000,136000"
     11431]
     11432)
     11433end &234
     11434sat 16
     11435eat 1
     11436st 0
     11437sf 1
     11438si 0
     11439tg (WTG
     11440uid 13142,0
     11441ps "ConnStartEndStrategy"
     11442stg "STSignalDisplayStrategy"
     11443f (Text
     11444uid 13143,0
     11445va (VaSet
     11446)
     11447xt "98000,135000,100300,136000"
     11448st "SRIN"
     11449blo "98000,135800"
     11450tm "WireNameMgr"
     11451)
     11452)
     11453on &260
    1142011454)
    1142111455]
     
    1143111465color "26368,26368,26368"
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    1287412908decl (Decl
     
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    1288512919decl (Decl
     
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    1289312927)
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    12943 )
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    1294512967port (LogicalPort
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    1294712969decl (Decl
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    12950 o 45
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    12952 )
    12953 )
    12954 uid 3648,0
     12970n "T0_CS"
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     12974)
     12975)
     12976uid 3646,0
    1295512977)
    1295612978*434 (LeafLogPort
     
    1295812980m 1
    1295912981decl (Decl
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    12962 o 46
    12963 suid 103,0
    12964 )
    12965 )
    12966 uid 3650,0
     12982n "T1_CS"
     12983t "std_logic"
     12984o 45
     12985suid 102,0
     12986)
     12987)
     12988uid 3648,0
    1296712989)
    1296812990*435 (LeafLogPort
     
    1297012992m 1
    1297112993decl (Decl
    12972 n "T3_CS"
    12973 t "std_logic"
    12974 o 47
    12975 suid 104,0
    12976 )
    12977 )
    12978 uid 3652,0
     12994n "T2_CS"
     12995t "std_logic"
     12996o 46
     12997suid 103,0
     12998)
     12999)
     13000uid 3650,0
    1297913001)
    1298013002*436 (LeafLogPort
     
    1298213004m 1
    1298313005decl (Decl
     13006n "T3_CS"
     13007t "std_logic"
     13008o 47
     13009suid 104,0
     13010)
     13011)
     13012uid 3652,0
     13013)
     13014*437 (LeafLogPort
     13015port (LogicalPort
     13016m 1
     13017decl (Decl
    1298413018n "S_CLK"
    1298513019t "std_logic"
     
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    1299113025)
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     13026*438 (LeafLogPort
    1299313027port (LogicalPort
    1299413028m 1
     
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    1300413038)
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     13039*439 (LeafLogPort
    1300613040port (LogicalPort
    1300713041m 2
     
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    1301713051)
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     13052*440 (LeafLogPort
    1301913053port (LogicalPort
    1302013054m 1
     
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    1303013064)
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     13065*441 (LeafLogPort
    1303213066port (LogicalPort
    1303313067m 1
     
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    1304313077)
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     13078*442 (LeafLogPort
    1304513079port (LogicalPort
    1304613080m 1
     
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    1305613090)
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     13091*443 (LeafLogPort
    1305813092port (LogicalPort
    1305913093decl (Decl
     
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    1306713101)
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     13102*444 (LeafLogPort
    1306913103port (LogicalPort
    1307013104m 1
     
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    1308013114)
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     13115*445 (LeafLogPort
    1308213116port (LogicalPort
    1308313117m 1
     
    1309213126uid 3696,0
    1309313127)
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     13128*446 (LeafLogPort
    1309513129port (LogicalPort
    1309613130m 2
     
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    1310713141)
    13108 *446 (LeafLogPort
    13109 port (LogicalPort
    13110 m 1
    13111 decl (Decl
    13112 n "TRG_V"
    13113 t "std_logic"
    13114 o 48
    13115 suid 126,0
    13116 )
    13117 )
    13118 uid 3886,0
    13119 )
    1312013142*447 (LeafLogPort
    1312113143port (LogicalPort
    1312213144m 1
    1312313145decl (Decl
    13124 n "RS485_C_RE"
    13125 t "std_logic"
    13126 o 38
    13127 suid 127,0
    13128 )
    13129 )
    13130 uid 3888,0
     13146n "TRG_V"
     13147t "std_logic"
     13148o 48
     13149suid 126,0
     13150)
     13151)
     13152uid 3886,0
    1313113153)
    1313213154*448 (LeafLogPort
     
    1313413156m 1
    1313513157decl (Decl
    13136 n "RS485_C_DE"
    13137 t "std_logic"
    13138 o 36
    13139 suid 128,0
    13140 )
    13141 )
    13142 uid 3890,0
     13158n "RS485_C_RE"
     13159t "std_logic"
     13160o 38
     13161suid 127,0
     13162)
     13163)
     13164uid 3888,0
    1314313165)
    1314413166*449 (LeafLogPort
     
    1314613168m 1
    1314713169decl (Decl
    13148 n "RS485_E_RE"
    13149 t "std_logic"
    13150 o 40
    13151 suid 129,0
    13152 )
    13153 )
    13154 uid 3892,0
     13170n "RS485_C_DE"
     13171t "std_logic"
     13172o 36
     13173suid 128,0
     13174)
     13175)
     13176uid 3890,0
    1315513177)
    1315613178*450 (LeafLogPort
     
    1315813180m 1
    1315913181decl (Decl
    13160 n "RS485_E_DE"
    13161 t "std_logic"
    13162 o 39
    13163 suid 130,0
    13164 )
    13165 )
    13166 uid 3894,0
     13182n "RS485_E_RE"
     13183t "std_logic"
     13184o 40
     13185suid 129,0
     13186)
     13187)
     13188uid 3892,0
    1316713189)
    1316813190*451 (LeafLogPort
     
    1317013192m 1
    1317113193decl (Decl
     13194n "RS485_E_DE"
     13195t "std_logic"
     13196o 39
     13197suid 130,0
     13198)
     13199)
     13200uid 3894,0
     13201)
     13202*452 (LeafLogPort
     13203port (LogicalPort
     13204m 1
     13205decl (Decl
    1317213206n "DENABLE"
    1317313207t "std_logic"
     
    1317913213uid 3896,0
    1318013214)
    13181 *452 (LeafLogPort
     13215*453 (LeafLogPort
    1318213216port (LogicalPort
    1318313217m 1
     
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    1319213226)
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     13227*454 (LeafLogPort
    1319413228port (LogicalPort
    1319513229m 1
     
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    1320613240)
    13207 *454 (LeafLogPort
     13241*455 (LeafLogPort
    1320813242port (LogicalPort
    1320913243decl (Decl
     
    1321813252scheme 0
    1321913253)
    13220 *455 (LeafLogPort
     13254*456 (LeafLogPort
    1322113255port (LogicalPort
    1322213256m 1
     
    1323313267scheme 0
    1323413268)
    13235 *456 (LeafLogPort
     13269*457 (LeafLogPort
    1323613270port (LogicalPort
    1323713271m 1
     
    1324813282scheme 0
    1324913283)
    13250 *457 (LeafLogPort
     13284*458 (LeafLogPort
    1325113285port (LogicalPort
    1325213286m 4
     
    1326113295scheme 0
    1326213296)
    13263 *458 (LeafLogPort
     13297*459 (LeafLogPort
    1326413298port (LogicalPort
    1326513299m 4
     
    1327513309uid 8875,0
    1327613310)
    13277 *459 (LeafLogPort
    13278 port (LogicalPort
    13279 m 4
    13280 decl (Decl
    13281 n "CLK_50"
    13282 t "std_logic"
    13283 o 61
    13284 suid 163,0
    13285 )
    13286 )
    13287 uid 9516,0
    13288 )
    1328913311*460 (LeafLogPort
    1329013312port (LogicalPort
    1329113313m 4
    1329213314decl (Decl
    13293 n "CLK_25_PS1"
    13294 t "std_logic"
    13295 o 60
    13296 suid 164,0
    13297 )
    13298 )
    13299 uid 10056,0
     13315n "CLK_50"
     13316t "std_logic"
     13317o 61
     13318suid 163,0
     13319)
     13320)
     13321uid 9516,0
    1330013322)
    1330113323*461 (LeafLogPort
     
    1330313325m 4
    1330413326decl (Decl
     13327n "CLK_25_PS1"
     13328t "std_logic"
     13329o 60
     13330suid 164,0
     13331)
     13332)
     13333uid 10056,0
     13334)
     13335*462 (LeafLogPort
     13336port (LogicalPort
     13337m 4
     13338decl (Decl
    1330513339n "adc_clk_en"
    1330613340t "std_logic"
     
    1331213346uid 10058,0
    1331313347)
    13314 *462 (LeafLogPort
     13348*463 (LeafLogPort
    1331513349port (LogicalPort
    1331613350m 1
     
    1332713361scheme 0
    1332813362)
    13329 *463 (LeafLogPort
    13330 port (LogicalPort
    13331 m 4
    13332 decl (Decl
    13333 n "CLK50_OUT"
    13334 t "std_logic"
    13335 o 58
    13336 suid 184,0
    13337 )
    13338 )
    13339 uid 10704,0
    13340 )
    1334113363*464 (LeafLogPort
    1334213364port (LogicalPort
    1334313365m 4
    1334413366decl (Decl
    13345 n "CLK25_OUT"
    13346 t "std_logic"
    13347 o 56
    13348 suid 185,0
    13349 )
    13350 )
    13351 uid 10706,0
     13367n "CLK50_OUT"
     13368t "std_logic"
     13369o 58
     13370suid 184,0
     13371)
     13372)
     13373uid 10704,0
    1335213374)
    1335313375*465 (LeafLogPort
     
    1335513377m 4
    1335613378decl (Decl
    13357 n "CLK25_PSOUT"
    13358 t "std_logic"
    13359 o 57
    13360 suid 186,0
    13361 )
    13362 )
    13363 uid 10708,0
     13379n "CLK25_OUT"
     13380t "std_logic"
     13381o 56
     13382suid 185,0
     13383)
     13384)
     13385uid 10706,0
    1336413386)
    1336513387*466 (LeafLogPort
     
    1336713389m 4
    1336813390decl (Decl
    13369 n "PS_DIR_IN"
    13370 t "std_logic"
    13371 o 68
    13372 suid 187,0
    13373 )
    13374 )
    13375 uid 10710,0
     13391n "CLK25_PSOUT"
     13392t "std_logic"
     13393o 57
     13394suid 186,0
     13395)
     13396)
     13397uid 10708,0
    1337613398)
    1337713399*467 (LeafLogPort
     
    1337913401m 4
    1338013402decl (Decl
    13381 n "PS_DO_IN"
    13382 t "std_logic"
    13383 o 69
    13384 suid 188,0
    13385 )
    13386 )
    13387 uid 10712,0
     13403n "PS_DIR_IN"
     13404t "std_logic"
     13405o 68
     13406suid 187,0
     13407)
     13408)
     13409uid 10710,0
    1338813410)
    1338913411*468 (LeafLogPort
     
    1339113413m 4
    1339213414decl (Decl
    13393 n "PSEN_OUT"
    13394 t "std_logic"
    13395 o 66
    13396 suid 189,0
    13397 )
    13398 )
    13399 uid 10714,0
     13415n "PS_DO_IN"
     13416t "std_logic"
     13417o 69
     13418suid 188,0
     13419)
     13420)
     13421uid 10712,0
    1340013422)
    1340113423*469 (LeafLogPort
     
    1340313425m 4
    1340413426decl (Decl
     13427n "PSEN_OUT"
     13428t "std_logic"
     13429o 66
     13430suid 189,0
     13431)
     13432)
     13433uid 10714,0
     13434)
     13435*470 (LeafLogPort
     13436port (LogicalPort
     13437m 4
     13438decl (Decl
    1340513439n "PSINCDEC_OUT"
    1340613440t "std_logic"
     
    1341113445uid 10716,0
    1341213446)
    13413 *470 (LeafLogPort
     13447*471 (LeafLogPort
    1341413448port (LogicalPort
    1341513449m 4
     
    1342513459uid 10718,0
    1342613460)
    13427 *471 (LeafLogPort
     13461*472 (LeafLogPort
    1342813462port (LogicalPort
    1342913463m 4
     
    1344013474uid 10720,0
    1344113475)
    13442 *472 (LeafLogPort
     13476*473 (LeafLogPort
    1344313477port (LogicalPort
    1344413478m 4
     
    1345613490uid 10722,0
    1345713491)
    13458 *473 (LeafLogPort
    13459 port (LogicalPort
    13460 m 4
    13461 decl (Decl
    13462 n "PSDONE_extraOUT"
    13463 t "std_logic"
    13464 o 65
    13465 suid 194,0
    13466 )
    13467 )
    13468 uid 10724,0
    13469 )
    1347013492*474 (LeafLogPort
    1347113493port (LogicalPort
    1347213494m 4
    1347313495decl (Decl
    13474 n "PSCLK_OUT"
    13475 t "std_logic"
    13476 o 64
    13477 suid 195,0
    13478 )
    13479 )
    13480 uid 10726,0
     13496n "PSDONE_extraOUT"
     13497t "std_logic"
     13498o 65
     13499suid 194,0
     13500)
     13501)
     13502uid 10724,0
    1348113503)
    1348213504*475 (LeafLogPort
     
    1348413506m 4
    1348513507decl (Decl
     13508n "PSCLK_OUT"
     13509t "std_logic"
     13510o 64
     13511suid 195,0
     13512)
     13513)
     13514uid 10726,0
     13515)
     13516*476 (LeafLogPort
     13517port (LogicalPort
     13518m 4
     13519decl (Decl
    1348613520n "LOCKED_extraOUT"
    1348713521t "std_logic"
     
    1349213526uid 10728,0
    1349313527)
    13494 *476 (LeafLogPort
     13528*477 (LeafLogPort
    1349513529port (LogicalPort
    1349613530decl (Decl
     
    1350413538scheme 0
    1350513539)
    13506 *477 (LeafLogPort
     13540*478 (LeafLogPort
    1350713541port (LogicalPort
    1350813542m 1
     
    1351713551scheme 0
    1351813552)
    13519 *478 (LeafLogPort
     13553*479 (LeafLogPort
    1352013554port (LogicalPort
    1352113555decl (Decl
     
    1352913563scheme 0
    1353013564)
    13531 *479 (LeafLogPort
     13565*480 (LeafLogPort
    1353213566port (LogicalPort
    1353313567decl (Decl
     
    1354113575scheme 0
    1354213576)
    13543 *480 (LeafLogPort
     13577*481 (LeafLogPort
    1354413578port (LogicalPort
    1354513579m 1
     
    1355413588uid 12336,0
    1355513589)
    13556 *481 (LeafLogPort
    13557 port (LogicalPort
    13558 m 1
    13559 decl (Decl
    13560 n "AMBER_LED"
    13561 t "std_logic"
    13562 o 31
    13563 suid 207,0
    13564 )
    13565 )
    13566 uid 12768,0
    13567 )
    1356813590*482 (LeafLogPort
    1356913591port (LogicalPort
    1357013592m 1
    1357113593decl (Decl
     13594n "AMBER_LED"
     13595t "std_logic"
     13596o 31
     13597suid 207,0
     13598)
     13599)
     13600uid 12768,0
     13601)
     13602*483 (LeafLogPort
     13603port (LogicalPort
     13604m 1
     13605decl (Decl
    1357213606n "GREEN_LED"
    1357313607t "std_logic"
     
    1357813612uid 12770,0
    1357913613)
    13580 *483 (LeafLogPort
     13614*484 (LeafLogPort
    1358113615port (LogicalPort
    1358213616m 1
     
    1359713631uid 67,0
    1359813632optionalChildren [
    13599 *484 (Sheet
     13633*485 (Sheet
    1360013634sheetRow (SheetRow
    1360113635headerVa (MVa
     
    1361413648font "Tahoma,10,0"
    1361513649)
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    13617 litem &392
     13650emptyMRCItem *486 (MRCItem
     13651litem &393
    1361813652pos 79
    1361913653dimension 20
     
    1362113655uid 69,0
    1362213656optionalChildren [
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    13624 litem &393
     13657*487 (MRCItem
     13658litem &394
    1362513659pos 0
    1362613660dimension 20
    1362713661uid 70,0
    1362813662)
    13629 *487 (MRCItem
    13630 litem &394
     13663*488 (MRCItem
     13664litem &395
    1363113665pos 1
    1363213666dimension 23
    1363313667uid 71,0
    1363413668)
    13635 *488 (MRCItem
    13636 litem &395
     13669*489 (MRCItem
     13670litem &396
    1363713671pos 2
    1363813672hidden 1
     
    1364013674uid 72,0
    1364113675)
    13642 *489 (MRCItem
    13643 litem &405
     13676*490 (MRCItem
     13677litem &406
    1364413678pos 52
    1364513679dimension 20
    1364613680uid 328,0
    1364713681)
    13648 *490 (MRCItem
    13649 litem &406
     13682*491 (MRCItem
     13683litem &407
    1365013684pos 53
    1365113685dimension 20
    1365213686uid 330,0
    1365313687)
    13654 *491 (MRCItem
    13655 litem &407
     13688*492 (MRCItem
     13689litem &408
    1365613690pos 54
    1365713691dimension 20
    1365813692uid 1492,0
    1365913693)
    13660 *492 (MRCItem
    13661 litem &408
     13694*493 (MRCItem
     13695litem &409
    1366213696pos 0
    1366313697dimension 20
    1366413698uid 2436,0
    1366513699)
    13666 *493 (MRCItem
    13667 litem &409
     13700*494 (MRCItem
     13701litem &410
    1366813702pos 55
    1366913703dimension 20
    1367013704uid 2438,0
    1367113705)
    13672 *494 (MRCItem
    13673 litem &410
     13706*495 (MRCItem
     13707litem &411
    1367413708pos 56
    1367513709dimension 20
    1367613710uid 3038,0
    1367713711)
    13678 *495 (MRCItem
    13679 litem &411
     13712*496 (MRCItem
     13713litem &412
    1368013714pos 1
    1368113715dimension 20
    1368213716uid 3040,0
    1368313717)
    13684 *496 (MRCItem
    13685 litem &412
     13718*497 (MRCItem
     13719litem &413
    1368613720pos 2
    1368713721dimension 20
    1368813722uid 3277,0
    1368913723)
    13690 *497 (MRCItem
    13691 litem &413
     13724*498 (MRCItem
     13725litem &414
    1369213726pos 3
    1369313727dimension 20
    1369413728uid 3279,0
    1369513729)
    13696 *498 (MRCItem
    13697 litem &414
     13730*499 (MRCItem
     13731litem &415
    1369813732pos 4
    1369913733dimension 20
    1370013734uid 3281,0
    1370113735)
    13702 *499 (MRCItem
    13703 litem &415
     13736*500 (MRCItem
     13737litem &416
    1370413738pos 57
    1370513739dimension 20
    1370613740uid 3283,0
    1370713741)
    13708 *500 (MRCItem
    13709 litem &416
     13742*501 (MRCItem
     13743litem &417
    1371013744pos 5
    1371113745dimension 20
    1371213746uid 3383,0
    1371313747)
    13714 *501 (MRCItem
    13715 litem &417
     13748*502 (MRCItem
     13749litem &418
    1371613750pos 6
    1371713751dimension 20
    1371813752uid 3385,0
    1371913753)
    13720 *502 (MRCItem
    13721 litem &418
     13754*503 (MRCItem
     13755litem &419
    1372213756pos 7
    1372313757dimension 20
    1372413758uid 3387,0
    1372513759)
    13726 *503 (MRCItem
    13727 litem &419
     13760*504 (MRCItem
     13761litem &420
    1372813762pos 8
    1372913763dimension 20
    1373013764uid 3389,0
    1373113765)
    13732 *504 (MRCItem
    13733 litem &420
     13766*505 (MRCItem
     13767litem &421
    1373413768pos 9
    1373513769dimension 20
    1373613770uid 3391,0
    1373713771)
    13738 *505 (MRCItem
    13739 litem &421
     13772*506 (MRCItem
     13773litem &422
    1374013774pos 10
    1374113775dimension 20
    1374213776uid 3393,0
    1374313777)
    13744 *506 (MRCItem
    13745 litem &422
     13778*507 (MRCItem
     13779litem &423
    1374613780pos 11
    1374713781dimension 20
    1374813782uid 3469,0
    1374913783)
    13750 *507 (MRCItem
    13751 litem &423
     13784*508 (MRCItem
     13785litem &424
    1375213786pos 12
    1375313787dimension 20
    1375413788uid 3471,0
    1375513789)
    13756 *508 (MRCItem
    13757 litem &424
     13790*509 (MRCItem
     13791litem &425
    1375813792pos 13
    1375913793dimension 20
    1376013794uid 3473,0
    1376113795)
    13762 *509 (MRCItem
    13763 litem &425
     13796*510 (MRCItem
     13797litem &426
    1376413798pos 14
    1376513799dimension 20
    1376613800uid 3475,0
    1376713801)
    13768 *510 (MRCItem
    13769 litem &426
     13802*511 (MRCItem
     13803litem &427
    1377013804pos 15
    1377113805dimension 20
    1377213806uid 3525,0
    1377313807)
    13774 *511 (MRCItem
    13775 litem &427
     13808*512 (MRCItem
     13809litem &428
    1377613810pos 16
    1377713811dimension 20
    1377813812uid 3527,0
    1377913813)
    13780 *512 (MRCItem
    13781 litem &428
     13814*513 (MRCItem
     13815litem &429
    1378213816pos 17
    1378313817dimension 20
    1378413818uid 3529,0
    1378513819)
    13786 *513 (MRCItem
    13787 litem &429
     13820*514 (MRCItem
     13821litem &430
    1378813822pos 18
    1378913823dimension 20
    1379013824uid 3531,0
    1379113825)
    13792 *514 (MRCItem
    13793 litem &430
     13826*515 (MRCItem
     13827litem &431
    1379413828pos 19
    1379513829dimension 20
    1379613830uid 3533,0
    1379713831)
    13798 *515 (MRCItem
    13799 litem &431
     13832*516 (MRCItem
     13833litem &432
    1380013834pos 20
    1380113835dimension 20
    1380213836uid 3535,0
    1380313837)
    13804 *516 (MRCItem
    13805 litem &432
     13838*517 (MRCItem
     13839litem &433
    1380613840pos 21
    1380713841dimension 20
    1380813842uid 3647,0
    1380913843)
    13810 *517 (MRCItem
    13811 litem &433
     13844*518 (MRCItem
     13845litem &434
    1381213846pos 22
    1381313847dimension 20
    1381413848uid 3649,0
    1381513849)
    13816 *518 (MRCItem
    13817 litem &434
     13850*519 (MRCItem
     13851litem &435
    1381813852pos 23
    1381913853dimension 20
    1382013854uid 3651,0
    1382113855)
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    13823 litem &435
     13856*520 (MRCItem
     13857litem &436
    1382413858pos 24
    1382513859dimension 20
    1382613860uid 3653,0
    1382713861)
    13828 *520 (MRCItem
    13829 litem &436
     13862*521 (MRCItem
     13863litem &437
    1383013864pos 25
    1383113865dimension 20
    1383213866uid 3655,0
    1383313867)
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     13869litem &438
    1383613870pos 26
    1383713871dimension 20
    1383813872uid 3657,0
    1383913873)
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     13875litem &439
    1384213876pos 27
    1384313877dimension 20
    1384413878uid 3659,0
    1384513879)
    13846 *523 (MRCItem
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     13880*524 (MRCItem
     13881litem &440
    1384813882pos 28
    1384913883dimension 20
    1385013884uid 3661,0
    1385113885)
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    13853 litem &440
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     13887litem &441
    1385413888pos 29
    1385513889dimension 20
    1385613890uid 3663,0
    1385713891)
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    13859 litem &441
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     13893litem &442
    1386013894pos 30
    1386113895dimension 20
    1386213896uid 3665,0
    1386313897)
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    13865 litem &442
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     13899litem &443
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    1386713901dimension 20
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    1386913903)
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     13905litem &444
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    1387913913dimension 20
    1388013914uid 3697,0
    1388113915)
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     13917litem &446
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    1388513919dimension 20
    1388613920uid 3699,0
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     13923litem &447
    1389013924pos 35
    1389113925dimension 20
    1389213926uid 3887,0
    1389313927)
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     13929litem &448
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    1389713931dimension 20
    1389813932uid 3889,0
    1389913933)
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    1390313937dimension 20
    1390413938uid 3891,0
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     13941litem &450
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    1390913943dimension 20
    1391013944uid 3893,0
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    13978 *545 (MRCItem
    13979 litem &461
     14012*546 (MRCItem
     14013litem &462
    1398014014pos 62
    1398114015dimension 20
    1398214016uid 10059,0
    1398314017)
    13984 *546 (MRCItem
    13985 litem &462
     14018*547 (MRCItem
     14019litem &463
    1398614020pos 46
    1398714021dimension 20
    1398814022uid 10295,0
    1398914023)
    13990 *547 (MRCItem
    13991 litem &463
     14024*548 (MRCItem
     14025litem &464
    1399214026pos 63
    1399314027dimension 20
    1399414028uid 10705,0
    1399514029)
    13996 *548 (MRCItem
    13997 litem &464
     14030*549 (MRCItem
     14031litem &465
    1399814032pos 64
    1399914033dimension 20
    1400014034uid 10707,0
    1400114035)
    14002 *549 (MRCItem
    14003 litem &465
     14036*550 (MRCItem
     14037litem &466
    1400414038pos 65
    1400514039dimension 20
    1400614040uid 10709,0
    1400714041)
    14008 *550 (MRCItem
    14009 litem &466
     14042*551 (MRCItem
     14043litem &467
    1401014044pos 66
    1401114045dimension 20
    1401214046uid 10711,0
    1401314047)
    14014 *551 (MRCItem
    14015 litem &467
     14048*552 (MRCItem
     14049litem &468
    1401614050pos 67
    1401714051dimension 20
    1401814052uid 10713,0
    1401914053)
    14020 *552 (MRCItem
    14021 litem &468
     14054*553 (MRCItem
     14055litem &469
    1402214056pos 68
    1402314057dimension 20
    1402414058uid 10715,0
    1402514059)
    14026 *553 (MRCItem
    14027 litem &469
     14060*554 (MRCItem
     14061litem &470
    1402814062pos 69
    1402914063dimension 20
    1403014064uid 10717,0
    1403114065)
    14032 *554 (MRCItem
    14033 litem &470
     14066*555 (MRCItem
     14067litem &471
    1403414068pos 70
    1403514069dimension 20
    1403614070uid 10719,0
    1403714071)
    14038 *555 (MRCItem
    14039 litem &471
     14072*556 (MRCItem
     14073litem &472
    1404014074pos 71
    1404114075dimension 20
    1404214076uid 10721,0
    1404314077)
    14044 *556 (MRCItem
    14045 litem &472
     14078*557 (MRCItem
     14079litem &473
    1404614080pos 72
    1404714081dimension 20
    1404814082uid 10723,0
    1404914083)
    14050 *557 (MRCItem
    14051 litem &473
     14084*558 (MRCItem
     14085litem &474
    1405214086pos 73
    1405314087dimension 20
    1405414088uid 10725,0
    1405514089)
    14056 *558 (MRCItem
    14057 litem &474
     14090*559 (MRCItem
     14091litem &475
    1405814092pos 74
    1405914093dimension 20
    1406014094uid 10727,0
    1406114095)
    14062 *559 (MRCItem
    14063 litem &475
     14096*560 (MRCItem
     14097litem &476
    1406414098pos 75
    1406514099dimension 20
    1406614100uid 10729,0
    1406714101)
    14068 *560 (MRCItem
    14069 litem &476
     14102*561 (MRCItem
     14103litem &477
    1407014104pos 47
    1407114105dimension 20
    1407214106uid 11085,0
    1407314107)
    14074 *561 (MRCItem
    14075 litem &477
     14108*562 (MRCItem
     14109litem &478
    1407614110pos 48
    1407714111dimension 20
    1407814112uid 11087,0
    1407914113)
    14080 *562 (MRCItem
    14081 litem &478
     14114*563 (MRCItem
     14115litem &479
    1408214116pos 49
    1408314117dimension 20
    1408414118uid 11505,0
    1408514119)
    14086 *563 (MRCItem
    14087 litem &479
     14120*564 (MRCItem
     14121litem &480
    1408814122pos 50
    1408914123dimension 20
    1409014124uid 11507,0
    1409114125)
    14092 *564 (MRCItem
    14093 litem &480
     14126*565 (MRCItem
     14127litem &481
    1409414128pos 51
    1409514129dimension 20
    1409614130uid 12337,0
    1409714131)
    14098 *565 (MRCItem
    14099 litem &481
     14132*566 (MRCItem
     14133litem &482
    1410014134pos 76
    1410114135dimension 20
    1410214136uid 12769,0
    1410314137)
    14104 *566 (MRCItem
    14105 litem &482
     14138*567 (MRCItem
     14139litem &483
    1410614140pos 77
    1410714141dimension 20
    1410814142uid 12771,0
    1410914143)
    14110 *567 (MRCItem
    14111 litem &483
     14144*568 (MRCItem
     14145litem &484
    1411214146pos 78
    1411314147dimension 20
     
    1412514159uid 73,0
    1412614160optionalChildren [
    14127 *568 (MRCItem
    14128 litem &396
     14161*569 (MRCItem
     14162litem &397
    1412914163pos 0
    1413014164dimension 20
    1413114165uid 74,0
    1413214166)
    14133 *569 (MRCItem
    14134 litem &398
     14167*570 (MRCItem
     14168litem &399
    1413514169pos 1
    1413614170dimension 50
    1413714171uid 75,0
    1413814172)
    14139 *570 (MRCItem
    14140 litem &399
     14173*571 (MRCItem
     14174litem &400
    1414114175pos 2
    1414214176dimension 100
    1414314177uid 76,0
    1414414178)
    14145 *571 (MRCItem
    14146 litem &400
     14179*572 (MRCItem
     14180litem &401
    1414714181pos 3
    1414814182dimension 50
    1414914183uid 77,0
    1415014184)
    14151 *572 (MRCItem
    14152 litem &401
     14185*573 (MRCItem
     14186litem &402
    1415314187pos 4
    1415414188dimension 100
    1415514189uid 78,0
    1415614190)
    14157 *573 (MRCItem
    14158 litem &402
     14191*574 (MRCItem
     14192litem &403
    1415914193pos 5
    1416014194dimension 100
    1416114195uid 79,0
    1416214196)
    14163 *574 (MRCItem
    14164 litem &403
     14197*575 (MRCItem
     14198litem &404
    1416514199pos 6
    1416614200dimension 92
    1416714201uid 80,0
    1416814202)
    14169 *575 (MRCItem
    14170 litem &404
     14203*576 (MRCItem
     14204litem &405
    1417114205pos 7
    1417214206dimension 80
     
    1418814222genericsCommonDM (CommonDM
    1418914223ldm (LogicalDM
    14190 emptyRow *576 (LEmptyRow
     14224emptyRow *577 (LEmptyRow
    1419114225)
    1419214226uid 83,0
    1419314227optionalChildren [
    14194 *577 (RefLabelRowHdr
    14195 )
    14196 *578 (TitleRowHdr
    14197 )
    14198 *579 (FilterRowHdr
    14199 )
    14200 *580 (RefLabelColHdr
     14228*578 (RefLabelRowHdr
     14229)
     14230*579 (TitleRowHdr
     14231)
     14232*580 (FilterRowHdr
     14233)
     14234*581 (RefLabelColHdr
    1420114235tm "RefLabelColHdrMgr"
    1420214236)
    14203 *581 (RowExpandColHdr
     14237*582 (RowExpandColHdr
    1420414238tm "RowExpandColHdrMgr"
    1420514239)
    14206 *582 (GroupColHdr
     14240*583 (GroupColHdr
    1420714241tm "GroupColHdrMgr"
    1420814242)
    14209 *583 (NameColHdr
     14243*584 (NameColHdr
    1421014244tm "GenericNameColHdrMgr"
    1421114245)
    14212 *584 (TypeColHdr
     14246*585 (TypeColHdr
    1421314247tm "GenericTypeColHdrMgr"
    1421414248)
    14215 *585 (InitColHdr
     14249*586 (InitColHdr
    1421614250tm "GenericValueColHdrMgr"
    1421714251)
    14218 *586 (PragmaColHdr
     14252*587 (PragmaColHdr
    1421914253tm "GenericPragmaColHdrMgr"
    1422014254)
    14221 *587 (EolColHdr
     14255*588 (EolColHdr
    1422214256tm "GenericEolColHdrMgr"
    1422314257)
     
    1422914263uid 95,0
    1423014264optionalChildren [
    14231 *588 (Sheet
     14265*589 (Sheet
    1423214266sheetRow (SheetRow
    1423314267headerVa (MVa
     
    1424614280font "Tahoma,10,0"
    1424714281)
    14248 emptyMRCItem *589 (MRCItem
    14249 litem &576
    14250 pos 0
    14251 dimension 20
    14252 )
    14253 uid 97,0
    14254 optionalChildren [
    14255 *590 (MRCItem
     14282emptyMRCItem *590 (MRCItem
    1425614283litem &577
    1425714284pos 0
    1425814285dimension 20
    14259 uid 98,0
    14260 )
     14286)
     14287uid 97,0
     14288optionalChildren [
    1426114289*591 (MRCItem
    1426214290litem &578
     14291pos 0
     14292dimension 20
     14293uid 98,0
     14294)
     14295*592 (MRCItem
     14296litem &579
    1426314297pos 1
    1426414298dimension 23
    1426514299uid 99,0
    1426614300)
    14267 *592 (MRCItem
    14268 litem &579
     14301*593 (MRCItem
     14302litem &580
    1426914303pos 2
    1427014304hidden 1
     
    1428314317uid 101,0
    1428414318optionalChildren [
    14285 *593 (MRCItem
    14286 litem &580
     14319*594 (MRCItem
     14320litem &581
    1428714321pos 0
    1428814322dimension 20
    1428914323uid 102,0
    1429014324)
    14291 *594 (MRCItem
    14292 litem &582
     14325*595 (MRCItem
     14326litem &583
    1429314327pos 1
    1429414328dimension 50
    1429514329uid 103,0
    1429614330)
    14297 *595 (MRCItem
    14298 litem &583
     14331*596 (MRCItem
     14332litem &584
    1429914333pos 2
    1430014334dimension 100
    1430114335uid 104,0
    1430214336)
    14303 *596 (MRCItem
    14304 litem &584
     14337*597 (MRCItem
     14338litem &585
    1430514339pos 3
    1430614340dimension 100
    1430714341uid 105,0
    1430814342)
    14309 *597 (MRCItem
    14310 litem &585
     14343*598 (MRCItem
     14344litem &586
    1431114345pos 4
    1431214346dimension 50
    1431314347uid 106,0
    1431414348)
    14315 *598 (MRCItem
    14316 litem &586
     14349*599 (MRCItem
     14350litem &587
    1431714351pos 5
    1431814352dimension 50
    1431914353uid 107,0
    1432014354)
    14321 *599 (MRCItem
    14322 litem &587
     14355*600 (MRCItem
     14356litem &588
    1432314357pos 6
    1432414358dimension 80
  • firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib/hds/@f@a@d_@board/symbol.sb

    r10075 r10081  
    13871387(vvPair
    13881388variable "date"
    1389 value "04.01.2011"
     1389value "05.01.2011"
    13901390)
    13911391(vvPair
    13921392variable "day"
    1393 value "Di"
     1393value "Mi"
    13941394)
    13951395(vvPair
    13961396variable "day_long"
    1397 value "Dienstag"
     1397value "Mittwoch"
    13981398)
    13991399(vvPair
    14001400variable "dd"
    1401 value "04"
     1401value "05"
    14021402)
    14031403(vvPair
     
    15351535(vvPair
    15361536variable "time"
    1537 value "18:14:31"
     1537value "17:34:20"
    15381538)
    15391539(vvPair
     
    48524852)
    48534853)
    4854 lastUid 4093,0
     4854lastUid 4139,0
    48554855activeModelName "Symbol:CDM"
    48564856)
  • firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib/hds/@f@a@d_main/struct.bd

    r10075 r10081  
    314314(vvPair
    315315variable "date"
    316 value "04.01.2011"
     316value "05.01.2011"
    317317)
    318318(vvPair
    319319variable "day"
    320 value "Di"
     320value "Mi"
    321321)
    322322(vvPair
    323323variable "day_long"
    324 value "Dienstag"
     324value "Mittwoch"
    325325)
    326326(vvPair
    327327variable "dd"
    328 value "04"
     328value "05"
    329329)
    330330(vvPair
     
    466466(vvPair
    467467variable "time"
    468 value "18:05:35"
     468value "14:33:40"
    469469)
    470470(vvPair
     
    557557font "Courier New,8,0"
    558558)
    559 xt "-103000,118600,-59500,119400"
    560 st "SIGNAL write_ea               : std_logic_vector(0 downto 0)                 := \"0\""
     559xt "-103000,119400,-59500,120200"
     560st "SIGNAL write_ea               : std_logic_vector(0 downto 0)                 := \"0\"
     561"
    561562)
    562563)
     
    576577)
    577578xt "-103000,64200,-63000,65000"
    578 st "SIGNAL addr_out               : std_logic_vector(RAMADDRWIDTH64b-1 DOWNTO 0)"
     579st "SIGNAL addr_out               : std_logic_vector(RAMADDRWIDTH64b-1 DOWNTO 0)
     580"
    579581)
    580582)
     
    594596)
    595597xt "-103000,81800,-70500,82600"
    596 st "SIGNAL data_out               : std_logic_vector(63 DOWNTO 0)"
     598st "SIGNAL data_out               : std_logic_vector(63 DOWNTO 0)
     599"
    597600)
    598601)
     
    611614font "Courier New,8,0"
    612615)
    613 xt "-103000,94600,-63000,95400"
    614 st "SIGNAL ram_addr               : std_logic_vector(RAMADDRWIDTH64b+1 DOWNTO 0)"
     616xt "-103000,95400,-63000,96200"
     617st "SIGNAL ram_addr               : std_logic_vector(RAMADDRWIDTH64b+1 DOWNTO 0)
     618"
    615619)
    616620)
     
    629633font "Courier New,8,0"
    630634)
    631 xt "-103000,95400,-70500,96200"
    632 st "SIGNAL ram_data               : std_logic_vector(15 downto 0)"
     635xt "-103000,96200,-70500,97000"
     636st "SIGNAL ram_data               : std_logic_vector(15 downto 0)
     637"
    633638)
    634639)
     
    648653)
    649654xt "-103000,55800,-63000,56600"
    650 st "wiz_reset              : std_logic                                    := '1'"
     655st "wiz_reset              : std_logic                                    := '1'
     656"
    651657)
    652658)
     
    666672)
    667673xt "-103000,53400,-74500,54200"
    668 st "wiz_addr               : std_logic_vector(9 DOWNTO 0)"
     674st "wiz_addr               : std_logic_vector(9 DOWNTO 0)
     675"
    669676)
    670677)
     
    684691)
    685692xt "-103000,58200,-74000,59000"
    686 st "wiz_data               : std_logic_vector(15 DOWNTO 0)"
     693st "wiz_data               : std_logic_vector(15 DOWNTO 0)
     694"
    687695)
    688696)
     
    702710)
    703711xt "-103000,54200,-63000,55000"
    704 st "wiz_cs                 : std_logic                                    := '1'"
     712st "wiz_cs                 : std_logic                                    := '1'
     713"
    705714)
    706715)
     
    720729)
    721730xt "-103000,56600,-63000,57400"
    722 st "wiz_wr                 : std_logic                                    := '1'"
     731st "wiz_wr                 : std_logic                                    := '1'
     732"
    723733)
    724734)
     
    738748)
    739749xt "-103000,55000,-63000,55800"
    740 st "wiz_rd                 : std_logic                                    := '1'"
     750st "wiz_rd                 : std_logic                                    := '1'
     751"
    741752)
    742753)
     
    755766)
    756767xt "-103000,26200,-84500,27000"
    757 st "wiz_int                : std_logic"
     768st "wiz_int                : std_logic
     769"
    758770)
    759771)
     
    26652677)
    26662678)
     2679*66 (CptPort
     2680uid 11385,0
     2681ps "OnEdgeStrategy"
     2682shape (Triangle
     2683uid 11386,0
     2684ro 90
     2685va (VaSet
     2686vasetType 1
     2687fg "0,65535,0"
     2688)
     2689xt "40000,92625,40750,93375"
     2690)
     2691tg (CPTG
     2692uid 11387,0
     2693ps "CptPortTextPlaceStrategy"
     2694stg "RightVerticalLayoutStrategy"
     2695f (Text
     2696uid 11388,0
     2697va (VaSet
     2698)
     2699xt "31500,92500,39000,93500"
     2700st "drs_readout_started"
     2701ju 2
     2702blo "39000,93300"
     2703)
     2704)
     2705thePort (LogicalPort
     2706m 1
     2707decl (Decl
     2708n "drs_readout_started"
     2709t "std_logic"
     2710o 44
     2711suid 61,0
     2712)
     2713)
     2714)
    26672715]
    26682716shape (Rectangle
     
    26742722lineWidth 2
    26752723)
    2676 xt "19000,47000,40000,92000"
     2724xt "19000,47000,40000,94000"
    26772725)
    26782726oxt "37000,1000,51000,21000"
     
    26822730stg "VerticalLayoutStrategy"
    26832731textVec [
    2684 *66 (Text
     2732*67 (Text
    26852733uid 1402,0
    26862734va (VaSet
    26872735font "Arial,8,1"
    26882736)
    2689 xt "19300,91000,25500,92000"
     2737xt "19300,94000,25500,95000"
    26902738st "FACT_FAD_lib"
    2691 blo "19300,91800"
     2739blo "19300,94800"
    26922740tm "BdLibraryNameMgr"
    26932741)
    2694 *67 (Text
     2742*68 (Text
    26952743uid 1403,0
    26962744va (VaSet
    26972745font "Arial,8,1"
    26982746)
    2699 xt "19300,92000,25700,93000"
     2747xt "19300,95000,25700,96000"
    27002748st "data_generator"
    2701 blo "19300,92800"
     2749blo "19300,95800"
    27022750tm "CptNameMgr"
    27032751)
    2704 *68 (Text
     2752*69 (Text
    27052753uid 1404,0
    27062754va (VaSet
    27072755font "Arial,8,1"
    27082756)
    2709 xt "19300,93000,28900,94000"
     2757xt "19300,96000,28900,97000"
    27102758st "I_main_data_generator"
    2711 blo "19300,93800"
     2759blo "19300,96800"
    27122760tm "InstanceNameMgr"
    27132761)
     
    27442792fg "49152,49152,49152"
    27452793)
    2746 xt "19250,90250,20750,91750"
     2794xt "19250,92250,20750,93750"
    27472795iconName "VhdlFileViewIcon.png"
    27482796iconMaskName "VhdlFileViewIcon.msk"
     
    27552803archFileType "UNKNOWN"
    27562804)
    2757 *69 (Net
     2805*70 (Net
    27582806uid 1409,0
    27592807decl (Decl
     
    27722820)
    27732821xt "-103000,23800,-74500,24600"
    2774 st "board_id               : std_logic_vector(3 downto 0)"
    2775 )
    2776 )
    2777 *70 (Net
     2822st "board_id               : std_logic_vector(3 downto 0)
     2823"
     2824)
     2825)
     2826*71 (Net
    27782827uid 1423,0
    27792828decl (Decl
     
    27912840)
    27922841xt "-103000,25400,-84500,26200"
    2793 st "trigger                : std_logic"
    2794 )
    2795 )
    2796 *71 (PortIoIn
     2842st "trigger                : std_logic
     2843"
     2844)
     2845)
     2846*72 (PortIoIn
    27972847uid 1443,0
    27982848shape (CompositeShape
     
    28392889)
    28402890)
    2841 *72 (SaComponent
     2891*73 (SaComponent
    28422892uid 1606,0
    28432893optionalChildren [
    2844 *73 (CptPort
     2894*74 (CptPort
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    28462896ps "OnEdgeStrategy"
     
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    29212971ps "OnEdgeStrategy"
     
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     3008*77 (CptPort
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    29603010ps "OnEdgeStrategy"
     
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    29993049ps "OnEdgeStrategy"
     
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     3086*79 (CptPort
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    30383088ps "OnEdgeStrategy"
     
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    30773127ps "OnEdgeStrategy"
     
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     3164*81 (CptPort
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    32243274)
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     3275*84 (CptPort
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     3312*85 (CptPort
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    33383388ps "OnEdgeStrategy"
     
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    33733423)
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    34083458)
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     3459*89 (CptPort
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    34113461ps "OnEdgeStrategy"
     
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     3493*90 (CptPort
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    34453495ps "OnEdgeStrategy"
     
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     3527*91 (CptPort
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    34793529ps "OnEdgeStrategy"
     
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    35153565)
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     3566*92 (CptPort
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    35183568ps "OnEdgeStrategy"
     
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    35513601)
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     3602*93 (CptPort
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    35543604ps "OnEdgeStrategy"
     
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    35873637)
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     3638*94 (CptPort
    35893639uid 5928,0
    35903640ps "OnEdgeStrategy"
     
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    36233673)
    3624 *94 (CptPort
     3674*95 (CptPort
    36253675uid 5932,0
    36263676ps "OnEdgeStrategy"
     
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    36603710)
    3661 *95 (CptPort
     3711*96 (CptPort
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    36633713ps "OnEdgeStrategy"
     
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    36943744)
    3695 *96 (CptPort
     3745*97 (CptPort
    36963746uid 5940,0
    36973747ps "OnEdgeStrategy"
     
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    37303780)
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     3781*98 (CptPort
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    37333783ps "OnEdgeStrategy"
     
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    37663816)
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     3817*99 (CptPort
    37683818uid 5970,0
    37693819ps "OnEdgeStrategy"
     
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    38033853)
    3804 *99 (CptPort
     3854*100 (CptPort
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    38063856ps "OnEdgeStrategy"
     
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    38423892)
    3843 *100 (CptPort
     3893*101 (CptPort
    38443894uid 6446,0
    38453895ps "OnEdgeStrategy"
     
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    38823932)
    3883 *101 (CptPort
     3933*102 (CptPort
    38843934uid 8406,0
    38853935ps "OnEdgeStrategy"
     
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    39183968)
    3919 *102 (CptPort
     3969*103 (CptPort
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    39213971ps "OnEdgeStrategy"
     
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    39574007)
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     4008*104 (CptPort
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    39604010ps "OnEdgeStrategy"
     
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    39964046)
    3997 *104 (CptPort
     4047*105 (CptPort
    39984048uid 9227,0
    39994049ps "OnEdgeStrategy"
     
    40354085)
    40364086)
    4037 *105 (CptPort
     4087*106 (CptPort
    40384088uid 9933,0
    40394089ps "OnEdgeStrategy"
     
    40744124)
    40754125)
    4076 *106 (CptPort
     4126*107 (CptPort
    40774127uid 9937,0
    40784128ps "OnEdgeStrategy"
     
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    41144164)
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    41174167ps "OnEdgeStrategy"
     
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    41514201)
    4152 *108 (CptPort
     4202*109 (CptPort
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    41544204ps "OnEdgeStrategy"
     
    41874237)
    41884238)
    4189 *109 (CptPort
     4239*110 (CptPort
    41904240uid 10619,0
    41914241ps "OnEdgeStrategy"
     
    42234273)
    42244274)
    4225 *110 (CptPort
     4275*111 (CptPort
    42264276uid 10623,0
    42274277ps "OnEdgeStrategy"
     
    42764326stg "VerticalLayoutStrategy"
    42774327textVec [
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    42794329uid 1609,0
    42804330va (VaSet
     
    42864336tm "BdLibraryNameMgr"
    42874337)
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     4338*113 (Text
    42894339uid 1610,0
    42904340va (VaSet
     
    42964346tm "CptNameMgr"
    42974347)
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     4348*114 (Text
    42994349uid 1611,0
    43004350va (VaSet
     
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     4401*115 (Net
    43524402uid 1680,0
    43534403decl (Decl
     
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    43654415xt "-103000,24600,-74500,25400"
    4366 st "crate_id               : std_logic_vector(1 downto 0)"
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    4369 *115 (SaComponent
     4416st "crate_id               : std_logic_vector(1 downto 0)
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     4418)
     4419)
     4420*116 (SaComponent
    43704421uid 1768,0
    43714422optionalChildren [
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    43734424uid 1760,0
    43744425ps "OnEdgeStrategy"
     
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    44114462)
    4412 *117 (CptPort
     4463*118 (CptPort
    44134464uid 1764,0
    44144465ps "OnEdgeStrategy"
     
    44474498)
    44484499)
    4449 *118 (CptPort
     4500*119 (CptPort
    44504501uid 6207,0
    44514502ps "OnEdgeStrategy"
     
    44994550stg "VerticalLayoutStrategy"
    45004551textVec [
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     4552*120 (Text
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    45034554va (VaSet
     
    45094560tm "BdLibraryNameMgr"
    45104561)
    4511 *120 (Text
     4562*121 (Text
    45124563uid 1772,0
    45134564va (VaSet
     
    45194570tm "CptNameMgr"
    45204571)
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     4572*122 (Text
    45224573uid 1773,0
    45234574va (VaSet
     
    45674618archFileType "UNKNOWN"
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     4620*123 (Net
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    45714622lang 2
     
    45844635font "Courier New,8,0"
    45854636)
    4586 xt "-103000,110600,-70500,111400"
    4587 st "SIGNAL trigger_id             : std_logic_vector(47 downto 0)"
    4588 )
    4589 )
    4590 *123 (Net
     4637xt "-103000,111400,-70500,112200"
     4638st "SIGNAL trigger_id             : std_logic_vector(47 downto 0)
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     4640)
     4641)
     4642*124 (Net
    45914643uid 2297,0
    45924644decl (Decl
     
    46044656font "Courier New,8,0"
    46054657)
    4606 xt "-103000,96200,-63000,97000"
    4607 st "SIGNAL ram_start_addr         : std_logic_vector(RAMADDRWIDTH64b-1 DOWNTO 0)"
    4608 )
    4609 )
    4610 *124 (SaComponent
     4658xt "-103000,97000,-63000,97800"
     4659st "SIGNAL ram_start_addr         : std_logic_vector(RAMADDRWIDTH64b-1 DOWNTO 0)
     4660"
     4661)
     4662)
     4663*125 (SaComponent
    46114664uid 2311,0
    46124665optionalChildren [
    4613 *125 (CptPort
     4666*126 (CptPort
    46144667uid 2307,0
    46154668ps "OnEdgeStrategy"
     
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    46534706)
    4654 *126 (CptPort
     4707*127 (CptPort
    46554708uid 2351,0
    46564709ps "OnEdgeStrategy"
     
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    46894742)
    4690 *127 (CptPort
     4743*128 (CptPort
    46914744uid 2361,0
    46924745ps "OnEdgeStrategy"
     
    47264779)
    47274780)
    4728 *128 (CptPort
     4781*129 (CptPort
    47294782uid 2365,0
    47304783ps "OnEdgeStrategy"
     
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    47634816)
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     4817*130 (CptPort
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    47664819ps "OnEdgeStrategy"
     
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    48014854)
    4802 *130 (CptPort
     4855*131 (CptPort
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    48044857ps "OnEdgeStrategy"
     
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    48384891)
    4839 *131 (CptPort
     4892*132 (CptPort
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    48414894ps "OnEdgeStrategy"
     
    48764929)
    48774930)
    4878 *132 (CptPort
     4931*133 (CptPort
    48794932uid 2381,0
    48804933ps "OnEdgeStrategy"
     
    49134966)
    49144967)
    4915 *133 (CptPort
     4968*134 (CptPort
    49164969uid 2385,0
    49174970ps "OnEdgeStrategy"
     
    49535006)
    49545007)
    4955 *134 (CptPort
     5008*135 (CptPort
    49565009uid 2389,0
    49575010ps "OnEdgeStrategy"
     
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    49955048)
    4996 *135 (CptPort
     5049*136 (CptPort
    49975050uid 2393,0
    49985051ps "OnEdgeStrategy"
     
    50335086)
    50345087)
    5035 *136 (CptPort
     5088*137 (CptPort
    50365089uid 2397,0
    50375090ps "OnEdgeStrategy"
     
    50725125)
    50735126)
    5074 *137 (CptPort
     5127*138 (CptPort
    50755128uid 2401,0
    50765129ps "OnEdgeStrategy"
     
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    51125165)
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     5166*139 (CptPort
    51145167uid 2405,0
    51155168ps "OnEdgeStrategy"
     
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    51525205)
    5153 *139 (CptPort
     5206*140 (CptPort
    51545207uid 2454,0
    51555208ps "OnEdgeStrategy"
     
    51895242)
    51905243)
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     5244*141 (CptPort
    51925245uid 2628,0
    51935246ps "OnEdgeStrategy"
     
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    52295282)
    5230 *141 (CptPort
     5283*142 (CptPort
    52315284uid 5991,0
    52325285ps "OnEdgeStrategy"
     
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    52675320)
    5268 *142 (CptPort
     5321*143 (CptPort
    52695322uid 8410,0
    52705323ps "OnEdgeStrategy"
     
    53035356)
    53045357)
    5305 *143 (CptPort
     5358*144 (CptPort
    53065359uid 10232,0
    53075360ps "OnEdgeStrategy"
     
    53615414stg "VerticalLayoutStrategy"
    53625415textVec [
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     5416*145 (Text
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    53655418va (VaSet
     
    53715424tm "BdLibraryNameMgr"
    53725425)
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     5426*146 (Text
    53745427uid 2315,0
    53755428va (VaSet
     
    53815434tm "CptNameMgr"
    53825435)
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     5436*147 (Text
    53845437uid 2316,0
    53855438va (VaSet
     
    54405493archFileType "UNKNOWN"
    54415494)
    5442 *147 (Net
     5495*148 (Net
    54435496uid 2468,0
    54445497lang 2
     
    54545507font "Courier New,8,0"
    54555508)
    5456 xt "-103000,113000,-80500,113800"
    5457 st "SIGNAL wiz_busy               : std_logic"
    5458 )
    5459 )
    5460 *148 (Net
     5509xt "-103000,113800,-80500,114600"
     5510st "SIGNAL wiz_busy               : std_logic
     5511"
     5512)
     5513)
     5514*149 (Net
    54615515uid 2474,0
    54625516lang 2
     
    54735527font "Courier New,8,0"
    54745528)
    5475 xt "-103000,115400,-59500,116200"
    5476 st "SIGNAL wiz_write_ea           : std_logic                                    := '0'"
    5477 )
    5478 )
    5479 *149 (Net
     5529xt "-103000,116200,-59500,117000"
     5530st "SIGNAL wiz_write_ea           : std_logic                                    := '0'
     5531"
     5532)
     5533)
     5534*150 (Net
    54805535uid 2480,0
    54815536lang 2
     
    54935548font "Courier New,8,0"
    54945549)
    5495 xt "-103000,117800,-53500,118600"
    5496 st "SIGNAL wiz_write_length       : std_logic_vector(16 downto 0)                := (others => '0')"
    5497 )
    5498 )
    5499 *150 (Net
     5550xt "-103000,118600,-53500,119400"
     5551st "SIGNAL wiz_write_length       : std_logic_vector(16 downto 0)                := (others => '0')
     5552"
     5553)
     5554)
     5555*151 (Net
    55005556uid 2486,0
    55015557lang 2
     
    55145570font "Courier New,8,0"
    55155571)
    5516 xt "-103000,114600,-53500,115400"
    5517 st "SIGNAL wiz_ram_start_addr     : std_logic_vector(RAMADDRWIDTH64b+1 DOWNTO 0) := (others => '0')"
    5518 )
    5519 )
    5520 *151 (Net
     5572xt "-103000,115400,-53500,116200"
     5573st "SIGNAL wiz_ram_start_addr     : std_logic_vector(RAMADDRWIDTH64b+1 DOWNTO 0) := (others => '0')
     5574"
     5575)
     5576)
     5577*152 (Net
    55215578uid 2492,0
    55225579lang 2
     
    55345591font "Courier New,8,0"
    55355592)
    5536 xt "-103000,113800,-53500,114600"
    5537 st "SIGNAL wiz_number_of_channels : std_logic_vector(3 downto 0)                 := (others => '0')"
    5538 )
    5539 )
    5540 *152 (Net
     5593xt "-103000,114600,-53500,115400"
     5594st "SIGNAL wiz_number_of_channels : std_logic_vector(3 downto 0)                 := (others => '0')
     5595"
     5596)
     5597)
     5598*153 (Net
    55415599uid 2498,0
    55425600lang 2
     
    55535611font "Courier New,8,0"
    55545612)
    5555 xt "-103000,116200,-59500,117000"
    5556 st "SIGNAL wiz_write_end          : std_logic                                    := '0'"
    5557 )
    5558 )
    5559 *153 (Net
     5613xt "-103000,117000,-59500,117800"
     5614st "SIGNAL wiz_write_end          : std_logic                                    := '0'
     5615"
     5616)
     5617)
     5618*154 (Net
    55605619uid 2504,0
    55615620lang 2
     
    55725631font "Courier New,8,0"
    55735632)
    5574 xt "-103000,117000,-59500,117800"
    5575 st "SIGNAL wiz_write_header       : std_logic                                    := '0'"
    5576 )
    5577 )
    5578 *154 (Net
     5633xt "-103000,117800,-59500,118600"
     5634st "SIGNAL wiz_write_header       : std_logic                                    := '0'
     5635"
     5636)
     5637)
     5638*155 (Net
    55795639uid 2574,0
    55805640decl (Decl
     
    55895649font "Courier New,8,0"
    55905650)
    5591 xt "-103000,97000,-80500,97800"
    5592 st "SIGNAL ram_write_ea           : std_logic"
    5593 )
    5594 )
    5595 *155 (Net
     5651xt "-103000,97800,-80500,98600"
     5652st "SIGNAL ram_write_ea           : std_logic
     5653"
     5654)
     5655)
     5656*156 (Net
    55965657uid 2580,0
    55975658decl (Decl
     
    56075668font "Courier New,8,0"
    56085669)
    5609 xt "-103000,97800,-59500,98600"
    5610 st "SIGNAL ram_write_ready        : std_logic                                    := '0'"
    5611 )
    5612 )
    5613 *156 (Net
     5670xt "-103000,98600,-59500,99400"
     5671st "SIGNAL ram_write_ready        : std_logic                                    := '0'
     5672"
     5673)
     5674)
     5675*157 (Net
    56145676uid 2586,0
    56155677decl (Decl
     
    56265688)
    56275689xt "-103000,74600,-59500,75400"
    5628 st "SIGNAL config_start           : std_logic                                    := '0'"
    5629 )
    5630 )
    5631 *157 (Net
     5690st "SIGNAL config_start           : std_logic                                    := '0'
     5691"
     5692)
     5693)
     5694*158 (Net
    56325695uid 2592,0
    56335696decl (Decl
     
    56435706)
    56445707xt "-103000,69000,-80500,69800"
    5645 st "SIGNAL config_ready           : std_logic"
    5646 )
    5647 )
    5648 *158 (Net
     5708st "SIGNAL config_ready           : std_logic
     5709"
     5710)
     5711)
     5712*159 (Net
    56495713uid 2598,0
    56505714decl (Decl
     
    56595723font "Courier New,8,0"
    56605724)
    5661 xt "-103000,101000,-79000,101800"
    5662 st "SIGNAL roi_max                : roi_max_type"
    5663 )
    5664 )
    5665 *159 (Net
     5725xt "-103000,101800,-79000,102600"
     5726st "SIGNAL roi_max                : roi_max_type
     5727"
     5728)
     5729)
     5730*160 (Net
    56665731uid 2640,0
    56675732decl (Decl
     
    56775742font "Courier New,8,0"
    56785743)
    5679 xt "-103000,91400,-70500,92200"
    5680 st "SIGNAL package_length         : std_logic_vector(15 downto 0)"
    5681 )
    5682 )
    5683 *160 (Net
     5744xt "-103000,92200,-70500,93000"
     5745st "SIGNAL package_length         : std_logic_vector(15 downto 0)
     5746"
     5747)
     5748)
     5749*161 (Net
    56845750uid 2776,0
    56855751decl (Decl
     
    56965762)
    56975763xt "-103000,40600,-63000,41400"
    5698 st "adc_oeb                : std_logic                                    := '1'"
    5699 )
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    1593816088st "-- --
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    15975 )
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    16461 WAITING_DIVIDER       = 50000000    ( integer ) -- 1Hz @ 50 MHz   
    16462 "
     16617WAITING_DIVIDER       = 50000000    ( integer ) -- 1Hz @ 50 MHz   "
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     17907*603 (Wire
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     17922*605 (BdJunction
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     17934*606 (BdJunction
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     17985*607 (Wire
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     18040*609 (Wire
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     18348)
     18349*617 (Wire
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     18385)
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     18423)
     18424*619 (Wire
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     18461)
     18462*620 (Wire
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     18499)
     18500*621 (Wire
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    1833818511]
    1833918512)
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     18513start &201
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    1836218535)
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     18537)
     18538*622 (Wire
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    1837818551]
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    1840018573)
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    18402 )
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     18574on &202
     18575)
     18576*623 (Wire
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     18579*624 (BdJunction
    1840718580uid 6076,0
    1840818581ps "OnConnectorStrategy"
     
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    1843218605)
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     18607end *625 (BdJunction
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    1843618609ps "OnConnectorStrategy"
     
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    1846518638)
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    18467 )
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     18639on &181
     18640)
     18641*626 (Wire
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    1848018653)
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    1850318676)
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     18678)
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    1851818691)
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    1854118714)
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    18543 )
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     18716)
     18717*628 (Wire
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    1858018753)
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    18582 )
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     18754on &245
     18755)
     18756*629 (Wire
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    1859518768)
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    1861418787)
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    1863118804)
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     18826)
     18827*631 (Wire
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    1866918842)
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    1869018863)
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     18866*632 (Wire
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    1872718900)
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     18902)
     18903*633 (Wire
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    1874418917)
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    1876418937)
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     18938on &250
     18939)
     18940*634 (Wire
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    1879518968)
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    1879818971ss 0
     
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     18992)
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    1883519008es 0
    1883619009sat 32
     
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    1885319026)
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     19028)
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     19064)
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     19178)
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     19252)
     19253*643 (Wire
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    1909319266]
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    1913019303)
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     19304end &228
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     19324)
     19325*645 (Wire
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     19328&625
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     19455)
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    1929619469)
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     19529)
     19530*651 (Wire
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    2049220665ps "OnConnectorStrategy"
     
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    2054020713ps "OnConnectorStrategy"
     
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    2090121074)
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    2094021113)
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    2096221135)
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     21175)
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    2101721190)
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    2104021213)
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     21294*700 (Wire
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    2113521308)
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    2115721330)
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     21332)
     21333*701 (Wire
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    2117421347)
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    2119621369)
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     21370on &178
     21371)
     21372*702 (Wire
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    2121021383]
    2121121384)
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     21385start &454
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    2123421407)
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     21408on &491
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     21410*703 (Wire
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    2124821421]
    2124921422)
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     21423start &467
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    2127221445)
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    21274 )
    21275 *702 (Wire
     21446on &493
     21447)
     21448*704 (Wire
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    2127721450shape (OrthoPolyLine
     
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    2128721460)
    21288 start &479
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    2131021483)
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     21485)
     21486*705 (Wire
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     21519on &496
     21520)
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    2136221535sat 32
    2136321536eat 16
     
    2137921552)
    2138021553)
    21381 on &496
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     21554on &497
     21555)
     21556*707 (Wire
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    2139621569]
    2139721570)
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     21571start &214
     21572end &502
    2140021573sat 32
    2140121574eat 32
     
    2141721590)
    2141821591)
    21419 on &515
    21420 )
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     21592on &516
     21593)
     21594*708 (Wire
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    2143221605]
    2143321606)
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    2145321626)
    2145421627)
    21455 on &496
    21456 )
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     21629)
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    2148821661)
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     21662on &496
     21663)
     21664*710 (Wire
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    2150821681ss 0
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    2152821701)
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    21530 )
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     21702on &517
     21703)
     21704*711 (Wire
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    2154521718)
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     21719start &241
     21720end &109
    2154821721sat 32
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    2156621739)
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     21740on &518
     21741)
     21742*712 (Wire
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    2158221755)
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    2158521758eat 16
     
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    2160221775)
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    21604 )
    21605 *711 (Wire
     21776on &519
     21777)
     21778*713 (Wire
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    2161721790)
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    2162021793sat 32
     
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     21812on &520
     21813)
     21814*714 (Wire
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    2165321826)
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    2165621829sat 32
     
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    2167421847)
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    21676 )
    21677 *713 (Wire
     21848on &521
     21849)
     21850*715 (Wire
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    2168821861]
    2168921862)
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    2169221865sat 32
     
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    2171021883)
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    21712 )
    21713 *714 (Wire
     21884on &522
     21885)
     21886*716 (Wire
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     21901end &215
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    2174821921)
    21749 on &522
    21750 )
    21751 *715 (Wire
     21922on &523
     21923)
     21924*717 (Wire
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     21937start &216
     21938end &525
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    2176721940eat 32
     
    2178521958)
    2178621959)
    21787 on &523
    21788 )
    21789 *716 (Wire
     21960on &524
     21961)
     21962*718 (Wire
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    2180121974)
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     21975end &532
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    2182221995)
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    21824 )
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     21996on &519
     21997)
     21998*719 (Wire
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     22001*720 (BdJunction
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    2183022003ps "OnConnectorStrategy"
     
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     22026end &529
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    2185522028eat 32
     
    2187122044)
    2187222045)
    21873 on &548
    21874 )
    21875 *719 (Wire
     22046on &549
     22047)
     22048*721 (Wire
    2187622049uid 10443,0
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    2188722060]
    2188822061)
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    21890 end &718
     22062start &118
     22063end &720
    2189122064sat 32
    2189222065eat 32
     
    2190922082)
    2191022083)
    21911 on &548
    21912 )
    21913 *720 (Wire
     22084on &549
     22085)
     22086*722 (Wire
    2191422087uid 10467,0
    2191522088shape (OrthoPolyLine
     
    2192622099]
    2192722100)
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     22101start &144
    2192922102end &65
    2193022103es 0
     
    2194822121)
    2194922122)
    21950 on &549
    21951 )
    21952 *721 (Wire
     22123on &550
     22124)
     22125*723 (Wire
    2195322126uid 10629,0
    2195422127shape (OrthoPolyLine
     
    2196322136]
    2196422137)
    21965 start &109
     22138start &110
    2196622139sat 32
    2196722140eat 16
     
    2198322156)
    2198422157)
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    21986 )
    21987 *722 (Wire
     22158on &551
     22159)
     22160*724 (Wire
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    2199822171]
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    2200122174sat 32
    2200222175eat 16
     
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    2201922192)
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    22021 )
    22022 *723 (Wire
     22193on &552
     22194)
     22195*725 (Wire
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    2203322206]
    2203422207)
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     22208end &565
    2203622209sat 16
    2203722210eat 32
     
    2205322226)
    2205422227)
    22055 on &551
    22056 )
    22057 *724 (Wire
     22228on &552
     22229)
     22230*726 (Wire
    2205822231uid 10691,0
    2205922232shape (OrthoPolyLine
     
    2206822241]
    2206922242)
    22070 end &565
     22243end &566
    2207122244sat 16
    2207222245eat 32
     
    2208822261)
    2208922262)
    22090 on &550
    22091 )
    22092 *725 (Wire
     22263on &551
     22264)
     22265*727 (Wire
    2209322266uid 10699,0
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    2210422277]
    2210522278)
    22106 end &559
     22279end &560
    2210722280sat 16
    2210822281eat 32
     
    2212422297)
    2212522298)
    22126 on &179
    22127 )
    22128 *726 (Wire
     22299on &180
     22300)
     22301*728 (Wire
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    2213022303shape (OrthoPolyLine
     
    2213922312]
    2214022313)
    22141 end &563
     22314end &564
    2214222315sat 16
    2214322316eat 32
     
    2215322326va (VaSet
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    22156 st "trigger_out"
     22328xt "110000,126000,117500,127000"
     22329st "drs_readout_started"
    2215722330blo "110000,126800"
    2215822331tm "WireNameMgr"
    2215922332)
    2216022333)
    22161 on &548
    22162 )
    22163 *727 (Wire
     22334on &570
     22335)
     22336*729 (Wire
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    2217422347]
    2217522348)
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    22177 end &553
     22349start &561
     22350end &554
    2217822351sat 32
    2217922352eat 32
     
    2219722370)
    2219822371)
    22199 on &552
    22200 )
    22201 *728 (Wire
     22372on &553
     22373)
     22374*730 (Wire
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    2220322376shape (OrthoPolyLine
     
    2221222385]
    2221322386)
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    22215 end &555
     22387start &562
     22388end &556
    2221622389sat 32
    2221722390eat 32
     
    2223522408)
    2223622409)
    22237 on &554
    22238 )
    22239 *729 (Wire
     22410on &555
     22411)
     22412*731 (Wire
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    2224122414shape (OrthoPolyLine
     
    2225022423]
    2225122424)
    22252 start &562
    22253 end &557
     22425start &563
     22426end &558
    2225422427sat 32
    2225522428eat 32
     
    2227322446)
    2227422447)
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     22448on &557
     22449)
     22450*732 (Wire
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     22452shape (OrthoPolyLine
     22453uid 11406,0
     22454va (VaSet
     22455vasetType 3
     22456)
     22457xt "40750,93000,43000,96000"
     22458pts [
     22459"40750,93000"
     22460"43000,93000"
     22461"43000,96000"
     22462]
     22463)
     22464start &66
     22465sat 32
     22466eat 16
     22467st 0
     22468sf 1
     22469si 0
     22470tg (WTG
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     22472ps "ConnStartEndStrategy"
     22473stg "STSignalDisplayStrategy"
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     22475uid 11410,0
     22476va (VaSet
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     22478xt "35000,95000,42500,96000"
     22479st "drs_readout_started"
     22480blo "35000,95800"
     22481tm "WireNameMgr"
     22482)
     22483)
     22484on &570
    2227622485)
    2227722486]
     
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     22502*734 (Text
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    2230122510)
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     22511*735 (MLText
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    2230422513va (VaSet
     
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    2232622535textVec [
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     22536*736 (Text
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    2232922538va (VaSet
     
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    2233622545)
    22337 *734 (Text
     22546*737 (Text
    2233822547uid 46,0
    2233922548va (VaSet
     
    2234522554blo "20000,1800"
    2234622555)
    22347 *735 (MLText
     22556*738 (MLText
    2234822557uid 47,0
    2234922558va (VaSet
     
    2235522564tm "BdCompilerDirectivesTextMgr"
    2235622565)
    22357 *736 (Text
     22566*739 (Text
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    2235922568va (VaSet
     
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    2236622575)
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     22576*740 (MLText
    2236822577uid 49,0
    2236922578va (VaSet
     
    2237322582tm "BdCompilerDirectivesTextMgr"
    2237422583)
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     22584*741 (Text
    2237622585uid 50,0
    2237722586va (VaSet
     
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    2238422593)
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     22594*742 (MLText
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    2238722596va (VaSet
     
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    2242222631pageBreakOrigin "-73000,0"
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     22632lastUid 11412,0
    2242422633defaultCommentText (CommentText
    2242522634shape (Rectangle
     
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    2248422693textVec [
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    2248622695va (VaSet
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    2249322702)
    22494 *741 (Text
     22703*744 (Text
    2249522704va (VaSet
    2249622705font "Arial,8,1"
     
    2250122710tm "BlkNameMgr"
    2250222711)
    22503 *742 (Text
     22712*745 (Text
    2250422713va (VaSet
    2250522714font "Arial,8,1"
     
    2253922748)
    2254022749defaultMWComponent (MWC
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    22546 lineWidth 2
    22547 )
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    22549 )
    22550 ttg (MlTextGroup
    22551 ps "CenterOffsetStrategy"
    22552 stg "VerticalLayoutStrategy"
    22553 textVec [
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    22555 va (VaSet
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    22557 )
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    22561 )
    22562 *744 (Text
    22563 va (VaSet
    22564 font "Arial,8,1"
    22565 )
    22566 xt "550,4500,7450,5500"
    22567 st "MWComponent"
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    22570 *745 (Text
    22571 va (VaSet
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    22573 )
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    22575 st "U_0"
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    22578 )
    22579 ]
    22580 )
    22581 ga (GenericAssociation
    22582 ps "EdgeToEdgeStrategy"
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    22584 text (MLText
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    22589 )
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    22591 )
    22592 elements [
    22593 ]
    22594 )
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    22596 )
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    22599 pname "params"
    22600 ptn "String"
    22601 )
    22602 visOptions (mwParamsVisibilityOptions
    22603 )
    22604 )
    22605 defaultSaComponent (SaComponent
    2260622750shape (Rectangle
    2260722751va (VaSet
     
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    2262222766)
    22623 xt "900,3500,3800,4500"
     22767xt "550,3500,3450,4500"
    2262422768st "Library"
    22625 blo "900,4300"
    22626 tm "BdLibraryNameMgr"
     22769blo "550,4300"
    2262722770)
    2262822771*747 (Text
     
    2263022773font "Arial,8,1"
    2263122774)
    22632 xt "900,4500,7100,5500"
    22633 st "SaComponent"
    22634 blo "900,5300"
    22635 tm "CptNameMgr"
     22775xt "550,4500,7450,5500"
     22776st "MWComponent"
     22777blo "550,5300"
    2263622778)
    2263722779*748 (Text
     
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    22641 xt "900,5500,2700,6500"
     22783xt "550,5500,2350,6500"
    2264222784st "U_0"
    22643 blo "900,6300"
     22785blo "550,6300"
    2264422786tm "InstanceNameMgr"
    2264522787)
     
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     22797xt "-6450,1500,-6450,1500"
    2265622798)
    2265722799header ""
     
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    22671 )
    22672 viewiconposition 0
    2267322804portVis (PortSigDisplay
    2267422805)
    22675 archFileType "UNKNOWN"
    22676 )
    22677 defaultVhdlComponent (VhdlComponent
     22806prms (Property
     22807pclass "params"
     22808pname "params"
     22809ptn "String"
     22810)
     22811visOptions (mwParamsVisibilityOptions
     22812)
     22813)
     22814defaultSaComponent (SaComponent
    2267822815shape (Rectangle
    2267922816va (VaSet
     
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    2269422831)
    22695 xt "500,3500,3400,4500"
     22832xt "900,3500,3800,4500"
    2269622833st "Library"
    22697 blo "500,4300"
     22834blo "900,4300"
     22835tm "BdLibraryNameMgr"
    2269822836)
    2269922837*750 (Text
     
    2270122839font "Arial,8,1"
    2270222840)
    22703 xt "500,4500,7500,5500"
    22704 st "VhdlComponent"
    22705 blo "500,5300"
     22841xt "900,4500,7100,5500"
     22842st "SaComponent"
     22843blo "900,5300"
     22844tm "CptNameMgr"
    2270622845)
    2270722846*751 (Text
     
    2270922848font "Arial,8,1"
    2271022849)
    22711 xt "500,5500,2300,6500"
     22850xt "900,5500,2700,6500"
    2271222851st "U_0"
    22713 blo "500,6300"
     22852blo "900,6300"
    2271422853tm "InstanceNameMgr"
    2271522854)
     
    2272322862font "Courier New,8,0"
    2272422863)
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     22864xt "-6100,1500,-6100,1500"
    2272622865)
    2272722866header ""
     
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    2273122870)
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     22872sl 0
     22873va (VaSet
     22874vasetType 1
     22875fg "49152,49152,49152"
     22876)
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     22878iconName "UnknownFile.png"
     22879iconMaskName "UnknownFile.msk"
     22880)
     22881viewiconposition 0
    2273222882portVis (PortSigDisplay
    2273322883)
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    22735 archName ""
    22736 archPath ""
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     22884archFileType "UNKNOWN"
     22885)
     22886defaultVhdlComponent (VhdlComponent
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    2274022888va (VaSet
     
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     22894xt "0,0,8000,10000"
    2274722895)
    2274822896ttg (MlTextGroup
     
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    2275522903)
    22756 xt "50,3500,2950,4500"
     22904xt "500,3500,3400,4500"
    2275722905st "Library"
    22758 blo "50,4300"
     22906blo "500,4300"
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    2449324702port (LogicalPort
    2449424703m 4
     
    2450424713uid 8609,0
    2450524714)
    24506 *855 (LeafLogPort
     24715*858 (LeafLogPort
    2450724716port (LogicalPort
    2450824717m 4
     
    2451624725uid 8611,0
    2451724726)
    24518 *856 (LeafLogPort
     24727*859 (LeafLogPort
    2451924728port (LogicalPort
    2452024729m 4
     
    2453024739uid 8613,0
    2453124740)
    24532 *857 (LeafLogPort
     24741*860 (LeafLogPort
    2453324742port (LogicalPort
    2453424743m 4
     
    2454224751uid 8758,0
    2454324752)
    24544 *858 (LeafLogPort
     24753*861 (LeafLogPort
    2454524754port (LogicalPort
    2454624755m 4
     
    2455424763uid 8760,0
    2455524764)
    24556 *859 (LeafLogPort
     24765*862 (LeafLogPort
    2455724766port (LogicalPort
    2455824767m 1
     
    2456724776uid 9018,0
    2456824777)
    24569 *860 (LeafLogPort
     24778*863 (LeafLogPort
    2457024779port (LogicalPort
    2457124780m 4
     
    2458224791uid 9247,0
    2458324792)
    24584 *861 (LeafLogPort
     24793*864 (LeafLogPort
    2458524794port (LogicalPort
    2458624795m 4
     
    2459824807uid 9249,0
    2459924808)
    24600 *862 (LeafLogPort
    24601 port (LogicalPort
    24602 m 1
    24603 decl (Decl
    24604 n "LOCKED_extraOUT"
    24605 t "std_logic"
    24606 o 90
    24607 suid 200,0
    24608 )
    24609 )
    24610 uid 9555,0
    24611 )
    24612 *863 (LeafLogPort
    24613 port (LogicalPort
    24614 m 1
    24615 decl (Decl
    24616 n "PSDONE_extraOUT"
    24617 t "std_logic"
    24618 o 91
    24619 suid 201,0
    24620 )
    24621 )
    24622 uid 9557,0
    24623 )
    24624 *864 (LeafLogPort
    24625 port (LogicalPort
    24626 m 1
    24627 decl (Decl
    24628 n "PSINCDEC_OUT"
    24629 t "std_logic"
    24630 o 92
    24631 suid 202,0
    24632 )
    24633 )
    24634 uid 9559,0
    24635 )
    2463624809*865 (LeafLogPort
    2463724810port (LogicalPort
    2463824811m 1
    2463924812decl (Decl
    24640 n "PSEN_OUT"
    24641 t "std_logic"
    24642 o 93
    24643 suid 203,0
    24644 )
    24645 )
    24646 uid 9561,0
     24813n "LOCKED_extraOUT"
     24814t "std_logic"
     24815o 90
     24816suid 200,0
     24817)
     24818)
     24819uid 9555,0
    2464724820)
    2464824821*866 (LeafLogPort
     
    2465024823m 1
    2465124824decl (Decl
     24825n "PSDONE_extraOUT"
     24826t "std_logic"
     24827o 91
     24828suid 201,0
     24829)
     24830)
     24831uid 9557,0
     24832)
     24833*867 (LeafLogPort
     24834port (LogicalPort
     24835m 1
     24836decl (Decl
     24837n "PSINCDEC_OUT"
     24838t "std_logic"
     24839o 92
     24840suid 202,0
     24841)
     24842)
     24843uid 9559,0
     24844)
     24845*868 (LeafLogPort
     24846port (LogicalPort
     24847m 1
     24848decl (Decl
     24849n "PSEN_OUT"
     24850t "std_logic"
     24851o 93
     24852suid 203,0
     24853)
     24854)
     24855uid 9561,0
     24856)
     24857*869 (LeafLogPort
     24858port (LogicalPort
     24859m 1
     24860decl (Decl
    2465224861n "PSCLK_OUT"
    2465324862t "std_logic"
     
    2465824867uid 9563,0
    2465924868)
    24660 *867 (LeafLogPort
     24869*870 (LeafLogPort
    2466124870port (LogicalPort
    2466224871m 1
     
    2467224881uid 9567,0
    2467324882)
    24674 *868 (LeafLogPort
     24883*871 (LeafLogPort
    2467524884port (LogicalPort
    2467624885m 1
     
    2468824897uid 9569,0
    2468924898)
    24690 *869 (LeafLogPort
     24899*872 (LeafLogPort
    2469124900port (LogicalPort
    2469224901m 1
     
    2470424913uid 9571,0
    2470524914)
    24706 *870 (LeafLogPort
     24915*873 (LeafLogPort
    2470724916port (LogicalPort
    2470824917m 1
     
    2471924928uid 9573,0
    2472024929)
    24721 *871 (LeafLogPort
    24722 port (LogicalPort
    24723 m 1
    24724 decl (Decl
    24725 n "PS_DIR_IN"
    24726 t "std_logic"
    24727 o 101
    24728 suid 213,0
    24729 )
    24730 )
    24731 uid 9575,0
    24732 )
    24733 *872 (LeafLogPort
    24734 port (LogicalPort
    24735 m 1
    24736 decl (Decl
    24737 n "PS_DO_IN"
    24738 t "std_logic"
    24739 o 100
    24740 suid 214,0
    24741 )
    24742 )
    24743 uid 9577,0
    24744 )
    24745 *873 (LeafLogPort
    24746 port (LogicalPort
    24747 m 1
    24748 decl (Decl
    24749 n "CLK50_OUT"
    24750 t "std_logic"
    24751 o 102
    24752 suid 216,0
    24753 )
    24754 )
    24755 uid 9801,0
    24756 )
    2475724930*874 (LeafLogPort
    2475824931port (LogicalPort
    2475924932m 1
    2476024933decl (Decl
    24761 n "CLK25_OUT"
    24762 t "std_logic"
    24763 o 103
    24764 suid 218,0
    24765 )
    24766 )
    24767 uid 9803,0
     24934n "PS_DIR_IN"
     24935t "std_logic"
     24936o 101
     24937suid 213,0
     24938)
     24939)
     24940uid 9575,0
    2476824941)
    2476924942*875 (LeafLogPort
     
    2477124944m 1
    2477224945decl (Decl
     24946n "PS_DO_IN"
     24947t "std_logic"
     24948o 100
     24949suid 214,0
     24950)
     24951)
     24952uid 9577,0
     24953)
     24954*876 (LeafLogPort
     24955port (LogicalPort
     24956m 1
     24957decl (Decl
     24958n "CLK50_OUT"
     24959t "std_logic"
     24960o 102
     24961suid 216,0
     24962)
     24963)
     24964uid 9801,0
     24965)
     24966*877 (LeafLogPort
     24967port (LogicalPort
     24968m 1
     24969decl (Decl
     24970n "CLK25_OUT"
     24971t "std_logic"
     24972o 103
     24973suid 218,0
     24974)
     24975)
     24976uid 9803,0
     24977)
     24978*878 (LeafLogPort
     24979port (LogicalPort
     24980m 1
     24981decl (Decl
    2477324982n "CLK25_PSOUT"
    2477424983t "std_logic"
     
    2477924988uid 9805,0
    2478024989)
    24781 *876 (LeafLogPort
     24990*879 (LeafLogPort
    2478224991port (LogicalPort
    2478324992m 4
     
    2479425003uid 10024,0
    2479525004)
    24796 *877 (LeafLogPort
     25005*880 (LeafLogPort
    2479725006port (LogicalPort
    2479825007m 4
     
    2480725016uid 10026,0
    2480825017)
    24809 *878 (LeafLogPort
     25018*881 (LeafLogPort
    2481025019port (LogicalPort
    2481125020m 4
     
    2482025029uid 10028,0
    2482125030)
    24822 *879 (LeafLogPort
     25031*882 (LeafLogPort
    2482325032port (LogicalPort
    2482425033m 4
     
    2483625045uid 10208,0
    2483725046)
    24838 *880 (LeafLogPort
     25047*883 (LeafLogPort
    2483925048port (LogicalPort
    2484025049m 4
     
    2485225061uid 10210,0
    2485325062)
    24854 *881 (LeafLogPort
     25063*884 (LeafLogPort
    2485525064port (LogicalPort
    2485625065m 4
     
    2486425073uid 10294,0
    2486525074)
    24866 *882 (LeafLogPort
     25075*885 (LeafLogPort
    2486725076port (LogicalPort
    2486825077m 4
     
    2487625085uid 10334,0
    2487725086)
    24878 *883 (LeafLogPort
     25087*886 (LeafLogPort
    2487925088port (LogicalPort
    2488025089m 4
     
    2488925098uid 10336,0
    2489025099)
    24891 *884 (LeafLogPort
     25100*887 (LeafLogPort
    2489225101port (LogicalPort
    2489325102m 4
     
    2490225111uid 10338,0
    2490325112)
    24904 *885 (LeafLogPort
     25113*888 (LeafLogPort
    2490525114port (LogicalPort
    2490625115m 4
     
    2491625125uid 10340,0
    2491725126)
    24918 *886 (LeafLogPort
     25127*889 (LeafLogPort
    2491925128port (LogicalPort
    2492025129m 1
     
    2492925138uid 10342,0
    2493025139)
    24931 *887 (LeafLogPort
     25140*890 (LeafLogPort
    2493225141port (LogicalPort
    2493325142m 4
     
    2494325152uid 10473,0
    2494425153)
    24945 *888 (LeafLogPort
     25154*891 (LeafLogPort
    2494625155port (LogicalPort
    2494725156lang 2
     
    2496025169uid 10475,0
    2496125170)
    24962 *889 (LeafLogPort
     25171*892 (LeafLogPort
    2496325172port (LogicalPort
    2496425173m 4
     
    2497225181uid 10763,0
    2497325182)
    24974 *890 (LeafLogPort
     25183*893 (LeafLogPort
    2497525184port (LogicalPort
    2497625185m 4
     
    2498425193uid 10765,0
    2498525194)
    24986 *891 (LeafLogPort
     25195*894 (LeafLogPort
    2498725196port (LogicalPort
    2498825197m 1
     
    2499625205uid 10767,0
    2499725206)
    24998 *892 (LeafLogPort
     25207*895 (LeafLogPort
    2499925208port (LogicalPort
    2500025209m 1
     
    2500825217uid 10769,0
    2500925218)
    25010 *893 (LeafLogPort
     25219*896 (LeafLogPort
    2501125220port (LogicalPort
    2501225221m 1
     
    2501925228)
    2502025229uid 10771,0
     25230)
     25231*897 (LeafLogPort
     25232port (LogicalPort
     25233m 4
     25234decl (Decl
     25235n "drs_readout_started"
     25236t "std_logic"
     25237o 121
     25238suid 252,0
     25239)
     25240)
     25241uid 11411,0
    2502125242)
    2502225243]
     
    2502725248uid 67,0
    2502825249optionalChildren [
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     25267emptyMRCItem *899 (MRCItem
     25268litem &764
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    2504925270dimension 20
    2505025271)
    2505125272uid 69,0
    2505225273optionalChildren [
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    2505825279)
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    2506425285)
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    2506825289hidden 1
     
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    2507125292)
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    2507725298)
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    2508325304)
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    2508925310)
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    2509425315uid 531,0
    2509525316)
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    2510025321uid 533,0
    2510125322)
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    2510725328)
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    2511325334)
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    2511925340)
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    2513125352)
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    2515325374dimension 20
    2515425375uid 1458,0
    2515525376)
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    2515825379pos 9
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    2516025381uid 1695,0
    2516125382)
    25162 *914 (MRCItem
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     25384litem &792
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    2516525386dimension 20
    2516625387uid 1994,0
    2516725388)
    25168 *915 (MRCItem
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     25390litem &793
    2517025391pos 37
    2517125392dimension 20
    2517225393uid 2306,0
    2517325394)
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    25175 litem &791
     25395*920 (MRCItem
     25396litem &794
    2517625397pos 38
    2517725398dimension 20
    2517825399uid 2511,0
    2517925400)
    25180 *917 (MRCItem
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     25402litem &795
    2518225403pos 39
    2518325404dimension 20
    2518425405uid 2513,0
    2518525406)
    25186 *918 (MRCItem
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    2518825409pos 40
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    2519025411uid 2515,0
    2519125412)
    25192 *919 (MRCItem
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    2519625417uid 2517,0
    2519725418)
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    2520325424)
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    2521525436)
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  • firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib/hds/@f@a@d_main/struct.bd.bak

    r10075 r10081  
    241241name "HEARTBEAT_PWM_DIVIDER"
    242242type "integer"
    243 value "500"
     243value "50000"
    244244e "-- 10kHz @ 50 MHz"
    245245)
     
    466466(vvPair
    467467variable "time"
    468 value "17:54:26"
     468value "18:05:35"
    469469)
    470470(vvPair
     
    1645716457)
    1645816458xt "129000,122600,164000,125000"
    16459 st "HEARTBEAT_PWM_DIVIDER = 500         ( integer ) -- 10kHz @ 50 MHz
     16459st "HEARTBEAT_PWM_DIVIDER = 50000       ( integer ) -- 10kHz @ 50 MHz
    1646016460MAX_DELAY             = 100         ( integer )                   
    1646116461WAITING_DIVIDER       = 50000000    ( integer ) -- 1Hz @ 50 MHz   
     
    1646816468name "HEARTBEAT_PWM_DIVIDER"
    1646916469type "integer"
    16470 value "500"
     16470value "50000"
    1647116471e "-- 10kHz @ 50 MHz"
    1647216472)
     
    2242122421hasePageBreakOrigin 1
    2242222422pageBreakOrigin "-73000,0"
    22423 lastUid 11218,0
     22423lastUid 11301,0
    2242422424defaultCommentText (CommentText
    2242522425shape (Rectangle
  • firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib/hds/@f@a@d_main/symbol.sb

    r10075 r10081  
    13311331(vvPair
    13321332variable "date"
    1333 value "04.01.2011"
     1333value "05.01.2011"
    13341334)
    13351335(vvPair
    13361336variable "day"
    1337 value "Di"
     1337value "Mi"
    13381338)
    13391339(vvPair
    13401340variable "day_long"
    1341 value "Dienstag"
     1341value "Mittwoch"
    13421342)
    13431343(vvPair
    13441344variable "dd"
    1345 value "04"
     1345value "05"
    13461346)
    13471347(vvPair
     
    14831483(vvPair
    14841484variable "time"
    1485 value "18:05:35"
     1485value "14:33:40"
    14861486)
    14871487(vvPair
     
    44574457)
    44584458)
    4459 lastUid 5081,0
     4459lastUid 5104,0
    44604460okToSyncOnLoad 1
    44614461OkToSyncGenericsOnLoad 1
  • firmware/FAD/FACT_FAD_20MHz_VAR_PS/FACT_FAD_lib/hds/data_generator/symbol.sb

    r10073 r10081  
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    12251243(vvPair
     
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